?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Linux 4.19.133
[linux/fpc-iii.git] / drivers / net / ethernet / broadcom / bcmsysport.c
blob6b761f6b8fd562e023d3d0229590d477968bdec0
1 /*
2 * Broadcom BCM7xxx System Port Ethernet MAC driver
3 *
4 * Copyright (C) 2014 Broadcom Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/platform_device.h>
20 #include <linux/of.h>
21 #include <linux/of_net.h>
22 #include <linux/of_mdio.h>
23 #include <linux/phy.h>
24 #include <linux/phy_fixed.h>
25 #include <net/dsa.h>
26 #include <net/ip.h>
27 #include <net/ipv6.h>
28
29 #include "bcmsysport.h"
30
31 /* I/O accessors register helpers */
32 #define BCM_SYSPORT_IO_MACRO(name, offset) \
33 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \
34 { \
35 u32 reg = readl_relaxed(priv->base + offset + off); \
36 return reg; \
37 } \
38 static inline void name##_writel(struct bcm_sysport_priv *priv, \
39 u32 val, u32 off) \
40 { \
41 writel_relaxed(val, priv->base + offset + off); \
42 } \
43
44 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
45 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
46 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
47 BCM_SYSPORT_IO_MACRO(gib, SYS_PORT_GIB_OFFSET);
48 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
49 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
50 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
51 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
52 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
53 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
54
55 /* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact
56 * same layout, except it has been moved by 4 bytes up, *sigh*
57 */
58 static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off)
59 {
60 if (priv->is_lite && off >= RDMA_STATUS)
61 off += 4;
62 return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off);
63 }
64
65 static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off)
66 {
67 if (priv->is_lite && off >= RDMA_STATUS)
68 off += 4;
69 writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off);
70 }
71
72 static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit)
73 {
74 if (!priv->is_lite) {
75 return BIT(bit);
76 } else {
77 if (bit >= ACB_ALGO)
78 return BIT(bit + 1);
79 else
80 return BIT(bit);
81 }
82 }
83
84 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
85 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
86 */
87 #define BCM_SYSPORT_INTR_L2(which) \
88 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
89 u32 mask) \
90 { \
91 priv->irq##which##_mask &= ~(mask); \
92 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
93 } \
94 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
95 u32 mask) \
96 { \
97 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
98 priv->irq##which##_mask |= (mask); \
99 } \
100
101 BCM_SYSPORT_INTR_L2(0)
102 BCM_SYSPORT_INTR_L2(1)
103
104 /* Register accesses to GISB/RBUS registers are expensive (few hundred
105 * nanoseconds), so keep the check for 64-bits explicit here to save
106 * one register write per-packet on 32-bits platforms.
107 */
108 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
109 void __iomem *d,
110 dma_addr_t addr)
111 {
112 #ifdef CONFIG_PHYS_ADDR_T_64BIT
113 writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
114 d + DESC_ADDR_HI_STATUS_LEN);
115 #endif
116 writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO);
117 }
118
119 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
120 struct dma_desc *desc,
121 unsigned int port)
122 {
123 /* Ports are latched, so write upper address first */
124 tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
125 tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
126 }
127
128 /* Ethtool operations */
129 static int bcm_sysport_set_rx_csum(struct net_device *dev,
130 netdev_features_t wanted)
131 {
132 struct bcm_sysport_priv *priv = netdev_priv(dev);
133 u32 reg;
134
135 priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
136 reg = rxchk_readl(priv, RXCHK_CONTROL);
137 /* Clear L2 header checks, which would prevent BPDUs
138 * from being received.
139 */
140 reg &= ~RXCHK_L2_HDR_DIS;
141 if (priv->rx_chk_en)
142 reg |= RXCHK_EN;
143 else
144 reg &= ~RXCHK_EN;
145
146 /* If UniMAC forwards CRC, we need to skip over it to get
147 * a valid CHK bit to be set in the per-packet status word
148 */
149 if (priv->rx_chk_en && priv->crc_fwd)
150 reg |= RXCHK_SKIP_FCS;
151 else
152 reg &= ~RXCHK_SKIP_FCS;
153
154 /* If Broadcom tags are enabled (e.g: using a switch), make
155 * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
156 * tag after the Ethernet MAC Source Address.
157 */
158 if (netdev_uses_dsa(dev))
159 reg |= RXCHK_BRCM_TAG_EN;
160 else
161 reg &= ~RXCHK_BRCM_TAG_EN;
162
163 rxchk_writel(priv, reg, RXCHK_CONTROL);
164
165 return 0;
166 }
167
168 static int bcm_sysport_set_tx_csum(struct net_device *dev,
169 netdev_features_t wanted)
170 {
171 struct bcm_sysport_priv *priv = netdev_priv(dev);
172 u32 reg;
173
174 /* Hardware transmit checksum requires us to enable the Transmit status
175 * block prepended to the packet contents
176 */
177 priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
178 reg = tdma_readl(priv, TDMA_CONTROL);
179 if (priv->tsb_en)
180 reg |= tdma_control_bit(priv, TSB_EN);
181 else
182 reg &= ~tdma_control_bit(priv, TSB_EN);
183 tdma_writel(priv, reg, TDMA_CONTROL);
184
185 return 0;
186 }
187
188 static int bcm_sysport_set_features(struct net_device *dev,
189 netdev_features_t features)
190 {
191 netdev_features_t changed = features ^ dev->features;
192 netdev_features_t wanted = dev->wanted_features;
193 int ret = 0;
194
195 if (changed & NETIF_F_RXCSUM)
196 ret = bcm_sysport_set_rx_csum(dev, wanted);
197 if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
198 ret = bcm_sysport_set_tx_csum(dev, wanted);
199
200 return ret;
201 }
202
203 /* Hardware counters must be kept in sync because the order/offset
204 * is important here (order in structure declaration = order in hardware)
205 */
206 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
207 /* general stats */
208 STAT_NETDEV64(rx_packets),
209 STAT_NETDEV64(tx_packets),
210 STAT_NETDEV64(rx_bytes),
211 STAT_NETDEV64(tx_bytes),
212 STAT_NETDEV(rx_errors),
213 STAT_NETDEV(tx_errors),
214 STAT_NETDEV(rx_dropped),
215 STAT_NETDEV(tx_dropped),
216 STAT_NETDEV(multicast),
217 /* UniMAC RSV counters */
218 STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
219 STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
220 STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
221 STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
222 STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
223 STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
224 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
225 STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
226 STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
227 STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
228 STAT_MIB_RX("rx_pkts", mib.rx.pkt),
229 STAT_MIB_RX("rx_bytes", mib.rx.bytes),
230 STAT_MIB_RX("rx_multicast", mib.rx.mca),
231 STAT_MIB_RX("rx_broadcast", mib.rx.bca),
232 STAT_MIB_RX("rx_fcs", mib.rx.fcs),
233 STAT_MIB_RX("rx_control", mib.rx.cf),
234 STAT_MIB_RX("rx_pause", mib.rx.pf),
235 STAT_MIB_RX("rx_unknown", mib.rx.uo),
236 STAT_MIB_RX("rx_align", mib.rx.aln),
237 STAT_MIB_RX("rx_outrange", mib.rx.flr),
238 STAT_MIB_RX("rx_code", mib.rx.cde),
239 STAT_MIB_RX("rx_carrier", mib.rx.fcr),
240 STAT_MIB_RX("rx_oversize", mib.rx.ovr),
241 STAT_MIB_RX("rx_jabber", mib.rx.jbr),
242 STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
243 STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
244 STAT_MIB_RX("rx_unicast", mib.rx.uc),
245 STAT_MIB_RX("rx_ppp", mib.rx.ppp),
246 STAT_MIB_RX("rx_crc", mib.rx.rcrc),
247 /* UniMAC TSV counters */
248 STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
249 STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
250 STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
251 STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
252 STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
253 STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
254 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
255 STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
256 STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
257 STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
258 STAT_MIB_TX("tx_pkts", mib.tx.pkts),
259 STAT_MIB_TX("tx_multicast", mib.tx.mca),
260 STAT_MIB_TX("tx_broadcast", mib.tx.bca),
261 STAT_MIB_TX("tx_pause", mib.tx.pf),
262 STAT_MIB_TX("tx_control", mib.tx.cf),
263 STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
264 STAT_MIB_TX("tx_oversize", mib.tx.ovr),
265 STAT_MIB_TX("tx_defer", mib.tx.drf),
266 STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
267 STAT_MIB_TX("tx_single_col", mib.tx.scl),
268 STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
269 STAT_MIB_TX("tx_late_col", mib.tx.lcl),
270 STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
271 STAT_MIB_TX("tx_frags", mib.tx.frg),
272 STAT_MIB_TX("tx_total_col", mib.tx.ncl),
273 STAT_MIB_TX("tx_jabber", mib.tx.jbr),
274 STAT_MIB_TX("tx_bytes", mib.tx.bytes),
275 STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
276 STAT_MIB_TX("tx_unicast", mib.tx.uc),
277 /* UniMAC RUNT counters */
278 STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
279 STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
280 STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
281 STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
282 /* RXCHK misc statistics */
283 STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
284 STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
285 RXCHK_OTHER_DISC_CNTR),
286 /* RBUF misc statistics */
287 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
288 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
289 STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
290 STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
291 STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
292 /* Per TX-queue statistics are dynamically appended */
293 };
294
295 #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats)
296
297 static void bcm_sysport_get_drvinfo(struct net_device *dev,
298 struct ethtool_drvinfo *info)
299 {
300 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
301 strlcpy(info->version, "0.1", sizeof(info->version));
302 strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
303 }
304
305 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
306 {
307 struct bcm_sysport_priv *priv = netdev_priv(dev);
308
309 return priv->msg_enable;
310 }
311
312 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
313 {
314 struct bcm_sysport_priv *priv = netdev_priv(dev);
315
316 priv->msg_enable = enable;
317 }
318
319 static inline bool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type)
320 {
321 switch (type) {
322 case BCM_SYSPORT_STAT_NETDEV:
323 case BCM_SYSPORT_STAT_NETDEV64:
324 case BCM_SYSPORT_STAT_RXCHK:
325 case BCM_SYSPORT_STAT_RBUF:
326 case BCM_SYSPORT_STAT_SOFT:
327 return true;
328 default:
329 return false;
330 }
331 }
332
333 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
334 {
335 struct bcm_sysport_priv *priv = netdev_priv(dev);
336 const struct bcm_sysport_stats *s;
337 unsigned int i, j;
338
339 switch (string_set) {
340 case ETH_SS_STATS:
341 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
342 s = &bcm_sysport_gstrings_stats[i];
343 if (priv->is_lite &&
344 !bcm_sysport_lite_stat_valid(s->type))
345 continue;
346 j++;
347 }
348 /* Include per-queue statistics */
349 return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
350 default:
351 return -EOPNOTSUPP;
352 }
353 }
354
355 static void bcm_sysport_get_strings(struct net_device *dev,
356 u32 stringset, u8 *data)
357 {
358 struct bcm_sysport_priv *priv = netdev_priv(dev);
359 const struct bcm_sysport_stats *s;
360 char buf[128];
361 int i, j;
362
363 switch (stringset) {
364 case ETH_SS_STATS:
365 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
366 s = &bcm_sysport_gstrings_stats[i];
367 if (priv->is_lite &&
368 !bcm_sysport_lite_stat_valid(s->type))
369 continue;
370
371 memcpy(data + j * ETH_GSTRING_LEN, s->stat_string,
372 ETH_GSTRING_LEN);
373 j++;
374 }
375
376 for (i = 0; i < dev->num_tx_queues; i++) {
377 snprintf(buf, sizeof(buf), "txq%d_packets", i);
378 memcpy(data + j * ETH_GSTRING_LEN, buf,
379 ETH_GSTRING_LEN);
380 j++;
381
382 snprintf(buf, sizeof(buf), "txq%d_bytes", i);
383 memcpy(data + j * ETH_GSTRING_LEN, buf,
384 ETH_GSTRING_LEN);
385 j++;
386 }
387 break;
388 default:
389 break;
390 }
391 }
392
393 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
394 {
395 int i, j = 0;
396
397 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
398 const struct bcm_sysport_stats *s;
399 u8 offset = 0;
400 u32 val = 0;
401 char *p;
402
403 s = &bcm_sysport_gstrings_stats[i];
404 switch (s->type) {
405 case BCM_SYSPORT_STAT_NETDEV:
406 case BCM_SYSPORT_STAT_NETDEV64:
407 case BCM_SYSPORT_STAT_SOFT:
408 continue;
409 case BCM_SYSPORT_STAT_MIB_RX:
410 case BCM_SYSPORT_STAT_MIB_TX:
411 case BCM_SYSPORT_STAT_RUNT:
412 if (priv->is_lite)
413 continue;
414
415 if (s->type != BCM_SYSPORT_STAT_MIB_RX)
416 offset = UMAC_MIB_STAT_OFFSET;
417 val = umac_readl(priv, UMAC_MIB_START + j + offset);
418 break;
419 case BCM_SYSPORT_STAT_RXCHK:
420 val = rxchk_readl(priv, s->reg_offset);
421 if (val == ~0)
422 rxchk_writel(priv, 0, s->reg_offset);
423 break;
424 case BCM_SYSPORT_STAT_RBUF:
425 val = rbuf_readl(priv, s->reg_offset);
426 if (val == ~0)
427 rbuf_writel(priv, 0, s->reg_offset);
428 break;
429 }
430
431 j += s->stat_sizeof;
432 p = (char *)priv + s->stat_offset;
433 *(u32 *)p = val;
434 }
435
436 netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
437 }
438
439 static void bcm_sysport_update_tx_stats(struct bcm_sysport_priv *priv,
440 u64 *tx_bytes, u64 *tx_packets)
441 {
442 struct bcm_sysport_tx_ring *ring;
443 u64 bytes = 0, packets = 0;
444 unsigned int start;
445 unsigned int q;
446
447 for (q = 0; q < priv->netdev->num_tx_queues; q++) {
448 ring = &priv->tx_rings[q];
449 do {
450 start = u64_stats_fetch_begin_irq(&priv->syncp);
451 bytes = ring->bytes;
452 packets = ring->packets;
453 } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
454
455 *tx_bytes += bytes;
456 *tx_packets += packets;
457 }
458 }
459
460 static void bcm_sysport_get_stats(struct net_device *dev,
461 struct ethtool_stats *stats, u64 *data)
462 {
463 struct bcm_sysport_priv *priv = netdev_priv(dev);
464 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
465 struct u64_stats_sync *syncp = &priv->syncp;
466 struct bcm_sysport_tx_ring *ring;
467 u64 tx_bytes = 0, tx_packets = 0;
468 unsigned int start;
469 int i, j;
470
471 if (netif_running(dev)) {
472 bcm_sysport_update_mib_counters(priv);
473 bcm_sysport_update_tx_stats(priv, &tx_bytes, &tx_packets);
474 stats64->tx_bytes = tx_bytes;
475 stats64->tx_packets = tx_packets;
476 }
477
478 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
479 const struct bcm_sysport_stats *s;
480 char *p;
481
482 s = &bcm_sysport_gstrings_stats[i];
483 if (s->type == BCM_SYSPORT_STAT_NETDEV)
484 p = (char *)&dev->stats;
485 else if (s->type == BCM_SYSPORT_STAT_NETDEV64)
486 p = (char *)stats64;
487 else
488 p = (char *)priv;
489
490 if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type))
491 continue;
492 p += s->stat_offset;
493
494 if (s->stat_sizeof == sizeof(u64) &&
495 s->type == BCM_SYSPORT_STAT_NETDEV64) {
496 do {
497 start = u64_stats_fetch_begin_irq(syncp);
498 data[i] = *(u64 *)p;
499 } while (u64_stats_fetch_retry_irq(syncp, start));
500 } else
501 data[i] = *(u32 *)p;
502 j++;
503 }
504
505 /* For SYSTEMPORT Lite since we have holes in our statistics, j would
506 * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it
507 * needs to point to how many total statistics we have minus the
508 * number of per TX queue statistics
509 */
510 j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) -
511 dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
512
513 for (i = 0; i < dev->num_tx_queues; i++) {
514 ring = &priv->tx_rings[i];
515 data[j] = ring->packets;
516 j++;
517 data[j] = ring->bytes;
518 j++;
519 }
520 }
521
522 static void bcm_sysport_get_wol(struct net_device *dev,
523 struct ethtool_wolinfo *wol)
524 {
525 struct bcm_sysport_priv *priv = netdev_priv(dev);
526
527 wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER;
528 wol->wolopts = priv->wolopts;
529
530 if (!(priv->wolopts & WAKE_MAGICSECURE))
531 return;
532
533 memcpy(wol->sopass, priv->sopass, sizeof(priv->sopass));
534 }
535
536 static int bcm_sysport_set_wol(struct net_device *dev,
537 struct ethtool_wolinfo *wol)
538 {
539 struct bcm_sysport_priv *priv = netdev_priv(dev);
540 struct device *kdev = &priv->pdev->dev;
541 u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER;
542
543 if (!device_can_wakeup(kdev))
544 return -ENOTSUPP;
545
546 if (wol->wolopts & ~supported)
547 return -EINVAL;
548
549 if (wol->wolopts & WAKE_MAGICSECURE)
550 memcpy(priv->sopass, wol->sopass, sizeof(priv->sopass));
551
552 /* Flag the device and relevant IRQ as wakeup capable */
553 if (wol->wolopts) {
554 device_set_wakeup_enable(kdev, 1);
555 if (priv->wol_irq_disabled)
556 enable_irq_wake(priv->wol_irq);
557 priv->wol_irq_disabled = 0;
558 } else {
559 device_set_wakeup_enable(kdev, 0);
560 /* Avoid unbalanced disable_irq_wake calls */
561 if (!priv->wol_irq_disabled)
562 disable_irq_wake(priv->wol_irq);
563 priv->wol_irq_disabled = 1;
564 }
565
566 priv->wolopts = wol->wolopts;
567
568 return 0;
569 }
570
571 static void bcm_sysport_set_rx_coalesce(struct bcm_sysport_priv *priv,
572 u32 usecs, u32 pkts)
573 {
574 u32 reg;
575
576 reg = rdma_readl(priv, RDMA_MBDONE_INTR);
577 reg &= ~(RDMA_INTR_THRESH_MASK |
578 RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
579 reg |= pkts;
580 reg |= DIV_ROUND_UP(usecs * 1000, 8192) << RDMA_TIMEOUT_SHIFT;
581 rdma_writel(priv, reg, RDMA_MBDONE_INTR);
582 }
583
584 static void bcm_sysport_set_tx_coalesce(struct bcm_sysport_tx_ring *ring,
585 struct ethtool_coalesce *ec)
586 {
587 struct bcm_sysport_priv *priv = ring->priv;
588 u32 reg;
589
590 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(ring->index));
591 reg &= ~(RING_INTR_THRESH_MASK |
592 RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
593 reg |= ec->tx_max_coalesced_frames;
594 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
595 RING_TIMEOUT_SHIFT;
596 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(ring->index));
597 }
598
599 static int bcm_sysport_get_coalesce(struct net_device *dev,
600 struct ethtool_coalesce *ec)
601 {
602 struct bcm_sysport_priv *priv = netdev_priv(dev);
603 u32 reg;
604
605 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
606
607 ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
608 ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
609
610 reg = rdma_readl(priv, RDMA_MBDONE_INTR);
611
612 ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
613 ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
614 ec->use_adaptive_rx_coalesce = priv->dim.use_dim;
615
616 return 0;
617 }
618
619 static int bcm_sysport_set_coalesce(struct net_device *dev,
620 struct ethtool_coalesce *ec)
621 {
622 struct bcm_sysport_priv *priv = netdev_priv(dev);
623 struct net_dim_cq_moder moder;
624 u32 usecs, pkts;
625 unsigned int i;
626
627 /* Base system clock is 125Mhz, DMA timeout is this reference clock
628 * divided by 1024, which yield roughly 8.192 us, our maximum value has
629 * to fit in the RING_TIMEOUT_MASK (16 bits).
630 */
631 if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
632 ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
633 ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
634 ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
635 return -EINVAL;
636
637 if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
638 (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0) ||
639 ec->use_adaptive_tx_coalesce)
640 return -EINVAL;
641
642 for (i = 0; i < dev->num_tx_queues; i++)
643 bcm_sysport_set_tx_coalesce(&priv->tx_rings[i], ec);
644
645 priv->rx_coalesce_usecs = ec->rx_coalesce_usecs;
646 priv->rx_max_coalesced_frames = ec->rx_max_coalesced_frames;
647 usecs = priv->rx_coalesce_usecs;
648 pkts = priv->rx_max_coalesced_frames;
649
650 if (ec->use_adaptive_rx_coalesce && !priv->dim.use_dim) {
651 moder = net_dim_get_def_rx_moderation(priv->dim.dim.mode);
652 usecs = moder.usec;
653 pkts = moder.pkts;
654 }
655
656 priv->dim.use_dim = ec->use_adaptive_rx_coalesce;
657
658 /* Apply desired coalescing parameters */
659 bcm_sysport_set_rx_coalesce(priv, usecs, pkts);
660
661 return 0;
662 }
663
664 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
665 {
666 dev_consume_skb_any(cb->skb);
667 cb->skb = NULL;
668 dma_unmap_addr_set(cb, dma_addr, 0);
669 }
670
671 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
672 struct bcm_sysport_cb *cb)
673 {
674 struct device *kdev = &priv->pdev->dev;
675 struct net_device *ndev = priv->netdev;
676 struct sk_buff *skb, *rx_skb;
677 dma_addr_t mapping;
678
679 /* Allocate a new SKB for a new packet */
680 skb = __netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH,
681 GFP_ATOMIC | __GFP_NOWARN);
682 if (!skb) {
683 priv->mib.alloc_rx_buff_failed++;
684 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
685 return NULL;
686 }
687
688 mapping = dma_map_single(kdev, skb->data,
689 RX_BUF_LENGTH, DMA_FROM_DEVICE);
690 if (dma_mapping_error(kdev, mapping)) {
691 priv->mib.rx_dma_failed++;
692 dev_kfree_skb_any(skb);
693 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
694 return NULL;
695 }
696
697 /* Grab the current SKB on the ring */
698 rx_skb = cb->skb;
699 if (likely(rx_skb))
700 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
701 RX_BUF_LENGTH, DMA_FROM_DEVICE);
702
703 /* Put the new SKB on the ring */
704 cb->skb = skb;
705 dma_unmap_addr_set(cb, dma_addr, mapping);
706 dma_desc_set_addr(priv, cb->bd_addr, mapping);
707
708 netif_dbg(priv, rx_status, ndev, "RX refill\n");
709
710 /* Return the current SKB to the caller */
711 return rx_skb;
712 }
713
714 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
715 {
716 struct bcm_sysport_cb *cb;
717 struct sk_buff *skb;
718 unsigned int i;
719
720 for (i = 0; i < priv->num_rx_bds; i++) {
721 cb = &priv->rx_cbs[i];
722 skb = bcm_sysport_rx_refill(priv, cb);
723 if (skb)
724 dev_kfree_skb(skb);
725 if (!cb->skb)
726 return -ENOMEM;
727 }
728
729 return 0;
730 }
731
732 /* Poll the hardware for up to budget packets to process */
733 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
734 unsigned int budget)
735 {
736 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
737 struct net_device *ndev = priv->netdev;
738 unsigned int processed = 0, to_process;
739 unsigned int processed_bytes = 0;
740 struct bcm_sysport_cb *cb;
741 struct sk_buff *skb;
742 unsigned int p_index;
743 u16 len, status;
744 struct bcm_rsb *rsb;
745
746 /* Clear status before servicing to reduce spurious interrupts */
747 intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR);
748
749 /* Determine how much we should process since last call, SYSTEMPORT Lite
750 * groups the producer and consumer indexes into the same 32-bit
751 * which we access using RDMA_CONS_INDEX
752 */
753 if (!priv->is_lite)
754 p_index = rdma_readl(priv, RDMA_PROD_INDEX);
755 else
756 p_index = rdma_readl(priv, RDMA_CONS_INDEX);
757 p_index &= RDMA_PROD_INDEX_MASK;
758
759 to_process = (p_index - priv->rx_c_index) & RDMA_CONS_INDEX_MASK;
760
761 netif_dbg(priv, rx_status, ndev,
762 "p_index=%d rx_c_index=%d to_process=%d\n",
763 p_index, priv->rx_c_index, to_process);
764
765 while ((processed < to_process) && (processed < budget)) {
766 cb = &priv->rx_cbs[priv->rx_read_ptr];
767 skb = bcm_sysport_rx_refill(priv, cb);
768
769
770 /* We do not have a backing SKB, so we do not a corresponding
771 * DMA mapping for this incoming packet since
772 * bcm_sysport_rx_refill always either has both skb and mapping
773 * or none.
774 */
775 if (unlikely(!skb)) {
776 netif_err(priv, rx_err, ndev, "out of memory!\n");
777 ndev->stats.rx_dropped++;
778 ndev->stats.rx_errors++;
779 goto next;
780 }
781
782 /* Extract the Receive Status Block prepended */
783 rsb = (struct bcm_rsb *)skb->data;
784 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
785 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
786 DESC_STATUS_MASK;
787
788 netif_dbg(priv, rx_status, ndev,
789 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
790 p_index, priv->rx_c_index, priv->rx_read_ptr,
791 len, status);
792
793 if (unlikely(len > RX_BUF_LENGTH)) {
794 netif_err(priv, rx_status, ndev, "oversized packet\n");
795 ndev->stats.rx_length_errors++;
796 ndev->stats.rx_errors++;
797 dev_kfree_skb_any(skb);
798 goto next;
799 }
800
801 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
802 netif_err(priv, rx_status, ndev, "fragmented packet!\n");
803 ndev->stats.rx_dropped++;
804 ndev->stats.rx_errors++;
805 dev_kfree_skb_any(skb);
806 goto next;
807 }
808
809 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
810 netif_err(priv, rx_err, ndev, "error packet\n");
811 if (status & RX_STATUS_OVFLOW)
812 ndev->stats.rx_over_errors++;
813 ndev->stats.rx_dropped++;
814 ndev->stats.rx_errors++;
815 dev_kfree_skb_any(skb);
816 goto next;
817 }
818
819 skb_put(skb, len);
820
821 /* Hardware validated our checksum */
822 if (likely(status & DESC_L4_CSUM))
823 skb->ip_summed = CHECKSUM_UNNECESSARY;
824
825 /* Hardware pre-pends packets with 2bytes before Ethernet
826 * header plus we have the Receive Status Block, strip off all
827 * of this from the SKB.
828 */
829 skb_pull(skb, sizeof(*rsb) + 2);
830 len -= (sizeof(*rsb) + 2);
831 processed_bytes += len;
832
833 /* UniMAC may forward CRC */
834 if (priv->crc_fwd) {
835 skb_trim(skb, len - ETH_FCS_LEN);
836 len -= ETH_FCS_LEN;
837 }
838
839 skb->protocol = eth_type_trans(skb, ndev);
840 ndev->stats.rx_packets++;
841 ndev->stats.rx_bytes += len;
842 u64_stats_update_begin(&priv->syncp);
843 stats64->rx_packets++;
844 stats64->rx_bytes += len;
845 u64_stats_update_end(&priv->syncp);
846
847 napi_gro_receive(&priv->napi, skb);
848 next:
849 processed++;
850 priv->rx_read_ptr++;
851
852 if (priv->rx_read_ptr == priv->num_rx_bds)
853 priv->rx_read_ptr = 0;
854 }
855
856 priv->dim.packets = processed;
857 priv->dim.bytes = processed_bytes;
858
859 return processed;
860 }
861
862 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring,
863 struct bcm_sysport_cb *cb,
864 unsigned int *bytes_compl,
865 unsigned int *pkts_compl)
866 {
867 struct bcm_sysport_priv *priv = ring->priv;
868 struct device *kdev = &priv->pdev->dev;
869
870 if (cb->skb) {
871 *bytes_compl += cb->skb->len;
872 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
873 dma_unmap_len(cb, dma_len),
874 DMA_TO_DEVICE);
875 (*pkts_compl)++;
876 bcm_sysport_free_cb(cb);
877 /* SKB fragment */
878 } else if (dma_unmap_addr(cb, dma_addr)) {
879 *bytes_compl += dma_unmap_len(cb, dma_len);
880 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
881 dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
882 dma_unmap_addr_set(cb, dma_addr, 0);
883 }
884 }
885
886 /* Reclaim queued SKBs for transmission completion, lockless version */
887 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
888 struct bcm_sysport_tx_ring *ring)
889 {
890 unsigned int pkts_compl = 0, bytes_compl = 0;
891 struct net_device *ndev = priv->netdev;
892 unsigned int txbds_processed = 0;
893 struct bcm_sysport_cb *cb;
894 unsigned int txbds_ready;
895 unsigned int c_index;
896 u32 hw_ind;
897
898 /* Clear status before servicing to reduce spurious interrupts */
899 if (!ring->priv->is_lite)
900 intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR);
901 else
902 intrl2_0_writel(ring->priv, BIT(ring->index +
903 INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR);
904
905 /* Compute how many descriptors have been processed since last call */
906 hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
907 c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
908 txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK;
909
910 netif_dbg(priv, tx_done, ndev,
911 "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n",
912 ring->index, ring->c_index, c_index, txbds_ready);
913
914 while (txbds_processed < txbds_ready) {
915 cb = &ring->cbs[ring->clean_index];
916 bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl);
917
918 ring->desc_count++;
919 txbds_processed++;
920
921 if (likely(ring->clean_index < ring->size - 1))
922 ring->clean_index++;
923 else
924 ring->clean_index = 0;
925 }
926
927 u64_stats_update_begin(&priv->syncp);
928 ring->packets += pkts_compl;
929 ring->bytes += bytes_compl;
930 u64_stats_update_end(&priv->syncp);
931
932 ring->c_index = c_index;
933
934 netif_dbg(priv, tx_done, ndev,
935 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
936 ring->index, ring->c_index, pkts_compl, bytes_compl);
937
938 return pkts_compl;
939 }
940
941 /* Locked version of the per-ring TX reclaim routine */
942 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
943 struct bcm_sysport_tx_ring *ring)
944 {
945 struct netdev_queue *txq;
946 unsigned int released;
947 unsigned long flags;
948
949 txq = netdev_get_tx_queue(priv->netdev, ring->index);
950
951 spin_lock_irqsave(&ring->lock, flags);
952 released = __bcm_sysport_tx_reclaim(priv, ring);
953 if (released)
954 netif_tx_wake_queue(txq);
955
956 spin_unlock_irqrestore(&ring->lock, flags);
957
958 return released;
959 }
960
961 /* Locked version of the per-ring TX reclaim, but does not wake the queue */
962 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
963 struct bcm_sysport_tx_ring *ring)
964 {
965 unsigned long flags;
966
967 spin_lock_irqsave(&ring->lock, flags);
968 __bcm_sysport_tx_reclaim(priv, ring);
969 spin_unlock_irqrestore(&ring->lock, flags);
970 }
971
972 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
973 {
974 struct bcm_sysport_tx_ring *ring =
975 container_of(napi, struct bcm_sysport_tx_ring, napi);
976 unsigned int work_done = 0;
977
978 work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
979
980 if (work_done == 0) {
981 napi_complete(napi);
982 /* re-enable TX interrupt */
983 if (!ring->priv->is_lite)
984 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
985 else
986 intrl2_0_mask_clear(ring->priv, BIT(ring->index +
987 INTRL2_0_TDMA_MBDONE_SHIFT));
988
989 return 0;
990 }
991
992 return budget;
993 }
994
995 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
996 {
997 unsigned int q;
998
999 for (q = 0; q < priv->netdev->num_tx_queues; q++)
1000 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
1001 }
1002
1003 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
1004 {
1005 struct bcm_sysport_priv *priv =
1006 container_of(napi, struct bcm_sysport_priv, napi);
1007 struct net_dim_sample dim_sample;
1008 unsigned int work_done = 0;
1009
1010 work_done = bcm_sysport_desc_rx(priv, budget);
1011
1012 priv->rx_c_index += work_done;
1013 priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
1014
1015 /* SYSTEMPORT Lite groups the producer/consumer index, producer is
1016 * maintained by HW, but writes to it will be ignore while RDMA
1017 * is active
1018 */
1019 if (!priv->is_lite)
1020 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
1021 else
1022 rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX);
1023
1024 if (work_done < budget) {
1025 napi_complete_done(napi, work_done);
1026 /* re-enable RX interrupts */
1027 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
1028 }
1029
1030 if (priv->dim.use_dim) {
1031 net_dim_sample(priv->dim.event_ctr, priv->dim.packets,
1032 priv->dim.bytes, &dim_sample);
1033 net_dim(&priv->dim.dim, dim_sample);
1034 }
1035
1036 return work_done;
1037 }
1038
1039 static void mpd_enable_set(struct bcm_sysport_priv *priv, bool enable)
1040 {
1041 u32 reg, bit;
1042
1043 reg = umac_readl(priv, UMAC_MPD_CTRL);
1044 if (enable)
1045 reg |= MPD_EN;
1046 else
1047 reg &= ~MPD_EN;
1048 umac_writel(priv, reg, UMAC_MPD_CTRL);
1049
1050 if (priv->is_lite)
1051 bit = RBUF_ACPI_EN_LITE;
1052 else
1053 bit = RBUF_ACPI_EN;
1054
1055 reg = rbuf_readl(priv, RBUF_CONTROL);
1056 if (enable)
1057 reg |= bit;
1058 else
1059 reg &= ~bit;
1060 rbuf_writel(priv, reg, RBUF_CONTROL);
1061 }
1062
1063 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
1064 {
1065 u32 reg;
1066
1067 /* Disable RXCHK, active filters and Broadcom tag matching */
1068 reg = rxchk_readl(priv, RXCHK_CONTROL);
1069 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK <<
1070 RXCHK_BRCM_TAG_MATCH_SHIFT | RXCHK_EN | RXCHK_BRCM_TAG_EN);
1071 rxchk_writel(priv, reg, RXCHK_CONTROL);
1072
1073 /* Clear the MagicPacket detection logic */
1074 mpd_enable_set(priv, false);
1075
1076 reg = intrl2_0_readl(priv, INTRL2_CPU_STATUS);
1077 if (reg & INTRL2_0_MPD)
1078 netdev_info(priv->netdev, "Wake-on-LAN (MPD) interrupt!\n");
1079
1080 if (reg & INTRL2_0_BRCM_MATCH_TAG) {
1081 reg = rxchk_readl(priv, RXCHK_BRCM_TAG_MATCH_STATUS) &
1082 RXCHK_BRCM_TAG_MATCH_MASK;
1083 netdev_info(priv->netdev,
1084 "Wake-on-LAN (filters 0x%02x) interrupt!\n", reg);
1085 }
1086
1087 netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
1088 }
1089
1090 static void bcm_sysport_dim_work(struct work_struct *work)
1091 {
1092 struct net_dim *dim = container_of(work, struct net_dim, work);
1093 struct bcm_sysport_net_dim *ndim =
1094 container_of(dim, struct bcm_sysport_net_dim, dim);
1095 struct bcm_sysport_priv *priv =
1096 container_of(ndim, struct bcm_sysport_priv, dim);
1097 struct net_dim_cq_moder cur_profile =
1098 net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
1099
1100 bcm_sysport_set_rx_coalesce(priv, cur_profile.usec, cur_profile.pkts);
1101 dim->state = NET_DIM_START_MEASURE;
1102 }
1103
1104 /* RX and misc interrupt routine */
1105 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
1106 {
1107 struct net_device *dev = dev_id;
1108 struct bcm_sysport_priv *priv = netdev_priv(dev);
1109 struct bcm_sysport_tx_ring *txr;
1110 unsigned int ring, ring_bit;
1111
1112 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
1113 ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
1114 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
1115
1116 if (unlikely(priv->irq0_stat == 0)) {
1117 netdev_warn(priv->netdev, "spurious RX interrupt\n");
1118 return IRQ_NONE;
1119 }
1120
1121 if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
1122 priv->dim.event_ctr++;
1123 if (likely(napi_schedule_prep(&priv->napi))) {
1124 /* disable RX interrupts */
1125 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
1126 __napi_schedule_irqoff(&priv->napi);
1127 }
1128 }
1129
1130 /* TX ring is full, perform a full reclaim since we do not know
1131 * which one would trigger this interrupt
1132 */
1133 if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
1134 bcm_sysport_tx_reclaim_all(priv);
1135
1136 if (!priv->is_lite)
1137 goto out;
1138
1139 for (ring = 0; ring < dev->num_tx_queues; ring++) {
1140 ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT);
1141 if (!(priv->irq0_stat & ring_bit))
1142 continue;
1143
1144 txr = &priv->tx_rings[ring];
1145
1146 if (likely(napi_schedule_prep(&txr->napi))) {
1147 intrl2_0_mask_set(priv, ring_bit);
1148 __napi_schedule(&txr->napi);
1149 }
1150 }
1151 out:
1152 return IRQ_HANDLED;
1153 }
1154
1155 /* TX interrupt service routine */
1156 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
1157 {
1158 struct net_device *dev = dev_id;
1159 struct bcm_sysport_priv *priv = netdev_priv(dev);
1160 struct bcm_sysport_tx_ring *txr;
1161 unsigned int ring;
1162
1163 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
1164 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
1165 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1166
1167 if (unlikely(priv->irq1_stat == 0)) {
1168 netdev_warn(priv->netdev, "spurious TX interrupt\n");
1169 return IRQ_NONE;
1170 }
1171
1172 for (ring = 0; ring < dev->num_tx_queues; ring++) {
1173 if (!(priv->irq1_stat & BIT(ring)))
1174 continue;
1175
1176 txr = &priv->tx_rings[ring];
1177
1178 if (likely(napi_schedule_prep(&txr->napi))) {
1179 intrl2_1_mask_set(priv, BIT(ring));
1180 __napi_schedule_irqoff(&txr->napi);
1181 }
1182 }
1183
1184 return IRQ_HANDLED;
1185 }
1186
1187 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
1188 {
1189 struct bcm_sysport_priv *priv = dev_id;
1190
1191 pm_wakeup_event(&priv->pdev->dev, 0);
1192
1193 return IRQ_HANDLED;
1194 }
1195
1196 #ifdef CONFIG_NET_POLL_CONTROLLER
1197 static void bcm_sysport_poll_controller(struct net_device *dev)
1198 {
1199 struct bcm_sysport_priv *priv = netdev_priv(dev);
1200
1201 disable_irq(priv->irq0);
1202 bcm_sysport_rx_isr(priv->irq0, priv);
1203 enable_irq(priv->irq0);
1204
1205 if (!priv->is_lite) {
1206 disable_irq(priv->irq1);
1207 bcm_sysport_tx_isr(priv->irq1, priv);
1208 enable_irq(priv->irq1);
1209 }
1210 }
1211 #endif
1212
1213 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
1214 struct net_device *dev)
1215 {
1216 struct sk_buff *nskb;
1217 struct bcm_tsb *tsb;
1218 u32 csum_info;
1219 u8 ip_proto;
1220 u16 csum_start;
1221 __be16 ip_ver;
1222
1223 /* Re-allocate SKB if needed */
1224 if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
1225 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
1226 dev_kfree_skb(skb);
1227 if (!nskb) {
1228 dev->stats.tx_errors++;
1229 dev->stats.tx_dropped++;
1230 return NULL;
1231 }
1232 skb = nskb;
1233 }
1234
1235 tsb = skb_push(skb, sizeof(*tsb));
1236 /* Zero-out TSB by default */
1237 memset(tsb, 0, sizeof(*tsb));
1238
1239 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1240 ip_ver = skb->protocol;
1241 switch (ip_ver) {
1242 case htons(ETH_P_IP):
1243 ip_proto = ip_hdr(skb)->protocol;
1244 break;
1245 case htons(ETH_P_IPV6):
1246 ip_proto = ipv6_hdr(skb)->nexthdr;
1247 break;
1248 default:
1249 return skb;
1250 }
1251
1252 /* Get the checksum offset and the L4 (transport) offset */
1253 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
1254 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
1255 csum_info |= (csum_start << L4_PTR_SHIFT);
1256
1257 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
1258 csum_info |= L4_LENGTH_VALID;
1259 if (ip_proto == IPPROTO_UDP &&
1260 ip_ver == htons(ETH_P_IP))
1261 csum_info |= L4_UDP;
1262 } else {
1263 csum_info = 0;
1264 }
1265
1266 tsb->l4_ptr_dest_map = csum_info;
1267 }
1268
1269 return skb;
1270 }
1271
1272 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
1273 struct net_device *dev)
1274 {
1275 struct bcm_sysport_priv *priv = netdev_priv(dev);
1276 struct device *kdev = &priv->pdev->dev;
1277 struct bcm_sysport_tx_ring *ring;
1278 struct bcm_sysport_cb *cb;
1279 struct netdev_queue *txq;
1280 struct dma_desc *desc;
1281 unsigned int skb_len;
1282 unsigned long flags;
1283 dma_addr_t mapping;
1284 u32 len_status;
1285 u16 queue;
1286 int ret;
1287
1288 queue = skb_get_queue_mapping(skb);
1289 txq = netdev_get_tx_queue(dev, queue);
1290 ring = &priv->tx_rings[queue];
1291
1292 /* lock against tx reclaim in BH context and TX ring full interrupt */
1293 spin_lock_irqsave(&ring->lock, flags);
1294 if (unlikely(ring->desc_count == 0)) {
1295 netif_tx_stop_queue(txq);
1296 netdev_err(dev, "queue %d awake and ring full!\n", queue);
1297 ret = NETDEV_TX_BUSY;
1298 goto out;
1299 }
1300
1301 /* Insert TSB and checksum infos */
1302 if (priv->tsb_en) {
1303 skb = bcm_sysport_insert_tsb(skb, dev);
1304 if (!skb) {
1305 ret = NETDEV_TX_OK;
1306 goto out;
1307 }
1308 }
1309
1310 skb_len = skb->len;
1311
1312 mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
1313 if (dma_mapping_error(kdev, mapping)) {
1314 priv->mib.tx_dma_failed++;
1315 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
1316 skb->data, skb_len);
1317 ret = NETDEV_TX_OK;
1318 goto out;
1319 }
1320
1321 /* Remember the SKB for future freeing */
1322 cb = &ring->cbs[ring->curr_desc];
1323 cb->skb = skb;
1324 dma_unmap_addr_set(cb, dma_addr, mapping);
1325 dma_unmap_len_set(cb, dma_len, skb_len);
1326
1327 /* Fetch a descriptor entry from our pool */
1328 desc = ring->desc_cpu;
1329
1330 desc->addr_lo = lower_32_bits(mapping);
1331 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
1332 len_status |= (skb_len << DESC_LEN_SHIFT);
1333 len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
1334 DESC_STATUS_SHIFT;
1335 if (skb->ip_summed == CHECKSUM_PARTIAL)
1336 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
1337
1338 ring->curr_desc++;
1339 if (ring->curr_desc == ring->size)
1340 ring->curr_desc = 0;
1341 ring->desc_count--;
1342
1343 /* Ensure write completion of the descriptor status/length
1344 * in DRAM before the System Port WRITE_PORT register latches
1345 * the value
1346 */
1347 wmb();
1348 desc->addr_status_len = len_status;
1349 wmb();
1350
1351 /* Write this descriptor address to the RING write port */
1352 tdma_port_write_desc_addr(priv, desc, ring->index);
1353
1354 /* Check ring space and update SW control flow */
1355 if (ring->desc_count == 0)
1356 netif_tx_stop_queue(txq);
1357
1358 netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1359 ring->index, ring->desc_count, ring->curr_desc);
1360
1361 ret = NETDEV_TX_OK;
1362 out:
1363 spin_unlock_irqrestore(&ring->lock, flags);
1364 return ret;
1365 }
1366
1367 static void bcm_sysport_tx_timeout(struct net_device *dev)
1368 {
1369 netdev_warn(dev, "transmit timeout!\n");
1370
1371 netif_trans_update(dev);
1372 dev->stats.tx_errors++;
1373
1374 netif_tx_wake_all_queues(dev);
1375 }
1376
1377 /* phylib adjust link callback */
1378 static void bcm_sysport_adj_link(struct net_device *dev)
1379 {
1380 struct bcm_sysport_priv *priv = netdev_priv(dev);
1381 struct phy_device *phydev = dev->phydev;
1382 unsigned int changed = 0;
1383 u32 cmd_bits = 0, reg;
1384
1385 if (priv->old_link != phydev->link) {
1386 changed = 1;
1387 priv->old_link = phydev->link;
1388 }
1389
1390 if (priv->old_duplex != phydev->duplex) {
1391 changed = 1;
1392 priv->old_duplex = phydev->duplex;
1393 }
1394
1395 if (priv->is_lite)
1396 goto out;
1397
1398 switch (phydev->speed) {
1399 case SPEED_2500:
1400 cmd_bits = CMD_SPEED_2500;
1401 break;
1402 case SPEED_1000:
1403 cmd_bits = CMD_SPEED_1000;
1404 break;
1405 case SPEED_100:
1406 cmd_bits = CMD_SPEED_100;
1407 break;
1408 case SPEED_10:
1409 cmd_bits = CMD_SPEED_10;
1410 break;
1411 default:
1412 break;
1413 }
1414 cmd_bits <<= CMD_SPEED_SHIFT;
1415
1416 if (phydev->duplex == DUPLEX_HALF)
1417 cmd_bits |= CMD_HD_EN;
1418
1419 if (priv->old_pause != phydev->pause) {
1420 changed = 1;
1421 priv->old_pause = phydev->pause;
1422 }
1423
1424 if (!phydev->pause)
1425 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1426
1427 if (!changed)
1428 return;
1429
1430 if (phydev->link) {
1431 reg = umac_readl(priv, UMAC_CMD);
1432 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1433 CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1434 CMD_TX_PAUSE_IGNORE);
1435 reg |= cmd_bits;
1436 umac_writel(priv, reg, UMAC_CMD);
1437 }
1438 out:
1439 if (changed)
1440 phy_print_status(phydev);
1441 }
1442
1443 static void bcm_sysport_init_dim(struct bcm_sysport_priv *priv,
1444 void (*cb)(struct work_struct *work))
1445 {
1446 struct bcm_sysport_net_dim *dim = &priv->dim;
1447
1448 INIT_WORK(&dim->dim.work, cb);
1449 dim->dim.mode = NET_DIM_CQ_PERIOD_MODE_START_FROM_EQE;
1450 dim->event_ctr = 0;
1451 dim->packets = 0;
1452 dim->bytes = 0;
1453 }
1454
1455 static void bcm_sysport_init_rx_coalesce(struct bcm_sysport_priv *priv)
1456 {
1457 struct bcm_sysport_net_dim *dim = &priv->dim;
1458 struct net_dim_cq_moder moder;
1459 u32 usecs, pkts;
1460
1461 usecs = priv->rx_coalesce_usecs;
1462 pkts = priv->rx_max_coalesced_frames;
1463
1464 /* If DIM was enabled, re-apply default parameters */
1465 if (dim->use_dim) {
1466 moder = net_dim_get_def_rx_moderation(dim->dim.mode);
1467 usecs = moder.usec;
1468 pkts = moder.pkts;
1469 }
1470
1471 bcm_sysport_set_rx_coalesce(priv, usecs, pkts);
1472 }
1473
1474 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1475 unsigned int index)
1476 {
1477 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1478 struct device *kdev = &priv->pdev->dev;
1479 size_t size;
1480 void *p;
1481 u32 reg;
1482
1483 /* Simple descriptors partitioning for now */
1484 size = 256;
1485
1486 /* We just need one DMA descriptor which is DMA-able, since writing to
1487 * the port will allocate a new descriptor in its internal linked-list
1488 */
1489 p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1490 GFP_KERNEL);
1491 if (!p) {
1492 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1493 return -ENOMEM;
1494 }
1495
1496 ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1497 if (!ring->cbs) {
1498 dma_free_coherent(kdev, sizeof(struct dma_desc),
1499 ring->desc_cpu, ring->desc_dma);
1500 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1501 return -ENOMEM;
1502 }
1503
1504 /* Initialize SW view of the ring */
1505 spin_lock_init(&ring->lock);
1506 ring->priv = priv;
1507 netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1508 ring->index = index;
1509 ring->size = size;
1510 ring->clean_index = 0;
1511 ring->alloc_size = ring->size;
1512 ring->desc_cpu = p;
1513 ring->desc_count = ring->size;
1514 ring->curr_desc = 0;
1515
1516 /* Initialize HW ring */
1517 tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1518 tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1519 tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1520 tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1521
1522 /* Configure QID and port mapping */
1523 reg = tdma_readl(priv, TDMA_DESC_RING_MAPPING(index));
1524 reg &= ~(RING_QID_MASK | RING_PORT_ID_MASK << RING_PORT_ID_SHIFT);
1525 if (ring->inspect) {
1526 reg |= ring->switch_queue & RING_QID_MASK;
1527 reg |= ring->switch_port << RING_PORT_ID_SHIFT;
1528 } else {
1529 reg |= RING_IGNORE_STATUS;
1530 }
1531 tdma_writel(priv, reg, TDMA_DESC_RING_MAPPING(index));
1532 tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1533
1534 /* Enable ACB algorithm 2 */
1535 reg = tdma_readl(priv, TDMA_CONTROL);
1536 reg |= tdma_control_bit(priv, ACB_ALGO);
1537 tdma_writel(priv, reg, TDMA_CONTROL);
1538
1539 /* Do not use tdma_control_bit() here because TSB_SWAP1 collides
1540 * with the original definition of ACB_ALGO
1541 */
1542 reg = tdma_readl(priv, TDMA_CONTROL);
1543 if (priv->is_lite)
1544 reg &= ~BIT(TSB_SWAP1);
1545 /* Set a correct TSB format based on host endian */
1546 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1547 reg |= tdma_control_bit(priv, TSB_SWAP0);
1548 else
1549 reg &= ~tdma_control_bit(priv, TSB_SWAP0);
1550 tdma_writel(priv, reg, TDMA_CONTROL);
1551
1552 /* Program the number of descriptors as MAX_THRESHOLD and half of
1553 * its size for the hysteresis trigger
1554 */
1555 tdma_writel(priv, ring->size |
1556 1 << RING_HYST_THRESH_SHIFT,
1557 TDMA_DESC_RING_MAX_HYST(index));
1558
1559 /* Enable the ring queue in the arbiter */
1560 reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1561 reg |= (1 << index);
1562 tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1563
1564 napi_enable(&ring->napi);
1565
1566 netif_dbg(priv, hw, priv->netdev,
1567 "TDMA cfg, size=%d, desc_cpu=%p switch q=%d,port=%d\n",
1568 ring->size, ring->desc_cpu, ring->switch_queue,
1569 ring->switch_port);
1570
1571 return 0;
1572 }
1573
1574 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1575 unsigned int index)
1576 {
1577 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1578 struct device *kdev = &priv->pdev->dev;
1579 u32 reg;
1580
1581 /* Caller should stop the TDMA engine */
1582 reg = tdma_readl(priv, TDMA_STATUS);
1583 if (!(reg & TDMA_DISABLED))
1584 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1585
1586 /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1587 * fail, so by checking this pointer we know whether the TX ring was
1588 * fully initialized or not.
1589 */
1590 if (!ring->cbs)
1591 return;
1592
1593 napi_disable(&ring->napi);
1594 netif_napi_del(&ring->napi);
1595
1596 bcm_sysport_tx_clean(priv, ring);
1597
1598 kfree(ring->cbs);
1599 ring->cbs = NULL;
1600
1601 if (ring->desc_dma) {
1602 dma_free_coherent(kdev, sizeof(struct dma_desc),
1603 ring->desc_cpu, ring->desc_dma);
1604 ring->desc_dma = 0;
1605 }
1606 ring->size = 0;
1607 ring->alloc_size = 0;
1608
1609 netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1610 }
1611
1612 /* RDMA helper */
1613 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1614 unsigned int enable)
1615 {
1616 unsigned int timeout = 1000;
1617 u32 reg;
1618
1619 reg = rdma_readl(priv, RDMA_CONTROL);
1620 if (enable)
1621 reg |= RDMA_EN;
1622 else
1623 reg &= ~RDMA_EN;
1624 rdma_writel(priv, reg, RDMA_CONTROL);
1625
1626 /* Poll for RMDA disabling completion */
1627 do {
1628 reg = rdma_readl(priv, RDMA_STATUS);
1629 if (!!(reg & RDMA_DISABLED) == !enable)
1630 return 0;
1631 usleep_range(1000, 2000);
1632 } while (timeout-- > 0);
1633
1634 netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1635
1636 return -ETIMEDOUT;
1637 }
1638
1639 /* TDMA helper */
1640 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1641 unsigned int enable)
1642 {
1643 unsigned int timeout = 1000;
1644 u32 reg;
1645
1646 reg = tdma_readl(priv, TDMA_CONTROL);
1647 if (enable)
1648 reg |= tdma_control_bit(priv, TDMA_EN);
1649 else
1650 reg &= ~tdma_control_bit(priv, TDMA_EN);
1651 tdma_writel(priv, reg, TDMA_CONTROL);
1652
1653 /* Poll for TMDA disabling completion */
1654 do {
1655 reg = tdma_readl(priv, TDMA_STATUS);
1656 if (!!(reg & TDMA_DISABLED) == !enable)
1657 return 0;
1658
1659 usleep_range(1000, 2000);
1660 } while (timeout-- > 0);
1661
1662 netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1663
1664 return -ETIMEDOUT;
1665 }
1666
1667 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1668 {
1669 struct bcm_sysport_cb *cb;
1670 u32 reg;
1671 int ret;
1672 int i;
1673
1674 /* Initialize SW view of the RX ring */
1675 priv->num_rx_bds = priv->num_rx_desc_words / WORDS_PER_DESC;
1676 priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1677 priv->rx_c_index = 0;
1678 priv->rx_read_ptr = 0;
1679 priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1680 GFP_KERNEL);
1681 if (!priv->rx_cbs) {
1682 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1683 return -ENOMEM;
1684 }
1685
1686 for (i = 0; i < priv->num_rx_bds; i++) {
1687 cb = priv->rx_cbs + i;
1688 cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
1689 }
1690
1691 ret = bcm_sysport_alloc_rx_bufs(priv);
1692 if (ret) {
1693 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1694 return ret;
1695 }
1696
1697 /* Initialize HW, ensure RDMA is disabled */
1698 reg = rdma_readl(priv, RDMA_STATUS);
1699 if (!(reg & RDMA_DISABLED))
1700 rdma_enable_set(priv, 0);
1701
1702 rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1703 rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1704 rdma_writel(priv, 0, RDMA_PROD_INDEX);
1705 rdma_writel(priv, 0, RDMA_CONS_INDEX);
1706 rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1707 RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1708 /* Operate the queue in ring mode */
1709 rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1710 rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1711 rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1712 rdma_writel(priv, priv->num_rx_desc_words - 1, RDMA_END_ADDR_LO);
1713
1714 netif_dbg(priv, hw, priv->netdev,
1715 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1716 priv->num_rx_bds, priv->rx_bds);
1717
1718 return 0;
1719 }
1720
1721 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1722 {
1723 struct bcm_sysport_cb *cb;
1724 unsigned int i;
1725 u32 reg;
1726
1727 /* Caller should ensure RDMA is disabled */
1728 reg = rdma_readl(priv, RDMA_STATUS);
1729 if (!(reg & RDMA_DISABLED))
1730 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1731
1732 for (i = 0; i < priv->num_rx_bds; i++) {
1733 cb = &priv->rx_cbs[i];
1734 if (dma_unmap_addr(cb, dma_addr))
1735 dma_unmap_single(&priv->pdev->dev,
1736 dma_unmap_addr(cb, dma_addr),
1737 RX_BUF_LENGTH, DMA_FROM_DEVICE);
1738 bcm_sysport_free_cb(cb);
1739 }
1740
1741 kfree(priv->rx_cbs);
1742 priv->rx_cbs = NULL;
1743
1744 netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1745 }
1746
1747 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1748 {
1749 struct bcm_sysport_priv *priv = netdev_priv(dev);
1750 u32 reg;
1751
1752 if (priv->is_lite)
1753 return;
1754
1755 reg = umac_readl(priv, UMAC_CMD);
1756 if (dev->flags & IFF_PROMISC)
1757 reg |= CMD_PROMISC;
1758 else
1759 reg &= ~CMD_PROMISC;
1760 umac_writel(priv, reg, UMAC_CMD);
1761
1762 /* No support for ALLMULTI */
1763 if (dev->flags & IFF_ALLMULTI)
1764 return;
1765 }
1766
1767 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1768 u32 mask, unsigned int enable)
1769 {
1770 u32 reg;
1771
1772 if (!priv->is_lite) {
1773 reg = umac_readl(priv, UMAC_CMD);
1774 if (enable)
1775 reg |= mask;
1776 else
1777 reg &= ~mask;
1778 umac_writel(priv, reg, UMAC_CMD);
1779 } else {
1780 reg = gib_readl(priv, GIB_CONTROL);
1781 if (enable)
1782 reg |= mask;
1783 else
1784 reg &= ~mask;
1785 gib_writel(priv, reg, GIB_CONTROL);
1786 }
1787
1788 /* UniMAC stops on a packet boundary, wait for a full-sized packet
1789 * to be processed (1 msec).
1790 */
1791 if (enable == 0)
1792 usleep_range(1000, 2000);
1793 }
1794
1795 static inline void umac_reset(struct bcm_sysport_priv *priv)
1796 {
1797 u32 reg;
1798
1799 if (priv->is_lite)
1800 return;
1801
1802 reg = umac_readl(priv, UMAC_CMD);
1803 reg |= CMD_SW_RESET;
1804 umac_writel(priv, reg, UMAC_CMD);
1805 udelay(10);
1806 reg = umac_readl(priv, UMAC_CMD);
1807 reg &= ~CMD_SW_RESET;
1808 umac_writel(priv, reg, UMAC_CMD);
1809 }
1810
1811 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1812 unsigned char *addr)
1813 {
1814 u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) |
1815 addr[3];
1816 u32 mac1 = (addr[4] << 8) | addr[5];
1817
1818 if (!priv->is_lite) {
1819 umac_writel(priv, mac0, UMAC_MAC0);
1820 umac_writel(priv, mac1, UMAC_MAC1);
1821 } else {
1822 gib_writel(priv, mac0, GIB_MAC0);
1823 gib_writel(priv, mac1, GIB_MAC1);
1824 }
1825 }
1826
1827 static void topctrl_flush(struct bcm_sysport_priv *priv)
1828 {
1829 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1830 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1831 mdelay(1);
1832 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1833 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1834 }
1835
1836 static int bcm_sysport_change_mac(struct net_device *dev, void *p)
1837 {
1838 struct bcm_sysport_priv *priv = netdev_priv(dev);
1839 struct sockaddr *addr = p;
1840
1841 if (!is_valid_ether_addr(addr->sa_data))
1842 return -EINVAL;
1843
1844 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1845
1846 /* interface is disabled, changes to MAC will be reflected on next
1847 * open call
1848 */
1849 if (!netif_running(dev))
1850 return 0;
1851
1852 umac_set_hw_addr(priv, dev->dev_addr);
1853
1854 return 0;
1855 }
1856
1857 static void bcm_sysport_get_stats64(struct net_device *dev,
1858 struct rtnl_link_stats64 *stats)
1859 {
1860 struct bcm_sysport_priv *priv = netdev_priv(dev);
1861 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
1862 unsigned int start;
1863
1864 netdev_stats_to_stats64(stats, &dev->stats);
1865
1866 bcm_sysport_update_tx_stats(priv, &stats->tx_bytes,
1867 &stats->tx_packets);
1868
1869 do {
1870 start = u64_stats_fetch_begin_irq(&priv->syncp);
1871 stats->rx_packets = stats64->rx_packets;
1872 stats->rx_bytes = stats64->rx_bytes;
1873 } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
1874 }
1875
1876 static void bcm_sysport_netif_start(struct net_device *dev)
1877 {
1878 struct bcm_sysport_priv *priv = netdev_priv(dev);
1879
1880 /* Enable NAPI */
1881 bcm_sysport_init_dim(priv, bcm_sysport_dim_work);
1882 bcm_sysport_init_rx_coalesce(priv);
1883 napi_enable(&priv->napi);
1884
1885 /* Enable RX interrupt and TX ring full interrupt */
1886 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1887
1888 phy_start(dev->phydev);
1889
1890 /* Enable TX interrupts for the TXQs */
1891 if (!priv->is_lite)
1892 intrl2_1_mask_clear(priv, 0xffffffff);
1893 else
1894 intrl2_0_mask_clear(priv, INTRL2_0_TDMA_MBDONE_MASK);
1895 }
1896
1897 static void rbuf_init(struct bcm_sysport_priv *priv)
1898 {
1899 u32 reg;
1900
1901 reg = rbuf_readl(priv, RBUF_CONTROL);
1902 reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1903 /* Set a correct RSB format on SYSTEMPORT Lite */
1904 if (priv->is_lite)
1905 reg &= ~RBUF_RSB_SWAP1;
1906
1907 /* Set a correct RSB format based on host endian */
1908 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1909 reg |= RBUF_RSB_SWAP0;
1910 else
1911 reg &= ~RBUF_RSB_SWAP0;
1912 rbuf_writel(priv, reg, RBUF_CONTROL);
1913 }
1914
1915 static inline void bcm_sysport_mask_all_intrs(struct bcm_sysport_priv *priv)
1916 {
1917 intrl2_0_mask_set(priv, 0xffffffff);
1918 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1919 if (!priv->is_lite) {
1920 intrl2_1_mask_set(priv, 0xffffffff);
1921 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1922 }
1923 }
1924
1925 static inline void gib_set_pad_extension(struct bcm_sysport_priv *priv)
1926 {
1927 u32 reg;
1928
1929 reg = gib_readl(priv, GIB_CONTROL);
1930 /* Include Broadcom tag in pad extension and fix up IPG_LENGTH */
1931 if (netdev_uses_dsa(priv->netdev)) {
1932 reg &= ~(GIB_PAD_EXTENSION_MASK << GIB_PAD_EXTENSION_SHIFT);
1933 reg |= ENET_BRCM_TAG_LEN << GIB_PAD_EXTENSION_SHIFT;
1934 }
1935 reg &= ~(GIB_IPG_LEN_MASK << GIB_IPG_LEN_SHIFT);
1936 reg |= 12 << GIB_IPG_LEN_SHIFT;
1937 gib_writel(priv, reg, GIB_CONTROL);
1938 }
1939
1940 static int bcm_sysport_open(struct net_device *dev)
1941 {
1942 struct bcm_sysport_priv *priv = netdev_priv(dev);
1943 struct phy_device *phydev;
1944 unsigned int i;
1945 int ret;
1946
1947 /* Reset UniMAC */
1948 umac_reset(priv);
1949
1950 /* Flush TX and RX FIFOs at TOPCTRL level */
1951 topctrl_flush(priv);
1952
1953 /* Disable the UniMAC RX/TX */
1954 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1955
1956 /* Enable RBUF 2bytes alignment and Receive Status Block */
1957 rbuf_init(priv);
1958
1959 /* Set maximum frame length */
1960 if (!priv->is_lite)
1961 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1962 else
1963 gib_set_pad_extension(priv);
1964
1965 /* Set MAC address */
1966 umac_set_hw_addr(priv, dev->dev_addr);
1967
1968 /* Read CRC forward */
1969 if (!priv->is_lite)
1970 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1971 else
1972 priv->crc_fwd = !((gib_readl(priv, GIB_CONTROL) &
1973 GIB_FCS_STRIP) >> GIB_FCS_STRIP_SHIFT);
1974
1975 phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1976 0, priv->phy_interface);
1977 if (!phydev) {
1978 netdev_err(dev, "could not attach to PHY\n");
1979 return -ENODEV;
1980 }
1981
1982 /* Reset house keeping link status */
1983 priv->old_duplex = -1;
1984 priv->old_link = -1;
1985 priv->old_pause = -1;
1986
1987 /* mask all interrupts and request them */
1988 bcm_sysport_mask_all_intrs(priv);
1989
1990 ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1991 if (ret) {
1992 netdev_err(dev, "failed to request RX interrupt\n");
1993 goto out_phy_disconnect;
1994 }
1995
1996 if (!priv->is_lite) {
1997 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0,
1998 dev->name, dev);
1999 if (ret) {
2000 netdev_err(dev, "failed to request TX interrupt\n");
2001 goto out_free_irq0;
2002 }
2003 }
2004
2005 /* Initialize both hardware and software ring */
2006 for (i = 0; i < dev->num_tx_queues; i++) {
2007 ret = bcm_sysport_init_tx_ring(priv, i);
2008 if (ret) {
2009 netdev_err(dev, "failed to initialize TX ring %d\n",
2010 i);
2011 goto out_free_tx_ring;
2012 }
2013 }
2014
2015 /* Initialize linked-list */
2016 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2017
2018 /* Initialize RX ring */
2019 ret = bcm_sysport_init_rx_ring(priv);
2020 if (ret) {
2021 netdev_err(dev, "failed to initialize RX ring\n");
2022 goto out_free_rx_ring;
2023 }
2024
2025 /* Turn on RDMA */
2026 ret = rdma_enable_set(priv, 1);
2027 if (ret)
2028 goto out_free_rx_ring;
2029
2030 /* Turn on TDMA */
2031 ret = tdma_enable_set(priv, 1);
2032 if (ret)
2033 goto out_clear_rx_int;
2034
2035 /* Turn on UniMAC TX/RX */
2036 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
2037
2038 bcm_sysport_netif_start(dev);
2039
2040 netif_tx_start_all_queues(dev);
2041
2042 return 0;
2043
2044 out_clear_rx_int:
2045 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
2046 out_free_rx_ring:
2047 bcm_sysport_fini_rx_ring(priv);
2048 out_free_tx_ring:
2049 for (i = 0; i < dev->num_tx_queues; i++)
2050 bcm_sysport_fini_tx_ring(priv, i);
2051 if (!priv->is_lite)
2052 free_irq(priv->irq1, dev);
2053 out_free_irq0:
2054 free_irq(priv->irq0, dev);
2055 out_phy_disconnect:
2056 phy_disconnect(phydev);
2057 return ret;
2058 }
2059
2060 static void bcm_sysport_netif_stop(struct net_device *dev)
2061 {
2062 struct bcm_sysport_priv *priv = netdev_priv(dev);
2063
2064 /* stop all software from updating hardware */
2065 netif_tx_disable(dev);
2066 napi_disable(&priv->napi);
2067 cancel_work_sync(&priv->dim.dim.work);
2068 phy_stop(dev->phydev);
2069
2070 /* mask all interrupts */
2071 bcm_sysport_mask_all_intrs(priv);
2072 }
2073
2074 static int bcm_sysport_stop(struct net_device *dev)
2075 {
2076 struct bcm_sysport_priv *priv = netdev_priv(dev);
2077 unsigned int i;
2078 int ret;
2079
2080 bcm_sysport_netif_stop(dev);
2081
2082 /* Disable UniMAC RX */
2083 umac_enable_set(priv, CMD_RX_EN, 0);
2084
2085 ret = tdma_enable_set(priv, 0);
2086 if (ret) {
2087 netdev_err(dev, "timeout disabling RDMA\n");
2088 return ret;
2089 }
2090
2091 /* Wait for a maximum packet size to be drained */
2092 usleep_range(2000, 3000);
2093
2094 ret = rdma_enable_set(priv, 0);
2095 if (ret) {
2096 netdev_err(dev, "timeout disabling TDMA\n");
2097 return ret;
2098 }
2099
2100 /* Disable UniMAC TX */
2101 umac_enable_set(priv, CMD_TX_EN, 0);
2102
2103 /* Free RX/TX rings SW structures */
2104 for (i = 0; i < dev->num_tx_queues; i++)
2105 bcm_sysport_fini_tx_ring(priv, i);
2106 bcm_sysport_fini_rx_ring(priv);
2107
2108 free_irq(priv->irq0, dev);
2109 if (!priv->is_lite)
2110 free_irq(priv->irq1, dev);
2111
2112 /* Disconnect from PHY */
2113 phy_disconnect(dev->phydev);
2114
2115 return 0;
2116 }
2117
2118 static int bcm_sysport_rule_find(struct bcm_sysport_priv *priv,
2119 u64 location)
2120 {
2121 unsigned int index;
2122 u32 reg;
2123
2124 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) {
2125 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index));
2126 reg >>= RXCHK_BRCM_TAG_CID_SHIFT;
2127 reg &= RXCHK_BRCM_TAG_CID_MASK;
2128 if (reg == location)
2129 return index;
2130 }
2131
2132 return -EINVAL;
2133 }
2134
2135 static int bcm_sysport_rule_get(struct bcm_sysport_priv *priv,
2136 struct ethtool_rxnfc *nfc)
2137 {
2138 int index;
2139
2140 /* This is not a rule that we know about */
2141 index = bcm_sysport_rule_find(priv, nfc->fs.location);
2142 if (index < 0)
2143 return -EOPNOTSUPP;
2144
2145 nfc->fs.ring_cookie = RX_CLS_FLOW_WAKE;
2146
2147 return 0;
2148 }
2149
2150 static int bcm_sysport_rule_set(struct bcm_sysport_priv *priv,
2151 struct ethtool_rxnfc *nfc)
2152 {
2153 unsigned int index;
2154 u32 reg;
2155
2156 /* We cannot match locations greater than what the classification ID
2157 * permits (256 entries)
2158 */
2159 if (nfc->fs.location > RXCHK_BRCM_TAG_CID_MASK)
2160 return -E2BIG;
2161
2162 /* We cannot support flows that are not destined for a wake-up */
2163 if (nfc->fs.ring_cookie != RX_CLS_FLOW_WAKE)
2164 return -EOPNOTSUPP;
2165
2166 /* All filters are already in use, we cannot match more rules */
2167 if (bitmap_weight(priv->filters, RXCHK_BRCM_TAG_MAX) ==
2168 RXCHK_BRCM_TAG_MAX)
2169 return -ENOSPC;
2170
2171 index = find_first_zero_bit(priv->filters, RXCHK_BRCM_TAG_MAX);
2172 if (index >= RXCHK_BRCM_TAG_MAX)
2173 return -ENOSPC;
2174
2175 /* Location is the classification ID, and index is the position
2176 * within one of our 8 possible filters to be programmed
2177 */
2178 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index));
2179 reg &= ~(RXCHK_BRCM_TAG_CID_MASK << RXCHK_BRCM_TAG_CID_SHIFT);
2180 reg |= nfc->fs.location << RXCHK_BRCM_TAG_CID_SHIFT;
2181 rxchk_writel(priv, reg, RXCHK_BRCM_TAG(index));
2182 rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index));
2183
2184 set_bit(index, priv->filters);
2185
2186 return 0;
2187 }
2188
2189 static int bcm_sysport_rule_del(struct bcm_sysport_priv *priv,
2190 u64 location)
2191 {
2192 int index;
2193
2194 /* This is not a rule that we know about */
2195 index = bcm_sysport_rule_find(priv, location);
2196 if (index < 0)
2197 return -EOPNOTSUPP;
2198
2199 /* No need to disable this filter if it was enabled, this will
2200 * be taken care of during suspend time by bcm_sysport_suspend_to_wol
2201 */
2202 clear_bit(index, priv->filters);
2203
2204 return 0;
2205 }
2206
2207 static int bcm_sysport_get_rxnfc(struct net_device *dev,
2208 struct ethtool_rxnfc *nfc, u32 *rule_locs)
2209 {
2210 struct bcm_sysport_priv *priv = netdev_priv(dev);
2211 int ret = -EOPNOTSUPP;
2212
2213 switch (nfc->cmd) {
2214 case ETHTOOL_GRXCLSRULE:
2215 ret = bcm_sysport_rule_get(priv, nfc);
2216 break;
2217 default:
2218 break;
2219 }
2220
2221 return ret;
2222 }
2223
2224 static int bcm_sysport_set_rxnfc(struct net_device *dev,
2225 struct ethtool_rxnfc *nfc)
2226 {
2227 struct bcm_sysport_priv *priv = netdev_priv(dev);
2228 int ret = -EOPNOTSUPP;
2229
2230 switch (nfc->cmd) {
2231 case ETHTOOL_SRXCLSRLINS:
2232 ret = bcm_sysport_rule_set(priv, nfc);
2233 break;
2234 case ETHTOOL_SRXCLSRLDEL:
2235 ret = bcm_sysport_rule_del(priv, nfc->fs.location);
2236 break;
2237 default:
2238 break;
2239 }
2240
2241 return ret;
2242 }
2243
2244 static const struct ethtool_ops bcm_sysport_ethtool_ops = {
2245 .get_drvinfo = bcm_sysport_get_drvinfo,
2246 .get_msglevel = bcm_sysport_get_msglvl,
2247 .set_msglevel = bcm_sysport_set_msglvl,
2248 .get_link = ethtool_op_get_link,
2249 .get_strings = bcm_sysport_get_strings,
2250 .get_ethtool_stats = bcm_sysport_get_stats,
2251 .get_sset_count = bcm_sysport_get_sset_count,
2252 .get_wol = bcm_sysport_get_wol,
2253 .set_wol = bcm_sysport_set_wol,
2254 .get_coalesce = bcm_sysport_get_coalesce,
2255 .set_coalesce = bcm_sysport_set_coalesce,
2256 .get_link_ksettings = phy_ethtool_get_link_ksettings,
2257 .set_link_ksettings = phy_ethtool_set_link_ksettings,
2258 .get_rxnfc = bcm_sysport_get_rxnfc,
2259 .set_rxnfc = bcm_sysport_set_rxnfc,
2260 };
2261
2262 static u16 bcm_sysport_select_queue(struct net_device *dev, struct sk_buff *skb,
2263 struct net_device *sb_dev,
2264 select_queue_fallback_t fallback)
2265 {
2266 struct bcm_sysport_priv *priv = netdev_priv(dev);
2267 u16 queue = skb_get_queue_mapping(skb);
2268 struct bcm_sysport_tx_ring *tx_ring;
2269 unsigned int q, port;
2270
2271 if (!netdev_uses_dsa(dev))
2272 return fallback(dev, skb, NULL);
2273
2274 /* DSA tagging layer will have configured the correct queue */
2275 q = BRCM_TAG_GET_QUEUE(queue);
2276 port = BRCM_TAG_GET_PORT(queue);
2277 tx_ring = priv->ring_map[q + port * priv->per_port_num_tx_queues];
2278
2279 if (unlikely(!tx_ring))
2280 return fallback(dev, skb, NULL);
2281
2282 return tx_ring->index;
2283 }
2284
2285 static const struct net_device_ops bcm_sysport_netdev_ops = {
2286 .ndo_start_xmit = bcm_sysport_xmit,
2287 .ndo_tx_timeout = bcm_sysport_tx_timeout,
2288 .ndo_open = bcm_sysport_open,
2289 .ndo_stop = bcm_sysport_stop,
2290 .ndo_set_features = bcm_sysport_set_features,
2291 .ndo_set_rx_mode = bcm_sysport_set_rx_mode,
2292 .ndo_set_mac_address = bcm_sysport_change_mac,
2293 #ifdef CONFIG_NET_POLL_CONTROLLER
2294 .ndo_poll_controller = bcm_sysport_poll_controller,
2295 #endif
2296 .ndo_get_stats64 = bcm_sysport_get_stats64,
2297 .ndo_select_queue = bcm_sysport_select_queue,
2298 };
2299
2300 static int bcm_sysport_map_queues(struct notifier_block *nb,
2301 struct dsa_notifier_register_info *info)
2302 {
2303 struct bcm_sysport_tx_ring *ring;
2304 struct bcm_sysport_priv *priv;
2305 struct net_device *slave_dev;
2306 unsigned int num_tx_queues;
2307 unsigned int q, start, port;
2308 struct net_device *dev;
2309
2310 priv = container_of(nb, struct bcm_sysport_priv, dsa_notifier);
2311 if (priv->netdev != info->master)
2312 return 0;
2313
2314 dev = info->master;
2315
2316 /* We can't be setting up queue inspection for non directly attached
2317 * switches
2318 */
2319 if (info->switch_number)
2320 return 0;
2321
2322 if (dev->netdev_ops != &bcm_sysport_netdev_ops)
2323 return 0;
2324
2325 port = info->port_number;
2326 slave_dev = info->info.dev;
2327
2328 /* On SYSTEMPORT Lite we have twice as less queues, so we cannot do a
2329 * 1:1 mapping, we can only do a 2:1 mapping. By reducing the number of
2330 * per-port (slave_dev) network devices queue, we achieve just that.
2331 * This need to happen now before any slave network device is used such
2332 * it accurately reflects the number of real TX queues.
2333 */
2334 if (priv->is_lite)
2335 netif_set_real_num_tx_queues(slave_dev,
2336 slave_dev->num_tx_queues / 2);
2337
2338 num_tx_queues = slave_dev->real_num_tx_queues;
2339
2340 if (priv->per_port_num_tx_queues &&
2341 priv->per_port_num_tx_queues != num_tx_queues)
2342 netdev_warn(slave_dev, "asymmetric number of per-port queues\n");
2343
2344 priv->per_port_num_tx_queues = num_tx_queues;
2345
2346 start = find_first_zero_bit(&priv->queue_bitmap, dev->num_tx_queues);
2347 for (q = 0; q < num_tx_queues; q++) {
2348 ring = &priv->tx_rings[q + start];
2349
2350 /* Just remember the mapping actual programming done
2351 * during bcm_sysport_init_tx_ring
2352 */
2353 ring->switch_queue = q;
2354 ring->switch_port = port;
2355 ring->inspect = true;
2356 priv->ring_map[q + port * num_tx_queues] = ring;
2357
2358 /* Set all queues as being used now */
2359 set_bit(q + start, &priv->queue_bitmap);
2360 }
2361
2362 return 0;
2363 }
2364
2365 static int bcm_sysport_dsa_notifier(struct notifier_block *nb,
2366 unsigned long event, void *ptr)
2367 {
2368 struct dsa_notifier_register_info *info;
2369
2370 if (event != DSA_PORT_REGISTER)
2371 return NOTIFY_DONE;
2372
2373 info = ptr;
2374
2375 return notifier_from_errno(bcm_sysport_map_queues(nb, info));
2376 }
2377
2378 #define REV_FMT "v%2x.%02x"
2379
2380 static const struct bcm_sysport_hw_params bcm_sysport_params[] = {
2381 [SYSTEMPORT] = {
2382 .is_lite = false,
2383 .num_rx_desc_words = SP_NUM_HW_RX_DESC_WORDS,
2384 },
2385 [SYSTEMPORT_LITE] = {
2386 .is_lite = true,
2387 .num_rx_desc_words = SP_LT_NUM_HW_RX_DESC_WORDS,
2388 },
2389 };
2390
2391 static const struct of_device_id bcm_sysport_of_match[] = {
2392 { .compatible = "brcm,systemportlite-v1.00",
2393 .data = &bcm_sysport_params[SYSTEMPORT_LITE] },
2394 { .compatible = "brcm,systemport-v1.00",
2395 .data = &bcm_sysport_params[SYSTEMPORT] },
2396 { .compatible = "brcm,systemport",
2397 .data = &bcm_sysport_params[SYSTEMPORT] },
2398 { /* sentinel */ }
2399 };
2400 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2401
2402 static int bcm_sysport_probe(struct platform_device *pdev)
2403 {
2404 const struct bcm_sysport_hw_params *params;
2405 const struct of_device_id *of_id = NULL;
2406 struct bcm_sysport_priv *priv;
2407 struct device_node *dn;
2408 struct net_device *dev;
2409 const void *macaddr;
2410 struct resource *r;
2411 u32 txq, rxq;
2412 int ret;
2413
2414 dn = pdev->dev.of_node;
2415 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2416 of_id = of_match_node(bcm_sysport_of_match, dn);
2417 if (!of_id || !of_id->data)
2418 return -EINVAL;
2419
2420 /* Fairly quickly we need to know the type of adapter we have */
2421 params = of_id->data;
2422
2423 /* Read the Transmit/Receive Queue properties */
2424 if (of_property_read_u32(dn, "systemport,num-txq", &txq))
2425 txq = TDMA_NUM_RINGS;
2426 if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
2427 rxq = 1;
2428
2429 /* Sanity check the number of transmit queues */
2430 if (!txq || txq > TDMA_NUM_RINGS)
2431 return -EINVAL;
2432
2433 dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
2434 if (!dev)
2435 return -ENOMEM;
2436
2437 /* Initialize private members */
2438 priv = netdev_priv(dev);
2439
2440 /* Allocate number of TX rings */
2441 priv->tx_rings = devm_kcalloc(&pdev->dev, txq,
2442 sizeof(struct bcm_sysport_tx_ring),
2443 GFP_KERNEL);
2444 if (!priv->tx_rings)
2445 return -ENOMEM;
2446
2447 priv->is_lite = params->is_lite;
2448 priv->num_rx_desc_words = params->num_rx_desc_words;
2449
2450 priv->irq0 = platform_get_irq(pdev, 0);
2451 if (!priv->is_lite) {
2452 priv->irq1 = platform_get_irq(pdev, 1);
2453 priv->wol_irq = platform_get_irq(pdev, 2);
2454 } else {
2455 priv->wol_irq = platform_get_irq(pdev, 1);
2456 }
2457 if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) {
2458 dev_err(&pdev->dev, "invalid interrupts\n");
2459 ret = -EINVAL;
2460 goto err_free_netdev;
2461 }
2462
2463 priv->base = devm_ioremap_resource(&pdev->dev, r);
2464 if (IS_ERR(priv->base)) {
2465 ret = PTR_ERR(priv->base);
2466 goto err_free_netdev;
2467 }
2468
2469 priv->netdev = dev;
2470 priv->pdev = pdev;
2471
2472 priv->phy_interface = of_get_phy_mode(dn);
2473 /* Default to GMII interface mode */
2474 if ((int)priv->phy_interface < 0)
2475 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
2476
2477 /* In the case of a fixed PHY, the DT node associated
2478 * to the PHY is the Ethernet MAC DT node.
2479 */
2480 if (of_phy_is_fixed_link(dn)) {
2481 ret = of_phy_register_fixed_link(dn);
2482 if (ret) {
2483 dev_err(&pdev->dev, "failed to register fixed PHY\n");
2484 goto err_free_netdev;
2485 }
2486
2487 priv->phy_dn = dn;
2488 }
2489
2490 /* Initialize netdevice members */
2491 macaddr = of_get_mac_address(dn);
2492 if (!macaddr || !is_valid_ether_addr(macaddr)) {
2493 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
2494 eth_hw_addr_random(dev);
2495 } else {
2496 ether_addr_copy(dev->dev_addr, macaddr);
2497 }
2498
2499 SET_NETDEV_DEV(dev, &pdev->dev);
2500 dev_set_drvdata(&pdev->dev, dev);
2501 dev->ethtool_ops = &bcm_sysport_ethtool_ops;
2502 dev->netdev_ops = &bcm_sysport_netdev_ops;
2503 netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
2504
2505 /* HW supported features, none enabled by default */
2506 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
2507 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2508
2509 /* Request the WOL interrupt and advertise suspend if available */
2510 priv->wol_irq_disabled = 1;
2511 ret = devm_request_irq(&pdev->dev, priv->wol_irq,
2512 bcm_sysport_wol_isr, 0, dev->name, priv);
2513 if (!ret)
2514 device_set_wakeup_capable(&pdev->dev, 1);
2515
2516 /* Set the needed headroom once and for all */
2517 BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
2518 dev->needed_headroom += sizeof(struct bcm_tsb);
2519
2520 /* libphy will adjust the link state accordingly */
2521 netif_carrier_off(dev);
2522
2523 priv->rx_max_coalesced_frames = 1;
2524 u64_stats_init(&priv->syncp);
2525
2526 priv->dsa_notifier.notifier_call = bcm_sysport_dsa_notifier;
2527
2528 ret = register_dsa_notifier(&priv->dsa_notifier);
2529 if (ret) {
2530 dev_err(&pdev->dev, "failed to register DSA notifier\n");
2531 goto err_deregister_fixed_link;
2532 }
2533
2534 ret = register_netdev(dev);
2535 if (ret) {
2536 dev_err(&pdev->dev, "failed to register net_device\n");
2537 goto err_deregister_notifier;
2538 }
2539
2540 priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
2541 dev_info(&pdev->dev,
2542 "Broadcom SYSTEMPORT%s" REV_FMT
2543 " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
2544 priv->is_lite ? " Lite" : "",
2545 (priv->rev >> 8) & 0xff, priv->rev & 0xff,
2546 priv->base, priv->irq0, priv->irq1, txq, rxq);
2547
2548 return 0;
2549
2550 err_deregister_notifier:
2551 unregister_dsa_notifier(&priv->dsa_notifier);
2552 err_deregister_fixed_link:
2553 if (of_phy_is_fixed_link(dn))
2554 of_phy_deregister_fixed_link(dn);
2555 err_free_netdev:
2556 free_netdev(dev);
2557 return ret;
2558 }
2559
2560 static int bcm_sysport_remove(struct platform_device *pdev)
2561 {
2562 struct net_device *dev = dev_get_drvdata(&pdev->dev);
2563 struct bcm_sysport_priv *priv = netdev_priv(dev);
2564 struct device_node *dn = pdev->dev.of_node;
2565
2566 /* Not much to do, ndo_close has been called
2567 * and we use managed allocations
2568 */
2569 unregister_dsa_notifier(&priv->dsa_notifier);
2570 unregister_netdev(dev);
2571 if (of_phy_is_fixed_link(dn))
2572 of_phy_deregister_fixed_link(dn);
2573 free_netdev(dev);
2574 dev_set_drvdata(&pdev->dev, NULL);
2575
2576 return 0;
2577 }
2578
2579 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
2580 {
2581 struct net_device *ndev = priv->netdev;
2582 unsigned int timeout = 1000;
2583 unsigned int index, i = 0;
2584 u32 reg;
2585
2586 reg = umac_readl(priv, UMAC_MPD_CTRL);
2587 if (priv->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE))
2588 reg |= MPD_EN;
2589 reg &= ~PSW_EN;
2590 if (priv->wolopts & WAKE_MAGICSECURE) {
2591 /* Program the SecureOn password */
2592 umac_writel(priv, get_unaligned_be16(&priv->sopass[0]),
2593 UMAC_PSW_MS);
2594 umac_writel(priv, get_unaligned_be32(&priv->sopass[2]),
2595 UMAC_PSW_LS);
2596 reg |= PSW_EN;
2597 }
2598 umac_writel(priv, reg, UMAC_MPD_CTRL);
2599
2600 if (priv->wolopts & WAKE_FILTER) {
2601 /* Turn on ACPI matching to steal packets from RBUF */
2602 reg = rbuf_readl(priv, RBUF_CONTROL);
2603 if (priv->is_lite)
2604 reg |= RBUF_ACPI_EN_LITE;
2605 else
2606 reg |= RBUF_ACPI_EN;
2607 rbuf_writel(priv, reg, RBUF_CONTROL);
2608
2609 /* Enable RXCHK, active filters and Broadcom tag matching */
2610 reg = rxchk_readl(priv, RXCHK_CONTROL);
2611 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK <<
2612 RXCHK_BRCM_TAG_MATCH_SHIFT);
2613 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) {
2614 reg |= BIT(RXCHK_BRCM_TAG_MATCH_SHIFT + i);
2615 i++;
2616 }
2617 reg |= RXCHK_EN | RXCHK_BRCM_TAG_EN;
2618 rxchk_writel(priv, reg, RXCHK_CONTROL);
2619 }
2620
2621 /* Make sure RBUF entered WoL mode as result */
2622 do {
2623 reg = rbuf_readl(priv, RBUF_STATUS);
2624 if (reg & RBUF_WOL_MODE)
2625 break;
2626
2627 udelay(10);
2628 } while (timeout-- > 0);
2629
2630 /* Do not leave the UniMAC RBUF matching only MPD packets */
2631 if (!timeout) {
2632 mpd_enable_set(priv, false);
2633 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
2634 return -ETIMEDOUT;
2635 }
2636
2637 /* UniMAC receive needs to be turned on */
2638 umac_enable_set(priv, CMD_RX_EN, 1);
2639
2640 netif_dbg(priv, wol, ndev, "entered WOL mode\n");
2641
2642 return 0;
2643 }
2644
2645 static int __maybe_unused bcm_sysport_suspend(struct device *d)
2646 {
2647 struct net_device *dev = dev_get_drvdata(d);
2648 struct bcm_sysport_priv *priv = netdev_priv(dev);
2649 unsigned int i;
2650 int ret = 0;
2651 u32 reg;
2652
2653 if (!netif_running(dev))
2654 return 0;
2655
2656 netif_device_detach(dev);
2657
2658 bcm_sysport_netif_stop(dev);
2659
2660 phy_suspend(dev->phydev);
2661
2662 /* Disable UniMAC RX */
2663 umac_enable_set(priv, CMD_RX_EN, 0);
2664
2665 ret = rdma_enable_set(priv, 0);
2666 if (ret) {
2667 netdev_err(dev, "RDMA timeout!\n");
2668 return ret;
2669 }
2670
2671 /* Disable RXCHK if enabled */
2672 if (priv->rx_chk_en) {
2673 reg = rxchk_readl(priv, RXCHK_CONTROL);
2674 reg &= ~RXCHK_EN;
2675 rxchk_writel(priv, reg, RXCHK_CONTROL);
2676 }
2677
2678 /* Flush RX pipe */
2679 if (!priv->wolopts)
2680 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
2681
2682 ret = tdma_enable_set(priv, 0);
2683 if (ret) {
2684 netdev_err(dev, "TDMA timeout!\n");
2685 return ret;
2686 }
2687
2688 /* Wait for a packet boundary */
2689 usleep_range(2000, 3000);
2690
2691 umac_enable_set(priv, CMD_TX_EN, 0);
2692
2693 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
2694
2695 /* Free RX/TX rings SW structures */
2696 for (i = 0; i < dev->num_tx_queues; i++)
2697 bcm_sysport_fini_tx_ring(priv, i);
2698 bcm_sysport_fini_rx_ring(priv);
2699
2700 /* Get prepared for Wake-on-LAN */
2701 if (device_may_wakeup(d) && priv->wolopts)
2702 ret = bcm_sysport_suspend_to_wol(priv);
2703
2704 return ret;
2705 }
2706
2707 static int __maybe_unused bcm_sysport_resume(struct device *d)
2708 {
2709 struct net_device *dev = dev_get_drvdata(d);
2710 struct bcm_sysport_priv *priv = netdev_priv(dev);
2711 unsigned int i;
2712 u32 reg;
2713 int ret;
2714
2715 if (!netif_running(dev))
2716 return 0;
2717
2718 umac_reset(priv);
2719
2720 /* Disable the UniMAC RX/TX */
2721 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
2722
2723 /* We may have been suspended and never received a WOL event that
2724 * would turn off MPD detection, take care of that now
2725 */
2726 bcm_sysport_resume_from_wol(priv);
2727
2728 /* Initialize both hardware and software ring */
2729 for (i = 0; i < dev->num_tx_queues; i++) {
2730 ret = bcm_sysport_init_tx_ring(priv, i);
2731 if (ret) {
2732 netdev_err(dev, "failed to initialize TX ring %d\n",
2733 i);
2734 goto out_free_tx_rings;
2735 }
2736 }
2737
2738 /* Initialize linked-list */
2739 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2740
2741 /* Initialize RX ring */
2742 ret = bcm_sysport_init_rx_ring(priv);
2743 if (ret) {
2744 netdev_err(dev, "failed to initialize RX ring\n");
2745 goto out_free_rx_ring;
2746 }
2747
2748 /* RX pipe enable */
2749 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
2750
2751 ret = rdma_enable_set(priv, 1);
2752 if (ret) {
2753 netdev_err(dev, "failed to enable RDMA\n");
2754 goto out_free_rx_ring;
2755 }
2756
2757 /* Enable rxhck */
2758 if (priv->rx_chk_en) {
2759 reg = rxchk_readl(priv, RXCHK_CONTROL);
2760 reg |= RXCHK_EN;
2761 rxchk_writel(priv, reg, RXCHK_CONTROL);
2762 }
2763
2764 rbuf_init(priv);
2765
2766 /* Set maximum frame length */
2767 if (!priv->is_lite)
2768 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
2769 else
2770 gib_set_pad_extension(priv);
2771
2772 /* Set MAC address */
2773 umac_set_hw_addr(priv, dev->dev_addr);
2774
2775 umac_enable_set(priv, CMD_RX_EN, 1);
2776
2777 /* TX pipe enable */
2778 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
2779
2780 umac_enable_set(priv, CMD_TX_EN, 1);
2781
2782 ret = tdma_enable_set(priv, 1);
2783 if (ret) {
2784 netdev_err(dev, "TDMA timeout!\n");
2785 goto out_free_rx_ring;
2786 }
2787
2788 phy_resume(dev->phydev);
2789
2790 bcm_sysport_netif_start(dev);
2791
2792 netif_device_attach(dev);
2793
2794 return 0;
2795
2796 out_free_rx_ring:
2797 bcm_sysport_fini_rx_ring(priv);
2798 out_free_tx_rings:
2799 for (i = 0; i < dev->num_tx_queues; i++)
2800 bcm_sysport_fini_tx_ring(priv, i);
2801 return ret;
2802 }
2803
2804 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
2805 bcm_sysport_suspend, bcm_sysport_resume);
2806
2807 static struct platform_driver bcm_sysport_driver = {
2808 .probe = bcm_sysport_probe,
2809 .remove = bcm_sysport_remove,
2810 .driver = {
2811 .name = "brcm-systemport",
2812 .of_match_table = bcm_sysport_of_match,
2813 .pm = &bcm_sysport_pm_ops,
2814 },
2815 };
2816 module_platform_driver(bcm_sysport_driver);
2817
2818 MODULE_AUTHOR("Broadcom Corporation");
2819 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
2820 MODULE_ALIAS("platform:brcm-systemport");
2821 MODULE_LICENSE("GPL");
Linux with added FPC-III support