2 * Copyright (c) 2014-2015 Hisilicon Limited.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
10 #ifndef _HNS_DSAF_RCB_H
11 #define _HNS_DSAF_RCB_H
13 #include <linux/netdevice.h>
14 #include <linux/platform_device.h>
17 #include "hns_dsaf_main.h"
21 #define HNS_RCB_IRQ_NUM_PER_QUEUE 2
22 #define HNS_RCB_IRQ_IDX_TX 0
23 #define HNS_RCB_IRQ_IDX_RX 1
24 #define HNS_RCB_TX_REG_OFFSET 0x40
26 #define HNS_RCB_SERVICE_NW_ENGINE_NUM DSAF_COMM_CHN
27 #define HNS_RCB_DEBUG_NW_ENGINE_NUM 1
28 #define HNS_RCB_RING_MAX_BD_PER_PKT 3
29 #define HNS_RCB_RING_MAX_TXBD_PER_PKT 3
30 #define HNS_RCBV2_RING_MAX_TXBD_PER_PKT 8
31 #define HNS_RCB_MAX_PKT_SIZE MAC_MAX_MTU
33 #define HNS_RCB_RING_MAX_PENDING_BD 1024
34 #define HNS_RCB_RING_MIN_PENDING_BD 16
36 #define HNS_RCB_REG_OFFSET 0x10000
38 #define HNS_RCB_TX_FRAMES_LOW 1
39 #define HNS_RCB_RX_FRAMES_LOW 1
40 #define HNS_RCB_TX_FRAMES_HIGH 1023
41 #define HNS_RCB_RX_FRAMES_HIGH 1023
42 #define HNS_RCB_TX_USECS_LOW 1
43 #define HNS_RCB_RX_USECS_LOW 1
44 #define HNS_RCB_TX_USECS_HIGH 1023
45 #define HNS_RCB_RX_USECS_HIGH 1023
46 #define HNS_RCB_MAX_COALESCED_FRAMES 1023
47 #define HNS_RCB_MIN_COALESCED_FRAMES 1
48 #define HNS_RCB_DEF_RX_COALESCED_FRAMES 50
49 #define HNS_RCB_DEF_TX_COALESCED_FRAMES 1
50 #define HNS_RCB_CLK_FREQ_MHZ 350
51 #define HNS_RCB_MAX_COALESCED_USECS 0x3ff
52 #define HNS_RCB_DEF_COALESCED_USECS 30
53 #define HNS_RCB_DEF_GAP_TIME_USECS 20
54 #define HNS_RCB_TX_PKTLINE_OFFSET 8
56 #define HNS_RCB_COMMON_ENDIAN 1
58 #define HNS_BD_SIZE_512_TYPE 0
59 #define HNS_BD_SIZE_1024_TYPE 1
60 #define HNS_BD_SIZE_2048_TYPE 2
61 #define HNS_BD_SIZE_4096_TYPE 3
63 #define HNS_RCB_COMMON_DUMP_REG_NUM 80
64 #define HNS_RCB_RING_DUMP_REG_NUM 40
65 #define HNS_RING_STATIC_REG_NUM 28
67 #define HNS_DUMP_REG_NUM 500
68 #define HNS_STATIC_REG_NUM 12
70 #define HNS_TSO_MODE_8BD_32K 1
71 #define HNS_TSO_MDOE_4BD_16K 0
74 RCB_INT_FLAG_TX
= 0x1,
75 RCB_INT_FLAG_RX
= (0x1 << 1),
76 RCB_INT_FLAG_MAX
= (0x1 << 2), /*must be the last element */
79 struct hns_ring_hw_stats
{
89 struct rcb_common_cb
*rcb_common
; /* ring belongs to */
90 struct device
*dev
; /*device for DMA mapping */
93 u16 index
; /* global index in a rcb common device */
96 int virq
[HNS_RCB_IRQ_NUM_PER_QUEUE
];
101 struct hns_ring_hw_stats hw_stats
;
104 struct rcb_common_cb
{
106 phys_addr_t phy_base
;
107 struct dsaf_device
*dsaf_dev
;
113 u32 desc_num
; /* desc num per queue*/
115 struct ring_pair_cb ring_pair_cb
[0];
118 int hns_rcb_buf_size2type(u32 buf_size
);
120 int hns_rcb_common_get_cfg(struct dsaf_device
*dsaf_dev
, int comm_index
);
121 void hns_rcb_common_free_cfg(struct dsaf_device
*dsaf_dev
, u32 comm_index
);
122 int hns_rcb_common_init_hw(struct rcb_common_cb
*rcb_common
);
123 void hns_rcb_start(struct hnae_queue
*q
, u32 val
);
124 int hns_rcb_get_cfg(struct rcb_common_cb
*rcb_common
);
125 void hns_rcb_get_queue_mode(enum dsaf_mode dsaf_mode
,
126 u16
*max_vfn
, u16
*max_q_per_vf
);
128 void hns_rcb_common_init_commit_hw(struct rcb_common_cb
*rcb_common
);
130 void hns_rcb_ring_enable_hw(struct hnae_queue
*q
, u32 val
);
131 void hns_rcb_int_clr_hw(struct hnae_queue
*q
, u32 flag
);
132 void hns_rcb_int_ctrl_hw(struct hnae_queue
*q
, u32 flag
, u32 enable
);
133 void hns_rcbv2_int_ctrl_hw(struct hnae_queue
*q
, u32 flag
, u32 mask
);
134 void hns_rcbv2_int_clr_hw(struct hnae_queue
*q
, u32 flag
);
136 void hns_rcb_init_hw(struct ring_pair_cb
*ring
);
137 void hns_rcb_reset_ring_hw(struct hnae_queue
*q
);
138 void hns_rcb_wait_fbd_clean(struct hnae_queue
**qs
, int q_num
, u32 flag
);
139 int hns_rcb_wait_tx_ring_clean(struct hnae_queue
*qs
);
140 u32
hns_rcb_get_rx_coalesced_frames(
141 struct rcb_common_cb
*rcb_common
, u32 port_idx
);
142 u32
hns_rcb_get_tx_coalesced_frames(
143 struct rcb_common_cb
*rcb_common
, u32 port_idx
);
144 u32
hns_rcb_get_coalesce_usecs(
145 struct rcb_common_cb
*rcb_common
, u32 port_idx
);
146 int hns_rcb_set_coalesce_usecs(
147 struct rcb_common_cb
*rcb_common
, u32 port_idx
, u32 timeout
);
148 int hns_rcb_set_rx_coalesced_frames(
149 struct rcb_common_cb
*rcb_common
, u32 port_idx
, u32 coalesced_frames
);
150 int hns_rcb_set_tx_coalesced_frames(
151 struct rcb_common_cb
*rcb_common
, u32 port_idx
, u32 coalesced_frames
);
152 void hns_rcb_update_stats(struct hnae_queue
*queue
);
154 void hns_rcb_get_stats(struct hnae_queue
*queue
, u64
*data
);
156 void hns_rcb_get_common_regs(struct rcb_common_cb
*rcb_common
, void *data
);
158 int hns_rcb_get_ring_sset_count(int stringset
);
159 int hns_rcb_get_common_regs_count(void);
160 int hns_rcb_get_ring_regs_count(void);
162 void hns_rcb_get_ring_regs(struct hnae_queue
*queue
, void *data
);
164 void hns_rcb_get_strings(int stringset
, u8
*data
, int index
);
165 void hns_rcb_set_rx_ring_bs(struct hnae_queue
*q
, u32 buf_size
);
166 void hns_rcb_set_tx_ring_bs(struct hnae_queue
*q
, u32 buf_size
);
168 #endif /* _HNS_DSAF_RCB_H */