?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Linux 4.19.133
[linux/fpc-iii.git] / drivers / net / phy / marvell.c
blobbb6107f3b947ba63aa4d05e602eda63eec848836
1 /*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/ctype.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/hwmon.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
31 #include <linux/mm.h>
32 #include <linux/module.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/phy.h>
36 #include <linux/marvell_phy.h>
37 #include <linux/of.h>
38
39 #include <linux/io.h>
40 #include <asm/irq.h>
41 #include <linux/uaccess.h>
42
43 #define MII_MARVELL_PHY_PAGE 22
44 #define MII_MARVELL_COPPER_PAGE 0x00
45 #define MII_MARVELL_FIBER_PAGE 0x01
46 #define MII_MARVELL_MSCR_PAGE 0x02
47 #define MII_MARVELL_LED_PAGE 0x03
48 #define MII_MARVELL_MISC_TEST_PAGE 0x06
49 #define MII_MARVELL_WOL_PAGE 0x11
50
51 #define MII_M1011_IEVENT 0x13
52 #define MII_M1011_IEVENT_CLEAR 0x0000
53
54 #define MII_M1011_IMASK 0x12
55 #define MII_M1011_IMASK_INIT 0x6400
56 #define MII_M1011_IMASK_CLEAR 0x0000
57
58 #define MII_M1011_PHY_SCR 0x10
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
65
66 #define MII_M1111_PHY_LED_CONTROL 0x18
67 #define MII_M1111_PHY_LED_DIRECT 0x4100
68 #define MII_M1111_PHY_LED_COMBINE 0x411c
69 #define MII_M1111_PHY_EXT_CR 0x14
70 #define MII_M1111_RGMII_RX_DELAY BIT(7)
71 #define MII_M1111_RGMII_TX_DELAY BIT(1)
72 #define MII_M1111_PHY_EXT_SR 0x1b
73
74 #define MII_M1111_HWCFG_MODE_MASK 0xf
75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
77 #define MII_M1111_HWCFG_MODE_RTBI 0x7
78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
82
83 #define MII_88E1121_PHY_MSCR_REG 21
84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
87
88 #define MII_88E1121_MISC_TEST 0x1a
89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
95
96 #define MII_88E1510_TEMP_SENSOR 0x1b
97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
98
99 #define MII_88E6390_MISC_TEST 0x1b
100 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0
101 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
102 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
103 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
104 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
105
106 #define MII_88E6390_TEMP_SENSOR 0x1c
107 #define MII_88E6390_TEMP_SENSOR_MASK 0xff
108 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
109
110 #define MII_88E1318S_PHY_MSCR1_REG 16
111 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
112
113 /* Copper Specific Interrupt Enable Register */
114 #define MII_88E1318S_PHY_CSIER 0x12
115 /* WOL Event Interrupt Enable */
116 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
117
118 /* LED Timer Control Register */
119 #define MII_88E1318S_PHY_LED_TCR 0x12
120 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
121 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
122 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
123
124 /* Magic Packet MAC address registers */
125 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
126 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
127 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
128
129 #define MII_88E1318S_PHY_WOL_CTRL 0x10
130 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
131 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
132
133 #define MII_PHY_LED_CTRL 16
134 #define MII_88E1121_PHY_LED_DEF 0x0030
135 #define MII_88E1510_PHY_LED_DEF 0x1177
136
137 #define MII_M1011_PHY_STATUS 0x11
138 #define MII_M1011_PHY_STATUS_1000 0x8000
139 #define MII_M1011_PHY_STATUS_100 0x4000
140 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
141 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
142 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
143 #define MII_M1011_PHY_STATUS_LINK 0x0400
144
145 #define MII_88E3016_PHY_SPEC_CTRL 0x10
146 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
147 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
148
149 #define MII_88E1510_GEN_CTRL_REG_1 0x14
150 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
151 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
152 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
153
154 #define LPA_FIBER_1000HALF 0x40
155 #define LPA_FIBER_1000FULL 0x20
156
157 #define LPA_PAUSE_FIBER 0x180
158 #define LPA_PAUSE_ASYM_FIBER 0x100
159
160 #define ADVERTISE_FIBER_1000HALF 0x40
161 #define ADVERTISE_FIBER_1000FULL 0x20
162
163 #define ADVERTISE_PAUSE_FIBER 0x180
164 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
165
166 #define REGISTER_LINK_STATUS 0x400
167 #define NB_FIBER_STATS 1
168
169 MODULE_DESCRIPTION("Marvell PHY driver");
170 MODULE_AUTHOR("Andy Fleming");
171 MODULE_LICENSE("GPL");
172
173 struct marvell_hw_stat {
174 const char *string;
175 u8 page;
176 u8 reg;
177 u8 bits;
178 };
179
180 static struct marvell_hw_stat marvell_hw_stats[] = {
181 { "phy_receive_errors_copper", 0, 21, 16},
182 { "phy_idle_errors", 0, 10, 8 },
183 { "phy_receive_errors_fiber", 1, 21, 16},
184 };
185
186 struct marvell_priv {
187 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
188 char *hwmon_name;
189 struct device *hwmon_dev;
190 };
191
192 static int marvell_read_page(struct phy_device *phydev)
193 {
194 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
195 }
196
197 static int marvell_write_page(struct phy_device *phydev, int page)
198 {
199 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
200 }
201
202 static int marvell_set_page(struct phy_device *phydev, int page)
203 {
204 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
205 }
206
207 static int marvell_ack_interrupt(struct phy_device *phydev)
208 {
209 int err;
210
211 /* Clear the interrupts by reading the reg */
212 err = phy_read(phydev, MII_M1011_IEVENT);
213
214 if (err < 0)
215 return err;
216
217 return 0;
218 }
219
220 static int marvell_config_intr(struct phy_device *phydev)
221 {
222 int err;
223
224 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
225 err = phy_write(phydev, MII_M1011_IMASK,
226 MII_M1011_IMASK_INIT);
227 else
228 err = phy_write(phydev, MII_M1011_IMASK,
229 MII_M1011_IMASK_CLEAR);
230
231 return err;
232 }
233
234 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
235 {
236 int reg;
237 int err;
238 int val;
239
240 /* get the current settings */
241 reg = phy_read(phydev, MII_M1011_PHY_SCR);
242 if (reg < 0)
243 return reg;
244
245 val = reg;
246 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
247 switch (polarity) {
248 case ETH_TP_MDI:
249 val |= MII_M1011_PHY_SCR_MDI;
250 break;
251 case ETH_TP_MDI_X:
252 val |= MII_M1011_PHY_SCR_MDI_X;
253 break;
254 case ETH_TP_MDI_AUTO:
255 case ETH_TP_MDI_INVALID:
256 default:
257 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
258 break;
259 }
260
261 if (val != reg) {
262 /* Set the new polarity value in the register */
263 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
264 if (err)
265 return err;
266 }
267
268 return 0;
269 }
270
271 static int marvell_set_downshift(struct phy_device *phydev, bool enable,
272 u8 retries)
273 {
274 int reg;
275
276 reg = phy_read(phydev, MII_M1011_PHY_SCR);
277 if (reg < 0)
278 return reg;
279
280 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
281 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
282 if (enable)
283 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
284
285 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
286 }
287
288 static int marvell_config_aneg(struct phy_device *phydev)
289 {
290 int err;
291
292 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
293 if (err < 0)
294 return err;
295
296 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
297 MII_M1111_PHY_LED_DIRECT);
298 if (err < 0)
299 return err;
300
301 err = genphy_config_aneg(phydev);
302 if (err < 0)
303 return err;
304
305 if (phydev->autoneg != AUTONEG_ENABLE) {
306 /* A write to speed/duplex bits (that is performed by
307 * genphy_config_aneg() call above) must be followed by
308 * a software reset. Otherwise, the write has no effect.
309 */
310 err = genphy_soft_reset(phydev);
311 if (err < 0)
312 return err;
313 }
314
315 return 0;
316 }
317
318 static int m88e1101_config_aneg(struct phy_device *phydev)
319 {
320 int err;
321
322 /* This Marvell PHY has an errata which requires
323 * that certain registers get written in order
324 * to restart autonegotiation
325 */
326 err = genphy_soft_reset(phydev);
327 if (err < 0)
328 return err;
329
330 err = phy_write(phydev, 0x1d, 0x1f);
331 if (err < 0)
332 return err;
333
334 err = phy_write(phydev, 0x1e, 0x200c);
335 if (err < 0)
336 return err;
337
338 err = phy_write(phydev, 0x1d, 0x5);
339 if (err < 0)
340 return err;
341
342 err = phy_write(phydev, 0x1e, 0);
343 if (err < 0)
344 return err;
345
346 err = phy_write(phydev, 0x1e, 0x100);
347 if (err < 0)
348 return err;
349
350 return marvell_config_aneg(phydev);
351 }
352
353 static int m88e1111_config_aneg(struct phy_device *phydev)
354 {
355 int err;
356
357 /* The Marvell PHY has an errata which requires
358 * that certain registers get written in order
359 * to restart autonegotiation
360 */
361 err = genphy_soft_reset(phydev);
362
363 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
364 if (err < 0)
365 return err;
366
367 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
368 MII_M1111_PHY_LED_DIRECT);
369 if (err < 0)
370 return err;
371
372 err = genphy_config_aneg(phydev);
373 if (err < 0)
374 return err;
375
376 if (phydev->autoneg != AUTONEG_ENABLE) {
377 /* A write to speed/duplex bits (that is performed by
378 * genphy_config_aneg() call above) must be followed by
379 * a software reset. Otherwise, the write has no effect.
380 */
381 err = genphy_soft_reset(phydev);
382 if (err < 0)
383 return err;
384 }
385
386 return 0;
387 }
388
389 #ifdef CONFIG_OF_MDIO
390 /* Set and/or override some configuration registers based on the
391 * marvell,reg-init property stored in the of_node for the phydev.
392 *
393 * marvell,reg-init = <reg-page reg mask value>,...;
394 *
395 * There may be one or more sets of <reg-page reg mask value>:
396 *
397 * reg-page: which register bank to use.
398 * reg: the register.
399 * mask: if non-zero, ANDed with existing register value.
400 * value: ORed with the masked value and written to the regiser.
401 *
402 */
403 static int marvell_of_reg_init(struct phy_device *phydev)
404 {
405 const __be32 *paddr;
406 int len, i, saved_page, current_page, ret = 0;
407
408 if (!phydev->mdio.dev.of_node)
409 return 0;
410
411 paddr = of_get_property(phydev->mdio.dev.of_node,
412 "marvell,reg-init", &len);
413 if (!paddr || len < (4 * sizeof(*paddr)))
414 return 0;
415
416 saved_page = phy_save_page(phydev);
417 if (saved_page < 0)
418 goto err;
419 current_page = saved_page;
420
421 len /= sizeof(*paddr);
422 for (i = 0; i < len - 3; i += 4) {
423 u16 page = be32_to_cpup(paddr + i);
424 u16 reg = be32_to_cpup(paddr + i + 1);
425 u16 mask = be32_to_cpup(paddr + i + 2);
426 u16 val_bits = be32_to_cpup(paddr + i + 3);
427 int val;
428
429 if (page != current_page) {
430 current_page = page;
431 ret = marvell_write_page(phydev, page);
432 if (ret < 0)
433 goto err;
434 }
435
436 val = 0;
437 if (mask) {
438 val = __phy_read(phydev, reg);
439 if (val < 0) {
440 ret = val;
441 goto err;
442 }
443 val &= mask;
444 }
445 val |= val_bits;
446
447 ret = __phy_write(phydev, reg, val);
448 if (ret < 0)
449 goto err;
450 }
451 err:
452 return phy_restore_page(phydev, saved_page, ret);
453 }
454 #else
455 static int marvell_of_reg_init(struct phy_device *phydev)
456 {
457 return 0;
458 }
459 #endif /* CONFIG_OF_MDIO */
460
461 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
462 {
463 int mscr;
464
465 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
466 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
467 MII_88E1121_PHY_MSCR_TX_DELAY;
468 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
469 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
470 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
471 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
472 else
473 mscr = 0;
474
475 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
476 MII_88E1121_PHY_MSCR_REG,
477 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
478 }
479
480 static int m88e1121_config_aneg(struct phy_device *phydev)
481 {
482 int err = 0;
483
484 if (phy_interface_is_rgmii(phydev)) {
485 err = m88e1121_config_aneg_rgmii_delays(phydev);
486 if (err < 0)
487 return err;
488 }
489
490 err = genphy_soft_reset(phydev);
491 if (err < 0)
492 return err;
493
494 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
495 if (err < 0)
496 return err;
497
498 return genphy_config_aneg(phydev);
499 }
500
501 static int m88e1318_config_aneg(struct phy_device *phydev)
502 {
503 int err;
504
505 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
506 MII_88E1318S_PHY_MSCR1_REG,
507 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
508 if (err < 0)
509 return err;
510
511 return m88e1121_config_aneg(phydev);
512 }
513
514 /**
515 * ethtool_adv_to_fiber_adv_t
516 * @ethadv: the ethtool advertisement settings
517 *
518 * A small helper function that translates ethtool advertisement
519 * settings to phy autonegotiation advertisements for the
520 * MII_ADV register for fiber link.
521 */
522 static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
523 {
524 u32 result = 0;
525
526 if (ethadv & ADVERTISED_1000baseT_Half)
527 result |= ADVERTISE_FIBER_1000HALF;
528 if (ethadv & ADVERTISED_1000baseT_Full)
529 result |= ADVERTISE_FIBER_1000FULL;
530
531 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
532 result |= LPA_PAUSE_ASYM_FIBER;
533 else if (ethadv & ADVERTISE_PAUSE_CAP)
534 result |= (ADVERTISE_PAUSE_FIBER
535 & (~ADVERTISE_PAUSE_ASYM_FIBER));
536
537 return result;
538 }
539
540 /**
541 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
542 * @phydev: target phy_device struct
543 *
544 * Description: If auto-negotiation is enabled, we configure the
545 * advertising, and then restart auto-negotiation. If it is not
546 * enabled, then we write the BMCR. Adapted for fiber link in
547 * some Marvell's devices.
548 */
549 static int marvell_config_aneg_fiber(struct phy_device *phydev)
550 {
551 int changed = 0;
552 int err;
553 int adv, oldadv;
554 u32 advertise;
555
556 if (phydev->autoneg != AUTONEG_ENABLE)
557 return genphy_setup_forced(phydev);
558
559 /* Only allow advertising what this PHY supports */
560 phydev->advertising &= phydev->supported;
561 advertise = phydev->advertising;
562
563 /* Setup fiber advertisement */
564 adv = phy_read(phydev, MII_ADVERTISE);
565 if (adv < 0)
566 return adv;
567
568 oldadv = adv;
569 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
570 | LPA_PAUSE_FIBER);
571 adv |= ethtool_adv_to_fiber_adv_t(advertise);
572
573 if (adv != oldadv) {
574 err = phy_write(phydev, MII_ADVERTISE, adv);
575 if (err < 0)
576 return err;
577
578 changed = 1;
579 }
580
581 if (changed == 0) {
582 /* Advertisement hasn't changed, but maybe aneg was never on to
583 * begin with? Or maybe phy was isolated?
584 */
585 int ctl = phy_read(phydev, MII_BMCR);
586
587 if (ctl < 0)
588 return ctl;
589
590 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
591 changed = 1; /* do restart aneg */
592 }
593
594 /* Only restart aneg if we are advertising something different
595 * than we were before.
596 */
597 if (changed > 0)
598 changed = genphy_restart_aneg(phydev);
599
600 return changed;
601 }
602
603 static int m88e1510_config_aneg(struct phy_device *phydev)
604 {
605 int err;
606
607 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
608 if (err < 0)
609 goto error;
610
611 /* Configure the copper link first */
612 err = m88e1318_config_aneg(phydev);
613 if (err < 0)
614 goto error;
615
616 /* Do not touch the fiber page if we're in copper->sgmii mode */
617 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
618 return 0;
619
620 /* Then the fiber link */
621 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
622 if (err < 0)
623 goto error;
624
625 err = marvell_config_aneg_fiber(phydev);
626 if (err < 0)
627 goto error;
628
629 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
630
631 error:
632 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
633 return err;
634 }
635
636 static void marvell_config_led(struct phy_device *phydev)
637 {
638 u16 def_config;
639 int err;
640
641 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
642 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
643 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
644 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
645 def_config = MII_88E1121_PHY_LED_DEF;
646 break;
647 /* Default PHY LED config:
648 * LED[0] .. 1000Mbps Link
649 * LED[1] .. 100Mbps Link
650 * LED[2] .. Blink, Activity
651 */
652 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
653 def_config = MII_88E1510_PHY_LED_DEF;
654 break;
655 default:
656 return;
657 }
658
659 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
660 def_config);
661 if (err < 0)
662 pr_warn("Fail to config marvell phy LED.\n");
663 }
664
665 static int marvell_config_init(struct phy_device *phydev)
666 {
667 /* Set defalut LED */
668 marvell_config_led(phydev);
669
670 /* Set registers from marvell,reg-init DT property */
671 return marvell_of_reg_init(phydev);
672 }
673
674 static int m88e1116r_config_init(struct phy_device *phydev)
675 {
676 int err;
677
678 err = genphy_soft_reset(phydev);
679 if (err < 0)
680 return err;
681
682 msleep(500);
683
684 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
685 if (err < 0)
686 return err;
687
688 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
689 if (err < 0)
690 return err;
691
692 err = marvell_set_downshift(phydev, true, 8);
693 if (err < 0)
694 return err;
695
696 if (phy_interface_is_rgmii(phydev)) {
697 err = m88e1121_config_aneg_rgmii_delays(phydev);
698 if (err < 0)
699 return err;
700 }
701
702 err = genphy_soft_reset(phydev);
703 if (err < 0)
704 return err;
705
706 return marvell_config_init(phydev);
707 }
708
709 static int m88e3016_config_init(struct phy_device *phydev)
710 {
711 int ret;
712
713 /* Enable Scrambler and Auto-Crossover */
714 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
715 MII_88E3016_DISABLE_SCRAMBLER,
716 MII_88E3016_AUTO_MDIX_CROSSOVER);
717 if (ret < 0)
718 return ret;
719
720 return marvell_config_init(phydev);
721 }
722
723 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
724 u16 mode,
725 int fibre_copper_auto)
726 {
727 if (fibre_copper_auto)
728 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
729
730 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
731 MII_M1111_HWCFG_MODE_MASK |
732 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
733 MII_M1111_HWCFG_FIBER_COPPER_RES,
734 mode);
735 }
736
737 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
738 {
739 int delay;
740
741 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
742 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
743 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
744 delay = MII_M1111_RGMII_RX_DELAY;
745 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
746 delay = MII_M1111_RGMII_TX_DELAY;
747 } else {
748 delay = 0;
749 }
750
751 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
752 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
753 delay);
754 }
755
756 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
757 {
758 int temp;
759 int err;
760
761 err = m88e1111_config_init_rgmii_delays(phydev);
762 if (err < 0)
763 return err;
764
765 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
766 if (temp < 0)
767 return temp;
768
769 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
770
771 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
772 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
773 else
774 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
775
776 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
777 }
778
779 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
780 {
781 int err;
782
783 err = m88e1111_config_init_hwcfg_mode(
784 phydev,
785 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
786 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
787 if (err < 0)
788 return err;
789
790 /* make sure copper is selected */
791 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
792 }
793
794 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
795 {
796 int err;
797
798 err = m88e1111_config_init_rgmii_delays(phydev);
799 if (err < 0)
800 return err;
801
802 err = m88e1111_config_init_hwcfg_mode(
803 phydev,
804 MII_M1111_HWCFG_MODE_RTBI,
805 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
806 if (err < 0)
807 return err;
808
809 /* soft reset */
810 err = genphy_soft_reset(phydev);
811 if (err < 0)
812 return err;
813
814 return m88e1111_config_init_hwcfg_mode(
815 phydev,
816 MII_M1111_HWCFG_MODE_RTBI,
817 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
818 }
819
820 static int m88e1111_config_init(struct phy_device *phydev)
821 {
822 int err;
823
824 if (phy_interface_is_rgmii(phydev)) {
825 err = m88e1111_config_init_rgmii(phydev);
826 if (err < 0)
827 return err;
828 }
829
830 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
831 err = m88e1111_config_init_sgmii(phydev);
832 if (err < 0)
833 return err;
834 }
835
836 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
837 err = m88e1111_config_init_rtbi(phydev);
838 if (err < 0)
839 return err;
840 }
841
842 err = marvell_of_reg_init(phydev);
843 if (err < 0)
844 return err;
845
846 return genphy_soft_reset(phydev);
847 }
848
849 static int m88e1318_config_init(struct phy_device *phydev)
850 {
851 if (phy_interrupt_is_valid(phydev)) {
852 int err = phy_modify_paged(
853 phydev, MII_MARVELL_LED_PAGE,
854 MII_88E1318S_PHY_LED_TCR,
855 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
856 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
857 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
858 if (err < 0)
859 return err;
860 }
861
862 return marvell_config_init(phydev);
863 }
864
865 static int m88e1510_config_init(struct phy_device *phydev)
866 {
867 int err;
868
869 /* SGMII-to-Copper mode initialization */
870 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
871 /* Select page 18 */
872 err = marvell_set_page(phydev, 18);
873 if (err < 0)
874 return err;
875
876 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
877 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
878 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
879 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
880 if (err < 0)
881 return err;
882
883 /* PHY reset is necessary after changing MODE[2:0] */
884 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
885 MII_88E1510_GEN_CTRL_REG_1_RESET);
886 if (err < 0)
887 return err;
888
889 /* Reset page selection */
890 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
891 if (err < 0)
892 return err;
893 }
894
895 return m88e1318_config_init(phydev);
896 }
897
898 static int m88e1118_config_aneg(struct phy_device *phydev)
899 {
900 int err;
901
902 err = genphy_soft_reset(phydev);
903 if (err < 0)
904 return err;
905
906 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
907 if (err < 0)
908 return err;
909
910 err = genphy_config_aneg(phydev);
911 return 0;
912 }
913
914 static int m88e1118_config_init(struct phy_device *phydev)
915 {
916 int err;
917
918 /* Change address */
919 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
920 if (err < 0)
921 return err;
922
923 /* Enable 1000 Mbit */
924 err = phy_write(phydev, 0x15, 0x1070);
925 if (err < 0)
926 return err;
927
928 /* Change address */
929 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
930 if (err < 0)
931 return err;
932
933 /* Adjust LED Control */
934 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
935 err = phy_write(phydev, 0x10, 0x1100);
936 else
937 err = phy_write(phydev, 0x10, 0x021e);
938 if (err < 0)
939 return err;
940
941 err = marvell_of_reg_init(phydev);
942 if (err < 0)
943 return err;
944
945 /* Reset address */
946 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
947 if (err < 0)
948 return err;
949
950 return genphy_soft_reset(phydev);
951 }
952
953 static int m88e1149_config_init(struct phy_device *phydev)
954 {
955 int err;
956
957 /* Change address */
958 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
959 if (err < 0)
960 return err;
961
962 /* Enable 1000 Mbit */
963 err = phy_write(phydev, 0x15, 0x1048);
964 if (err < 0)
965 return err;
966
967 err = marvell_of_reg_init(phydev);
968 if (err < 0)
969 return err;
970
971 /* Reset address */
972 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
973 if (err < 0)
974 return err;
975
976 return genphy_soft_reset(phydev);
977 }
978
979 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
980 {
981 int err;
982
983 err = m88e1111_config_init_rgmii_delays(phydev);
984 if (err < 0)
985 return err;
986
987 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
988 err = phy_write(phydev, 0x1d, 0x0012);
989 if (err < 0)
990 return err;
991
992 err = phy_modify(phydev, 0x1e, 0x0fc0,
993 2 << 9 | /* 36 ohm */
994 2 << 6); /* 39 ohm */
995 if (err < 0)
996 return err;
997
998 err = phy_write(phydev, 0x1d, 0x3);
999 if (err < 0)
1000 return err;
1001
1002 err = phy_write(phydev, 0x1e, 0x8000);
1003 }
1004 return err;
1005 }
1006
1007 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1008 {
1009 return m88e1111_config_init_hwcfg_mode(
1010 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1011 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1012 }
1013
1014 static int m88e1145_config_init(struct phy_device *phydev)
1015 {
1016 int err;
1017
1018 /* Take care of errata E0 & E1 */
1019 err = phy_write(phydev, 0x1d, 0x001b);
1020 if (err < 0)
1021 return err;
1022
1023 err = phy_write(phydev, 0x1e, 0x418f);
1024 if (err < 0)
1025 return err;
1026
1027 err = phy_write(phydev, 0x1d, 0x0016);
1028 if (err < 0)
1029 return err;
1030
1031 err = phy_write(phydev, 0x1e, 0xa2da);
1032 if (err < 0)
1033 return err;
1034
1035 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1036 err = m88e1145_config_init_rgmii(phydev);
1037 if (err < 0)
1038 return err;
1039 }
1040
1041 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1042 err = m88e1145_config_init_sgmii(phydev);
1043 if (err < 0)
1044 return err;
1045 }
1046
1047 err = marvell_of_reg_init(phydev);
1048 if (err < 0)
1049 return err;
1050
1051 return 0;
1052 }
1053
1054 /* The VOD can be out of specification on link up. Poke an
1055 * undocumented register, in an undocumented page, with a magic value
1056 * to fix this.
1057 */
1058 static int m88e6390_errata(struct phy_device *phydev)
1059 {
1060 int err;
1061
1062 err = phy_write(phydev, MII_BMCR,
1063 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1064 if (err)
1065 return err;
1066
1067 usleep_range(300, 400);
1068
1069 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1070 if (err)
1071 return err;
1072
1073 return genphy_soft_reset(phydev);
1074 }
1075
1076 static int m88e6390_config_aneg(struct phy_device *phydev)
1077 {
1078 int err;
1079
1080 err = m88e6390_errata(phydev);
1081 if (err)
1082 return err;
1083
1084 return m88e1510_config_aneg(phydev);
1085 }
1086
1087 /**
1088 * fiber_lpa_to_ethtool_lpa_t
1089 * @lpa: value of the MII_LPA register for fiber link
1090 *
1091 * A small helper function that translates MII_LPA
1092 * bits to ethtool LP advertisement settings.
1093 */
1094 static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1095 {
1096 u32 result = 0;
1097
1098 if (lpa & LPA_FIBER_1000HALF)
1099 result |= ADVERTISED_1000baseT_Half;
1100 if (lpa & LPA_FIBER_1000FULL)
1101 result |= ADVERTISED_1000baseT_Full;
1102
1103 return result;
1104 }
1105
1106 /**
1107 * marvell_update_link - update link status in real time in @phydev
1108 * @phydev: target phy_device struct
1109 *
1110 * Description: Update the value in phydev->link to reflect the
1111 * current link value.
1112 */
1113 static int marvell_update_link(struct phy_device *phydev, int fiber)
1114 {
1115 int status;
1116
1117 /* Use the generic register for copper link, or specific
1118 * register for fiber case
1119 */
1120 if (fiber) {
1121 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1122 if (status < 0)
1123 return status;
1124
1125 if ((status & REGISTER_LINK_STATUS) == 0)
1126 phydev->link = 0;
1127 else
1128 phydev->link = 1;
1129 } else {
1130 return genphy_update_link(phydev);
1131 }
1132
1133 return 0;
1134 }
1135
1136 static int marvell_read_status_page_an(struct phy_device *phydev,
1137 int fiber)
1138 {
1139 int status;
1140 int lpa;
1141 int lpagb;
1142
1143 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1144 if (status < 0)
1145 return status;
1146
1147 lpa = phy_read(phydev, MII_LPA);
1148 if (lpa < 0)
1149 return lpa;
1150
1151 lpagb = phy_read(phydev, MII_STAT1000);
1152 if (lpagb < 0)
1153 return lpagb;
1154
1155 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1156 phydev->duplex = DUPLEX_FULL;
1157 else
1158 phydev->duplex = DUPLEX_HALF;
1159
1160 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1161 phydev->pause = 0;
1162 phydev->asym_pause = 0;
1163
1164 switch (status) {
1165 case MII_M1011_PHY_STATUS_1000:
1166 phydev->speed = SPEED_1000;
1167 break;
1168
1169 case MII_M1011_PHY_STATUS_100:
1170 phydev->speed = SPEED_100;
1171 break;
1172
1173 default:
1174 phydev->speed = SPEED_10;
1175 break;
1176 }
1177
1178 if (!fiber) {
1179 phydev->lp_advertising =
1180 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1181 mii_lpa_to_ethtool_lpa_t(lpa);
1182
1183 if (phydev->duplex == DUPLEX_FULL) {
1184 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1185 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1186 }
1187 } else {
1188 /* The fiber link is only 1000M capable */
1189 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1190
1191 if (phydev->duplex == DUPLEX_FULL) {
1192 if (!(lpa & LPA_PAUSE_FIBER)) {
1193 phydev->pause = 0;
1194 phydev->asym_pause = 0;
1195 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1196 phydev->pause = 1;
1197 phydev->asym_pause = 1;
1198 } else {
1199 phydev->pause = 1;
1200 phydev->asym_pause = 0;
1201 }
1202 }
1203 }
1204 return 0;
1205 }
1206
1207 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1208 {
1209 int bmcr = phy_read(phydev, MII_BMCR);
1210
1211 if (bmcr < 0)
1212 return bmcr;
1213
1214 if (bmcr & BMCR_FULLDPLX)
1215 phydev->duplex = DUPLEX_FULL;
1216 else
1217 phydev->duplex = DUPLEX_HALF;
1218
1219 if (bmcr & BMCR_SPEED1000)
1220 phydev->speed = SPEED_1000;
1221 else if (bmcr & BMCR_SPEED100)
1222 phydev->speed = SPEED_100;
1223 else
1224 phydev->speed = SPEED_10;
1225
1226 phydev->pause = 0;
1227 phydev->asym_pause = 0;
1228 phydev->lp_advertising = 0;
1229
1230 return 0;
1231 }
1232
1233 /* marvell_read_status_page
1234 *
1235 * Description:
1236 * Check the link, then figure out the current state
1237 * by comparing what we advertise with what the link partner
1238 * advertises. Start by checking the gigabit possibilities,
1239 * then move on to 10/100.
1240 */
1241 static int marvell_read_status_page(struct phy_device *phydev, int page)
1242 {
1243 int fiber;
1244 int err;
1245
1246 /* Detect and update the link, but return if there
1247 * was an error
1248 */
1249 if (page == MII_MARVELL_FIBER_PAGE)
1250 fiber = 1;
1251 else
1252 fiber = 0;
1253
1254 err = marvell_update_link(phydev, fiber);
1255 if (err)
1256 return err;
1257
1258 if (phydev->autoneg == AUTONEG_ENABLE)
1259 err = marvell_read_status_page_an(phydev, fiber);
1260 else
1261 err = marvell_read_status_page_fixed(phydev);
1262
1263 return err;
1264 }
1265
1266 /* marvell_read_status
1267 *
1268 * Some Marvell's phys have two modes: fiber and copper.
1269 * Both need status checked.
1270 * Description:
1271 * First, check the fiber link and status.
1272 * If the fiber link is down, check the copper link and status which
1273 * will be the default value if both link are down.
1274 */
1275 static int marvell_read_status(struct phy_device *phydev)
1276 {
1277 int err;
1278
1279 /* Check the fiber mode first */
1280 if (phydev->supported & SUPPORTED_FIBRE &&
1281 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1282 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1283 if (err < 0)
1284 goto error;
1285
1286 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1287 if (err < 0)
1288 goto error;
1289
1290 /* If the fiber link is up, it is the selected and
1291 * used link. In this case, we need to stay in the
1292 * fiber page. Please to be careful about that, avoid
1293 * to restore Copper page in other functions which
1294 * could break the behaviour for some fiber phy like
1295 * 88E1512.
1296 */
1297 if (phydev->link)
1298 return 0;
1299
1300 /* If fiber link is down, check and save copper mode state */
1301 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1302 if (err < 0)
1303 goto error;
1304 }
1305
1306 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1307
1308 error:
1309 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1310 return err;
1311 }
1312
1313 /* marvell_suspend
1314 *
1315 * Some Marvell's phys have two modes: fiber and copper.
1316 * Both need to be suspended
1317 */
1318 static int marvell_suspend(struct phy_device *phydev)
1319 {
1320 int err;
1321
1322 /* Suspend the fiber mode first */
1323 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1324 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1325 if (err < 0)
1326 goto error;
1327
1328 /* With the page set, use the generic suspend */
1329 err = genphy_suspend(phydev);
1330 if (err < 0)
1331 goto error;
1332
1333 /* Then, the copper link */
1334 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1335 if (err < 0)
1336 goto error;
1337 }
1338
1339 /* With the page set, use the generic suspend */
1340 return genphy_suspend(phydev);
1341
1342 error:
1343 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1344 return err;
1345 }
1346
1347 /* marvell_resume
1348 *
1349 * Some Marvell's phys have two modes: fiber and copper.
1350 * Both need to be resumed
1351 */
1352 static int marvell_resume(struct phy_device *phydev)
1353 {
1354 int err;
1355
1356 /* Resume the fiber mode first */
1357 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1358 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1359 if (err < 0)
1360 goto error;
1361
1362 /* With the page set, use the generic resume */
1363 err = genphy_resume(phydev);
1364 if (err < 0)
1365 goto error;
1366
1367 /* Then, the copper link */
1368 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1369 if (err < 0)
1370 goto error;
1371 }
1372
1373 /* With the page set, use the generic resume */
1374 return genphy_resume(phydev);
1375
1376 error:
1377 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1378 return err;
1379 }
1380
1381 static int marvell_aneg_done(struct phy_device *phydev)
1382 {
1383 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1384
1385 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1386 }
1387
1388 static int m88e1121_did_interrupt(struct phy_device *phydev)
1389 {
1390 int imask;
1391
1392 imask = phy_read(phydev, MII_M1011_IEVENT);
1393
1394 if (imask & MII_M1011_IMASK_INIT)
1395 return 1;
1396
1397 return 0;
1398 }
1399
1400 static void m88e1318_get_wol(struct phy_device *phydev,
1401 struct ethtool_wolinfo *wol)
1402 {
1403 int oldpage, ret = 0;
1404
1405 wol->supported = WAKE_MAGIC;
1406 wol->wolopts = 0;
1407
1408 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1409 if (oldpage < 0)
1410 goto error;
1411
1412 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1413 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1414 wol->wolopts |= WAKE_MAGIC;
1415
1416 error:
1417 phy_restore_page(phydev, oldpage, ret);
1418 }
1419
1420 static int m88e1318_set_wol(struct phy_device *phydev,
1421 struct ethtool_wolinfo *wol)
1422 {
1423 int err = 0, oldpage;
1424
1425 oldpage = phy_save_page(phydev);
1426 if (oldpage < 0)
1427 goto error;
1428
1429 if (wol->wolopts & WAKE_MAGIC) {
1430 /* Explicitly switch to page 0x00, just to be sure */
1431 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1432 if (err < 0)
1433 goto error;
1434
1435 /* If WOL event happened once, the LED[2] interrupt pin
1436 * will not be cleared unless we reading the interrupt status
1437 * register. If interrupts are in use, the normal interrupt
1438 * handling will clear the WOL event. Clear the WOL event
1439 * before enabling it if !phy_interrupt_is_valid()
1440 */
1441 if (!phy_interrupt_is_valid(phydev))
1442 __phy_read(phydev, MII_M1011_IEVENT);
1443
1444 /* Enable the WOL interrupt */
1445 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1446 MII_88E1318S_PHY_CSIER_WOL_EIE);
1447 if (err < 0)
1448 goto error;
1449
1450 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1451 if (err < 0)
1452 goto error;
1453
1454 /* Setup LED[2] as interrupt pin (active low) */
1455 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1456 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1457 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1458 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1459 if (err < 0)
1460 goto error;
1461
1462 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1463 if (err < 0)
1464 goto error;
1465
1466 /* Store the device address for the magic packet */
1467 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1468 ((phydev->attached_dev->dev_addr[5] << 8) |
1469 phydev->attached_dev->dev_addr[4]));
1470 if (err < 0)
1471 goto error;
1472 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1473 ((phydev->attached_dev->dev_addr[3] << 8) |
1474 phydev->attached_dev->dev_addr[2]));
1475 if (err < 0)
1476 goto error;
1477 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1478 ((phydev->attached_dev->dev_addr[1] << 8) |
1479 phydev->attached_dev->dev_addr[0]));
1480 if (err < 0)
1481 goto error;
1482
1483 /* Clear WOL status and enable magic packet matching */
1484 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1485 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1486 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1487 if (err < 0)
1488 goto error;
1489 } else {
1490 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1491 if (err < 0)
1492 goto error;
1493
1494 /* Clear WOL status and disable magic packet matching */
1495 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1496 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1497 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1498 if (err < 0)
1499 goto error;
1500 }
1501
1502 error:
1503 return phy_restore_page(phydev, oldpage, err);
1504 }
1505
1506 static int marvell_get_sset_count(struct phy_device *phydev)
1507 {
1508 if (phydev->supported & SUPPORTED_FIBRE)
1509 return ARRAY_SIZE(marvell_hw_stats);
1510 else
1511 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1512 }
1513
1514 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1515 {
1516 int count = marvell_get_sset_count(phydev);
1517 int i;
1518
1519 for (i = 0; i < count; i++) {
1520 strlcpy(data + i * ETH_GSTRING_LEN,
1521 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1522 }
1523 }
1524
1525 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1526 {
1527 struct marvell_hw_stat stat = marvell_hw_stats[i];
1528 struct marvell_priv *priv = phydev->priv;
1529 int val;
1530 u64 ret;
1531
1532 val = phy_read_paged(phydev, stat.page, stat.reg);
1533 if (val < 0) {
1534 ret = U64_MAX;
1535 } else {
1536 val = val & ((1 << stat.bits) - 1);
1537 priv->stats[i] += val;
1538 ret = priv->stats[i];
1539 }
1540
1541 return ret;
1542 }
1543
1544 static void marvell_get_stats(struct phy_device *phydev,
1545 struct ethtool_stats *stats, u64 *data)
1546 {
1547 int count = marvell_get_sset_count(phydev);
1548 int i;
1549
1550 for (i = 0; i < count; i++)
1551 data[i] = marvell_get_stat(phydev, i);
1552 }
1553
1554 #ifdef CONFIG_HWMON
1555 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1556 {
1557 int oldpage;
1558 int ret = 0;
1559 int val;
1560
1561 *temp = 0;
1562
1563 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1564 if (oldpage < 0)
1565 goto error;
1566
1567 /* Enable temperature sensor */
1568 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
1569 if (ret < 0)
1570 goto error;
1571
1572 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1573 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1574 if (ret < 0)
1575 goto error;
1576
1577 /* Wait for temperature to stabilize */
1578 usleep_range(10000, 12000);
1579
1580 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
1581 if (val < 0) {
1582 ret = val;
1583 goto error;
1584 }
1585
1586 /* Disable temperature sensor */
1587 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1588 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1589 if (ret < 0)
1590 goto error;
1591
1592 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1593
1594 error:
1595 return phy_restore_page(phydev, oldpage, ret);
1596 }
1597
1598 static int m88e1121_hwmon_read(struct device *dev,
1599 enum hwmon_sensor_types type,
1600 u32 attr, int channel, long *temp)
1601 {
1602 struct phy_device *phydev = dev_get_drvdata(dev);
1603 int err;
1604
1605 switch (attr) {
1606 case hwmon_temp_input:
1607 err = m88e1121_get_temp(phydev, temp);
1608 break;
1609 default:
1610 return -EOPNOTSUPP;
1611 }
1612
1613 return err;
1614 }
1615
1616 static umode_t m88e1121_hwmon_is_visible(const void *data,
1617 enum hwmon_sensor_types type,
1618 u32 attr, int channel)
1619 {
1620 if (type != hwmon_temp)
1621 return 0;
1622
1623 switch (attr) {
1624 case hwmon_temp_input:
1625 return 0444;
1626 default:
1627 return 0;
1628 }
1629 }
1630
1631 static u32 m88e1121_hwmon_chip_config[] = {
1632 HWMON_C_REGISTER_TZ,
1633 0
1634 };
1635
1636 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1637 .type = hwmon_chip,
1638 .config = m88e1121_hwmon_chip_config,
1639 };
1640
1641 static u32 m88e1121_hwmon_temp_config[] = {
1642 HWMON_T_INPUT,
1643 0
1644 };
1645
1646 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1647 .type = hwmon_temp,
1648 .config = m88e1121_hwmon_temp_config,
1649 };
1650
1651 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1652 &m88e1121_hwmon_chip,
1653 &m88e1121_hwmon_temp,
1654 NULL
1655 };
1656
1657 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1658 .is_visible = m88e1121_hwmon_is_visible,
1659 .read = m88e1121_hwmon_read,
1660 };
1661
1662 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1663 .ops = &m88e1121_hwmon_hwmon_ops,
1664 .info = m88e1121_hwmon_info,
1665 };
1666
1667 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1668 {
1669 int ret;
1670
1671 *temp = 0;
1672
1673 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1674 MII_88E1510_TEMP_SENSOR);
1675 if (ret < 0)
1676 return ret;
1677
1678 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1679
1680 return 0;
1681 }
1682
1683 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1684 {
1685 int ret;
1686
1687 *temp = 0;
1688
1689 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1690 MII_88E1121_MISC_TEST);
1691 if (ret < 0)
1692 return ret;
1693
1694 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1695 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1696 /* convert to mC */
1697 *temp *= 1000;
1698
1699 return 0;
1700 }
1701
1702 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1703 {
1704 temp = temp / 1000;
1705 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1706
1707 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1708 MII_88E1121_MISC_TEST,
1709 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1710 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
1711 }
1712
1713 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1714 {
1715 int ret;
1716
1717 *alarm = false;
1718
1719 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1720 MII_88E1121_MISC_TEST);
1721 if (ret < 0)
1722 return ret;
1723
1724 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1725
1726 return 0;
1727 }
1728
1729 static int m88e1510_hwmon_read(struct device *dev,
1730 enum hwmon_sensor_types type,
1731 u32 attr, int channel, long *temp)
1732 {
1733 struct phy_device *phydev = dev_get_drvdata(dev);
1734 int err;
1735
1736 switch (attr) {
1737 case hwmon_temp_input:
1738 err = m88e1510_get_temp(phydev, temp);
1739 break;
1740 case hwmon_temp_crit:
1741 err = m88e1510_get_temp_critical(phydev, temp);
1742 break;
1743 case hwmon_temp_max_alarm:
1744 err = m88e1510_get_temp_alarm(phydev, temp);
1745 break;
1746 default:
1747 return -EOPNOTSUPP;
1748 }
1749
1750 return err;
1751 }
1752
1753 static int m88e1510_hwmon_write(struct device *dev,
1754 enum hwmon_sensor_types type,
1755 u32 attr, int channel, long temp)
1756 {
1757 struct phy_device *phydev = dev_get_drvdata(dev);
1758 int err;
1759
1760 switch (attr) {
1761 case hwmon_temp_crit:
1762 err = m88e1510_set_temp_critical(phydev, temp);
1763 break;
1764 default:
1765 return -EOPNOTSUPP;
1766 }
1767 return err;
1768 }
1769
1770 static umode_t m88e1510_hwmon_is_visible(const void *data,
1771 enum hwmon_sensor_types type,
1772 u32 attr, int channel)
1773 {
1774 if (type != hwmon_temp)
1775 return 0;
1776
1777 switch (attr) {
1778 case hwmon_temp_input:
1779 case hwmon_temp_max_alarm:
1780 return 0444;
1781 case hwmon_temp_crit:
1782 return 0644;
1783 default:
1784 return 0;
1785 }
1786 }
1787
1788 static u32 m88e1510_hwmon_temp_config[] = {
1789 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1790 0
1791 };
1792
1793 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1794 .type = hwmon_temp,
1795 .config = m88e1510_hwmon_temp_config,
1796 };
1797
1798 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1799 &m88e1121_hwmon_chip,
1800 &m88e1510_hwmon_temp,
1801 NULL
1802 };
1803
1804 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1805 .is_visible = m88e1510_hwmon_is_visible,
1806 .read = m88e1510_hwmon_read,
1807 .write = m88e1510_hwmon_write,
1808 };
1809
1810 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1811 .ops = &m88e1510_hwmon_hwmon_ops,
1812 .info = m88e1510_hwmon_info,
1813 };
1814
1815 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1816 {
1817 int sum = 0;
1818 int oldpage;
1819 int ret = 0;
1820 int i;
1821
1822 *temp = 0;
1823
1824 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1825 if (oldpage < 0)
1826 goto error;
1827
1828 /* Enable temperature sensor */
1829 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1830 if (ret < 0)
1831 goto error;
1832
1833 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1834 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1835 MII_88E6390_MISC_TEST_SAMPLE_1S;
1836
1837 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1838 if (ret < 0)
1839 goto error;
1840
1841 /* Wait for temperature to stabilize */
1842 usleep_range(10000, 12000);
1843
1844 /* Reading the temperature sense has an errata. You need to read
1845 * a number of times and take an average.
1846 */
1847 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1848 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1849 if (ret < 0)
1850 goto error;
1851 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1852 }
1853
1854 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1855 *temp = (sum - 75) * 1000;
1856
1857 /* Disable temperature sensor */
1858 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1859 if (ret < 0)
1860 goto error;
1861
1862 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1863 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
1864
1865 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1866
1867 error:
1868 phy_restore_page(phydev, oldpage, ret);
1869
1870 return ret;
1871 }
1872
1873 static int m88e6390_hwmon_read(struct device *dev,
1874 enum hwmon_sensor_types type,
1875 u32 attr, int channel, long *temp)
1876 {
1877 struct phy_device *phydev = dev_get_drvdata(dev);
1878 int err;
1879
1880 switch (attr) {
1881 case hwmon_temp_input:
1882 err = m88e6390_get_temp(phydev, temp);
1883 break;
1884 default:
1885 return -EOPNOTSUPP;
1886 }
1887
1888 return err;
1889 }
1890
1891 static umode_t m88e6390_hwmon_is_visible(const void *data,
1892 enum hwmon_sensor_types type,
1893 u32 attr, int channel)
1894 {
1895 if (type != hwmon_temp)
1896 return 0;
1897
1898 switch (attr) {
1899 case hwmon_temp_input:
1900 return 0444;
1901 default:
1902 return 0;
1903 }
1904 }
1905
1906 static u32 m88e6390_hwmon_temp_config[] = {
1907 HWMON_T_INPUT,
1908 0
1909 };
1910
1911 static const struct hwmon_channel_info m88e6390_hwmon_temp = {
1912 .type = hwmon_temp,
1913 .config = m88e6390_hwmon_temp_config,
1914 };
1915
1916 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
1917 &m88e1121_hwmon_chip,
1918 &m88e6390_hwmon_temp,
1919 NULL
1920 };
1921
1922 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
1923 .is_visible = m88e6390_hwmon_is_visible,
1924 .read = m88e6390_hwmon_read,
1925 };
1926
1927 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
1928 .ops = &m88e6390_hwmon_hwmon_ops,
1929 .info = m88e6390_hwmon_info,
1930 };
1931
1932 static int marvell_hwmon_name(struct phy_device *phydev)
1933 {
1934 struct marvell_priv *priv = phydev->priv;
1935 struct device *dev = &phydev->mdio.dev;
1936 const char *devname = dev_name(dev);
1937 size_t len = strlen(devname);
1938 int i, j;
1939
1940 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1941 if (!priv->hwmon_name)
1942 return -ENOMEM;
1943
1944 for (i = j = 0; i < len && devname[i]; i++) {
1945 if (isalnum(devname[i]))
1946 priv->hwmon_name[j++] = devname[i];
1947 }
1948
1949 return 0;
1950 }
1951
1952 static int marvell_hwmon_probe(struct phy_device *phydev,
1953 const struct hwmon_chip_info *chip)
1954 {
1955 struct marvell_priv *priv = phydev->priv;
1956 struct device *dev = &phydev->mdio.dev;
1957 int err;
1958
1959 err = marvell_hwmon_name(phydev);
1960 if (err)
1961 return err;
1962
1963 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1964 dev, priv->hwmon_name, phydev, chip, NULL);
1965
1966 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1967 }
1968
1969 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1970 {
1971 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1972 }
1973
1974 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1975 {
1976 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1977 }
1978
1979 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1980 {
1981 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
1982 }
1983 #else
1984 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1985 {
1986 return 0;
1987 }
1988
1989 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1990 {
1991 return 0;
1992 }
1993
1994 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1995 {
1996 return 0;
1997 }
1998 #endif
1999
2000 static int marvell_probe(struct phy_device *phydev)
2001 {
2002 struct marvell_priv *priv;
2003
2004 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2005 if (!priv)
2006 return -ENOMEM;
2007
2008 phydev->priv = priv;
2009
2010 return 0;
2011 }
2012
2013 static int m88e1121_probe(struct phy_device *phydev)
2014 {
2015 int err;
2016
2017 err = marvell_probe(phydev);
2018 if (err)
2019 return err;
2020
2021 return m88e1121_hwmon_probe(phydev);
2022 }
2023
2024 static int m88e1510_probe(struct phy_device *phydev)
2025 {
2026 int err;
2027
2028 err = marvell_probe(phydev);
2029 if (err)
2030 return err;
2031
2032 return m88e1510_hwmon_probe(phydev);
2033 }
2034
2035 static int m88e6390_probe(struct phy_device *phydev)
2036 {
2037 int err;
2038
2039 err = marvell_probe(phydev);
2040 if (err)
2041 return err;
2042
2043 return m88e6390_hwmon_probe(phydev);
2044 }
2045
2046 static struct phy_driver marvell_drivers[] = {
2047 {
2048 .phy_id = MARVELL_PHY_ID_88E1101,
2049 .phy_id_mask = MARVELL_PHY_ID_MASK,
2050 .name = "Marvell 88E1101",
2051 .features = PHY_GBIT_FEATURES,
2052 .flags = PHY_HAS_INTERRUPT,
2053 .probe = marvell_probe,
2054 .config_init = &marvell_config_init,
2055 .config_aneg = &m88e1101_config_aneg,
2056 .ack_interrupt = &marvell_ack_interrupt,
2057 .config_intr = &marvell_config_intr,
2058 .resume = &genphy_resume,
2059 .suspend = &genphy_suspend,
2060 .read_page = marvell_read_page,
2061 .write_page = marvell_write_page,
2062 .get_sset_count = marvell_get_sset_count,
2063 .get_strings = marvell_get_strings,
2064 .get_stats = marvell_get_stats,
2065 },
2066 {
2067 .phy_id = MARVELL_PHY_ID_88E1112,
2068 .phy_id_mask = MARVELL_PHY_ID_MASK,
2069 .name = "Marvell 88E1112",
2070 .features = PHY_GBIT_FEATURES,
2071 .flags = PHY_HAS_INTERRUPT,
2072 .probe = marvell_probe,
2073 .config_init = &m88e1111_config_init,
2074 .config_aneg = &marvell_config_aneg,
2075 .ack_interrupt = &marvell_ack_interrupt,
2076 .config_intr = &marvell_config_intr,
2077 .resume = &genphy_resume,
2078 .suspend = &genphy_suspend,
2079 .read_page = marvell_read_page,
2080 .write_page = marvell_write_page,
2081 .get_sset_count = marvell_get_sset_count,
2082 .get_strings = marvell_get_strings,
2083 .get_stats = marvell_get_stats,
2084 },
2085 {
2086 .phy_id = MARVELL_PHY_ID_88E1111,
2087 .phy_id_mask = MARVELL_PHY_ID_MASK,
2088 .name = "Marvell 88E1111",
2089 .features = PHY_GBIT_FEATURES,
2090 .flags = PHY_HAS_INTERRUPT,
2091 .probe = marvell_probe,
2092 .config_init = &m88e1111_config_init,
2093 .config_aneg = &m88e1111_config_aneg,
2094 .read_status = &marvell_read_status,
2095 .ack_interrupt = &marvell_ack_interrupt,
2096 .config_intr = &marvell_config_intr,
2097 .resume = &genphy_resume,
2098 .suspend = &genphy_suspend,
2099 .read_page = marvell_read_page,
2100 .write_page = marvell_write_page,
2101 .get_sset_count = marvell_get_sset_count,
2102 .get_strings = marvell_get_strings,
2103 .get_stats = marvell_get_stats,
2104 },
2105 {
2106 .phy_id = MARVELL_PHY_ID_88E1118,
2107 .phy_id_mask = MARVELL_PHY_ID_MASK,
2108 .name = "Marvell 88E1118",
2109 .features = PHY_GBIT_FEATURES,
2110 .flags = PHY_HAS_INTERRUPT,
2111 .probe = marvell_probe,
2112 .config_init = &m88e1118_config_init,
2113 .config_aneg = &m88e1118_config_aneg,
2114 .ack_interrupt = &marvell_ack_interrupt,
2115 .config_intr = &marvell_config_intr,
2116 .resume = &genphy_resume,
2117 .suspend = &genphy_suspend,
2118 .read_page = marvell_read_page,
2119 .write_page = marvell_write_page,
2120 .get_sset_count = marvell_get_sset_count,
2121 .get_strings = marvell_get_strings,
2122 .get_stats = marvell_get_stats,
2123 },
2124 {
2125 .phy_id = MARVELL_PHY_ID_88E1121R,
2126 .phy_id_mask = MARVELL_PHY_ID_MASK,
2127 .name = "Marvell 88E1121R",
2128 .features = PHY_GBIT_FEATURES,
2129 .flags = PHY_HAS_INTERRUPT,
2130 .probe = &m88e1121_probe,
2131 .config_init = &marvell_config_init,
2132 .config_aneg = &m88e1121_config_aneg,
2133 .read_status = &marvell_read_status,
2134 .ack_interrupt = &marvell_ack_interrupt,
2135 .config_intr = &marvell_config_intr,
2136 .did_interrupt = &m88e1121_did_interrupt,
2137 .resume = &genphy_resume,
2138 .suspend = &genphy_suspend,
2139 .read_page = marvell_read_page,
2140 .write_page = marvell_write_page,
2141 .get_sset_count = marvell_get_sset_count,
2142 .get_strings = marvell_get_strings,
2143 .get_stats = marvell_get_stats,
2144 },
2145 {
2146 .phy_id = MARVELL_PHY_ID_88E1318S,
2147 .phy_id_mask = MARVELL_PHY_ID_MASK,
2148 .name = "Marvell 88E1318S",
2149 .features = PHY_GBIT_FEATURES,
2150 .flags = PHY_HAS_INTERRUPT,
2151 .probe = marvell_probe,
2152 .config_init = &m88e1318_config_init,
2153 .config_aneg = &m88e1318_config_aneg,
2154 .read_status = &marvell_read_status,
2155 .ack_interrupt = &marvell_ack_interrupt,
2156 .config_intr = &marvell_config_intr,
2157 .did_interrupt = &m88e1121_did_interrupt,
2158 .get_wol = &m88e1318_get_wol,
2159 .set_wol = &m88e1318_set_wol,
2160 .resume = &genphy_resume,
2161 .suspend = &genphy_suspend,
2162 .read_page = marvell_read_page,
2163 .write_page = marvell_write_page,
2164 .get_sset_count = marvell_get_sset_count,
2165 .get_strings = marvell_get_strings,
2166 .get_stats = marvell_get_stats,
2167 },
2168 {
2169 .phy_id = MARVELL_PHY_ID_88E1145,
2170 .phy_id_mask = MARVELL_PHY_ID_MASK,
2171 .name = "Marvell 88E1145",
2172 .features = PHY_GBIT_FEATURES,
2173 .flags = PHY_HAS_INTERRUPT,
2174 .probe = marvell_probe,
2175 .config_init = &m88e1145_config_init,
2176 .config_aneg = &m88e1101_config_aneg,
2177 .read_status = &genphy_read_status,
2178 .ack_interrupt = &marvell_ack_interrupt,
2179 .config_intr = &marvell_config_intr,
2180 .resume = &genphy_resume,
2181 .suspend = &genphy_suspend,
2182 .read_page = marvell_read_page,
2183 .write_page = marvell_write_page,
2184 .get_sset_count = marvell_get_sset_count,
2185 .get_strings = marvell_get_strings,
2186 .get_stats = marvell_get_stats,
2187 },
2188 {
2189 .phy_id = MARVELL_PHY_ID_88E1149R,
2190 .phy_id_mask = MARVELL_PHY_ID_MASK,
2191 .name = "Marvell 88E1149R",
2192 .features = PHY_GBIT_FEATURES,
2193 .flags = PHY_HAS_INTERRUPT,
2194 .probe = marvell_probe,
2195 .config_init = &m88e1149_config_init,
2196 .config_aneg = &m88e1118_config_aneg,
2197 .ack_interrupt = &marvell_ack_interrupt,
2198 .config_intr = &marvell_config_intr,
2199 .resume = &genphy_resume,
2200 .suspend = &genphy_suspend,
2201 .read_page = marvell_read_page,
2202 .write_page = marvell_write_page,
2203 .get_sset_count = marvell_get_sset_count,
2204 .get_strings = marvell_get_strings,
2205 .get_stats = marvell_get_stats,
2206 },
2207 {
2208 .phy_id = MARVELL_PHY_ID_88E1240,
2209 .phy_id_mask = MARVELL_PHY_ID_MASK,
2210 .name = "Marvell 88E1240",
2211 .features = PHY_GBIT_FEATURES,
2212 .flags = PHY_HAS_INTERRUPT,
2213 .probe = marvell_probe,
2214 .config_init = &m88e1111_config_init,
2215 .config_aneg = &marvell_config_aneg,
2216 .ack_interrupt = &marvell_ack_interrupt,
2217 .config_intr = &marvell_config_intr,
2218 .resume = &genphy_resume,
2219 .suspend = &genphy_suspend,
2220 .read_page = marvell_read_page,
2221 .write_page = marvell_write_page,
2222 .get_sset_count = marvell_get_sset_count,
2223 .get_strings = marvell_get_strings,
2224 .get_stats = marvell_get_stats,
2225 },
2226 {
2227 .phy_id = MARVELL_PHY_ID_88E1116R,
2228 .phy_id_mask = MARVELL_PHY_ID_MASK,
2229 .name = "Marvell 88E1116R",
2230 .features = PHY_GBIT_FEATURES,
2231 .flags = PHY_HAS_INTERRUPT,
2232 .probe = marvell_probe,
2233 .config_init = &m88e1116r_config_init,
2234 .ack_interrupt = &marvell_ack_interrupt,
2235 .config_intr = &marvell_config_intr,
2236 .resume = &genphy_resume,
2237 .suspend = &genphy_suspend,
2238 .read_page = marvell_read_page,
2239 .write_page = marvell_write_page,
2240 .get_sset_count = marvell_get_sset_count,
2241 .get_strings = marvell_get_strings,
2242 .get_stats = marvell_get_stats,
2243 },
2244 {
2245 .phy_id = MARVELL_PHY_ID_88E1510,
2246 .phy_id_mask = MARVELL_PHY_ID_MASK,
2247 .name = "Marvell 88E1510",
2248 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
2249 .flags = PHY_HAS_INTERRUPT,
2250 .probe = &m88e1510_probe,
2251 .config_init = &m88e1510_config_init,
2252 .config_aneg = &m88e1510_config_aneg,
2253 .read_status = &marvell_read_status,
2254 .ack_interrupt = &marvell_ack_interrupt,
2255 .config_intr = &marvell_config_intr,
2256 .did_interrupt = &m88e1121_did_interrupt,
2257 .get_wol = &m88e1318_get_wol,
2258 .set_wol = &m88e1318_set_wol,
2259 .resume = &marvell_resume,
2260 .suspend = &marvell_suspend,
2261 .read_page = marvell_read_page,
2262 .write_page = marvell_write_page,
2263 .get_sset_count = marvell_get_sset_count,
2264 .get_strings = marvell_get_strings,
2265 .get_stats = marvell_get_stats,
2266 .set_loopback = genphy_loopback,
2267 },
2268 {
2269 .phy_id = MARVELL_PHY_ID_88E1540,
2270 .phy_id_mask = MARVELL_PHY_ID_MASK,
2271 .name = "Marvell 88E1540",
2272 .features = PHY_GBIT_FEATURES,
2273 .flags = PHY_HAS_INTERRUPT,
2274 .probe = m88e1510_probe,
2275 .config_init = &marvell_config_init,
2276 .config_aneg = &m88e1510_config_aneg,
2277 .read_status = &marvell_read_status,
2278 .ack_interrupt = &marvell_ack_interrupt,
2279 .config_intr = &marvell_config_intr,
2280 .did_interrupt = &m88e1121_did_interrupt,
2281 .resume = &genphy_resume,
2282 .suspend = &genphy_suspend,
2283 .read_page = marvell_read_page,
2284 .write_page = marvell_write_page,
2285 .get_sset_count = marvell_get_sset_count,
2286 .get_strings = marvell_get_strings,
2287 .get_stats = marvell_get_stats,
2288 },
2289 {
2290 .phy_id = MARVELL_PHY_ID_88E1545,
2291 .phy_id_mask = MARVELL_PHY_ID_MASK,
2292 .name = "Marvell 88E1545",
2293 .probe = m88e1510_probe,
2294 .features = PHY_GBIT_FEATURES,
2295 .flags = PHY_HAS_INTERRUPT,
2296 .config_init = &marvell_config_init,
2297 .config_aneg = &m88e1510_config_aneg,
2298 .read_status = &marvell_read_status,
2299 .ack_interrupt = &marvell_ack_interrupt,
2300 .config_intr = &marvell_config_intr,
2301 .did_interrupt = &m88e1121_did_interrupt,
2302 .resume = &genphy_resume,
2303 .suspend = &genphy_suspend,
2304 .read_page = marvell_read_page,
2305 .write_page = marvell_write_page,
2306 .get_sset_count = marvell_get_sset_count,
2307 .get_strings = marvell_get_strings,
2308 .get_stats = marvell_get_stats,
2309 },
2310 {
2311 .phy_id = MARVELL_PHY_ID_88E3016,
2312 .phy_id_mask = MARVELL_PHY_ID_MASK,
2313 .name = "Marvell 88E3016",
2314 .features = PHY_BASIC_FEATURES,
2315 .flags = PHY_HAS_INTERRUPT,
2316 .probe = marvell_probe,
2317 .config_init = &m88e3016_config_init,
2318 .aneg_done = &marvell_aneg_done,
2319 .read_status = &marvell_read_status,
2320 .ack_interrupt = &marvell_ack_interrupt,
2321 .config_intr = &marvell_config_intr,
2322 .did_interrupt = &m88e1121_did_interrupt,
2323 .resume = &genphy_resume,
2324 .suspend = &genphy_suspend,
2325 .read_page = marvell_read_page,
2326 .write_page = marvell_write_page,
2327 .get_sset_count = marvell_get_sset_count,
2328 .get_strings = marvell_get_strings,
2329 .get_stats = marvell_get_stats,
2330 },
2331 {
2332 .phy_id = MARVELL_PHY_ID_88E6390,
2333 .phy_id_mask = MARVELL_PHY_ID_MASK,
2334 .name = "Marvell 88E6390",
2335 .features = PHY_GBIT_FEATURES,
2336 .flags = PHY_HAS_INTERRUPT,
2337 .probe = m88e6390_probe,
2338 .config_init = &marvell_config_init,
2339 .config_aneg = &m88e6390_config_aneg,
2340 .read_status = &marvell_read_status,
2341 .ack_interrupt = &marvell_ack_interrupt,
2342 .config_intr = &marvell_config_intr,
2343 .did_interrupt = &m88e1121_did_interrupt,
2344 .resume = &genphy_resume,
2345 .suspend = &genphy_suspend,
2346 .read_page = marvell_read_page,
2347 .write_page = marvell_write_page,
2348 .get_sset_count = marvell_get_sset_count,
2349 .get_strings = marvell_get_strings,
2350 .get_stats = marvell_get_stats,
2351 },
2352 };
2353
2354 module_phy_driver(marvell_drivers);
2355
2356 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2357 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2358 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2359 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2360 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2361 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2362 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2363 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2364 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2365 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2366 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2367 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2368 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2369 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2370 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2371 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2372 { }
2373 };
2374
2375 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
Linux with added FPC-III support