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Linux 4.19.133
[linux/fpc-iii.git] / drivers / pci / hotplug / cpqphp_core.c
blob5a06636e910ad4e359cbd79d37e5f6b5bb268709
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Compaq Hot Plug Controller Driver
4 *
5 * Copyright (C) 1995,2001 Compaq Computer Corporation
6 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
7 * Copyright (C) 2001 IBM Corp.
8 *
9 * All rights reserved.
10 *
11 * Send feedback to <greg@kroah.com>
12 *
13 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
14 * Torben Mathiasen <torben.mathiasen@hp.com>
15 */
16
17 #include <linux/module.h>
18 #include <linux/moduleparam.h>
19 #include <linux/kernel.h>
20 #include <linux/types.h>
21 #include <linux/proc_fs.h>
22 #include <linux/slab.h>
23 #include <linux/workqueue.h>
24 #include <linux/pci.h>
25 #include <linux/pci_hotplug.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28
29 #include <linux/uaccess.h>
30
31 #include "cpqphp.h"
32 #include "cpqphp_nvram.h"
33
34
35 /* Global variables */
36 int cpqhp_debug;
37 int cpqhp_legacy_mode;
38 struct controller *cpqhp_ctrl_list; /* = NULL */
39 struct pci_func *cpqhp_slot_list[256];
40 struct irq_routing_table *cpqhp_routing_table;
41
42 /* local variables */
43 static void __iomem *smbios_table;
44 static void __iomem *smbios_start;
45 static void __iomem *cpqhp_rom_start;
46 static bool power_mode;
47 static bool debug;
48 static int initialized;
49
50 #define DRIVER_VERSION "0.9.8"
51 #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
52 #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
53
54 MODULE_AUTHOR(DRIVER_AUTHOR);
55 MODULE_DESCRIPTION(DRIVER_DESC);
56 MODULE_LICENSE("GPL");
57
58 module_param(power_mode, bool, 0644);
59 MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
60
61 module_param(debug, bool, 0644);
62 MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
63
64 #define CPQHPC_MODULE_MINOR 208
65
66 static inline int is_slot64bit(struct slot *slot)
67 {
68 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
69 }
70
71 static inline int is_slot66mhz(struct slot *slot)
72 {
73 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
74 }
75
76 /**
77 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
78 * @begin: begin pointer for region to be scanned.
79 * @end: end pointer for region to be scanned.
80 *
81 * Returns pointer to the head of the SMBIOS tables (or %NULL).
82 */
83 static void __iomem *detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
84 {
85 void __iomem *fp;
86 void __iomem *endp;
87 u8 temp1, temp2, temp3, temp4;
88 int status = 0;
89
90 endp = (end - sizeof(u32) + 1);
91
92 for (fp = begin; fp <= endp; fp += 16) {
93 temp1 = readb(fp);
94 temp2 = readb(fp+1);
95 temp3 = readb(fp+2);
96 temp4 = readb(fp+3);
97 if (temp1 == '_' &&
98 temp2 == 'S' &&
99 temp3 == 'M' &&
100 temp4 == '_') {
101 status = 1;
102 break;
103 }
104 }
105
106 if (!status)
107 fp = NULL;
108
109 dbg("Discovered SMBIOS Entry point at %p\n", fp);
110
111 return fp;
112 }
113
114 /**
115 * init_SERR - Initializes the per slot SERR generation.
116 * @ctrl: controller to use
117 *
118 * For unexpected switch opens
119 */
120 static int init_SERR(struct controller *ctrl)
121 {
122 u32 tempdword;
123 u32 number_of_slots;
124 u8 physical_slot;
125
126 if (!ctrl)
127 return 1;
128
129 tempdword = ctrl->first_slot;
130
131 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
132 /* Loop through slots */
133 while (number_of_slots) {
134 physical_slot = tempdword;
135 writeb(0, ctrl->hpc_reg + SLOT_SERR);
136 tempdword++;
137 number_of_slots--;
138 }
139
140 return 0;
141 }
142
143 static int init_cpqhp_routing_table(void)
144 {
145 int len;
146
147 cpqhp_routing_table = pcibios_get_irq_routing_table();
148 if (cpqhp_routing_table == NULL)
149 return -ENOMEM;
150
151 len = cpqhp_routing_table_length();
152 if (len == 0) {
153 kfree(cpqhp_routing_table);
154 cpqhp_routing_table = NULL;
155 return -1;
156 }
157
158 return 0;
159 }
160
161 /* nice debugging output */
162 static void pci_print_IRQ_route(void)
163 {
164 int len;
165 int loop;
166 u8 tbus, tdevice, tslot;
167
168 len = cpqhp_routing_table_length();
169
170 dbg("bus dev func slot\n");
171 for (loop = 0; loop < len; ++loop) {
172 tbus = cpqhp_routing_table->slots[loop].bus;
173 tdevice = cpqhp_routing_table->slots[loop].devfn;
174 tslot = cpqhp_routing_table->slots[loop].slot;
175 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
176
177 }
178 return;
179 }
180
181
182 /**
183 * get_subsequent_smbios_entry: get the next entry from bios table.
184 * @smbios_start: where to start in the SMBIOS table
185 * @smbios_table: location of the SMBIOS table
186 * @curr: %NULL or pointer to previously returned structure
187 *
188 * Gets the first entry if previous == NULL;
189 * otherwise, returns the next entry.
190 * Uses global SMBIOS Table pointer.
191 *
192 * Returns a pointer to an SMBIOS structure or NULL if none found.
193 */
194 static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
195 void __iomem *smbios_table,
196 void __iomem *curr)
197 {
198 u8 bail = 0;
199 u8 previous_byte = 1;
200 void __iomem *p_temp;
201 void __iomem *p_max;
202
203 if (!smbios_table || !curr)
204 return NULL;
205
206 /* set p_max to the end of the table */
207 p_max = smbios_start + readw(smbios_table + ST_LENGTH);
208
209 p_temp = curr;
210 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
211
212 while ((p_temp < p_max) && !bail) {
213 /* Look for the double NULL terminator
214 * The first condition is the previous byte
215 * and the second is the curr
216 */
217 if (!previous_byte && !(readb(p_temp)))
218 bail = 1;
219
220 previous_byte = readb(p_temp);
221 p_temp++;
222 }
223
224 if (p_temp < p_max)
225 return p_temp;
226 else
227 return NULL;
228 }
229
230
231 /**
232 * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
233 * @smbios_start: where to start in the SMBIOS table
234 * @smbios_table: location of the SMBIOS table
235 * @type: SMBIOS structure type to be returned
236 * @previous: %NULL or pointer to previously returned structure
237 *
238 * Gets the first entry of the specified type if previous == %NULL;
239 * Otherwise, returns the next entry of the given type.
240 * Uses global SMBIOS Table pointer.
241 * Uses get_subsequent_smbios_entry.
242 *
243 * Returns a pointer to an SMBIOS structure or %NULL if none found.
244 */
245 static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
246 void __iomem *smbios_table,
247 u8 type,
248 void __iomem *previous)
249 {
250 if (!smbios_table)
251 return NULL;
252
253 if (!previous)
254 previous = smbios_start;
255 else
256 previous = get_subsequent_smbios_entry(smbios_start,
257 smbios_table, previous);
258
259 while (previous)
260 if (readb(previous + SMBIOS_GENERIC_TYPE) != type)
261 previous = get_subsequent_smbios_entry(smbios_start,
262 smbios_table, previous);
263 else
264 break;
265
266 return previous;
267 }
268
269 static int ctrl_slot_cleanup(struct controller *ctrl)
270 {
271 struct slot *old_slot, *next_slot;
272
273 old_slot = ctrl->slot;
274 ctrl->slot = NULL;
275
276 while (old_slot) {
277 next_slot = old_slot->next;
278 pci_hp_deregister(old_slot->hotplug_slot);
279 kfree(old_slot->hotplug_slot->info);
280 kfree(old_slot->hotplug_slot);
281 kfree(old_slot);
282 old_slot = next_slot;
283 }
284
285 cpqhp_remove_debugfs_files(ctrl);
286
287 /* Free IRQ associated with hot plug device */
288 free_irq(ctrl->interrupt, ctrl);
289 /* Unmap the memory */
290 iounmap(ctrl->hpc_reg);
291 /* Finally reclaim PCI mem */
292 release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
293 pci_resource_len(ctrl->pci_dev, 0));
294
295 return 0;
296 }
297
298
299 /**
300 * get_slot_mapping - determine logical slot mapping for PCI device
301 *
302 * Won't work for more than one PCI-PCI bridge in a slot.
303 *
304 * @bus_num - bus number of PCI device
305 * @dev_num - device number of PCI device
306 * @slot - Pointer to u8 where slot number will be returned
307 *
308 * Output: SUCCESS or FAILURE
309 */
310 static int
311 get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
312 {
313 u32 work;
314 long len;
315 long loop;
316
317 u8 tbus, tdevice, tslot, bridgeSlot;
318
319 dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
320
321 bridgeSlot = 0xFF;
322
323 len = cpqhp_routing_table_length();
324 for (loop = 0; loop < len; ++loop) {
325 tbus = cpqhp_routing_table->slots[loop].bus;
326 tdevice = cpqhp_routing_table->slots[loop].devfn >> 3;
327 tslot = cpqhp_routing_table->slots[loop].slot;
328
329 if ((tbus == bus_num) && (tdevice == dev_num)) {
330 *slot = tslot;
331 return 0;
332 } else {
333 /* Did not get a match on the target PCI device. Check
334 * if the current IRQ table entry is a PCI-to-PCI
335 * bridge device. If so, and it's secondary bus
336 * matches the bus number for the target device, I need
337 * to save the bridge's slot number. If I can not find
338 * an entry for the target device, I will have to
339 * assume it's on the other side of the bridge, and
340 * assign it the bridge's slot.
341 */
342 bus->number = tbus;
343 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
344 PCI_CLASS_REVISION, &work);
345
346 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
347 pci_bus_read_config_dword(bus,
348 PCI_DEVFN(tdevice, 0),
349 PCI_PRIMARY_BUS, &work);
350 // See if bridge's secondary bus matches target bus.
351 if (((work >> 8) & 0x000000FF) == (long) bus_num)
352 bridgeSlot = tslot;
353 }
354 }
355
356 }
357
358 /* If we got here, we didn't find an entry in the IRQ mapping table for
359 * the target PCI device. If we did determine that the target device
360 * is on the other side of a PCI-to-PCI bridge, return the slot number
361 * for the bridge.
362 */
363 if (bridgeSlot != 0xFF) {
364 *slot = bridgeSlot;
365 return 0;
366 }
367 /* Couldn't find an entry in the routing table for this PCI device */
368 return -1;
369 }
370
371
372 /**
373 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
374 * @ctrl: struct controller to use
375 * @func: PCI device/function info
376 * @status: LED control flag: 1 = LED on, 0 = LED off
377 */
378 static int
379 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
380 u32 status)
381 {
382 u8 hp_slot;
383
384 if (func == NULL)
385 return 1;
386
387 hp_slot = func->device - ctrl->slot_device_offset;
388
389 /* Wait for exclusive access to hardware */
390 mutex_lock(&ctrl->crit_sect);
391
392 if (status == 1)
393 amber_LED_on(ctrl, hp_slot);
394 else if (status == 0)
395 amber_LED_off(ctrl, hp_slot);
396 else {
397 /* Done with exclusive hardware access */
398 mutex_unlock(&ctrl->crit_sect);
399 return 1;
400 }
401
402 set_SOGO(ctrl);
403
404 /* Wait for SOBS to be unset */
405 wait_for_ctrl_irq(ctrl);
406
407 /* Done with exclusive hardware access */
408 mutex_unlock(&ctrl->crit_sect);
409
410 return 0;
411 }
412
413
414 /**
415 * set_attention_status - Turns the Amber LED for a slot on or off
416 * @hotplug_slot: slot to change LED on
417 * @status: LED control flag
418 */
419 static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status)
420 {
421 struct pci_func *slot_func;
422 struct slot *slot = hotplug_slot->private;
423 struct controller *ctrl = slot->ctrl;
424 u8 bus;
425 u8 devfn;
426 u8 device;
427 u8 function;
428
429 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
430
431 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
432 return -ENODEV;
433
434 device = devfn >> 3;
435 function = devfn & 0x7;
436 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
437
438 slot_func = cpqhp_slot_find(bus, device, function);
439 if (!slot_func)
440 return -ENODEV;
441
442 return cpqhp_set_attention_status(ctrl, slot_func, status);
443 }
444
445
446 static int process_SI(struct hotplug_slot *hotplug_slot)
447 {
448 struct pci_func *slot_func;
449 struct slot *slot = hotplug_slot->private;
450 struct controller *ctrl = slot->ctrl;
451 u8 bus;
452 u8 devfn;
453 u8 device;
454 u8 function;
455
456 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
457
458 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
459 return -ENODEV;
460
461 device = devfn >> 3;
462 function = devfn & 0x7;
463 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
464
465 slot_func = cpqhp_slot_find(bus, device, function);
466 if (!slot_func)
467 return -ENODEV;
468
469 slot_func->bus = bus;
470 slot_func->device = device;
471 slot_func->function = function;
472 slot_func->configured = 0;
473 dbg("board_added(%p, %p)\n", slot_func, ctrl);
474 return cpqhp_process_SI(ctrl, slot_func);
475 }
476
477
478 static int process_SS(struct hotplug_slot *hotplug_slot)
479 {
480 struct pci_func *slot_func;
481 struct slot *slot = hotplug_slot->private;
482 struct controller *ctrl = slot->ctrl;
483 u8 bus;
484 u8 devfn;
485 u8 device;
486 u8 function;
487
488 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
489
490 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
491 return -ENODEV;
492
493 device = devfn >> 3;
494 function = devfn & 0x7;
495 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
496
497 slot_func = cpqhp_slot_find(bus, device, function);
498 if (!slot_func)
499 return -ENODEV;
500
501 dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
502 return cpqhp_process_SS(ctrl, slot_func);
503 }
504
505
506 static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
507 {
508 struct slot *slot = hotplug_slot->private;
509 struct controller *ctrl = slot->ctrl;
510
511 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
512
513 return cpqhp_hardware_test(ctrl, value);
514 }
515
516
517 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
518 {
519 struct slot *slot = hotplug_slot->private;
520 struct controller *ctrl = slot->ctrl;
521
522 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
523
524 *value = get_slot_enabled(ctrl, slot);
525 return 0;
526 }
527
528 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
529 {
530 struct slot *slot = hotplug_slot->private;
531 struct controller *ctrl = slot->ctrl;
532
533 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
534
535 *value = cpq_get_attention_status(ctrl, slot);
536 return 0;
537 }
538
539 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
540 {
541 struct slot *slot = hotplug_slot->private;
542 struct controller *ctrl = slot->ctrl;
543
544 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
545
546 *value = cpq_get_latch_status(ctrl, slot);
547
548 return 0;
549 }
550
551 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
552 {
553 struct slot *slot = hotplug_slot->private;
554 struct controller *ctrl = slot->ctrl;
555
556 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
557
558 *value = get_presence_status(ctrl, slot);
559
560 return 0;
561 }
562
563 static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
564 .set_attention_status = set_attention_status,
565 .enable_slot = process_SI,
566 .disable_slot = process_SS,
567 .hardware_test = hardware_test,
568 .get_power_status = get_power_status,
569 .get_attention_status = get_attention_status,
570 .get_latch_status = get_latch_status,
571 .get_adapter_status = get_adapter_status,
572 };
573
574 #define SLOT_NAME_SIZE 10
575
576 static int ctrl_slot_setup(struct controller *ctrl,
577 void __iomem *smbios_start,
578 void __iomem *smbios_table)
579 {
580 struct slot *slot;
581 struct hotplug_slot *hotplug_slot;
582 struct hotplug_slot_info *hotplug_slot_info;
583 struct pci_bus *bus = ctrl->pci_bus;
584 u8 number_of_slots;
585 u8 slot_device;
586 u8 slot_number;
587 u8 ctrl_slot;
588 u32 tempdword;
589 char name[SLOT_NAME_SIZE];
590 void __iomem *slot_entry = NULL;
591 int result;
592
593 dbg("%s\n", __func__);
594
595 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
596
597 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
598 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
599 slot_number = ctrl->first_slot;
600
601 while (number_of_slots) {
602 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
603 if (!slot) {
604 result = -ENOMEM;
605 goto error;
606 }
607
608 slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
609 GFP_KERNEL);
610 if (!slot->hotplug_slot) {
611 result = -ENOMEM;
612 goto error_slot;
613 }
614 hotplug_slot = slot->hotplug_slot;
615
616 hotplug_slot->info = kzalloc(sizeof(*(hotplug_slot->info)),
617 GFP_KERNEL);
618 if (!hotplug_slot->info) {
619 result = -ENOMEM;
620 goto error_hpslot;
621 }
622 hotplug_slot_info = hotplug_slot->info;
623
624 slot->ctrl = ctrl;
625 slot->bus = ctrl->bus;
626 slot->device = slot_device;
627 slot->number = slot_number;
628 dbg("slot->number = %u\n", slot->number);
629
630 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
631 slot_entry);
632
633 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
634 slot->number)) {
635 slot_entry = get_SMBIOS_entry(smbios_start,
636 smbios_table, 9, slot_entry);
637 }
638
639 slot->p_sm_slot = slot_entry;
640
641 timer_setup(&slot->task_event, cpqhp_pushbutton_thread, 0);
642 slot->task_event.expires = jiffies + 5 * HZ;
643
644 /*FIXME: these capabilities aren't used but if they are
645 * they need to be correctly implemented
646 */
647 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
648 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
649
650 if (is_slot64bit(slot))
651 slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
652 if (is_slot66mhz(slot))
653 slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
654 if (bus->cur_bus_speed == PCI_SPEED_66MHz)
655 slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
656
657 ctrl_slot =
658 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
659
660 /* Check presence */
661 slot->capabilities |=
662 ((((~tempdword) >> 23) |
663 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
664 /* Check the switch state */
665 slot->capabilities |=
666 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
667 /* Check the slot enable */
668 slot->capabilities |=
669 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
670
671 /* register this slot with the hotplug pci core */
672 hotplug_slot->private = slot;
673 snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
674 hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
675
676 hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
677 hotplug_slot_info->attention_status =
678 cpq_get_attention_status(ctrl, slot);
679 hotplug_slot_info->latch_status =
680 cpq_get_latch_status(ctrl, slot);
681 hotplug_slot_info->adapter_status =
682 get_presence_status(ctrl, slot);
683
684 dbg("registering bus %d, dev %d, number %d, ctrl->slot_device_offset %d, slot %d\n",
685 slot->bus, slot->device,
686 slot->number, ctrl->slot_device_offset,
687 slot_number);
688 result = pci_hp_register(hotplug_slot,
689 ctrl->pci_dev->bus,
690 slot->device,
691 name);
692 if (result) {
693 err("pci_hp_register failed with error %d\n", result);
694 goto error_info;
695 }
696
697 slot->next = ctrl->slot;
698 ctrl->slot = slot;
699
700 number_of_slots--;
701 slot_device++;
702 slot_number++;
703 }
704
705 return 0;
706 error_info:
707 kfree(hotplug_slot_info);
708 error_hpslot:
709 kfree(hotplug_slot);
710 error_slot:
711 kfree(slot);
712 error:
713 return result;
714 }
715
716 static int one_time_init(void)
717 {
718 int loop;
719 int retval = 0;
720
721 if (initialized)
722 return 0;
723
724 power_mode = 0;
725
726 retval = init_cpqhp_routing_table();
727 if (retval)
728 goto error;
729
730 if (cpqhp_debug)
731 pci_print_IRQ_route();
732
733 dbg("Initialize + Start the notification mechanism\n");
734
735 retval = cpqhp_event_start_thread();
736 if (retval)
737 goto error;
738
739 dbg("Initialize slot lists\n");
740 for (loop = 0; loop < 256; loop++)
741 cpqhp_slot_list[loop] = NULL;
742
743 /* FIXME: We also need to hook the NMI handler eventually.
744 * this also needs to be worked with Christoph
745 * register_NMI_handler();
746 */
747 /* Map rom address */
748 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
749 if (!cpqhp_rom_start) {
750 err("Could not ioremap memory region for ROM\n");
751 retval = -EIO;
752 goto error;
753 }
754
755 /* Now, map the int15 entry point if we are on compaq specific
756 * hardware
757 */
758 compaq_nvram_init(cpqhp_rom_start);
759
760 /* Map smbios table entry point structure */
761 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
762 cpqhp_rom_start + ROM_PHY_LEN);
763 if (!smbios_table) {
764 err("Could not find the SMBIOS pointer in memory\n");
765 retval = -EIO;
766 goto error_rom_start;
767 }
768
769 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
770 readw(smbios_table + ST_LENGTH));
771 if (!smbios_start) {
772 err("Could not ioremap memory region taken from SMBIOS values\n");
773 retval = -EIO;
774 goto error_smbios_start;
775 }
776
777 initialized = 1;
778
779 return retval;
780
781 error_smbios_start:
782 iounmap(smbios_start);
783 error_rom_start:
784 iounmap(cpqhp_rom_start);
785 error:
786 return retval;
787 }
788
789 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
790 {
791 u8 num_of_slots = 0;
792 u8 hp_slot = 0;
793 u8 device;
794 u8 bus_cap;
795 u16 temp_word;
796 u16 vendor_id;
797 u16 subsystem_vid;
798 u16 subsystem_deviceid;
799 u32 rc;
800 struct controller *ctrl;
801 struct pci_func *func;
802 struct pci_bus *bus;
803 int err;
804
805 err = pci_enable_device(pdev);
806 if (err) {
807 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
808 pci_name(pdev), err);
809 return err;
810 }
811
812 bus = pdev->subordinate;
813 if (!bus) {
814 pci_notice(pdev, "the device is not a bridge, skipping\n");
815 rc = -ENODEV;
816 goto err_disable_device;
817 }
818
819 /* Need to read VID early b/c it's used to differentiate CPQ and INTC
820 * discovery
821 */
822 vendor_id = pdev->vendor;
823 if ((vendor_id != PCI_VENDOR_ID_COMPAQ) &&
824 (vendor_id != PCI_VENDOR_ID_INTEL)) {
825 err(msg_HPC_non_compaq_or_intel);
826 rc = -ENODEV;
827 goto err_disable_device;
828 }
829 dbg("Vendor ID: %x\n", vendor_id);
830
831 dbg("revision: %d\n", pdev->revision);
832 if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
833 err(msg_HPC_rev_error);
834 rc = -ENODEV;
835 goto err_disable_device;
836 }
837
838 /* Check for the proper subsystem IDs
839 * Intel uses a different SSID programming model than Compaq.
840 * For Intel, each SSID bit identifies a PHP capability.
841 * Also Intel HPCs may have RID=0.
842 */
843 if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) {
844 err(msg_HPC_not_supported);
845 rc = -ENODEV;
846 goto err_disable_device;
847 }
848
849 /* TODO: This code can be made to support non-Compaq or Intel
850 * subsystem IDs
851 */
852 subsystem_vid = pdev->subsystem_vendor;
853 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
854 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
855 err(msg_HPC_non_compaq_or_intel);
856 rc = -ENODEV;
857 goto err_disable_device;
858 }
859
860 ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
861 if (!ctrl) {
862 rc = -ENOMEM;
863 goto err_disable_device;
864 }
865
866 subsystem_deviceid = pdev->subsystem_device;
867
868 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
869
870 /* Set Vendor ID, so it can be accessed later from other
871 * functions
872 */
873 ctrl->vendor_id = vendor_id;
874
875 switch (subsystem_vid) {
876 case PCI_VENDOR_ID_COMPAQ:
877 if (pdev->revision >= 0x13) { /* CIOBX */
878 ctrl->push_flag = 1;
879 ctrl->slot_switch_type = 1;
880 ctrl->push_button = 1;
881 ctrl->pci_config_space = 1;
882 ctrl->defeature_PHP = 1;
883 ctrl->pcix_support = 1;
884 ctrl->pcix_speed_capability = 1;
885 pci_read_config_byte(pdev, 0x41, &bus_cap);
886 if (bus_cap & 0x80) {
887 dbg("bus max supports 133MHz PCI-X\n");
888 bus->max_bus_speed = PCI_SPEED_133MHz_PCIX;
889 break;
890 }
891 if (bus_cap & 0x40) {
892 dbg("bus max supports 100MHz PCI-X\n");
893 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
894 break;
895 }
896 if (bus_cap & 0x20) {
897 dbg("bus max supports 66MHz PCI-X\n");
898 bus->max_bus_speed = PCI_SPEED_66MHz_PCIX;
899 break;
900 }
901 if (bus_cap & 0x10) {
902 dbg("bus max supports 66MHz PCI\n");
903 bus->max_bus_speed = PCI_SPEED_66MHz;
904 break;
905 }
906
907 break;
908 }
909
910 switch (subsystem_deviceid) {
911 case PCI_SUB_HPC_ID:
912 /* Original 6500/7000 implementation */
913 ctrl->slot_switch_type = 1;
914 bus->max_bus_speed = PCI_SPEED_33MHz;
915 ctrl->push_button = 0;
916 ctrl->pci_config_space = 1;
917 ctrl->defeature_PHP = 1;
918 ctrl->pcix_support = 0;
919 ctrl->pcix_speed_capability = 0;
920 break;
921 case PCI_SUB_HPC_ID2:
922 /* First Pushbutton implementation */
923 ctrl->push_flag = 1;
924 ctrl->slot_switch_type = 1;
925 bus->max_bus_speed = PCI_SPEED_33MHz;
926 ctrl->push_button = 1;
927 ctrl->pci_config_space = 1;
928 ctrl->defeature_PHP = 1;
929 ctrl->pcix_support = 0;
930 ctrl->pcix_speed_capability = 0;
931 break;
932 case PCI_SUB_HPC_ID_INTC:
933 /* Third party (6500/7000) */
934 ctrl->slot_switch_type = 1;
935 bus->max_bus_speed = PCI_SPEED_33MHz;
936 ctrl->push_button = 0;
937 ctrl->pci_config_space = 1;
938 ctrl->defeature_PHP = 1;
939 ctrl->pcix_support = 0;
940 ctrl->pcix_speed_capability = 0;
941 break;
942 case PCI_SUB_HPC_ID3:
943 /* First 66 Mhz implementation */
944 ctrl->push_flag = 1;
945 ctrl->slot_switch_type = 1;
946 bus->max_bus_speed = PCI_SPEED_66MHz;
947 ctrl->push_button = 1;
948 ctrl->pci_config_space = 1;
949 ctrl->defeature_PHP = 1;
950 ctrl->pcix_support = 0;
951 ctrl->pcix_speed_capability = 0;
952 break;
953 case PCI_SUB_HPC_ID4:
954 /* First PCI-X implementation, 100MHz */
955 ctrl->push_flag = 1;
956 ctrl->slot_switch_type = 1;
957 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
958 ctrl->push_button = 1;
959 ctrl->pci_config_space = 1;
960 ctrl->defeature_PHP = 1;
961 ctrl->pcix_support = 1;
962 ctrl->pcix_speed_capability = 0;
963 break;
964 default:
965 err(msg_HPC_not_supported);
966 rc = -ENODEV;
967 goto err_free_ctrl;
968 }
969 break;
970
971 case PCI_VENDOR_ID_INTEL:
972 /* Check for speed capability (0=33, 1=66) */
973 if (subsystem_deviceid & 0x0001)
974 bus->max_bus_speed = PCI_SPEED_66MHz;
975 else
976 bus->max_bus_speed = PCI_SPEED_33MHz;
977
978 /* Check for push button */
979 if (subsystem_deviceid & 0x0002)
980 ctrl->push_button = 0;
981 else
982 ctrl->push_button = 1;
983
984 /* Check for slot switch type (0=mechanical, 1=not mechanical) */
985 if (subsystem_deviceid & 0x0004)
986 ctrl->slot_switch_type = 0;
987 else
988 ctrl->slot_switch_type = 1;
989
990 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
991 if (subsystem_deviceid & 0x0008)
992 ctrl->defeature_PHP = 1; /* PHP supported */
993 else
994 ctrl->defeature_PHP = 0; /* PHP not supported */
995
996 /* Alternate Base Address Register Interface
997 * (0=not supported, 1=supported)
998 */
999 if (subsystem_deviceid & 0x0010)
1000 ctrl->alternate_base_address = 1;
1001 else
1002 ctrl->alternate_base_address = 0;
1003
1004 /* PCI Config Space Index (0=not supported, 1=supported) */
1005 if (subsystem_deviceid & 0x0020)
1006 ctrl->pci_config_space = 1;
1007 else
1008 ctrl->pci_config_space = 0;
1009
1010 /* PCI-X support */
1011 if (subsystem_deviceid & 0x0080) {
1012 ctrl->pcix_support = 1;
1013 if (subsystem_deviceid & 0x0040)
1014 /* 133MHz PCI-X if bit 7 is 1 */
1015 ctrl->pcix_speed_capability = 1;
1016 else
1017 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
1018 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
1019 ctrl->pcix_speed_capability = 0;
1020 } else {
1021 /* Conventional PCI */
1022 ctrl->pcix_support = 0;
1023 ctrl->pcix_speed_capability = 0;
1024 }
1025 break;
1026
1027 default:
1028 err(msg_HPC_not_supported);
1029 rc = -ENODEV;
1030 goto err_free_ctrl;
1031 }
1032
1033 /* Tell the user that we found one. */
1034 info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1035 pdev->bus->number);
1036
1037 dbg("Hotplug controller capabilities:\n");
1038 dbg(" speed_capability %d\n", bus->max_bus_speed);
1039 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
1040 "switch present" : "no switch");
1041 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
1042 "PHP supported" : "PHP not supported");
1043 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
1044 "supported" : "not supported");
1045 dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
1046 "supported" : "not supported");
1047 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
1048 "supported" : "not supported");
1049 dbg(" pcix_support %s\n", ctrl->pcix_support ?
1050 "supported" : "not supported");
1051
1052 ctrl->pci_dev = pdev;
1053 pci_set_drvdata(pdev, ctrl);
1054
1055 /* make our own copy of the pci bus structure,
1056 * as we like tweaking it a lot */
1057 ctrl->pci_bus = kmemdup(pdev->bus, sizeof(*ctrl->pci_bus), GFP_KERNEL);
1058 if (!ctrl->pci_bus) {
1059 err("out of memory\n");
1060 rc = -ENOMEM;
1061 goto err_free_ctrl;
1062 }
1063
1064 ctrl->bus = pdev->bus->number;
1065 ctrl->rev = pdev->revision;
1066 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1067 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1068
1069 mutex_init(&ctrl->crit_sect);
1070 init_waitqueue_head(&ctrl->queue);
1071
1072 /* initialize our threads if they haven't already been started up */
1073 rc = one_time_init();
1074 if (rc)
1075 goto err_free_bus;
1076
1077 dbg("pdev = %p\n", pdev);
1078 dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
1079 dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
1080
1081 if (!request_mem_region(pci_resource_start(pdev, 0),
1082 pci_resource_len(pdev, 0), MY_NAME)) {
1083 err("cannot reserve MMIO region\n");
1084 rc = -ENOMEM;
1085 goto err_free_bus;
1086 }
1087
1088 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1089 pci_resource_len(pdev, 0));
1090 if (!ctrl->hpc_reg) {
1091 err("cannot remap MMIO region %llx @ %llx\n",
1092 (unsigned long long)pci_resource_len(pdev, 0),
1093 (unsigned long long)pci_resource_start(pdev, 0));
1094 rc = -ENODEV;
1095 goto err_free_mem_region;
1096 }
1097
1098 /* Check for 66Mhz operation */
1099 bus->cur_bus_speed = get_controller_speed(ctrl);
1100
1101
1102 /********************************************************
1103 *
1104 * Save configuration headers for this and
1105 * subordinate PCI buses
1106 *
1107 ********************************************************/
1108
1109 /* find the physical slot number of the first hot plug slot */
1110
1111 /* Get slot won't work for devices behind bridges, but
1112 * in this case it will always be called for the "base"
1113 * bus/dev/func of a slot.
1114 * CS: this is leveraging the PCIIRQ routing code from the kernel
1115 * (pci-pc.c: get_irq_routing_table) */
1116 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1117 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1118 &(ctrl->first_slot));
1119 dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1120 ctrl->first_slot, rc);
1121 if (rc) {
1122 err(msg_initialization_err, rc);
1123 goto err_iounmap;
1124 }
1125
1126 /* Store PCI Config Space for all devices on this bus */
1127 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1128 if (rc) {
1129 err("%s: unable to save PCI configuration data, error %d\n",
1130 __func__, rc);
1131 goto err_iounmap;
1132 }
1133
1134 /*
1135 * Get IO, memory, and IRQ resources for new devices
1136 */
1137 /* The next line is required for cpqhp_find_available_resources */
1138 ctrl->interrupt = pdev->irq;
1139 if (ctrl->interrupt < 0x10) {
1140 cpqhp_legacy_mode = 1;
1141 dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1142 }
1143
1144 ctrl->cfgspc_irq = 0;
1145 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1146
1147 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1148 ctrl->add_support = !rc;
1149 if (rc) {
1150 dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1151 err("unable to locate PCI configuration resources for hot plug add.\n");
1152 goto err_iounmap;
1153 }
1154
1155 /*
1156 * Finish setting up the hot plug ctrl device
1157 */
1158 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1159 dbg("NumSlots %d\n", ctrl->slot_device_offset);
1160
1161 ctrl->next_event = 0;
1162
1163 /* Setup the slot information structures */
1164 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1165 if (rc) {
1166 err(msg_initialization_err, 6);
1167 err("%s: unable to save PCI configuration data, error %d\n",
1168 __func__, rc);
1169 goto err_iounmap;
1170 }
1171
1172 /* Mask all general input interrupts */
1173 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1174
1175 /* set up the interrupt */
1176 dbg("HPC interrupt = %d\n", ctrl->interrupt);
1177 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
1178 IRQF_SHARED, MY_NAME, ctrl)) {
1179 err("Can't get irq %d for the hotplug pci controller\n",
1180 ctrl->interrupt);
1181 rc = -ENODEV;
1182 goto err_iounmap;
1183 }
1184
1185 /* Enable Shift Out interrupt and clear it, also enable SERR on power
1186 * fault
1187 */
1188 temp_word = readw(ctrl->hpc_reg + MISC);
1189 temp_word |= 0x4006;
1190 writew(temp_word, ctrl->hpc_reg + MISC);
1191
1192 /* Changed 05/05/97 to clear all interrupts at start */
1193 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1194
1195 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1196
1197 writel(0x0L, ctrl->hpc_reg + INT_MASK);
1198
1199 if (!cpqhp_ctrl_list) {
1200 cpqhp_ctrl_list = ctrl;
1201 ctrl->next = NULL;
1202 } else {
1203 ctrl->next = cpqhp_ctrl_list;
1204 cpqhp_ctrl_list = ctrl;
1205 }
1206
1207 /* turn off empty slots here unless command line option "ON" set
1208 * Wait for exclusive access to hardware
1209 */
1210 mutex_lock(&ctrl->crit_sect);
1211
1212 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1213
1214 /* find first device number for the ctrl */
1215 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1216
1217 while (num_of_slots) {
1218 dbg("num_of_slots: %d\n", num_of_slots);
1219 func = cpqhp_slot_find(ctrl->bus, device, 0);
1220 if (!func)
1221 break;
1222
1223 hp_slot = func->device - ctrl->slot_device_offset;
1224 dbg("hp_slot: %d\n", hp_slot);
1225
1226 /* We have to save the presence info for these slots */
1227 temp_word = ctrl->ctrl_int_comp >> 16;
1228 func->presence_save = (temp_word >> hp_slot) & 0x01;
1229 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1230
1231 if (ctrl->ctrl_int_comp & (0x1L << hp_slot))
1232 func->switch_save = 0;
1233 else
1234 func->switch_save = 0x10;
1235
1236 if (!power_mode)
1237 if (!func->is_a_board) {
1238 green_LED_off(ctrl, hp_slot);
1239 slot_disable(ctrl, hp_slot);
1240 }
1241
1242 device++;
1243 num_of_slots--;
1244 }
1245
1246 if (!power_mode) {
1247 set_SOGO(ctrl);
1248 /* Wait for SOBS to be unset */
1249 wait_for_ctrl_irq(ctrl);
1250 }
1251
1252 rc = init_SERR(ctrl);
1253 if (rc) {
1254 err("init_SERR failed\n");
1255 mutex_unlock(&ctrl->crit_sect);
1256 goto err_free_irq;
1257 }
1258
1259 /* Done with exclusive hardware access */
1260 mutex_unlock(&ctrl->crit_sect);
1261
1262 cpqhp_create_debugfs_files(ctrl);
1263
1264 return 0;
1265
1266 err_free_irq:
1267 free_irq(ctrl->interrupt, ctrl);
1268 err_iounmap:
1269 iounmap(ctrl->hpc_reg);
1270 err_free_mem_region:
1271 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1272 err_free_bus:
1273 kfree(ctrl->pci_bus);
1274 err_free_ctrl:
1275 kfree(ctrl);
1276 err_disable_device:
1277 pci_disable_device(pdev);
1278 return rc;
1279 }
1280
1281 static void __exit unload_cpqphpd(void)
1282 {
1283 struct pci_func *next;
1284 struct pci_func *TempSlot;
1285 int loop;
1286 u32 rc;
1287 struct controller *ctrl;
1288 struct controller *tctrl;
1289 struct pci_resource *res;
1290 struct pci_resource *tres;
1291
1292 rc = compaq_nvram_store(cpqhp_rom_start);
1293
1294 ctrl = cpqhp_ctrl_list;
1295
1296 while (ctrl) {
1297 if (ctrl->hpc_reg) {
1298 u16 misc;
1299 rc = read_slot_enable(ctrl);
1300
1301 writeb(0, ctrl->hpc_reg + SLOT_SERR);
1302 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
1303
1304 misc = readw(ctrl->hpc_reg + MISC);
1305 misc &= 0xFFFD;
1306 writew(misc, ctrl->hpc_reg + MISC);
1307 }
1308
1309 ctrl_slot_cleanup(ctrl);
1310
1311 res = ctrl->io_head;
1312 while (res) {
1313 tres = res;
1314 res = res->next;
1315 kfree(tres);
1316 }
1317
1318 res = ctrl->mem_head;
1319 while (res) {
1320 tres = res;
1321 res = res->next;
1322 kfree(tres);
1323 }
1324
1325 res = ctrl->p_mem_head;
1326 while (res) {
1327 tres = res;
1328 res = res->next;
1329 kfree(tres);
1330 }
1331
1332 res = ctrl->bus_head;
1333 while (res) {
1334 tres = res;
1335 res = res->next;
1336 kfree(tres);
1337 }
1338
1339 kfree(ctrl->pci_bus);
1340
1341 tctrl = ctrl;
1342 ctrl = ctrl->next;
1343 kfree(tctrl);
1344 }
1345
1346 for (loop = 0; loop < 256; loop++) {
1347 next = cpqhp_slot_list[loop];
1348 while (next != NULL) {
1349 res = next->io_head;
1350 while (res) {
1351 tres = res;
1352 res = res->next;
1353 kfree(tres);
1354 }
1355
1356 res = next->mem_head;
1357 while (res) {
1358 tres = res;
1359 res = res->next;
1360 kfree(tres);
1361 }
1362
1363 res = next->p_mem_head;
1364 while (res) {
1365 tres = res;
1366 res = res->next;
1367 kfree(tres);
1368 }
1369
1370 res = next->bus_head;
1371 while (res) {
1372 tres = res;
1373 res = res->next;
1374 kfree(tres);
1375 }
1376
1377 TempSlot = next;
1378 next = next->next;
1379 kfree(TempSlot);
1380 }
1381 }
1382
1383 /* Stop the notification mechanism */
1384 if (initialized)
1385 cpqhp_event_stop_thread();
1386
1387 /* unmap the rom address */
1388 if (cpqhp_rom_start)
1389 iounmap(cpqhp_rom_start);
1390 if (smbios_start)
1391 iounmap(smbios_start);
1392 }
1393
1394 static const struct pci_device_id hpcd_pci_tbl[] = {
1395 {
1396 /* handle any PCI Hotplug controller */
1397 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1398 .class_mask = ~0,
1399
1400 /* no matter who makes it */
1401 .vendor = PCI_ANY_ID,
1402 .device = PCI_ANY_ID,
1403 .subvendor = PCI_ANY_ID,
1404 .subdevice = PCI_ANY_ID,
1405
1406 }, { /* end: all zeroes */ }
1407 };
1408
1409 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1410
1411 static struct pci_driver cpqhpc_driver = {
1412 .name = "compaq_pci_hotplug",
1413 .id_table = hpcd_pci_tbl,
1414 .probe = cpqhpc_probe,
1415 /* remove: cpqhpc_remove_one, */
1416 };
1417
1418 static int __init cpqhpc_init(void)
1419 {
1420 int result;
1421
1422 cpqhp_debug = debug;
1423
1424 info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
1425 cpqhp_initialize_debugfs();
1426 result = pci_register_driver(&cpqhpc_driver);
1427 dbg("pci_register_driver = %d\n", result);
1428 return result;
1429 }
1430
1431 static void __exit cpqhpc_cleanup(void)
1432 {
1433 dbg("unload_cpqphpd()\n");
1434 unload_cpqphpd();
1435
1436 dbg("pci_unregister_driver\n");
1437 pci_unregister_driver(&cpqhpc_driver);
1438 cpqhp_shutdown_debugfs();
1439 }
1440
1441 module_init(cpqhpc_init);
1442 module_exit(cpqhpc_cleanup);
Linux with added FPC-III support