drivers/pinctrl/meson/pinctrl-meson.c

   1 /*
   2  * Pin controller and GPIO driver for Amlogic Meson SoCs
   3  *
   4  * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * version 2 as published by the Free Software Foundation.
   9  *
  10  * You should have received a copy of the GNU General Public License
  11  * along with this program. If not, see <http://www.gnu.org/licenses/>.
  12  */
  13
  14 /*
  15  * The available pins are organized in banks (A,B,C,D,E,X,Y,Z,AO,
  16  * BOOT,CARD for meson6, X,Y,DV,H,Z,AO,BOOT,CARD for meson8 and
  17  * X,Y,DV,H,AO,BOOT,CARD,DIF for meson8b) and each bank has a
  18  * variable number of pins.
  19  *
  20  * The AO bank is special because it belongs to the Always-On power
  21  * domain which can't be powered off; the bank also uses a set of
  22  * registers different from the other banks.
  23  *
  24  * For each pin controller there are 4 different register ranges that
  25  * control the following properties of the pins:
  26  *  1) pin muxing
  27  *  2) pull enable/disable
  28  *  3) pull up/down
  29  *  4) GPIO direction, output value, input value
  30  *
  31  * In some cases the register ranges for pull enable and pull
  32  * direction are the same and thus there are only 3 register ranges.
  33  *
  34  * For the pull and GPIO configuration every bank uses a contiguous
  35  * set of bits in the register sets described above; the same register
  36  * can be shared by more banks with different offsets.
  37  *
  38  * In addition to this there are some registers shared between all
  39  * banks that control the IRQ functionality. This feature is not
  40  * supported at the moment by the driver.
  41  */
  42
  43 #include <linux/device.h>
  44 #include <linux/gpio.h>
  45 #include <linux/init.h>
  46 #include <linux/io.h>
  47 #include <linux/of.h>
  48 #include <linux/of_address.h>
  49 #include <linux/of_device.h>
  50 #include <linux/pinctrl/pinconf-generic.h>
  51 #include <linux/pinctrl/pinconf.h>
  52 #include <linux/pinctrl/pinctrl.h>
  53 #include <linux/pinctrl/pinmux.h>
  54 #include <linux/platform_device.h>
  55 #include <linux/regmap.h>
  56 #include <linux/seq_file.h>
  57
  58 #include "../core.h"
  59 #include "../pinctrl-utils.h"
  60 #include "pinctrl-meson.h"
  61
  62 /**
  63  * meson_get_bank() - find the bank containing a given pin
  64  *
  65  * @pc:         the pinctrl instance
  66  * @pin:        the pin number
  67  * @bank:       the found bank
  68  *
  69  * Return:      0 on success, a negative value on error
  70  */
  71 static int meson_get_bank(struct meson_pinctrl *pc, unsigned int pin,
  72                           struct meson_bank **bank)
  73 {
  74         int i;
  75
  76         for (i = 0; i < pc->data->num_banks; i++) {
  77                 if (pin >= pc->data->banks[i].first &&
  78                     pin <= pc->data->banks[i].last) {
  79                         *bank = &pc->data->banks[i];
  80                         return 0;
  81                 }
  82         }
  83
  84         return -EINVAL;
  85 }
  86
  87 /**
  88  * meson_calc_reg_and_bit() - calculate register and bit for a pin
  89  *
  90  * @bank:       the bank containing the pin
  91  * @pin:        the pin number
  92  * @reg_type:   the type of register needed (pull-enable, pull, etc...)
  93  * @reg:        the computed register offset
  94  * @bit:        the computed bit
  95  */
  96 static void meson_calc_reg_and_bit(struct meson_bank *bank, unsigned int pin,
  97                                    enum meson_reg_type reg_type,
  98                                    unsigned int *reg, unsigned int *bit)
  99 {
 100         struct meson_reg_desc *desc = &bank->regs[reg_type];
 101
 102         *reg = desc->reg * 4;
 103         *bit = desc->bit + pin - bank->first;
 104 }
 105
 106 static int meson_get_groups_count(struct pinctrl_dev *pcdev)
 107 {
 108         struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
 109
 110         return pc->data->num_groups;
 111 }
 112
 113 static const char *meson_get_group_name(struct pinctrl_dev *pcdev,
 114                                         unsigned selector)
 115 {
 116         struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
 117
 118         return pc->data->groups[selector].name;
 119 }
 120
 121 static int meson_get_group_pins(struct pinctrl_dev *pcdev, unsigned selector,
 122                                 const unsigned **pins, unsigned *num_pins)
 123 {
 124         struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
 125
 126         *pins = pc->data->groups[selector].pins;
 127         *num_pins = pc->data->groups[selector].num_pins;
 128
 129         return 0;
 130 }
 131
 132 static void meson_pin_dbg_show(struct pinctrl_dev *pcdev, struct seq_file *s,
 133                                unsigned offset)
 134 {
 135         seq_printf(s, " %s", dev_name(pcdev->dev));
 136 }
 137
 138 static const struct pinctrl_ops meson_pctrl_ops = {
 139         .get_groups_count       = meson_get_groups_count,
 140         .get_group_name         = meson_get_group_name,
 141         .get_group_pins         = meson_get_group_pins,
 142         .dt_node_to_map         = pinconf_generic_dt_node_to_map_all,
 143         .dt_free_map            = pinctrl_utils_free_map,
 144         .pin_dbg_show           = meson_pin_dbg_show,
 145 };
 146
 147 int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev)
 148 {
 149         struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
 150
 151         return pc->data->num_funcs;
 152 }
 153
 154 const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev,
 155                                     unsigned selector)
 156 {
 157         struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
 158
 159         return pc->data->funcs[selector].name;
 160 }
 161
 162 int meson_pmx_get_groups(struct pinctrl_dev *pcdev, unsigned selector,
 163                          const char * const **groups,
 164                          unsigned * const num_groups)
 165 {
 166         struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
 167
 168         *groups = pc->data->funcs[selector].groups;
 169         *num_groups = pc->data->funcs[selector].num_groups;
 170
 171         return 0;
 172 }
 173
 174 static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
 175                              unsigned long *configs, unsigned num_configs)
 176 {
 177         struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
 178         struct meson_bank *bank;
 179         enum pin_config_param param;
 180         unsigned int reg, bit;
 181         int i, ret;
 182
 183         ret = meson_get_bank(pc, pin, &bank);
 184         if (ret)
 185                 return ret;
 186
 187         for (i = 0; i < num_configs; i++) {
 188                 param = pinconf_to_config_param(configs[i]);
 189
 190                 switch (param) {
 191                 case PIN_CONFIG_BIAS_DISABLE:
 192                         dev_dbg(pc->dev, "pin %u: disable bias\n", pin);
 193
 194                         meson_calc_reg_and_bit(bank, pin, REG_PULLEN, &reg,
 195                                                &bit);
 196                         ret = regmap_update_bits(pc->reg_pullen, reg,
 197                                                  BIT(bit), 0);
 198                         if (ret)
 199                                 return ret;
 200                         break;
 201                 case PIN_CONFIG_BIAS_PULL_UP:
 202                         dev_dbg(pc->dev, "pin %u: enable pull-up\n", pin);
 203
 204                         meson_calc_reg_and_bit(bank, pin, REG_PULLEN,
 205                                                &reg, &bit);
 206                         ret = regmap_update_bits(pc->reg_pullen, reg,
 207                                                  BIT(bit), BIT(bit));
 208                         if (ret)
 209                                 return ret;
 210
 211                         meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit);
 212                         ret = regmap_update_bits(pc->reg_pull, reg,
 213                                                  BIT(bit), BIT(bit));
 214                         if (ret)
 215                                 return ret;
 216                         break;
 217                 case PIN_CONFIG_BIAS_PULL_DOWN:
 218                         dev_dbg(pc->dev, "pin %u: enable pull-down\n", pin);
 219
 220                         meson_calc_reg_and_bit(bank, pin, REG_PULLEN,
 221                                                &reg, &bit);
 222                         ret = regmap_update_bits(pc->reg_pullen, reg,
 223                                                  BIT(bit), BIT(bit));
 224                         if (ret)
 225                                 return ret;
 226
 227                         meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit);
 228                         ret = regmap_update_bits(pc->reg_pull, reg,
 229                                                  BIT(bit), 0);
 230                         if (ret)
 231                                 return ret;
 232                         break;
 233                 default:
 234                         return -ENOTSUPP;
 235                 }
 236         }
 237
 238         return 0;
 239 }
 240
 241 static int meson_pinconf_get_pull(struct meson_pinctrl *pc, unsigned int pin)
 242 {
 243         struct meson_bank *bank;
 244         unsigned int reg, bit, val;
 245         int ret, conf;
 246
 247         ret = meson_get_bank(pc, pin, &bank);
 248         if (ret)
 249                 return ret;
 250
 251         meson_calc_reg_and_bit(bank, pin, REG_PULLEN, &reg, &bit);
 252
 253         ret = regmap_read(pc->reg_pullen, reg, &val);
 254         if (ret)
 255                 return ret;
 256
 257         if (!(val & BIT(bit))) {
 258                 conf = PIN_CONFIG_BIAS_DISABLE;
 259         } else {
 260                 meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit);
 261
 262                 ret = regmap_read(pc->reg_pull, reg, &val);
 263                 if (ret)
 264                         return ret;
 265
 266                 if (val & BIT(bit))
 267                         conf = PIN_CONFIG_BIAS_PULL_UP;
 268                 else
 269                         conf = PIN_CONFIG_BIAS_PULL_DOWN;
 270         }
 271
 272         return conf;
 273 }
 274
 275 static int meson_pinconf_get(struct pinctrl_dev *pcdev, unsigned int pin,
 276                              unsigned long *config)
 277 {
 278         struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
 279         enum pin_config_param param = pinconf_to_config_param(*config);
 280         u16 arg;
 281
 282         switch (param) {
 283         case PIN_CONFIG_BIAS_DISABLE:
 284         case PIN_CONFIG_BIAS_PULL_DOWN:
 285         case PIN_CONFIG_BIAS_PULL_UP:
 286                 if (meson_pinconf_get_pull(pc, pin) == param)
 287                         arg = 1;
 288                 else
 289                         return -EINVAL;
 290                 break;
 291         default:
 292                 return -ENOTSUPP;
 293         }
 294
 295         *config = pinconf_to_config_packed(param, arg);
 296         dev_dbg(pc->dev, "pinconf for pin %u is %lu\n", pin, *config);
 297
 298         return 0;
 299 }
 300
 301 static int meson_pinconf_group_set(struct pinctrl_dev *pcdev,
 302                                    unsigned int num_group,
 303                                    unsigned long *configs, unsigned num_configs)
 304 {
 305         struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
 306         struct meson_pmx_group *group = &pc->data->groups[num_group];
 307         int i;
 308
 309         dev_dbg(pc->dev, "set pinconf for group %s\n", group->name);
 310
 311         for (i = 0; i < group->num_pins; i++) {
 312                 meson_pinconf_set(pcdev, group->pins[i], configs,
 313                                   num_configs);
 314         }
 315
 316         return 0;
 317 }
 318
 319 static int meson_pinconf_group_get(struct pinctrl_dev *pcdev,
 320                                    unsigned int group, unsigned long *config)
 321 {
 322         return -ENOTSUPP;
 323 }
 324
 325 static const struct pinconf_ops meson_pinconf_ops = {
 326         .pin_config_get         = meson_pinconf_get,
 327         .pin_config_set         = meson_pinconf_set,
 328         .pin_config_group_get   = meson_pinconf_group_get,
 329         .pin_config_group_set   = meson_pinconf_group_set,
 330         .is_generic             = true,
 331 };
 332
 333 static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
 334 {
 335         struct meson_pinctrl *pc = gpiochip_get_data(chip);
 336         unsigned int reg, bit;
 337         struct meson_bank *bank;
 338         int ret;
 339
 340         ret = meson_get_bank(pc, gpio, &bank);
 341         if (ret)
 342                 return ret;
 343
 344         meson_calc_reg_and_bit(bank, gpio, REG_DIR, &reg, &bit);
 345
 346         return regmap_update_bits(pc->reg_gpio, reg, BIT(bit), BIT(bit));
 347 }
 348
 349 static int meson_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
 350                                        int value)
 351 {
 352         struct meson_pinctrl *pc = gpiochip_get_data(chip);
 353         unsigned int reg, bit;
 354         struct meson_bank *bank;
 355         int ret;
 356
 357         ret = meson_get_bank(pc, gpio, &bank);
 358         if (ret)
 359                 return ret;
 360
 361         meson_calc_reg_and_bit(bank, gpio, REG_DIR, &reg, &bit);
 362         ret = regmap_update_bits(pc->reg_gpio, reg, BIT(bit), 0);
 363         if (ret)
 364                 return ret;
 365
 366         meson_calc_reg_and_bit(bank, gpio, REG_OUT, &reg, &bit);
 367         return regmap_update_bits(pc->reg_gpio, reg, BIT(bit),
 368                                   value ? BIT(bit) : 0);
 369 }
 370
 371 static void meson_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
 372 {
 373         struct meson_pinctrl *pc = gpiochip_get_data(chip);
 374         unsigned int reg, bit;
 375         struct meson_bank *bank;
 376         int ret;
 377
 378         ret = meson_get_bank(pc, gpio, &bank);
 379         if (ret)
 380                 return;
 381
 382         meson_calc_reg_and_bit(bank, gpio, REG_OUT, &reg, &bit);
 383         regmap_update_bits(pc->reg_gpio, reg, BIT(bit),
 384                            value ? BIT(bit) : 0);
 385 }
 386
 387 static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio)
 388 {
 389         struct meson_pinctrl *pc = gpiochip_get_data(chip);
 390         unsigned int reg, bit, val;
 391         struct meson_bank *bank;
 392         int ret;
 393
 394         ret = meson_get_bank(pc, gpio, &bank);
 395         if (ret)
 396                 return ret;
 397
 398         meson_calc_reg_and_bit(bank, gpio, REG_IN, &reg, &bit);
 399         regmap_read(pc->reg_gpio, reg, &val);
 400
 401         return !!(val & BIT(bit));
 402 }
 403
 404 static int meson_gpiolib_register(struct meson_pinctrl *pc)
 405 {
 406         int ret;
 407
 408         pc->chip.label = pc->data->name;
 409         pc->chip.parent = pc->dev;
 410         pc->chip.request = gpiochip_generic_request;
 411         pc->chip.free = gpiochip_generic_free;
 412         pc->chip.direction_input = meson_gpio_direction_input;
 413         pc->chip.direction_output = meson_gpio_direction_output;
 414         pc->chip.get = meson_gpio_get;
 415         pc->chip.set = meson_gpio_set;
 416         pc->chip.base = -1;
 417         pc->chip.ngpio = pc->data->num_pins;
 418         pc->chip.can_sleep = false;
 419         pc->chip.of_node = pc->of_node;
 420         pc->chip.of_gpio_n_cells = 2;
 421
 422         ret = gpiochip_add_data(&pc->chip, pc);
 423         if (ret) {
 424                 dev_err(pc->dev, "can't add gpio chip %s\n",
 425                         pc->data->name);
 426                 return ret;
 427         }
 428
 429         return 0;
 430 }
 431
 432 static struct regmap_config meson_regmap_config = {
 433         .reg_bits = 32,
 434         .val_bits = 32,
 435         .reg_stride = 4,
 436 };
 437
 438 static struct regmap *meson_map_resource(struct meson_pinctrl *pc,
 439                                          struct device_node *node, char *name)
 440 {
 441         struct resource res;
 442         void __iomem *base;
 443         int i;
 444
 445         i = of_property_match_string(node, "reg-names", name);
 446         if (of_address_to_resource(node, i, &res))
 447                 return ERR_PTR(-ENOENT);
 448
 449         base = devm_ioremap_resource(pc->dev, &res);
 450         if (IS_ERR(base))
 451                 return ERR_CAST(base);
 452
 453         meson_regmap_config.max_register = resource_size(&res) - 4;
 454         meson_regmap_config.name = devm_kasprintf(pc->dev, GFP_KERNEL,
 455                                                   "%s-%s", node->name,
 456                                                   name);
 457         if (!meson_regmap_config.name)
 458                 return ERR_PTR(-ENOMEM);
 459
 460         return devm_regmap_init_mmio(pc->dev, base, &meson_regmap_config);
 461 }
 462
 463 static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc,
 464                                   struct device_node *node)
 465 {
 466         struct device_node *np, *gpio_np = NULL;
 467
 468         for_each_child_of_node(node, np) {
 469                 if (!of_find_property(np, "gpio-controller", NULL))
 470                         continue;
 471                 if (gpio_np) {
 472                         dev_err(pc->dev, "multiple gpio nodes\n");
 473                         return -EINVAL;
 474                 }
 475                 gpio_np = np;
 476         }
 477
 478         if (!gpio_np) {
 479                 dev_err(pc->dev, "no gpio node found\n");
 480                 return -EINVAL;
 481         }
 482
 483         pc->of_node = gpio_np;
 484
 485         pc->reg_mux = meson_map_resource(pc, gpio_np, "mux");
 486         if (IS_ERR(pc->reg_mux)) {
 487                 dev_err(pc->dev, "mux registers not found\n");
 488                 return PTR_ERR(pc->reg_mux);
 489         }
 490
 491         pc->reg_pull = meson_map_resource(pc, gpio_np, "pull");
 492         if (IS_ERR(pc->reg_pull)) {
 493                 dev_err(pc->dev, "pull registers not found\n");
 494                 return PTR_ERR(pc->reg_pull);
 495         }
 496
 497         pc->reg_pullen = meson_map_resource(pc, gpio_np, "pull-enable");
 498         /* Use pull region if pull-enable one is not present */
 499         if (IS_ERR(pc->reg_pullen))
 500                 pc->reg_pullen = pc->reg_pull;
 501
 502         pc->reg_gpio = meson_map_resource(pc, gpio_np, "gpio");
 503         if (IS_ERR(pc->reg_gpio)) {
 504                 dev_err(pc->dev, "gpio registers not found\n");
 505                 return PTR_ERR(pc->reg_gpio);
 506         }
 507
 508         return 0;
 509 }
 510
 511 int meson_pinctrl_probe(struct platform_device *pdev)
 512 {
 513         struct device *dev = &pdev->dev;
 514         struct meson_pinctrl *pc;
 515         int ret;
 516
 517         pc = devm_kzalloc(dev, sizeof(struct meson_pinctrl), GFP_KERNEL);
 518         if (!pc)
 519                 return -ENOMEM;
 520
 521         pc->dev = dev;
 522         pc->data = (struct meson_pinctrl_data *) of_device_get_match_data(dev);
 523
 524         ret = meson_pinctrl_parse_dt(pc, dev->of_node);
 525         if (ret)
 526                 return ret;
 527
 528         pc->desc.name           = "pinctrl-meson";
 529         pc->desc.owner          = THIS_MODULE;
 530         pc->desc.pctlops        = &meson_pctrl_ops;
 531         pc->desc.pmxops         = pc->data->pmx_ops;
 532         pc->desc.confops        = &meson_pinconf_ops;
 533         pc->desc.pins           = pc->data->pins;
 534         pc->desc.npins          = pc->data->num_pins;
 535
 536         pc->pcdev = devm_pinctrl_register(pc->dev, &pc->desc, pc);
 537         if (IS_ERR(pc->pcdev)) {
 538                 dev_err(pc->dev, "can't register pinctrl device");
 539                 return PTR_ERR(pc->pcdev);
 540         }
 541
 542         return meson_gpiolib_register(pc);
 543 }