drivers/pinctrl/pinctrl-ocelot.c

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 /*
   3  * Microsemi SoCs pinctrl driver
   4  *
   5  * Author: <alexandre.belloni@free-electrons.com>
   6  * License: Dual MIT/GPL
   7  * Copyright (c) 2017 Microsemi Corporation
   8  */
   9
  10 #include <linux/gpio/driver.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/io.h>
  13 #include <linux/of_device.h>
  14 #include <linux/of_irq.h>
  15 #include <linux/of_platform.h>
  16 #include <linux/pinctrl/pinctrl.h>
  17 #include <linux/pinctrl/pinmux.h>
  18 #include <linux/pinctrl/pinconf.h>
  19 #include <linux/pinctrl/pinconf-generic.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/regmap.h>
  22 #include <linux/slab.h>
  23
  24 #include "core.h"
  25 #include "pinconf.h"
  26 #include "pinmux.h"
  27
  28 #define OCELOT_GPIO_OUT_SET     0x0
  29 #define OCELOT_GPIO_OUT_CLR     0x4
  30 #define OCELOT_GPIO_OUT         0x8
  31 #define OCELOT_GPIO_IN          0xc
  32 #define OCELOT_GPIO_OE          0x10
  33 #define OCELOT_GPIO_INTR        0x14
  34 #define OCELOT_GPIO_INTR_ENA    0x18
  35 #define OCELOT_GPIO_INTR_IDENT  0x1c
  36 #define OCELOT_GPIO_ALT0        0x20
  37 #define OCELOT_GPIO_ALT1        0x24
  38 #define OCELOT_GPIO_SD_MAP      0x28
  39
  40 #define OCELOT_PINS             22
  41 #define OCELOT_FUNC_PER_PIN     4
  42
  43 enum {
  44         FUNC_NONE,
  45         FUNC_GPIO,
  46         FUNC_IRQ0_IN,
  47         FUNC_IRQ0_OUT,
  48         FUNC_IRQ1_IN,
  49         FUNC_IRQ1_OUT,
  50         FUNC_MIIM1,
  51         FUNC_PCI_WAKE,
  52         FUNC_PTP0,
  53         FUNC_PTP1,
  54         FUNC_PTP2,
  55         FUNC_PTP3,
  56         FUNC_PWM,
  57         FUNC_RECO_CLK0,
  58         FUNC_RECO_CLK1,
  59         FUNC_SFP0,
  60         FUNC_SFP1,
  61         FUNC_SFP2,
  62         FUNC_SFP3,
  63         FUNC_SFP4,
  64         FUNC_SFP5,
  65         FUNC_SG0,
  66         FUNC_SI,
  67         FUNC_TACHO,
  68         FUNC_TWI,
  69         FUNC_TWI_SCL_M,
  70         FUNC_UART,
  71         FUNC_UART2,
  72         FUNC_MAX
  73 };
  74
  75 static const char *const ocelot_function_names[] = {
  76         [FUNC_NONE]             = "none",
  77         [FUNC_GPIO]             = "gpio",
  78         [FUNC_IRQ0_IN]          = "irq0_in",
  79         [FUNC_IRQ0_OUT]         = "irq0_out",
  80         [FUNC_IRQ1_IN]          = "irq1_in",
  81         [FUNC_IRQ1_OUT]         = "irq1_out",
  82         [FUNC_MIIM1]            = "miim1",
  83         [FUNC_PCI_WAKE]         = "pci_wake",
  84         [FUNC_PTP0]             = "ptp0",
  85         [FUNC_PTP1]             = "ptp1",
  86         [FUNC_PTP2]             = "ptp2",
  87         [FUNC_PTP3]             = "ptp3",
  88         [FUNC_PWM]              = "pwm",
  89         [FUNC_RECO_CLK0]        = "reco_clk0",
  90         [FUNC_RECO_CLK1]        = "reco_clk1",
  91         [FUNC_SFP0]             = "sfp0",
  92         [FUNC_SFP1]             = "sfp1",
  93         [FUNC_SFP2]             = "sfp2",
  94         [FUNC_SFP3]             = "sfp3",
  95         [FUNC_SFP4]             = "sfp4",
  96         [FUNC_SFP5]             = "sfp5",
  97         [FUNC_SG0]              = "sg0",
  98         [FUNC_SI]               = "si",
  99         [FUNC_TACHO]            = "tacho",
 100         [FUNC_TWI]              = "twi",
 101         [FUNC_TWI_SCL_M]        = "twi_scl_m",
 102         [FUNC_UART]             = "uart",
 103         [FUNC_UART2]            = "uart2",
 104 };
 105
 106 struct ocelot_pmx_func {
 107         const char **groups;
 108         unsigned int ngroups;
 109 };
 110
 111 struct ocelot_pin_caps {
 112         unsigned int pin;
 113         unsigned char functions[OCELOT_FUNC_PER_PIN];
 114 };
 115
 116 struct ocelot_pinctrl {
 117         struct device *dev;
 118         struct pinctrl_dev *pctl;
 119         struct gpio_chip gpio_chip;
 120         struct regmap *map;
 121         struct ocelot_pmx_func func[FUNC_MAX];
 122 };
 123
 124 #define OCELOT_P(p, f0, f1, f2)                                         \
 125 static struct ocelot_pin_caps ocelot_pin_##p = {                        \
 126         .pin = p,                                                       \
 127         .functions = {                                                  \
 128                         FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_##f2,     \
 129         },                                                              \
 130 }
 131
 132 OCELOT_P(0,  SG0,       NONE,      NONE);
 133 OCELOT_P(1,  SG0,       NONE,      NONE);
 134 OCELOT_P(2,  SG0,       NONE,      NONE);
 135 OCELOT_P(3,  SG0,       NONE,      NONE);
 136 OCELOT_P(4,  IRQ0_IN,   IRQ0_OUT,  TWI_SCL_M);
 137 OCELOT_P(5,  IRQ1_IN,   IRQ1_OUT,  PCI_WAKE);
 138 OCELOT_P(6,  UART,      TWI_SCL_M, NONE);
 139 OCELOT_P(7,  UART,      TWI_SCL_M, NONE);
 140 OCELOT_P(8,  SI,        TWI_SCL_M, IRQ0_OUT);
 141 OCELOT_P(9,  SI,        TWI_SCL_M, IRQ1_OUT);
 142 OCELOT_P(10, PTP2,      TWI_SCL_M, SFP0);
 143 OCELOT_P(11, PTP3,      TWI_SCL_M, SFP1);
 144 OCELOT_P(12, UART2,     TWI_SCL_M, SFP2);
 145 OCELOT_P(13, UART2,     TWI_SCL_M, SFP3);
 146 OCELOT_P(14, MIIM1,     TWI_SCL_M, SFP4);
 147 OCELOT_P(15, MIIM1,     TWI_SCL_M, SFP5);
 148 OCELOT_P(16, TWI,       NONE,      SI);
 149 OCELOT_P(17, TWI,       TWI_SCL_M, SI);
 150 OCELOT_P(18, PTP0,      TWI_SCL_M, NONE);
 151 OCELOT_P(19, PTP1,      TWI_SCL_M, NONE);
 152 OCELOT_P(20, RECO_CLK0, TACHO,     NONE);
 153 OCELOT_P(21, RECO_CLK1, PWM,       NONE);
 154
 155 #define OCELOT_PIN(n) {                                         \
 156         .number = n,                                            \
 157         .name = "GPIO_"#n,                                      \
 158         .drv_data = &ocelot_pin_##n                             \
 159 }
 160
 161 static const struct pinctrl_pin_desc ocelot_pins[] = {
 162         OCELOT_PIN(0),
 163         OCELOT_PIN(1),
 164         OCELOT_PIN(2),
 165         OCELOT_PIN(3),
 166         OCELOT_PIN(4),
 167         OCELOT_PIN(5),
 168         OCELOT_PIN(6),
 169         OCELOT_PIN(7),
 170         OCELOT_PIN(8),
 171         OCELOT_PIN(9),
 172         OCELOT_PIN(10),
 173         OCELOT_PIN(11),
 174         OCELOT_PIN(12),
 175         OCELOT_PIN(13),
 176         OCELOT_PIN(14),
 177         OCELOT_PIN(15),
 178         OCELOT_PIN(16),
 179         OCELOT_PIN(17),
 180         OCELOT_PIN(18),
 181         OCELOT_PIN(19),
 182         OCELOT_PIN(20),
 183         OCELOT_PIN(21),
 184 };
 185
 186 static int ocelot_get_functions_count(struct pinctrl_dev *pctldev)
 187 {
 188         return ARRAY_SIZE(ocelot_function_names);
 189 }
 190
 191 static const char *ocelot_get_function_name(struct pinctrl_dev *pctldev,
 192                                             unsigned int function)
 193 {
 194         return ocelot_function_names[function];
 195 }
 196
 197 static int ocelot_get_function_groups(struct pinctrl_dev *pctldev,
 198                                       unsigned int function,
 199                                       const char *const **groups,
 200                                       unsigned *const num_groups)
 201 {
 202         struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
 203
 204         *groups  = info->func[function].groups;
 205         *num_groups = info->func[function].ngroups;
 206
 207         return 0;
 208 }
 209
 210 static int ocelot_pin_function_idx(unsigned int pin, unsigned int function)
 211 {
 212         struct ocelot_pin_caps *p = ocelot_pins[pin].drv_data;
 213         int i;
 214
 215         for (i = 0; i < OCELOT_FUNC_PER_PIN; i++) {
 216                 if (function == p->functions[i])
 217                         return i;
 218         }
 219
 220         return -1;
 221 }
 222
 223 static int ocelot_pinmux_set_mux(struct pinctrl_dev *pctldev,
 224                                  unsigned int selector, unsigned int group)
 225 {
 226         struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
 227         struct ocelot_pin_caps *pin = ocelot_pins[group].drv_data;
 228         int f;
 229
 230         f = ocelot_pin_function_idx(group, selector);
 231         if (f < 0)
 232                 return -EINVAL;
 233
 234         /*
 235          * f is encoded on two bits.
 236          * bit 0 of f goes in BIT(pin) of ALT0, bit 1 of f goes in BIT(pin) of
 237          * ALT1
 238          * This is racy because both registers can't be updated at the same time
 239          * but it doesn't matter much for now.
 240          */
 241         regmap_update_bits(info->map, OCELOT_GPIO_ALT0, BIT(pin->pin),
 242                            f << pin->pin);
 243         regmap_update_bits(info->map, OCELOT_GPIO_ALT1, BIT(pin->pin),
 244                            f << (pin->pin - 1));
 245
 246         return 0;
 247 }
 248
 249 static int ocelot_gpio_set_direction(struct pinctrl_dev *pctldev,
 250                                      struct pinctrl_gpio_range *range,
 251                                      unsigned int pin, bool input)
 252 {
 253         struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
 254
 255         regmap_update_bits(info->map, OCELOT_GPIO_OE, BIT(pin),
 256                            input ? 0 : BIT(pin));
 257
 258         return 0;
 259 }
 260
 261 static int ocelot_gpio_request_enable(struct pinctrl_dev *pctldev,
 262                                       struct pinctrl_gpio_range *range,
 263                                       unsigned int offset)
 264 {
 265         struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
 266
 267         regmap_update_bits(info->map, OCELOT_GPIO_ALT0, BIT(offset), 0);
 268         regmap_update_bits(info->map, OCELOT_GPIO_ALT1, BIT(offset), 0);
 269
 270         return 0;
 271 }
 272
 273 static const struct pinmux_ops ocelot_pmx_ops = {
 274         .get_functions_count = ocelot_get_functions_count,
 275         .get_function_name = ocelot_get_function_name,
 276         .get_function_groups = ocelot_get_function_groups,
 277         .set_mux = ocelot_pinmux_set_mux,
 278         .gpio_set_direction = ocelot_gpio_set_direction,
 279         .gpio_request_enable = ocelot_gpio_request_enable,
 280 };
 281
 282 static int ocelot_pctl_get_groups_count(struct pinctrl_dev *pctldev)
 283 {
 284         return ARRAY_SIZE(ocelot_pins);
 285 }
 286
 287 static const char *ocelot_pctl_get_group_name(struct pinctrl_dev *pctldev,
 288                                               unsigned int group)
 289 {
 290         return ocelot_pins[group].name;
 291 }
 292
 293 static int ocelot_pctl_get_group_pins(struct pinctrl_dev *pctldev,
 294                                       unsigned int group,
 295                                       const unsigned int **pins,
 296                                       unsigned int *num_pins)
 297 {
 298         *pins = &ocelot_pins[group].number;
 299         *num_pins = 1;
 300
 301         return 0;
 302 }
 303
 304 static const struct pinctrl_ops ocelot_pctl_ops = {
 305         .get_groups_count = ocelot_pctl_get_groups_count,
 306         .get_group_name = ocelot_pctl_get_group_name,
 307         .get_group_pins = ocelot_pctl_get_group_pins,
 308         .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
 309         .dt_free_map = pinconf_generic_dt_free_map,
 310 };
 311
 312 static struct pinctrl_desc ocelot_desc = {
 313         .name = "ocelot-pinctrl",
 314         .pins = ocelot_pins,
 315         .npins = ARRAY_SIZE(ocelot_pins),
 316         .pctlops = &ocelot_pctl_ops,
 317         .pmxops = &ocelot_pmx_ops,
 318         .owner = THIS_MODULE,
 319 };
 320
 321 static int ocelot_create_group_func_map(struct device *dev,
 322                                         struct ocelot_pinctrl *info)
 323 {
 324         u16 pins[ARRAY_SIZE(ocelot_pins)];
 325         int f, npins, i;
 326
 327         for (f = 0; f < FUNC_MAX; f++) {
 328                 for (npins = 0, i = 0; i < ARRAY_SIZE(ocelot_pins); i++) {
 329                         if (ocelot_pin_function_idx(i, f) >= 0)
 330                                 pins[npins++] = i;
 331                 }
 332
 333                 info->func[f].ngroups = npins;
 334                 info->func[f].groups = devm_kcalloc(dev,
 335                                                          npins,
 336                                                          sizeof(char *),
 337                                                          GFP_KERNEL);
 338                 if (!info->func[f].groups)
 339                         return -ENOMEM;
 340
 341                 for (i = 0; i < npins; i++)
 342                         info->func[f].groups[i] = ocelot_pins[pins[i]].name;
 343         }
 344
 345         return 0;
 346 }
 347
 348 static int ocelot_pinctrl_register(struct platform_device *pdev,
 349                                    struct ocelot_pinctrl *info)
 350 {
 351         int ret;
 352
 353         ret = ocelot_create_group_func_map(&pdev->dev, info);
 354         if (ret) {
 355                 dev_err(&pdev->dev, "Unable to create group func map.\n");
 356                 return ret;
 357         }
 358
 359         info->pctl = devm_pinctrl_register(&pdev->dev, &ocelot_desc, info);
 360         if (IS_ERR(info->pctl)) {
 361                 dev_err(&pdev->dev, "Failed to register pinctrl\n");
 362                 return PTR_ERR(info->pctl);
 363         }
 364
 365         return 0;
 366 }
 367
 368 static int ocelot_gpio_get(struct gpio_chip *chip, unsigned int offset)
 369 {
 370         struct ocelot_pinctrl *info = gpiochip_get_data(chip);
 371         unsigned int val;
 372
 373         regmap_read(info->map, OCELOT_GPIO_IN, &val);
 374
 375         return !!(val & BIT(offset));
 376 }
 377
 378 static void ocelot_gpio_set(struct gpio_chip *chip, unsigned int offset,
 379                             int value)
 380 {
 381         struct ocelot_pinctrl *info = gpiochip_get_data(chip);
 382
 383         if (value)
 384                 regmap_write(info->map, OCELOT_GPIO_OUT_SET, BIT(offset));
 385         else
 386                 regmap_write(info->map, OCELOT_GPIO_OUT_CLR, BIT(offset));
 387 }
 388
 389 static int ocelot_gpio_get_direction(struct gpio_chip *chip,
 390                                      unsigned int offset)
 391 {
 392         struct ocelot_pinctrl *info = gpiochip_get_data(chip);
 393         unsigned int val;
 394
 395         regmap_read(info->map, OCELOT_GPIO_OE, &val);
 396
 397         return !(val & BIT(offset));
 398 }
 399
 400 static int ocelot_gpio_direction_input(struct gpio_chip *chip,
 401                                        unsigned int offset)
 402 {
 403         return pinctrl_gpio_direction_input(chip->base + offset);
 404 }
 405
 406 static int ocelot_gpio_direction_output(struct gpio_chip *chip,
 407                                         unsigned int offset, int value)
 408 {
 409         struct ocelot_pinctrl *info = gpiochip_get_data(chip);
 410         unsigned int pin = BIT(offset);
 411
 412         if (value)
 413                 regmap_write(info->map, OCELOT_GPIO_OUT_SET, pin);
 414         else
 415                 regmap_write(info->map, OCELOT_GPIO_OUT_CLR, pin);
 416
 417         return pinctrl_gpio_direction_output(chip->base + offset);
 418 }
 419
 420 static const struct gpio_chip ocelot_gpiolib_chip = {
 421         .request = gpiochip_generic_request,
 422         .free = gpiochip_generic_free,
 423         .set = ocelot_gpio_set,
 424         .get = ocelot_gpio_get,
 425         .get_direction = ocelot_gpio_get_direction,
 426         .direction_input = ocelot_gpio_direction_input,
 427         .direction_output = ocelot_gpio_direction_output,
 428         .owner = THIS_MODULE,
 429 };
 430
 431 static void ocelot_irq_mask(struct irq_data *data)
 432 {
 433         struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
 434         struct ocelot_pinctrl *info = gpiochip_get_data(chip);
 435         unsigned int gpio = irqd_to_hwirq(data);
 436
 437         regmap_update_bits(info->map, OCELOT_GPIO_INTR_ENA, BIT(gpio), 0);
 438 }
 439
 440 static void ocelot_irq_unmask(struct irq_data *data)
 441 {
 442         struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
 443         struct ocelot_pinctrl *info = gpiochip_get_data(chip);
 444         unsigned int gpio = irqd_to_hwirq(data);
 445
 446         regmap_update_bits(info->map, OCELOT_GPIO_INTR_ENA, BIT(gpio),
 447                            BIT(gpio));
 448 }
 449
 450 static void ocelot_irq_ack(struct irq_data *data)
 451 {
 452         struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
 453         struct ocelot_pinctrl *info = gpiochip_get_data(chip);
 454         unsigned int gpio = irqd_to_hwirq(data);
 455
 456         regmap_write_bits(info->map, OCELOT_GPIO_INTR, BIT(gpio), BIT(gpio));
 457 }
 458
 459 static int ocelot_irq_set_type(struct irq_data *data, unsigned int type);
 460
 461 static struct irq_chip ocelot_eoi_irqchip = {
 462         .name           = "gpio",
 463         .irq_mask       = ocelot_irq_mask,
 464         .irq_eoi        = ocelot_irq_ack,
 465         .irq_unmask     = ocelot_irq_unmask,
 466         .flags          = IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED,
 467         .irq_set_type   = ocelot_irq_set_type,
 468 };
 469
 470 static struct irq_chip ocelot_irqchip = {
 471         .name           = "gpio",
 472         .irq_mask       = ocelot_irq_mask,
 473         .irq_ack        = ocelot_irq_ack,
 474         .irq_unmask     = ocelot_irq_unmask,
 475         .irq_set_type   = ocelot_irq_set_type,
 476 };
 477
 478 static int ocelot_irq_set_type(struct irq_data *data, unsigned int type)
 479 {
 480         type &= IRQ_TYPE_SENSE_MASK;
 481
 482         if (!(type & (IRQ_TYPE_EDGE_BOTH | IRQ_TYPE_LEVEL_HIGH)))
 483                 return -EINVAL;
 484
 485         if (type & IRQ_TYPE_LEVEL_HIGH)
 486                 irq_set_chip_handler_name_locked(data, &ocelot_eoi_irqchip,
 487                                                  handle_fasteoi_irq, NULL);
 488         if (type & IRQ_TYPE_EDGE_BOTH)
 489                 irq_set_chip_handler_name_locked(data, &ocelot_irqchip,
 490                                                  handle_edge_irq, NULL);
 491
 492         return 0;
 493 }
 494
 495 static void ocelot_irq_handler(struct irq_desc *desc)
 496 {
 497         struct irq_chip *parent_chip = irq_desc_get_chip(desc);
 498         struct gpio_chip *chip = irq_desc_get_handler_data(desc);
 499         struct ocelot_pinctrl *info = gpiochip_get_data(chip);
 500         unsigned int reg = 0, irq;
 501         unsigned long irqs;
 502
 503         regmap_read(info->map, OCELOT_GPIO_INTR_IDENT, &reg);
 504         if (!reg)
 505                 return;
 506
 507         chained_irq_enter(parent_chip, desc);
 508
 509         irqs = reg;
 510
 511         for_each_set_bit(irq, &irqs, OCELOT_PINS) {
 512                 generic_handle_irq(irq_linear_revmap(chip->irq.domain, irq));
 513         }
 514
 515         chained_irq_exit(parent_chip, desc);
 516 }
 517
 518 static int ocelot_gpiochip_register(struct platform_device *pdev,
 519                                     struct ocelot_pinctrl *info)
 520 {
 521         struct gpio_chip *gc;
 522         int ret, irq;
 523
 524         info->gpio_chip = ocelot_gpiolib_chip;
 525
 526         gc = &info->gpio_chip;
 527         gc->ngpio = OCELOT_PINS;
 528         gc->parent = &pdev->dev;
 529         gc->base = 0;
 530         gc->of_node = info->dev->of_node;
 531         gc->label = "ocelot-gpio";
 532
 533         ret = devm_gpiochip_add_data(&pdev->dev, gc, info);
 534         if (ret)
 535                 return ret;
 536
 537         irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
 538         if (irq <= 0)
 539                 return irq;
 540
 541         ret = gpiochip_irqchip_add(gc, &ocelot_irqchip, 0, handle_edge_irq,
 542                                    IRQ_TYPE_NONE);
 543         if (ret)
 544                 return ret;
 545
 546         gpiochip_set_chained_irqchip(gc, &ocelot_irqchip, irq,
 547                                      ocelot_irq_handler);
 548
 549         return 0;
 550 }
 551
 552 static const struct regmap_config ocelot_pinctrl_regmap_config = {
 553         .reg_bits = 32,
 554         .val_bits = 32,
 555         .reg_stride = 4,
 556         .max_register = 0x64,
 557 };
 558
 559 static const struct of_device_id ocelot_pinctrl_of_match[] = {
 560         { .compatible = "mscc,ocelot-pinctrl" },
 561         {},
 562 };
 563
 564 static int ocelot_pinctrl_probe(struct platform_device *pdev)
 565 {
 566         struct device *dev = &pdev->dev;
 567         struct ocelot_pinctrl *info;
 568         void __iomem *base;
 569         int ret;
 570
 571         info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
 572         if (!info)
 573                 return -ENOMEM;
 574
 575         base = devm_ioremap_resource(dev,
 576                         platform_get_resource(pdev, IORESOURCE_MEM, 0));
 577         if (IS_ERR(base)) {
 578                 dev_err(dev, "Failed to ioremap registers\n");
 579                 return PTR_ERR(base);
 580         }
 581
 582         info->map = devm_regmap_init_mmio(dev, base,
 583                                           &ocelot_pinctrl_regmap_config);
 584         if (IS_ERR(info->map)) {
 585                 dev_err(dev, "Failed to create regmap\n");
 586                 return PTR_ERR(info->map);
 587         }
 588         dev_set_drvdata(dev, info->map);
 589         info->dev = dev;
 590
 591         ret = ocelot_pinctrl_register(pdev, info);
 592         if (ret)
 593                 return ret;
 594
 595         ret = ocelot_gpiochip_register(pdev, info);
 596         if (ret)
 597                 return ret;
 598
 599         return 0;
 600 }
 601
 602 static struct platform_driver ocelot_pinctrl_driver = {
 603         .driver = {
 604                 .name = "pinctrl-ocelot",
 605                 .of_match_table = of_match_ptr(ocelot_pinctrl_of_match),
 606                 .suppress_bind_attrs = true,
 607         },
 608         .probe = ocelot_pinctrl_probe,
 609 };
 610 builtin_platform_driver(ocelot_pinctrl_driver);