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Linux 4.19.133
[linux/fpc-iii.git] / drivers / power / avs / smartreflex.c
blob8760477d0e8af2db32ee1435a722c8accc6e0e96
1 /*
2 * OMAP SmartReflex Voltage Control
3 *
4 * Author: Thara Gopinath <thara@ti.com>
5 *
6 * Copyright (C) 2012 Texas Instruments, Inc.
7 * Thara Gopinath <thara@ti.com>
8 *
9 * Copyright (C) 2008 Nokia Corporation
10 * Kalle Jokiniemi
11 *
12 * Copyright (C) 2007 Texas Instruments, Inc.
13 * Lesly A M <x0080970@ti.com>
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
19
20 #include <linux/module.h>
21 #include <linux/mod_devicetable.h>
22 #include <linux/interrupt.h>
23 #include <linux/clk.h>
24 #include <linux/io.h>
25 #include <linux/debugfs.h>
26 #include <linux/delay.h>
27 #include <linux/slab.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/power/smartreflex.h>
30
31 #define DRIVER_NAME "smartreflex"
32 #define SMARTREFLEX_NAME_LEN 32
33 #define NVALUE_NAME_LEN 40
34 #define SR_DISABLE_TIMEOUT 200
35
36 /* sr_list contains all the instances of smartreflex module */
37 static LIST_HEAD(sr_list);
38
39 static struct omap_sr_class_data *sr_class;
40 static struct omap_sr_pmic_data *sr_pmic_data;
41 static struct dentry *sr_dbg_dir;
42
43 static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
44 {
45 __raw_writel(value, (sr->base + offset));
46 }
47
48 static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
49 u32 value)
50 {
51 u32 reg_val;
52
53 /*
54 * Smartreflex error config register is special as it contains
55 * certain status bits which if written a 1 into means a clear
56 * of those bits. So in order to make sure no accidental write of
57 * 1 happens to those status bits, do a clear of them in the read
58 * value. This mean this API doesn't rewrite values in these bits
59 * if they are currently set, but does allow the caller to write
60 * those bits.
61 */
62 if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
63 mask |= ERRCONFIG_STATUS_V1_MASK;
64 else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
65 mask |= ERRCONFIG_VPBOUNDINTST_V2;
66
67 reg_val = __raw_readl(sr->base + offset);
68 reg_val &= ~mask;
69
70 value &= mask;
71
72 reg_val |= value;
73
74 __raw_writel(reg_val, (sr->base + offset));
75 }
76
77 static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
78 {
79 return __raw_readl(sr->base + offset);
80 }
81
82 static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
83 {
84 struct omap_sr *sr_info;
85
86 if (!voltdm) {
87 pr_err("%s: Null voltage domain passed!\n", __func__);
88 return ERR_PTR(-EINVAL);
89 }
90
91 list_for_each_entry(sr_info, &sr_list, node) {
92 if (voltdm == sr_info->voltdm)
93 return sr_info;
94 }
95
96 return ERR_PTR(-ENODATA);
97 }
98
99 static irqreturn_t sr_interrupt(int irq, void *data)
100 {
101 struct omap_sr *sr_info = data;
102 u32 status = 0;
103
104 switch (sr_info->ip_type) {
105 case SR_TYPE_V1:
106 /* Read the status bits */
107 status = sr_read_reg(sr_info, ERRCONFIG_V1);
108
109 /* Clear them by writing back */
110 sr_write_reg(sr_info, ERRCONFIG_V1, status);
111 break;
112 case SR_TYPE_V2:
113 /* Read the status bits */
114 status = sr_read_reg(sr_info, IRQSTATUS);
115
116 /* Clear them by writing back */
117 sr_write_reg(sr_info, IRQSTATUS, status);
118 break;
119 default:
120 dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
121 sr_info->ip_type);
122 return IRQ_NONE;
123 }
124
125 if (sr_class->notify)
126 sr_class->notify(sr_info, status);
127
128 return IRQ_HANDLED;
129 }
130
131 static void sr_set_clk_length(struct omap_sr *sr)
132 {
133 struct clk *fck;
134 u32 fclk_speed;
135
136 /* Try interconnect target module fck first if it already exists */
137 fck = clk_get(sr->pdev->dev.parent, "fck");
138 if (IS_ERR(fck)) {
139 fck = clk_get(&sr->pdev->dev, "fck");
140 if (IS_ERR(fck)) {
141 dev_err(&sr->pdev->dev,
142 "%s: unable to get fck for device %s\n",
143 __func__, dev_name(&sr->pdev->dev));
144 return;
145 }
146 }
147
148 fclk_speed = clk_get_rate(fck);
149 clk_put(fck);
150
151 switch (fclk_speed) {
152 case 12000000:
153 sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
154 break;
155 case 13000000:
156 sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
157 break;
158 case 19200000:
159 sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
160 break;
161 case 26000000:
162 sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
163 break;
164 case 38400000:
165 sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
166 break;
167 default:
168 dev_err(&sr->pdev->dev, "%s: Invalid fclk rate: %d\n",
169 __func__, fclk_speed);
170 break;
171 }
172 }
173
174 static void sr_start_vddautocomp(struct omap_sr *sr)
175 {
176 if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
177 dev_warn(&sr->pdev->dev,
178 "%s: smartreflex class driver not registered\n",
179 __func__);
180 return;
181 }
182
183 if (!sr_class->enable(sr))
184 sr->autocomp_active = true;
185 }
186
187 static void sr_stop_vddautocomp(struct omap_sr *sr)
188 {
189 if (!sr_class || !(sr_class->disable)) {
190 dev_warn(&sr->pdev->dev,
191 "%s: smartreflex class driver not registered\n",
192 __func__);
193 return;
194 }
195
196 if (sr->autocomp_active) {
197 sr_class->disable(sr, 1);
198 sr->autocomp_active = false;
199 }
200 }
201
202 /*
203 * This function handles the initializations which have to be done
204 * only when both sr device and class driver regiter has
205 * completed. This will be attempted to be called from both sr class
206 * driver register and sr device intializtion API's. Only one call
207 * will ultimately succeed.
208 *
209 * Currently this function registers interrupt handler for a particular SR
210 * if smartreflex class driver is already registered and has
211 * requested for interrupts and the SR interrupt line in present.
212 */
213 static int sr_late_init(struct omap_sr *sr_info)
214 {
215 struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
216 int ret = 0;
217
218 if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
219 ret = devm_request_irq(&sr_info->pdev->dev, sr_info->irq,
220 sr_interrupt, 0, sr_info->name, sr_info);
221 if (ret)
222 goto error;
223 disable_irq(sr_info->irq);
224 }
225
226 if (pdata && pdata->enable_on_init)
227 sr_start_vddautocomp(sr_info);
228
229 return ret;
230
231 error:
232 list_del(&sr_info->node);
233 dev_err(&sr_info->pdev->dev, "%s: ERROR in registering interrupt handler. Smartreflex will not function as desired\n",
234 __func__);
235
236 return ret;
237 }
238
239 static void sr_v1_disable(struct omap_sr *sr)
240 {
241 int timeout = 0;
242 int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
243 ERRCONFIG_MCUBOUNDINTST;
244
245 /* Enable MCUDisableAcknowledge interrupt */
246 sr_modify_reg(sr, ERRCONFIG_V1,
247 ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
248
249 /* SRCONFIG - disable SR */
250 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
251
252 /* Disable all other SR interrupts and clear the status as needed */
253 if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
254 errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
255 sr_modify_reg(sr, ERRCONFIG_V1,
256 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
257 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
258 errconf_val);
259
260 /*
261 * Wait for SR to be disabled.
262 * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
263 */
264 sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
265 ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
266 timeout);
267
268 if (timeout >= SR_DISABLE_TIMEOUT)
269 dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
270 __func__);
271
272 /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
273 sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
274 ERRCONFIG_MCUDISACKINTST);
275 }
276
277 static void sr_v2_disable(struct omap_sr *sr)
278 {
279 int timeout = 0;
280
281 /* Enable MCUDisableAcknowledge interrupt */
282 sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
283
284 /* SRCONFIG - disable SR */
285 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
286
287 /*
288 * Disable all other SR interrupts and clear the status
289 * write to status register ONLY on need basis - only if status
290 * is set.
291 */
292 if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
293 sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
294 ERRCONFIG_VPBOUNDINTST_V2);
295 else
296 sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
297 0x0);
298 sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
299 IRQENABLE_MCUVALIDINT |
300 IRQENABLE_MCUBOUNDSINT));
301 sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
302 IRQSTATUS_MCVALIDINT |
303 IRQSTATUS_MCBOUNDSINT));
304
305 /*
306 * Wait for SR to be disabled.
307 * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
308 */
309 sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) &
310 IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
311 timeout);
312
313 if (timeout >= SR_DISABLE_TIMEOUT)
314 dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
315 __func__);
316
317 /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
318 sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
319 sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
320 }
321
322 static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row(
323 struct omap_sr *sr, u32 efuse_offs)
324 {
325 int i;
326
327 if (!sr->nvalue_table) {
328 dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
329 __func__);
330 return NULL;
331 }
332
333 for (i = 0; i < sr->nvalue_count; i++) {
334 if (sr->nvalue_table[i].efuse_offs == efuse_offs)
335 return &sr->nvalue_table[i];
336 }
337
338 return NULL;
339 }
340
341 /* Public Functions */
342
343 /**
344 * sr_configure_errgen() - Configures the SmartReflex to perform AVS using the
345 * error generator module.
346 * @sr: SR module to be configured.
347 *
348 * This API is to be called from the smartreflex class driver to
349 * configure the error generator module inside the smartreflex module.
350 * SR settings if using the ERROR module inside Smartreflex.
351 * SR CLASS 3 by default uses only the ERROR module where as
352 * SR CLASS 2 can choose between ERROR module and MINMAXAVG
353 * module. Returns 0 on success and error value in case of failure.
354 */
355 int sr_configure_errgen(struct omap_sr *sr)
356 {
357 u32 sr_config, sr_errconfig, errconfig_offs;
358 u32 vpboundint_en, vpboundint_st;
359 u32 senp_en = 0, senn_en = 0;
360 u8 senp_shift, senn_shift;
361
362 if (!sr) {
363 pr_warn("%s: NULL omap_sr from %pS\n",
364 __func__, (void *)_RET_IP_);
365 return -EINVAL;
366 }
367
368 if (!sr->clk_length)
369 sr_set_clk_length(sr);
370
371 senp_en = sr->senp_mod;
372 senn_en = sr->senn_mod;
373
374 sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
375 SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
376
377 switch (sr->ip_type) {
378 case SR_TYPE_V1:
379 sr_config |= SRCONFIG_DELAYCTRL;
380 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
381 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
382 errconfig_offs = ERRCONFIG_V1;
383 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
384 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
385 break;
386 case SR_TYPE_V2:
387 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
388 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
389 errconfig_offs = ERRCONFIG_V2;
390 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
391 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
392 break;
393 default:
394 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
395 __func__);
396 return -EINVAL;
397 }
398
399 sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
400 sr_write_reg(sr, SRCONFIG, sr_config);
401 sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
402 (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
403 (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
404 sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
405 SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
406 sr_errconfig);
407
408 /* Enabling the interrupts if the ERROR module is used */
409 sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
410 vpboundint_en);
411
412 return 0;
413 }
414
415 /**
416 * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
417 * @sr: SR module to be configured.
418 *
419 * This API is to be called from the smartreflex class driver to
420 * disable the error generator module inside the smartreflex module.
421 *
422 * Returns 0 on success and error value in case of failure.
423 */
424 int sr_disable_errgen(struct omap_sr *sr)
425 {
426 u32 errconfig_offs;
427 u32 vpboundint_en, vpboundint_st;
428
429 if (!sr) {
430 pr_warn("%s: NULL omap_sr from %pS\n",
431 __func__, (void *)_RET_IP_);
432 return -EINVAL;
433 }
434
435 switch (sr->ip_type) {
436 case SR_TYPE_V1:
437 errconfig_offs = ERRCONFIG_V1;
438 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
439 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
440 break;
441 case SR_TYPE_V2:
442 errconfig_offs = ERRCONFIG_V2;
443 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
444 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
445 break;
446 default:
447 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
448 __func__);
449 return -EINVAL;
450 }
451
452 /* Disable the Sensor and errorgen */
453 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
454
455 /*
456 * Disable the interrupts of ERROR module
457 * NOTE: modify is a read, modify,write - an implicit OCP barrier
458 * which is required is present here - sequencing is critical
459 * at this point (after errgen is disabled, vpboundint disable)
460 */
461 sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
462
463 return 0;
464 }
465
466 /**
467 * sr_configure_minmax() - Configures the SmartReflex to perform AVS using the
468 * minmaxavg module.
469 * @sr: SR module to be configured.
470 *
471 * This API is to be called from the smartreflex class driver to
472 * configure the minmaxavg module inside the smartreflex module.
473 * SR settings if using the ERROR module inside Smartreflex.
474 * SR CLASS 3 by default uses only the ERROR module where as
475 * SR CLASS 2 can choose between ERROR module and MINMAXAVG
476 * module. Returns 0 on success and error value in case of failure.
477 */
478 int sr_configure_minmax(struct omap_sr *sr)
479 {
480 u32 sr_config, sr_avgwt;
481 u32 senp_en = 0, senn_en = 0;
482 u8 senp_shift, senn_shift;
483
484 if (!sr) {
485 pr_warn("%s: NULL omap_sr from %pS\n",
486 __func__, (void *)_RET_IP_);
487 return -EINVAL;
488 }
489
490 if (!sr->clk_length)
491 sr_set_clk_length(sr);
492
493 senp_en = sr->senp_mod;
494 senn_en = sr->senn_mod;
495
496 sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
497 SRCONFIG_SENENABLE |
498 (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
499
500 switch (sr->ip_type) {
501 case SR_TYPE_V1:
502 sr_config |= SRCONFIG_DELAYCTRL;
503 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
504 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
505 break;
506 case SR_TYPE_V2:
507 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
508 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
509 break;
510 default:
511 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
512 __func__);
513 return -EINVAL;
514 }
515
516 sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
517 sr_write_reg(sr, SRCONFIG, sr_config);
518 sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
519 (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
520 sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
521
522 /*
523 * Enabling the interrupts if MINMAXAVG module is used.
524 * TODO: check if all the interrupts are mandatory
525 */
526 switch (sr->ip_type) {
527 case SR_TYPE_V1:
528 sr_modify_reg(sr, ERRCONFIG_V1,
529 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
530 ERRCONFIG_MCUBOUNDINTEN),
531 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
532 ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
533 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
534 break;
535 case SR_TYPE_V2:
536 sr_write_reg(sr, IRQSTATUS,
537 IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
538 IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
539 sr_write_reg(sr, IRQENABLE_SET,
540 IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
541 IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
542 break;
543 default:
544 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
545 __func__);
546 return -EINVAL;
547 }
548
549 return 0;
550 }
551
552 /**
553 * sr_enable() - Enables the smartreflex module.
554 * @sr: pointer to which the SR module to be configured belongs to.
555 * @volt: The voltage at which the Voltage domain associated with
556 * the smartreflex module is operating at.
557 * This is required only to program the correct Ntarget value.
558 *
559 * This API is to be called from the smartreflex class driver to
560 * enable a smartreflex module. Returns 0 on success. Returns error
561 * value if the voltage passed is wrong or if ntarget value is wrong.
562 */
563 int sr_enable(struct omap_sr *sr, unsigned long volt)
564 {
565 struct omap_volt_data *volt_data;
566 struct omap_sr_nvalue_table *nvalue_row;
567 int ret;
568
569 if (!sr) {
570 pr_warn("%s: NULL omap_sr from %pS\n",
571 __func__, (void *)_RET_IP_);
572 return -EINVAL;
573 }
574
575 volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
576
577 if (IS_ERR(volt_data)) {
578 dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table for nominal voltage %ld\n",
579 __func__, volt);
580 return PTR_ERR(volt_data);
581 }
582
583 nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs);
584
585 if (!nvalue_row) {
586 dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n",
587 __func__, volt);
588 return -ENODATA;
589 }
590
591 /* errminlimit is opp dependent and hence linked to voltage */
592 sr->err_minlimit = nvalue_row->errminlimit;
593
594 pm_runtime_get_sync(&sr->pdev->dev);
595
596 /* Check if SR is already enabled. If yes do nothing */
597 if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
598 return 0;
599
600 /* Configure SR */
601 ret = sr_class->configure(sr);
602 if (ret)
603 return ret;
604
605 sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
606
607 /* SRCONFIG - enable SR */
608 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
609 return 0;
610 }
611
612 /**
613 * sr_disable() - Disables the smartreflex module.
614 * @sr: pointer to which the SR module to be configured belongs to.
615 *
616 * This API is to be called from the smartreflex class driver to
617 * disable a smartreflex module.
618 */
619 void sr_disable(struct omap_sr *sr)
620 {
621 if (!sr) {
622 pr_warn("%s: NULL omap_sr from %pS\n",
623 __func__, (void *)_RET_IP_);
624 return;
625 }
626
627 /* Check if SR clocks are already disabled. If yes do nothing */
628 if (pm_runtime_suspended(&sr->pdev->dev))
629 return;
630
631 /*
632 * Disable SR if only it is indeed enabled. Else just
633 * disable the clocks.
634 */
635 if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
636 switch (sr->ip_type) {
637 case SR_TYPE_V1:
638 sr_v1_disable(sr);
639 break;
640 case SR_TYPE_V2:
641 sr_v2_disable(sr);
642 break;
643 default:
644 dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
645 sr->ip_type);
646 }
647 }
648
649 pm_runtime_put_sync_suspend(&sr->pdev->dev);
650 }
651
652 /**
653 * sr_register_class() - API to register a smartreflex class parameters.
654 * @class_data: The structure containing various sr class specific data.
655 *
656 * This API is to be called by the smartreflex class driver to register itself
657 * with the smartreflex driver during init. Returns 0 on success else the
658 * error value.
659 */
660 int sr_register_class(struct omap_sr_class_data *class_data)
661 {
662 struct omap_sr *sr_info;
663
664 if (!class_data) {
665 pr_warn("%s:, Smartreflex class data passed is NULL\n",
666 __func__);
667 return -EINVAL;
668 }
669
670 if (sr_class) {
671 pr_warn("%s: Smartreflex class driver already registered\n",
672 __func__);
673 return -EBUSY;
674 }
675
676 sr_class = class_data;
677
678 /*
679 * Call into late init to do initializations that require
680 * both sr driver and sr class driver to be initiallized.
681 */
682 list_for_each_entry(sr_info, &sr_list, node)
683 sr_late_init(sr_info);
684
685 return 0;
686 }
687
688 /**
689 * omap_sr_enable() - API to enable SR clocks and to call into the
690 * registered smartreflex class enable API.
691 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
692 *
693 * This API is to be called from the kernel in order to enable
694 * a particular smartreflex module. This API will do the initial
695 * configurations to turn on the smartreflex module and in turn call
696 * into the registered smartreflex class enable API.
697 */
698 void omap_sr_enable(struct voltagedomain *voltdm)
699 {
700 struct omap_sr *sr = _sr_lookup(voltdm);
701
702 if (IS_ERR(sr)) {
703 pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
704 return;
705 }
706
707 if (!sr->autocomp_active)
708 return;
709
710 if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
711 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
712 __func__);
713 return;
714 }
715
716 sr_class->enable(sr);
717 }
718
719 /**
720 * omap_sr_disable() - API to disable SR without resetting the voltage
721 * processor voltage
722 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
723 *
724 * This API is to be called from the kernel in order to disable
725 * a particular smartreflex module. This API will in turn call
726 * into the registered smartreflex class disable API. This API will tell
727 * the smartreflex class disable not to reset the VP voltage after
728 * disabling smartreflex.
729 */
730 void omap_sr_disable(struct voltagedomain *voltdm)
731 {
732 struct omap_sr *sr = _sr_lookup(voltdm);
733
734 if (IS_ERR(sr)) {
735 pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
736 return;
737 }
738
739 if (!sr->autocomp_active)
740 return;
741
742 if (!sr_class || !(sr_class->disable)) {
743 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
744 __func__);
745 return;
746 }
747
748 sr_class->disable(sr, 0);
749 }
750
751 /**
752 * omap_sr_disable_reset_volt() - API to disable SR and reset the
753 * voltage processor voltage
754 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
755 *
756 * This API is to be called from the kernel in order to disable
757 * a particular smartreflex module. This API will in turn call
758 * into the registered smartreflex class disable API. This API will tell
759 * the smartreflex class disable to reset the VP voltage after
760 * disabling smartreflex.
761 */
762 void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
763 {
764 struct omap_sr *sr = _sr_lookup(voltdm);
765
766 if (IS_ERR(sr)) {
767 pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
768 return;
769 }
770
771 if (!sr->autocomp_active)
772 return;
773
774 if (!sr_class || !(sr_class->disable)) {
775 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
776 __func__);
777 return;
778 }
779
780 sr_class->disable(sr, 1);
781 }
782
783 /**
784 * omap_sr_register_pmic() - API to register pmic specific info.
785 * @pmic_data: The structure containing pmic specific data.
786 *
787 * This API is to be called from the PMIC specific code to register with
788 * smartreflex driver pmic specific info. Currently the only info required
789 * is the smartreflex init on the PMIC side.
790 */
791 void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
792 {
793 if (!pmic_data) {
794 pr_warn("%s: Trying to register NULL PMIC data structure with smartreflex\n",
795 __func__);
796 return;
797 }
798
799 sr_pmic_data = pmic_data;
800 }
801
802 /* PM Debug FS entries to enable and disable smartreflex. */
803 static int omap_sr_autocomp_show(void *data, u64 *val)
804 {
805 struct omap_sr *sr_info = data;
806
807 if (!sr_info) {
808 pr_warn("%s: omap_sr struct not found\n", __func__);
809 return -EINVAL;
810 }
811
812 *val = sr_info->autocomp_active;
813
814 return 0;
815 }
816
817 static int omap_sr_autocomp_store(void *data, u64 val)
818 {
819 struct omap_sr *sr_info = data;
820
821 if (!sr_info) {
822 pr_warn("%s: omap_sr struct not found\n", __func__);
823 return -EINVAL;
824 }
825
826 /* Sanity check */
827 if (val > 1) {
828 pr_warn("%s: Invalid argument %lld\n", __func__, val);
829 return -EINVAL;
830 }
831
832 /* control enable/disable only if there is a delta in value */
833 if (sr_info->autocomp_active != val) {
834 if (!val)
835 sr_stop_vddautocomp(sr_info);
836 else
837 sr_start_vddautocomp(sr_info);
838 }
839
840 return 0;
841 }
842
843 DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
844 omap_sr_autocomp_store, "%llu\n");
845
846 static int omap_sr_probe(struct platform_device *pdev)
847 {
848 struct omap_sr *sr_info;
849 struct omap_sr_data *pdata = pdev->dev.platform_data;
850 struct resource *mem, *irq;
851 struct dentry *nvalue_dir;
852 int i, ret = 0;
853
854 sr_info = devm_kzalloc(&pdev->dev, sizeof(struct omap_sr), GFP_KERNEL);
855 if (!sr_info)
856 return -ENOMEM;
857
858 sr_info->name = devm_kzalloc(&pdev->dev,
859 SMARTREFLEX_NAME_LEN, GFP_KERNEL);
860 if (!sr_info->name)
861 return -ENOMEM;
862
863 platform_set_drvdata(pdev, sr_info);
864
865 if (!pdata) {
866 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
867 return -EINVAL;
868 }
869
870 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
871 sr_info->base = devm_ioremap_resource(&pdev->dev, mem);
872 if (IS_ERR(sr_info->base)) {
873 dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
874 return PTR_ERR(sr_info->base);
875 }
876
877 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
878
879 pm_runtime_enable(&pdev->dev);
880 pm_runtime_irq_safe(&pdev->dev);
881
882 snprintf(sr_info->name, SMARTREFLEX_NAME_LEN, "%s", pdata->name);
883
884 sr_info->pdev = pdev;
885 sr_info->srid = pdev->id;
886 sr_info->voltdm = pdata->voltdm;
887 sr_info->nvalue_table = pdata->nvalue_table;
888 sr_info->nvalue_count = pdata->nvalue_count;
889 sr_info->senn_mod = pdata->senn_mod;
890 sr_info->senp_mod = pdata->senp_mod;
891 sr_info->err_weight = pdata->err_weight;
892 sr_info->err_maxlimit = pdata->err_maxlimit;
893 sr_info->accum_data = pdata->accum_data;
894 sr_info->senn_avgweight = pdata->senn_avgweight;
895 sr_info->senp_avgweight = pdata->senp_avgweight;
896 sr_info->autocomp_active = false;
897 sr_info->ip_type = pdata->ip_type;
898
899 if (irq)
900 sr_info->irq = irq->start;
901
902 sr_set_clk_length(sr_info);
903
904 list_add(&sr_info->node, &sr_list);
905
906 ret = pm_runtime_get_sync(&pdev->dev);
907 if (ret < 0) {
908 pm_runtime_put_noidle(&pdev->dev);
909 goto err_list_del;
910 }
911
912 /*
913 * Call into late init to do initializations that require
914 * both sr driver and sr class driver to be initiallized.
915 */
916 if (sr_class) {
917 ret = sr_late_init(sr_info);
918 if (ret) {
919 pr_warn("%s: Error in SR late init\n", __func__);
920 goto err_list_del;
921 }
922 }
923
924 dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
925 if (!sr_dbg_dir) {
926 sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
927 if (IS_ERR_OR_NULL(sr_dbg_dir)) {
928 ret = PTR_ERR(sr_dbg_dir);
929 pr_err("%s:sr debugfs dir creation failed(%d)\n",
930 __func__, ret);
931 goto err_list_del;
932 }
933 }
934
935 sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir);
936 if (IS_ERR_OR_NULL(sr_info->dbg_dir)) {
937 dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
938 __func__);
939 ret = PTR_ERR(sr_info->dbg_dir);
940 goto err_debugfs;
941 }
942
943 (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
944 sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops);
945 (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
946 &sr_info->err_weight);
947 (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
948 &sr_info->err_maxlimit);
949
950 nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
951 if (IS_ERR_OR_NULL(nvalue_dir)) {
952 dev_err(&pdev->dev, "%s: Unable to create debugfs directory for n-values\n",
953 __func__);
954 ret = PTR_ERR(nvalue_dir);
955 goto err_debugfs;
956 }
957
958 if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) {
959 dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n",
960 __func__, sr_info->name);
961
962 ret = -ENODATA;
963 goto err_debugfs;
964 }
965
966 for (i = 0; i < sr_info->nvalue_count; i++) {
967 char name[NVALUE_NAME_LEN + 1];
968
969 snprintf(name, sizeof(name), "volt_%lu",
970 sr_info->nvalue_table[i].volt_nominal);
971 (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
972 &(sr_info->nvalue_table[i].nvalue));
973 snprintf(name, sizeof(name), "errminlimit_%lu",
974 sr_info->nvalue_table[i].volt_nominal);
975 (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
976 &(sr_info->nvalue_table[i].errminlimit));
977
978 }
979
980 pm_runtime_put_sync(&pdev->dev);
981
982 return ret;
983
984 err_debugfs:
985 debugfs_remove_recursive(sr_info->dbg_dir);
986 err_list_del:
987 list_del(&sr_info->node);
988
989 pm_runtime_put_sync(&pdev->dev);
990
991 return ret;
992 }
993
994 static int omap_sr_remove(struct platform_device *pdev)
995 {
996 struct omap_sr_data *pdata = pdev->dev.platform_data;
997 struct omap_sr *sr_info;
998
999 if (!pdata) {
1000 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
1001 return -EINVAL;
1002 }
1003
1004 sr_info = _sr_lookup(pdata->voltdm);
1005 if (IS_ERR(sr_info)) {
1006 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
1007 __func__);
1008 return PTR_ERR(sr_info);
1009 }
1010
1011 if (sr_info->autocomp_active)
1012 sr_stop_vddautocomp(sr_info);
1013 debugfs_remove_recursive(sr_info->dbg_dir);
1014
1015 pm_runtime_disable(&pdev->dev);
1016 list_del(&sr_info->node);
1017 return 0;
1018 }
1019
1020 static void omap_sr_shutdown(struct platform_device *pdev)
1021 {
1022 struct omap_sr_data *pdata = pdev->dev.platform_data;
1023 struct omap_sr *sr_info;
1024
1025 if (!pdata) {
1026 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
1027 return;
1028 }
1029
1030 sr_info = _sr_lookup(pdata->voltdm);
1031 if (IS_ERR(sr_info)) {
1032 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
1033 __func__);
1034 return;
1035 }
1036
1037 if (sr_info->autocomp_active)
1038 sr_stop_vddautocomp(sr_info);
1039
1040 return;
1041 }
1042
1043 static const struct of_device_id omap_sr_match[] = {
1044 { .compatible = "ti,omap3-smartreflex-core", },
1045 { .compatible = "ti,omap3-smartreflex-mpu-iva", },
1046 { .compatible = "ti,omap4-smartreflex-core", },
1047 { .compatible = "ti,omap4-smartreflex-mpu", },
1048 { .compatible = "ti,omap4-smartreflex-iva", },
1049 { },
1050 };
1051 MODULE_DEVICE_TABLE(of, omap_sr_match);
1052
1053 static struct platform_driver smartreflex_driver = {
1054 .probe = omap_sr_probe,
1055 .remove = omap_sr_remove,
1056 .shutdown = omap_sr_shutdown,
1057 .driver = {
1058 .name = DRIVER_NAME,
1059 .of_match_table = omap_sr_match,
1060 },
1061 };
1062
1063 static int __init sr_init(void)
1064 {
1065 int ret = 0;
1066
1067 /*
1068 * sr_init is a late init. If by then a pmic specific API is not
1069 * registered either there is no need for anything to be done on
1070 * the PMIC side or somebody has forgotten to register a PMIC
1071 * handler. Warn for the second condition.
1072 */
1073 if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
1074 sr_pmic_data->sr_pmic_init();
1075 else
1076 pr_warn("%s: No PMIC hook to init smartreflex\n", __func__);
1077
1078 ret = platform_driver_register(&smartreflex_driver);
1079 if (ret) {
1080 pr_err("%s: platform driver register failed for SR\n",
1081 __func__);
1082 return ret;
1083 }
1084
1085 return 0;
1086 }
1087 late_initcall(sr_init);
1088
1089 static void __exit sr_exit(void)
1090 {
1091 platform_driver_unregister(&smartreflex_driver);
1092 }
1093 module_exit(sr_exit);
1094
1095 MODULE_DESCRIPTION("OMAP Smartreflex Driver");
1096 MODULE_LICENSE("GPL");
1097 MODULE_ALIAS("platform:" DRIVER_NAME);
1098 MODULE_AUTHOR("Texas Instruments Inc");
Linux with added FPC-III support