1 config ARCH_HAS_RESET_CONTROLLER
4 menuconfig RESET_CONTROLLER
5 bool "Reset Controller Support"
6 default y if ARCH_HAS_RESET_CONTROLLER
8 Generic Reset Controller support.
10 This framework is designed to abstract reset handling of devices
11 via GPIOs or SoC-internal reset controller modules.
18 tristate "Altera Arria10 System Resource Reset"
19 depends on MFD_ALTERA_A10SR
21 This option enables support for the external reset functions for
22 peripheral PHYs on the Altera Arria10 System Resource Chip.
25 bool "AR71xx Reset Driver" if COMPILE_TEST
28 This enables the ATH79 reset controller driver that supports the
29 AR71xx SoC reset controller.
32 bool "AXS10x Reset Driver" if COMPILE_TEST
33 default ARC_PLAT_AXS10X
35 This enables the reset controller driver for AXS10x.
38 bool "Berlin Reset Driver" if COMPILE_TEST
41 This enables the reset controller driver for Marvell Berlin SoCs.
44 bool "Synopsys HSDK Reset Driver"
46 depends on ARC_SOC_HSDK || COMPILE_TEST
48 This enables the reset controller driver for HSDK board.
51 bool "i.MX7 Reset Driver" if COMPILE_TEST
56 This enables the reset controller driver for i.MX7 SoCs.
59 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
62 This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
65 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
68 This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
71 bool "Meson Reset Driver" if COMPILE_TEST
74 This enables the reset driver for Amlogic Meson SoCs.
76 config RESET_MESON_AUDIO_ARB
77 tristate "Meson Audio Memory Arbiter Reset Driver"
78 depends on ARCH_MESON || COMPILE_TEST
80 This enables the reset driver for Audio Memory Arbiter of
81 Amlogic's A113 based SoCs
86 config RESET_PISTACHIO
87 bool "Pistachio Reset Driver" if COMPILE_TEST
88 default MACH_PISTACHIO
90 This enables the reset driver for ImgTec Pistachio SoCs.
92 config RESET_QCOM_AOSS
93 bool "Qcom AOSS Reset Driver"
94 depends on ARCH_QCOM || COMPILE_TEST
96 This enables the AOSS (always on subsystem) reset driver
97 for Qualcomm SDM845 SoCs. Say Y if you want to control
98 reset signals provided by AOSS for Modem, Venus, ADSP,
99 GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
102 bool "Simple Reset Controller Driver" if COMPILE_TEST
103 default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED
105 This enables a simple reset controller driver for reset lines that
106 that can be asserted and deasserted by toggling bits in a contiguous,
107 exclusive register space.
109 Currently this driver supports:
112 - RCC reset controller in STM32 MCUs
114 - ZTE's zx2967 family
116 config RESET_STM32MP157
117 bool "STM32MP157 Reset Driver" if COMPILE_TEST
118 default MACH_STM32MP157
120 This enables the RCC reset controller driver for STM32 MPUs.
123 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
127 This enables the reset driver for Allwinner SoCs.
130 tristate "TI System Control Interface (TI-SCI) reset driver"
131 depends on TI_SCI_PROTOCOL
133 This enables the reset driver support over TI System Control Interface
134 available on some new TI's SoCs. If you wish to use reset resources
135 managed by the TI System Controller, say Y here. Otherwise, say N.
137 config RESET_TI_SYSCON
138 tristate "TI SYSCON Reset Driver"
142 This enables the reset driver support for TI devices with
143 memory-mapped reset registers as part of a syscon device node. If
144 you wish to use the reset framework for such memory-mapped devices,
145 say Y here. Otherwise, say N.
147 config RESET_UNIPHIER
148 tristate "Reset controller driver for UniPhier SoCs"
149 depends on ARCH_UNIPHIER || COMPILE_TEST
150 depends on OF && MFD_SYSCON
151 default ARCH_UNIPHIER
153 Support for reset controllers on UniPhier SoCs.
154 Say Y if you want to control reset signals provided by System Control
155 block, Media I/O block, Peripheral Block.
157 config RESET_UNIPHIER_USB3
158 tristate "USB3 reset driver for UniPhier SoCs"
159 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
160 default ARCH_UNIPHIER
163 Support for the USB3 core reset on UniPhier SoCs.
164 Say Y if you want to control reset signals provided by
168 bool "ZYNQ Reset Driver" if COMPILE_TEST
171 This enables the reset controller driver for Xilinx Zynq SoCs.
173 source "drivers/reset/sti/Kconfig"
174 source "drivers/reset/hisilicon/Kconfig"
175 source "drivers/reset/tegra/Kconfig"