drivers/rtc/rtc-mt6397.c

   1 /*
   2 * Copyright (c) 2014-2015 MediaTek Inc.
   3 * Author: Tianping.Fang <tianping.fang@mediatek.com>
   4 *
   5 * This program is free software; you can redistribute it and/or modify
   6 * it under the terms of the GNU General Public License version 2 as
   7 * published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 * GNU General Public License for more details.
  13 */
  14
  15 #include <linux/delay.h>
  16 #include <linux/init.h>
  17 #include <linux/module.h>
  18 #include <linux/regmap.h>
  19 #include <linux/rtc.h>
  20 #include <linux/irqdomain.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/of_address.h>
  23 #include <linux/of_irq.h>
  24 #include <linux/io.h>
  25 #include <linux/mfd/mt6397/core.h>
  26
  27 #define RTC_BBPU                0x0000
  28 #define RTC_BBPU_CBUSY          BIT(6)
  29
  30 #define RTC_WRTGR               0x003c
  31
  32 #define RTC_IRQ_STA             0x0002
  33 #define RTC_IRQ_STA_AL          BIT(0)
  34 #define RTC_IRQ_STA_LP          BIT(3)
  35
  36 #define RTC_IRQ_EN              0x0004
  37 #define RTC_IRQ_EN_AL           BIT(0)
  38 #define RTC_IRQ_EN_ONESHOT      BIT(2)
  39 #define RTC_IRQ_EN_LP           BIT(3)
  40 #define RTC_IRQ_EN_ONESHOT_AL   (RTC_IRQ_EN_ONESHOT | RTC_IRQ_EN_AL)
  41
  42 #define RTC_AL_MASK             0x0008
  43 #define RTC_AL_MASK_DOW         BIT(4)
  44
  45 #define RTC_TC_SEC              0x000a
  46 /* Min, Hour, Dom... register offset to RTC_TC_SEC */
  47 #define RTC_OFFSET_SEC          0
  48 #define RTC_OFFSET_MIN          1
  49 #define RTC_OFFSET_HOUR         2
  50 #define RTC_OFFSET_DOM          3
  51 #define RTC_OFFSET_DOW          4
  52 #define RTC_OFFSET_MTH          5
  53 #define RTC_OFFSET_YEAR         6
  54 #define RTC_OFFSET_COUNT        7
  55
  56 #define RTC_AL_SEC              0x0018
  57
  58 #define RTC_AL_SEC_MASK         0x003f
  59 #define RTC_AL_MIN_MASK         0x003f
  60 #define RTC_AL_HOU_MASK         0x001f
  61 #define RTC_AL_DOM_MASK         0x001f
  62 #define RTC_AL_DOW_MASK         0x0007
  63 #define RTC_AL_MTH_MASK         0x000f
  64 #define RTC_AL_YEA_MASK         0x007f
  65
  66 #define RTC_PDN2                0x002e
  67 #define RTC_PDN2_PWRON_ALARM    BIT(4)
  68
  69 #define RTC_MIN_YEAR            1968
  70 #define RTC_BASE_YEAR           1900
  71 #define RTC_NUM_YEARS           128
  72 #define RTC_MIN_YEAR_OFFSET     (RTC_MIN_YEAR - RTC_BASE_YEAR)
  73
  74 struct mt6397_rtc {
  75         struct device           *dev;
  76         struct rtc_device       *rtc_dev;
  77         struct mutex            lock;
  78         struct regmap           *regmap;
  79         int                     irq;
  80         u32                     addr_base;
  81 };
  82
  83 static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc)
  84 {
  85         unsigned long timeout = jiffies + HZ;
  86         int ret;
  87         u32 data;
  88
  89         ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_WRTGR, 1);
  90         if (ret < 0)
  91                 return ret;
  92
  93         while (1) {
  94                 ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_BBPU,
  95                                   &data);
  96                 if (ret < 0)
  97                         break;
  98                 if (!(data & RTC_BBPU_CBUSY))
  99                         break;
 100                 if (time_after(jiffies, timeout)) {
 101                         ret = -ETIMEDOUT;
 102                         break;
 103                 }
 104                 cpu_relax();
 105         }
 106
 107         return ret;
 108 }
 109
 110 static irqreturn_t mtk_rtc_irq_handler_thread(int irq, void *data)
 111 {
 112         struct mt6397_rtc *rtc = data;
 113         u32 irqsta, irqen;
 114         int ret;
 115
 116         ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_STA, &irqsta);
 117         if ((ret >= 0) && (irqsta & RTC_IRQ_STA_AL)) {
 118                 rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
 119                 irqen = irqsta & ~RTC_IRQ_EN_AL;
 120                 mutex_lock(&rtc->lock);
 121                 if (regmap_write(rtc->regmap, rtc->addr_base + RTC_IRQ_EN,
 122                                  irqen) == 0)
 123                         mtk_rtc_write_trigger(rtc);
 124                 mutex_unlock(&rtc->lock);
 125
 126                 return IRQ_HANDLED;
 127         }
 128
 129         return IRQ_NONE;
 130 }
 131
 132 static int __mtk_rtc_read_time(struct mt6397_rtc *rtc,
 133                                struct rtc_time *tm, int *sec)
 134 {
 135         int ret;
 136         u16 data[RTC_OFFSET_COUNT];
 137
 138         mutex_lock(&rtc->lock);
 139         ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
 140                                data, RTC_OFFSET_COUNT);
 141         if (ret < 0)
 142                 goto exit;
 143
 144         tm->tm_sec = data[RTC_OFFSET_SEC];
 145         tm->tm_min = data[RTC_OFFSET_MIN];
 146         tm->tm_hour = data[RTC_OFFSET_HOUR];
 147         tm->tm_mday = data[RTC_OFFSET_DOM];
 148         tm->tm_mon = data[RTC_OFFSET_MTH];
 149         tm->tm_year = data[RTC_OFFSET_YEAR];
 150
 151         ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC, sec);
 152 exit:
 153         mutex_unlock(&rtc->lock);
 154         return ret;
 155 }
 156
 157 static int mtk_rtc_read_time(struct device *dev, struct rtc_time *tm)
 158 {
 159         time64_t time;
 160         struct mt6397_rtc *rtc = dev_get_drvdata(dev);
 161         int days, sec, ret;
 162
 163         do {
 164                 ret = __mtk_rtc_read_time(rtc, tm, &sec);
 165                 if (ret < 0)
 166                         goto exit;
 167         } while (sec < tm->tm_sec);
 168
 169         /* HW register use 7 bits to store year data, minus
 170          * RTC_MIN_YEAR_OFFSET before write year data to register, and plus
 171          * RTC_MIN_YEAR_OFFSET back after read year from register
 172          */
 173         tm->tm_year += RTC_MIN_YEAR_OFFSET;
 174
 175         /* HW register start mon from one, but tm_mon start from zero. */
 176         tm->tm_mon--;
 177         time = rtc_tm_to_time64(tm);
 178
 179         /* rtc_tm_to_time64 covert Gregorian date to seconds since
 180          * 01-01-1970 00:00:00, and this date is Thursday.
 181          */
 182         days = div_s64(time, 86400);
 183         tm->tm_wday = (days + 4) % 7;
 184
 185 exit:
 186         return ret;
 187 }
 188
 189 static int mtk_rtc_set_time(struct device *dev, struct rtc_time *tm)
 190 {
 191         struct mt6397_rtc *rtc = dev_get_drvdata(dev);
 192         int ret;
 193         u16 data[RTC_OFFSET_COUNT];
 194
 195         tm->tm_year -= RTC_MIN_YEAR_OFFSET;
 196         tm->tm_mon++;
 197
 198         data[RTC_OFFSET_SEC] = tm->tm_sec;
 199         data[RTC_OFFSET_MIN] = tm->tm_min;
 200         data[RTC_OFFSET_HOUR] = tm->tm_hour;
 201         data[RTC_OFFSET_DOM] = tm->tm_mday;
 202         data[RTC_OFFSET_MTH] = tm->tm_mon;
 203         data[RTC_OFFSET_YEAR] = tm->tm_year;
 204
 205         mutex_lock(&rtc->lock);
 206         ret = regmap_bulk_write(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
 207                                 data, RTC_OFFSET_COUNT);
 208         if (ret < 0)
 209                 goto exit;
 210
 211         /* Time register write to hardware after call trigger function */
 212         ret = mtk_rtc_write_trigger(rtc);
 213
 214 exit:
 215         mutex_unlock(&rtc->lock);
 216         return ret;
 217 }
 218
 219 static int mtk_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
 220 {
 221         struct rtc_time *tm = &alm->time;
 222         struct mt6397_rtc *rtc = dev_get_drvdata(dev);
 223         u32 irqen, pdn2;
 224         int ret;
 225         u16 data[RTC_OFFSET_COUNT];
 226
 227         mutex_lock(&rtc->lock);
 228         ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_EN, &irqen);
 229         if (ret < 0)
 230                 goto err_exit;
 231         ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_PDN2, &pdn2);
 232         if (ret < 0)
 233                 goto err_exit;
 234
 235         ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_AL_SEC,
 236                                data, RTC_OFFSET_COUNT);
 237         if (ret < 0)
 238                 goto err_exit;
 239
 240         alm->enabled = !!(irqen & RTC_IRQ_EN_AL);
 241         alm->pending = !!(pdn2 & RTC_PDN2_PWRON_ALARM);
 242         mutex_unlock(&rtc->lock);
 243
 244         tm->tm_sec = data[RTC_OFFSET_SEC] & RTC_AL_SEC_MASK;
 245         tm->tm_min = data[RTC_OFFSET_MIN] & RTC_AL_MIN_MASK;
 246         tm->tm_hour = data[RTC_OFFSET_HOUR] & RTC_AL_HOU_MASK;
 247         tm->tm_mday = data[RTC_OFFSET_DOM] & RTC_AL_DOM_MASK;
 248         tm->tm_mon = data[RTC_OFFSET_MTH] & RTC_AL_MTH_MASK;
 249         tm->tm_year = data[RTC_OFFSET_YEAR] & RTC_AL_YEA_MASK;
 250
 251         tm->tm_year += RTC_MIN_YEAR_OFFSET;
 252         tm->tm_mon--;
 253
 254         return 0;
 255 err_exit:
 256         mutex_unlock(&rtc->lock);
 257         return ret;
 258 }
 259
 260 static int mtk_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
 261 {
 262         struct rtc_time *tm = &alm->time;
 263         struct mt6397_rtc *rtc = dev_get_drvdata(dev);
 264         int ret;
 265         u16 data[RTC_OFFSET_COUNT];
 266
 267         tm->tm_year -= RTC_MIN_YEAR_OFFSET;
 268         tm->tm_mon++;
 269
 270         mutex_lock(&rtc->lock);
 271         ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_AL_SEC,
 272                                data, RTC_OFFSET_COUNT);
 273         if (ret < 0)
 274                 goto exit;
 275
 276         data[RTC_OFFSET_SEC] = ((data[RTC_OFFSET_SEC] & ~(RTC_AL_SEC_MASK)) |
 277                                 (tm->tm_sec & RTC_AL_SEC_MASK));
 278         data[RTC_OFFSET_MIN] = ((data[RTC_OFFSET_MIN] & ~(RTC_AL_MIN_MASK)) |
 279                                 (tm->tm_min & RTC_AL_MIN_MASK));
 280         data[RTC_OFFSET_HOUR] = ((data[RTC_OFFSET_HOUR] & ~(RTC_AL_HOU_MASK)) |
 281                                 (tm->tm_hour & RTC_AL_HOU_MASK));
 282         data[RTC_OFFSET_DOM] = ((data[RTC_OFFSET_DOM] & ~(RTC_AL_DOM_MASK)) |
 283                                 (tm->tm_mday & RTC_AL_DOM_MASK));
 284         data[RTC_OFFSET_MTH] = ((data[RTC_OFFSET_MTH] & ~(RTC_AL_MTH_MASK)) |
 285                                 (tm->tm_mon & RTC_AL_MTH_MASK));
 286         data[RTC_OFFSET_YEAR] = ((data[RTC_OFFSET_YEAR] & ~(RTC_AL_YEA_MASK)) |
 287                                 (tm->tm_year & RTC_AL_YEA_MASK));
 288
 289         if (alm->enabled) {
 290                 ret = regmap_bulk_write(rtc->regmap,
 291                                         rtc->addr_base + RTC_AL_SEC,
 292                                         data, RTC_OFFSET_COUNT);
 293                 if (ret < 0)
 294                         goto exit;
 295                 ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_AL_MASK,
 296                                    RTC_AL_MASK_DOW);
 297                 if (ret < 0)
 298                         goto exit;
 299                 ret = regmap_update_bits(rtc->regmap,
 300                                          rtc->addr_base + RTC_IRQ_EN,
 301                                          RTC_IRQ_EN_ONESHOT_AL,
 302                                          RTC_IRQ_EN_ONESHOT_AL);
 303                 if (ret < 0)
 304                         goto exit;
 305         } else {
 306                 ret = regmap_update_bits(rtc->regmap,
 307                                          rtc->addr_base + RTC_IRQ_EN,
 308                                          RTC_IRQ_EN_ONESHOT_AL, 0);
 309                 if (ret < 0)
 310                         goto exit;
 311         }
 312
 313         /* All alarm time register write to hardware after calling
 314          * mtk_rtc_write_trigger. This can avoid race condition if alarm
 315          * occur happen during writing alarm time register.
 316          */
 317         ret = mtk_rtc_write_trigger(rtc);
 318 exit:
 319         mutex_unlock(&rtc->lock);
 320         return ret;
 321 }
 322
 323 static const struct rtc_class_ops mtk_rtc_ops = {
 324         .read_time  = mtk_rtc_read_time,
 325         .set_time   = mtk_rtc_set_time,
 326         .read_alarm = mtk_rtc_read_alarm,
 327         .set_alarm  = mtk_rtc_set_alarm,
 328 };
 329
 330 static int mtk_rtc_probe(struct platform_device *pdev)
 331 {
 332         struct resource *res;
 333         struct mt6397_chip *mt6397_chip = dev_get_drvdata(pdev->dev.parent);
 334         struct mt6397_rtc *rtc;
 335         int ret;
 336
 337         rtc = devm_kzalloc(&pdev->dev, sizeof(struct mt6397_rtc), GFP_KERNEL);
 338         if (!rtc)
 339                 return -ENOMEM;
 340
 341         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 342         rtc->addr_base = res->start;
 343
 344         rtc->irq = platform_get_irq(pdev, 0);
 345         if (rtc->irq < 0)
 346                 return rtc->irq;
 347
 348         rtc->regmap = mt6397_chip->regmap;
 349         rtc->dev = &pdev->dev;
 350         mutex_init(&rtc->lock);
 351
 352         platform_set_drvdata(pdev, rtc);
 353
 354         rtc->rtc_dev = devm_rtc_allocate_device(rtc->dev);
 355         if (IS_ERR(rtc->rtc_dev))
 356                 return PTR_ERR(rtc->rtc_dev);
 357
 358         ret = request_threaded_irq(rtc->irq, NULL,
 359                                    mtk_rtc_irq_handler_thread,
 360                                    IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
 361                                    "mt6397-rtc", rtc);
 362         if (ret) {
 363                 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
 364                         rtc->irq, ret);
 365                 return ret;
 366         }
 367
 368         device_init_wakeup(&pdev->dev, 1);
 369
 370         rtc->rtc_dev->ops = &mtk_rtc_ops;
 371
 372         ret = rtc_register_device(rtc->rtc_dev);
 373         if (ret) {
 374                 dev_err(&pdev->dev, "register rtc device failed\n");
 375                 goto out_free_irq;
 376         }
 377
 378         return 0;
 379
 380 out_free_irq:
 381         free_irq(rtc->irq, rtc);
 382         return ret;
 383 }
 384
 385 static int mtk_rtc_remove(struct platform_device *pdev)
 386 {
 387         struct mt6397_rtc *rtc = platform_get_drvdata(pdev);
 388
 389         free_irq(rtc->irq, rtc);
 390
 391         return 0;
 392 }
 393
 394 #ifdef CONFIG_PM_SLEEP
 395 static int mt6397_rtc_suspend(struct device *dev)
 396 {
 397         struct mt6397_rtc *rtc = dev_get_drvdata(dev);
 398
 399         if (device_may_wakeup(dev))
 400                 enable_irq_wake(rtc->irq);
 401
 402         return 0;
 403 }
 404
 405 static int mt6397_rtc_resume(struct device *dev)
 406 {
 407         struct mt6397_rtc *rtc = dev_get_drvdata(dev);
 408
 409         if (device_may_wakeup(dev))
 410                 disable_irq_wake(rtc->irq);
 411
 412         return 0;
 413 }
 414 #endif
 415
 416 static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend,
 417                         mt6397_rtc_resume);
 418
 419 static const struct of_device_id mt6397_rtc_of_match[] = {
 420         { .compatible = "mediatek,mt6397-rtc", },
 421         { }
 422 };
 423 MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match);
 424
 425 static struct platform_driver mtk_rtc_driver = {
 426         .driver = {
 427                 .name = "mt6397-rtc",
 428                 .of_match_table = mt6397_rtc_of_match,
 429                 .pm = &mt6397_pm_ops,
 430         },
 431         .probe  = mtk_rtc_probe,
 432         .remove = mtk_rtc_remove,
 433 };
 434
 435 module_platform_driver(mtk_rtc_driver);
 436
 437 MODULE_LICENSE("GPL v2");
 438 MODULE_AUTHOR("Tianping Fang <tianping.fang@mediatek.com>");
 439 MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC");