drivers/rtc/rtc-pm8xxx.c

   1 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  */
  12 #include <linux/of.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/rtc.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/pm.h>
  18 #include <linux/regmap.h>
  19 #include <linux/slab.h>
  20 #include <linux/spinlock.h>
  21
  22 /* RTC Register offsets from RTC CTRL REG */
  23 #define PM8XXX_ALARM_CTRL_OFFSET        0x01
  24 #define PM8XXX_RTC_WRITE_OFFSET         0x02
  25 #define PM8XXX_RTC_READ_OFFSET          0x06
  26 #define PM8XXX_ALARM_RW_OFFSET          0x0A
  27
  28 /* RTC_CTRL register bit fields */
  29 #define PM8xxx_RTC_ENABLE               BIT(7)
  30 #define PM8xxx_RTC_ALARM_CLEAR          BIT(0)
  31
  32 #define NUM_8_BIT_RTC_REGS              0x4
  33
  34 /**
  35  * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
  36  * @ctrl: base address of control register
  37  * @write: base address of write register
  38  * @read: base address of read register
  39  * @alarm_ctrl: base address of alarm control register
  40  * @alarm_ctrl2: base address of alarm control2 register
  41  * @alarm_rw: base address of alarm read-write register
  42  * @alarm_en: alarm enable mask
  43  */
  44 struct pm8xxx_rtc_regs {
  45         unsigned int ctrl;
  46         unsigned int write;
  47         unsigned int read;
  48         unsigned int alarm_ctrl;
  49         unsigned int alarm_ctrl2;
  50         unsigned int alarm_rw;
  51         unsigned int alarm_en;
  52 };
  53
  54 /**
  55  * struct pm8xxx_rtc -  rtc driver internal structure
  56  * @rtc:                rtc device for this driver.
  57  * @regmap:             regmap used to access RTC registers
  58  * @allow_set_time:     indicates whether writing to the RTC is allowed
  59  * @rtc_alarm_irq:      rtc alarm irq number.
  60  * @ctrl_reg:           rtc control register.
  61  * @rtc_dev:            device structure.
  62  * @ctrl_reg_lock:      spinlock protecting access to ctrl_reg.
  63  */
  64 struct pm8xxx_rtc {
  65         struct rtc_device *rtc;
  66         struct regmap *regmap;
  67         bool allow_set_time;
  68         int rtc_alarm_irq;
  69         const struct pm8xxx_rtc_regs *regs;
  70         struct device *rtc_dev;
  71         spinlock_t ctrl_reg_lock;
  72 };
  73
  74 /*
  75  * Steps to write the RTC registers.
  76  * 1. Disable alarm if enabled.
  77  * 2. Disable rtc if enabled.
  78  * 3. Write 0x00 to LSB.
  79  * 4. Write Byte[1], Byte[2], Byte[3] then Byte[0].
  80  * 5. Enable rtc if disabled in step 2.
  81  * 6. Enable alarm if disabled in step 1.
  82  */
  83 static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
  84 {
  85         int rc, i;
  86         unsigned long secs, irq_flags;
  87         u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0, rtc_disabled = 0;
  88         unsigned int ctrl_reg, rtc_ctrl_reg;
  89         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
  90         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
  91
  92         if (!rtc_dd->allow_set_time)
  93                 return -EACCES;
  94
  95         rtc_tm_to_time(tm, &secs);
  96
  97         dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
  98
  99         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
 100                 value[i] = secs & 0xFF;
 101                 secs >>= 8;
 102         }
 103
 104         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 105
 106         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 107         if (rc)
 108                 goto rtc_rw_fail;
 109
 110         if (ctrl_reg & regs->alarm_en) {
 111                 alarm_enabled = 1;
 112                 ctrl_reg &= ~regs->alarm_en;
 113                 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 114                 if (rc) {
 115                         dev_err(dev, "Write to RTC Alarm control register failed\n");
 116                         goto rtc_rw_fail;
 117                 }
 118         }
 119
 120         /* Disable RTC H/w before writing on RTC register */
 121         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &rtc_ctrl_reg);
 122         if (rc)
 123                 goto rtc_rw_fail;
 124
 125         if (rtc_ctrl_reg & PM8xxx_RTC_ENABLE) {
 126                 rtc_disabled = 1;
 127                 rtc_ctrl_reg &= ~PM8xxx_RTC_ENABLE;
 128                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg);
 129                 if (rc) {
 130                         dev_err(dev, "Write to RTC control register failed\n");
 131                         goto rtc_rw_fail;
 132                 }
 133         }
 134
 135         /* Write 0 to Byte[0] */
 136         rc = regmap_write(rtc_dd->regmap, regs->write, 0);
 137         if (rc) {
 138                 dev_err(dev, "Write to RTC write data register failed\n");
 139                 goto rtc_rw_fail;
 140         }
 141
 142         /* Write Byte[1], Byte[2], Byte[3] */
 143         rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,
 144                                &value[1], sizeof(value) - 1);
 145         if (rc) {
 146                 dev_err(dev, "Write to RTC write data register failed\n");
 147                 goto rtc_rw_fail;
 148         }
 149
 150         /* Write Byte[0] */
 151         rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);
 152         if (rc) {
 153                 dev_err(dev, "Write to RTC write data register failed\n");
 154                 goto rtc_rw_fail;
 155         }
 156
 157         /* Enable RTC H/w after writing on RTC register */
 158         if (rtc_disabled) {
 159                 rtc_ctrl_reg |= PM8xxx_RTC_ENABLE;
 160                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg);
 161                 if (rc) {
 162                         dev_err(dev, "Write to RTC control register failed\n");
 163                         goto rtc_rw_fail;
 164                 }
 165         }
 166
 167         if (alarm_enabled) {
 168                 ctrl_reg |= regs->alarm_en;
 169                 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 170                 if (rc) {
 171                         dev_err(dev, "Write to RTC Alarm control register failed\n");
 172                         goto rtc_rw_fail;
 173                 }
 174         }
 175
 176 rtc_rw_fail:
 177         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 178
 179         return rc;
 180 }
 181
 182 static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
 183 {
 184         int rc;
 185         u8 value[NUM_8_BIT_RTC_REGS];
 186         unsigned long secs;
 187         unsigned int reg;
 188         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 189         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 190
 191         rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));
 192         if (rc) {
 193                 dev_err(dev, "RTC read data register failed\n");
 194                 return rc;
 195         }
 196
 197         /*
 198          * Read the LSB again and check if there has been a carry over.
 199          * If there is, redo the read operation.
 200          */
 201         rc = regmap_read(rtc_dd->regmap, regs->read, &reg);
 202         if (rc < 0) {
 203                 dev_err(dev, "RTC read data register failed\n");
 204                 return rc;
 205         }
 206
 207         if (unlikely(reg < value[0])) {
 208                 rc = regmap_bulk_read(rtc_dd->regmap, regs->read,
 209                                       value, sizeof(value));
 210                 if (rc) {
 211                         dev_err(dev, "RTC read data register failed\n");
 212                         return rc;
 213                 }
 214         }
 215
 216         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
 217                ((unsigned long)value[3] << 24);
 218
 219         rtc_time_to_tm(secs, tm);
 220
 221         dev_dbg(dev, "secs = %lu, h:m:s == %d:%d:%d, d/m/y = %d/%d/%d\n",
 222                 secs, tm->tm_hour, tm->tm_min, tm->tm_sec,
 223                 tm->tm_mday, tm->tm_mon, tm->tm_year);
 224
 225         return 0;
 226 }
 227
 228 static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 229 {
 230         int rc, i;
 231         u8 value[NUM_8_BIT_RTC_REGS];
 232         unsigned int ctrl_reg;
 233         unsigned long secs, irq_flags;
 234         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 235         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 236
 237         rtc_tm_to_time(&alarm->time, &secs);
 238
 239         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
 240                 value[i] = secs & 0xFF;
 241                 secs >>= 8;
 242         }
 243
 244         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 245
 246         rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
 247                                sizeof(value));
 248         if (rc) {
 249                 dev_err(dev, "Write to RTC ALARM register failed\n");
 250                 goto rtc_rw_fail;
 251         }
 252
 253         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 254         if (rc)
 255                 goto rtc_rw_fail;
 256
 257         if (alarm->enabled)
 258                 ctrl_reg |= regs->alarm_en;
 259         else
 260                 ctrl_reg &= ~regs->alarm_en;
 261
 262         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 263         if (rc) {
 264                 dev_err(dev, "Write to RTC alarm control register failed\n");
 265                 goto rtc_rw_fail;
 266         }
 267
 268         dev_dbg(dev, "Alarm Set for h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
 269                 alarm->time.tm_hour, alarm->time.tm_min,
 270                 alarm->time.tm_sec, alarm->time.tm_mday,
 271                 alarm->time.tm_mon, alarm->time.tm_year);
 272 rtc_rw_fail:
 273         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 274         return rc;
 275 }
 276
 277 static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 278 {
 279         int rc;
 280         u8 value[NUM_8_BIT_RTC_REGS];
 281         unsigned long secs;
 282         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 283         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 284
 285         rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,
 286                               sizeof(value));
 287         if (rc) {
 288                 dev_err(dev, "RTC alarm time read failed\n");
 289                 return rc;
 290         }
 291
 292         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
 293                ((unsigned long)value[3] << 24);
 294
 295         rtc_time_to_tm(secs, &alarm->time);
 296
 297         rc = rtc_valid_tm(&alarm->time);
 298         if (rc < 0) {
 299                 dev_err(dev, "Invalid alarm time read from RTC\n");
 300                 return rc;
 301         }
 302
 303         dev_dbg(dev, "Alarm set for - h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
 304                 alarm->time.tm_hour, alarm->time.tm_min,
 305                 alarm->time.tm_sec, alarm->time.tm_mday,
 306                 alarm->time.tm_mon, alarm->time.tm_year);
 307
 308         return 0;
 309 }
 310
 311 static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
 312 {
 313         int rc;
 314         unsigned long irq_flags;
 315         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 316         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 317         unsigned int ctrl_reg;
 318
 319         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 320
 321         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 322         if (rc)
 323                 goto rtc_rw_fail;
 324
 325         if (enable)
 326                 ctrl_reg |= regs->alarm_en;
 327         else
 328                 ctrl_reg &= ~regs->alarm_en;
 329
 330         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 331         if (rc) {
 332                 dev_err(dev, "Write to RTC control register failed\n");
 333                 goto rtc_rw_fail;
 334         }
 335
 336 rtc_rw_fail:
 337         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 338         return rc;
 339 }
 340
 341 static const struct rtc_class_ops pm8xxx_rtc_ops = {
 342         .read_time      = pm8xxx_rtc_read_time,
 343         .set_time       = pm8xxx_rtc_set_time,
 344         .set_alarm      = pm8xxx_rtc_set_alarm,
 345         .read_alarm     = pm8xxx_rtc_read_alarm,
 346         .alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
 347 };
 348
 349 static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
 350 {
 351         struct pm8xxx_rtc *rtc_dd = dev_id;
 352         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 353         unsigned int ctrl_reg;
 354         int rc;
 355         unsigned long irq_flags;
 356
 357         rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);
 358
 359         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 360
 361         /* Clear the alarm enable bit */
 362         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 363         if (rc) {
 364                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 365                 goto rtc_alarm_handled;
 366         }
 367
 368         ctrl_reg &= ~regs->alarm_en;
 369
 370         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 371         if (rc) {
 372                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 373                 dev_err(rtc_dd->rtc_dev,
 374                         "Write to alarm control register failed\n");
 375                 goto rtc_alarm_handled;
 376         }
 377
 378         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 379
 380         /* Clear RTC alarm register */
 381         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl2, &ctrl_reg);
 382         if (rc) {
 383                 dev_err(rtc_dd->rtc_dev,
 384                         "RTC Alarm control2 register read failed\n");
 385                 goto rtc_alarm_handled;
 386         }
 387
 388         ctrl_reg |= PM8xxx_RTC_ALARM_CLEAR;
 389         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl2, ctrl_reg);
 390         if (rc)
 391                 dev_err(rtc_dd->rtc_dev,
 392                         "Write to RTC Alarm control2 register failed\n");
 393
 394 rtc_alarm_handled:
 395         return IRQ_HANDLED;
 396 }
 397
 398 static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)
 399 {
 400         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 401         unsigned int ctrl_reg;
 402         int rc;
 403
 404         /* Check if the RTC is on, else turn it on */
 405         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
 406         if (rc)
 407                 return rc;
 408
 409         if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
 410                 ctrl_reg |= PM8xxx_RTC_ENABLE;
 411                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
 412                 if (rc)
 413                         return rc;
 414         }
 415
 416         return 0;
 417 }
 418
 419 static const struct pm8xxx_rtc_regs pm8921_regs = {
 420         .ctrl           = 0x11d,
 421         .write          = 0x11f,
 422         .read           = 0x123,
 423         .alarm_rw       = 0x127,
 424         .alarm_ctrl     = 0x11d,
 425         .alarm_ctrl2    = 0x11e,
 426         .alarm_en       = BIT(1),
 427 };
 428
 429 static const struct pm8xxx_rtc_regs pm8058_regs = {
 430         .ctrl           = 0x1e8,
 431         .write          = 0x1ea,
 432         .read           = 0x1ee,
 433         .alarm_rw       = 0x1f2,
 434         .alarm_ctrl     = 0x1e8,
 435         .alarm_ctrl2    = 0x1e9,
 436         .alarm_en       = BIT(1),
 437 };
 438
 439 static const struct pm8xxx_rtc_regs pm8941_regs = {
 440         .ctrl           = 0x6046,
 441         .write          = 0x6040,
 442         .read           = 0x6048,
 443         .alarm_rw       = 0x6140,
 444         .alarm_ctrl     = 0x6146,
 445         .alarm_ctrl2    = 0x6148,
 446         .alarm_en       = BIT(7),
 447 };
 448
 449 /*
 450  * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
 451  */
 452 static const struct of_device_id pm8xxx_id_table[] = {
 453         { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
 454         { .compatible = "qcom,pm8018-rtc", .data = &pm8921_regs },
 455         { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
 456         { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
 457         { },
 458 };
 459 MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
 460
 461 static int pm8xxx_rtc_probe(struct platform_device *pdev)
 462 {
 463         int rc;
 464         struct pm8xxx_rtc *rtc_dd;
 465         const struct of_device_id *match;
 466
 467         match = of_match_node(pm8xxx_id_table, pdev->dev.of_node);
 468         if (!match)
 469                 return -ENXIO;
 470
 471         rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
 472         if (rtc_dd == NULL)
 473                 return -ENOMEM;
 474
 475         /* Initialise spinlock to protect RTC control register */
 476         spin_lock_init(&rtc_dd->ctrl_reg_lock);
 477
 478         rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
 479         if (!rtc_dd->regmap) {
 480                 dev_err(&pdev->dev, "Parent regmap unavailable.\n");
 481                 return -ENXIO;
 482         }
 483
 484         rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
 485         if (rtc_dd->rtc_alarm_irq < 0) {
 486                 dev_err(&pdev->dev, "Alarm IRQ resource absent!\n");
 487                 return -ENXIO;
 488         }
 489
 490         rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
 491                                                       "allow-set-time");
 492
 493         rtc_dd->regs = match->data;
 494         rtc_dd->rtc_dev = &pdev->dev;
 495
 496         rc = pm8xxx_rtc_enable(rtc_dd);
 497         if (rc)
 498                 return rc;
 499
 500         platform_set_drvdata(pdev, rtc_dd);
 501
 502         device_init_wakeup(&pdev->dev, 1);
 503
 504         /* Register the RTC device */
 505         rtc_dd->rtc = devm_rtc_device_register(&pdev->dev, "pm8xxx_rtc",
 506                                                &pm8xxx_rtc_ops, THIS_MODULE);
 507         if (IS_ERR(rtc_dd->rtc)) {
 508                 dev_err(&pdev->dev, "%s: RTC registration failed (%ld)\n",
 509                         __func__, PTR_ERR(rtc_dd->rtc));
 510                 return PTR_ERR(rtc_dd->rtc);
 511         }
 512
 513         /* Request the alarm IRQ */
 514         rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->rtc_alarm_irq,
 515                                           pm8xxx_alarm_trigger,
 516                                           IRQF_TRIGGER_RISING,
 517                                           "pm8xxx_rtc_alarm", rtc_dd);
 518         if (rc < 0) {
 519                 dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc);
 520                 return rc;
 521         }
 522
 523         dev_dbg(&pdev->dev, "Probe success !!\n");
 524
 525         return 0;
 526 }
 527
 528 #ifdef CONFIG_PM_SLEEP
 529 static int pm8xxx_rtc_resume(struct device *dev)
 530 {
 531         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 532
 533         if (device_may_wakeup(dev))
 534                 disable_irq_wake(rtc_dd->rtc_alarm_irq);
 535
 536         return 0;
 537 }
 538
 539 static int pm8xxx_rtc_suspend(struct device *dev)
 540 {
 541         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 542
 543         if (device_may_wakeup(dev))
 544                 enable_irq_wake(rtc_dd->rtc_alarm_irq);
 545
 546         return 0;
 547 }
 548 #endif
 549
 550 static SIMPLE_DEV_PM_OPS(pm8xxx_rtc_pm_ops,
 551                          pm8xxx_rtc_suspend,
 552                          pm8xxx_rtc_resume);
 553
 554 static struct platform_driver pm8xxx_rtc_driver = {
 555         .probe          = pm8xxx_rtc_probe,
 556         .driver = {
 557                 .name           = "rtc-pm8xxx",
 558                 .pm             = &pm8xxx_rtc_pm_ops,
 559                 .of_match_table = pm8xxx_id_table,
 560         },
 561 };
 562
 563 module_platform_driver(pm8xxx_rtc_driver);
 564
 565 MODULE_ALIAS("platform:rtc-pm8xxx");
 566 MODULE_DESCRIPTION("PMIC8xxx RTC driver");
 567 MODULE_LICENSE("GPL v2");
 568 MODULE_AUTHOR("Anirudh Ghayal <aghayal@codeaurora.org>");