Linux 4.19.133
[linux/fpc-iii.git] / drivers / scsi / ufs / ufshcd.c
blobbd21c9cdf8183f2ebb6503e9bac982d46573d92e
1 /*
2 * Universal Flash Storage Host controller driver Core
4 * This code is based on drivers/scsi/ufs/ufshcd.c
5 * Copyright (C) 2011-2013 Samsung India Software Operations
6 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
40 #include <linux/async.h>
41 #include <linux/devfreq.h>
42 #include <linux/nls.h>
43 #include <linux/of.h>
44 #include <linux/bitfield.h>
45 #include "ufshcd.h"
46 #include "ufs_quirks.h"
47 #include "unipro.h"
48 #include "ufs-sysfs.h"
50 #define CREATE_TRACE_POINTS
51 #include <trace/events/ufs.h>
53 #define UFSHCD_REQ_SENSE_SIZE 18
55 #define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
56 UTP_TASK_REQ_COMPL |\
57 UFSHCD_ERROR_MASK)
58 /* UIC command timeout, unit: ms */
59 #define UIC_CMD_TIMEOUT 500
61 /* NOP OUT retries waiting for NOP IN response */
62 #define NOP_OUT_RETRIES 10
63 /* Timeout after 30 msecs if NOP OUT hangs without response */
64 #define NOP_OUT_TIMEOUT 30 /* msecs */
66 /* Query request retries */
67 #define QUERY_REQ_RETRIES 3
68 /* Query request timeout */
69 #define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
71 /* Task management command timeout */
72 #define TM_CMD_TIMEOUT 100 /* msecs */
74 /* maximum number of retries for a general UIC command */
75 #define UFS_UIC_COMMAND_RETRIES 3
77 /* maximum number of link-startup retries */
78 #define DME_LINKSTARTUP_RETRIES 3
80 /* Maximum retries for Hibern8 enter */
81 #define UIC_HIBERN8_ENTER_RETRIES 3
83 /* maximum number of reset retries before giving up */
84 #define MAX_HOST_RESET_RETRIES 5
86 /* Expose the flag value from utp_upiu_query.value */
87 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
89 /* Interrupt aggregation default timeout, unit: 40us */
90 #define INT_AGGR_DEF_TO 0x02
92 #define ufshcd_toggle_vreg(_dev, _vreg, _on) \
93 ({ \
94 int _ret; \
95 if (_on) \
96 _ret = ufshcd_enable_vreg(_dev, _vreg); \
97 else \
98 _ret = ufshcd_disable_vreg(_dev, _vreg); \
99 _ret; \
102 #define ufshcd_hex_dump(prefix_str, buf, len) do { \
103 size_t __len = (len); \
104 print_hex_dump(KERN_ERR, prefix_str, \
105 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
106 16, 4, buf, __len, false); \
107 } while (0)
109 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
110 const char *prefix)
112 u32 *regs;
113 size_t pos;
115 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
116 return -EINVAL;
118 regs = kzalloc(len, GFP_KERNEL);
119 if (!regs)
120 return -ENOMEM;
122 for (pos = 0; pos < len; pos += 4)
123 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
125 ufshcd_hex_dump(prefix, regs, len);
126 kfree(regs);
128 return 0;
130 EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
132 enum {
133 UFSHCD_MAX_CHANNEL = 0,
134 UFSHCD_MAX_ID = 1,
135 UFSHCD_CMD_PER_LUN = 32,
136 UFSHCD_CAN_QUEUE = 32,
139 /* UFSHCD states */
140 enum {
141 UFSHCD_STATE_RESET,
142 UFSHCD_STATE_ERROR,
143 UFSHCD_STATE_OPERATIONAL,
144 UFSHCD_STATE_EH_SCHEDULED,
147 /* UFSHCD error handling flags */
148 enum {
149 UFSHCD_EH_IN_PROGRESS = (1 << 0),
152 /* UFSHCD UIC layer error flags */
153 enum {
154 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
155 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
156 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
157 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
158 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
159 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
162 #define ufshcd_set_eh_in_progress(h) \
163 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
164 #define ufshcd_eh_in_progress(h) \
165 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
166 #define ufshcd_clear_eh_in_progress(h) \
167 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
169 #define ufshcd_set_ufs_dev_active(h) \
170 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
171 #define ufshcd_set_ufs_dev_sleep(h) \
172 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
173 #define ufshcd_set_ufs_dev_poweroff(h) \
174 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
175 #define ufshcd_is_ufs_dev_active(h) \
176 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
177 #define ufshcd_is_ufs_dev_sleep(h) \
178 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
179 #define ufshcd_is_ufs_dev_poweroff(h) \
180 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
182 struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
183 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
184 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
185 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
186 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
187 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
188 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
191 static inline enum ufs_dev_pwr_mode
192 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
194 return ufs_pm_lvl_states[lvl].dev_state;
197 static inline enum uic_link_state
198 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
200 return ufs_pm_lvl_states[lvl].link_state;
203 static inline enum ufs_pm_level
204 ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
205 enum uic_link_state link_state)
207 enum ufs_pm_level lvl;
209 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
210 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
211 (ufs_pm_lvl_states[lvl].link_state == link_state))
212 return lvl;
215 /* if no match found, return the level 0 */
216 return UFS_PM_LVL_0;
219 static struct ufs_dev_fix ufs_fixups[] = {
220 /* UFS cards deviations table */
221 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
222 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
223 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
224 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
225 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
226 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
227 UFS_DEVICE_NO_FASTAUTO),
228 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
229 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
230 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
231 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
232 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
233 UFS_DEVICE_QUIRK_PA_TACTIVATE),
234 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
235 UFS_DEVICE_QUIRK_PA_TACTIVATE),
236 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
237 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
238 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
239 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
240 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
242 END_FIX
245 static void ufshcd_tmc_handler(struct ufs_hba *hba);
246 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
247 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
248 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
249 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
250 static void ufshcd_hba_exit(struct ufs_hba *hba);
251 static int ufshcd_probe_hba(struct ufs_hba *hba);
252 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
253 bool skip_ref_clk);
254 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
255 static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused);
256 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
257 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
258 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
259 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
260 static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
261 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
262 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
263 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
264 static irqreturn_t ufshcd_intr(int irq, void *__hba);
265 static int ufshcd_change_power_mode(struct ufs_hba *hba,
266 struct ufs_pa_layer_attr *pwr_mode);
267 static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
269 return tag >= 0 && tag < hba->nutrs;
272 static inline int ufshcd_enable_irq(struct ufs_hba *hba)
274 int ret = 0;
276 if (!hba->is_irq_enabled) {
277 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
278 hba);
279 if (ret)
280 dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
281 __func__, ret);
282 hba->is_irq_enabled = true;
285 return ret;
288 static inline void ufshcd_disable_irq(struct ufs_hba *hba)
290 if (hba->is_irq_enabled) {
291 free_irq(hba->irq, hba);
292 hba->is_irq_enabled = false;
296 static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
298 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
299 scsi_unblock_requests(hba->host);
302 static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
304 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
305 scsi_block_requests(hba->host);
308 /* replace non-printable or non-ASCII characters with spaces */
309 static inline void ufshcd_remove_non_printable(char *val)
311 if (!val)
312 return;
314 if (*val < 0x20 || *val > 0x7e)
315 *val = ' ';
318 static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
319 const char *str)
321 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
323 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
326 static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
327 const char *str)
329 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
331 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
334 static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
335 const char *str)
337 struct utp_task_req_desc *descp;
338 struct utp_upiu_task_req *task_req;
339 int off = (int)tag - hba->nutrs;
341 descp = &hba->utmrdl_base_addr[off];
342 task_req = (struct utp_upiu_task_req *)descp->task_req_upiu;
343 trace_ufshcd_upiu(dev_name(hba->dev), str, &task_req->header,
344 &task_req->input_param1);
347 static void ufshcd_add_command_trace(struct ufs_hba *hba,
348 unsigned int tag, const char *str)
350 sector_t lba = -1;
351 u8 opcode = 0;
352 u32 intr, doorbell;
353 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
354 int transfer_len = -1;
356 if (!trace_ufshcd_command_enabled()) {
357 /* trace UPIU W/O tracing command */
358 if (lrbp->cmd)
359 ufshcd_add_cmd_upiu_trace(hba, tag, str);
360 return;
363 if (lrbp->cmd) { /* data phase exists */
364 /* trace UPIU also */
365 ufshcd_add_cmd_upiu_trace(hba, tag, str);
366 opcode = (u8)(*lrbp->cmd->cmnd);
367 if ((opcode == READ_10) || (opcode == WRITE_10)) {
369 * Currently we only fully trace read(10) and write(10)
370 * commands
372 if (lrbp->cmd->request && lrbp->cmd->request->bio)
373 lba =
374 lrbp->cmd->request->bio->bi_iter.bi_sector;
375 transfer_len = be32_to_cpu(
376 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
380 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
381 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
382 trace_ufshcd_command(dev_name(hba->dev), str, tag,
383 doorbell, transfer_len, intr, lba, opcode);
386 static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
388 struct ufs_clk_info *clki;
389 struct list_head *head = &hba->clk_list_head;
391 if (list_empty(head))
392 return;
394 list_for_each_entry(clki, head, list) {
395 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
396 clki->max_freq)
397 dev_err(hba->dev, "clk: %s, rate: %u\n",
398 clki->name, clki->curr_freq);
402 static void ufshcd_print_uic_err_hist(struct ufs_hba *hba,
403 struct ufs_uic_err_reg_hist *err_hist, char *err_name)
405 int i;
407 for (i = 0; i < UIC_ERR_REG_HIST_LENGTH; i++) {
408 int p = (i + err_hist->pos - 1) % UIC_ERR_REG_HIST_LENGTH;
410 if (err_hist->reg[p] == 0)
411 continue;
412 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, i,
413 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
417 static void ufshcd_print_host_regs(struct ufs_hba *hba)
419 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
420 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
421 hba->ufs_version, hba->capabilities);
422 dev_err(hba->dev,
423 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
424 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
425 dev_err(hba->dev,
426 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
427 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
428 hba->ufs_stats.hibern8_exit_cnt);
430 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
431 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
432 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
433 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
434 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
436 ufshcd_print_clk_freqs(hba);
438 if (hba->vops && hba->vops->dbg_register_dump)
439 hba->vops->dbg_register_dump(hba);
442 static
443 void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
445 struct ufshcd_lrb *lrbp;
446 int prdt_length;
447 int tag;
449 for_each_set_bit(tag, &bitmap, hba->nutrs) {
450 lrbp = &hba->lrb[tag];
452 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
453 tag, ktime_to_us(lrbp->issue_time_stamp));
454 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
455 tag, ktime_to_us(lrbp->compl_time_stamp));
456 dev_err(hba->dev,
457 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
458 tag, (u64)lrbp->utrd_dma_addr);
460 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
461 sizeof(struct utp_transfer_req_desc));
462 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
463 (u64)lrbp->ucd_req_dma_addr);
464 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
465 sizeof(struct utp_upiu_req));
466 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
467 (u64)lrbp->ucd_rsp_dma_addr);
468 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
469 sizeof(struct utp_upiu_rsp));
471 prdt_length = le16_to_cpu(
472 lrbp->utr_descriptor_ptr->prd_table_length);
473 dev_err(hba->dev,
474 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
475 tag, prdt_length,
476 (u64)lrbp->ucd_prdt_dma_addr);
478 if (pr_prdt)
479 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
480 sizeof(struct ufshcd_sg_entry) * prdt_length);
484 static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
486 struct utp_task_req_desc *tmrdp;
487 int tag;
489 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
490 tmrdp = &hba->utmrdl_base_addr[tag];
491 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
492 ufshcd_hex_dump("TM TRD: ", &tmrdp->header,
493 sizeof(struct request_desc_header));
494 dev_err(hba->dev, "TM[%d] - Task Management Request UPIU\n",
495 tag);
496 ufshcd_hex_dump("TM REQ: ", tmrdp->task_req_upiu,
497 sizeof(struct utp_upiu_req));
498 dev_err(hba->dev, "TM[%d] - Task Management Response UPIU\n",
499 tag);
500 ufshcd_hex_dump("TM RSP: ", tmrdp->task_rsp_upiu,
501 sizeof(struct utp_task_req_desc));
505 static void ufshcd_print_host_state(struct ufs_hba *hba)
507 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
508 dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
509 hba->lrb_in_use, hba->outstanding_reqs, hba->outstanding_tasks);
510 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
511 hba->saved_err, hba->saved_uic_err);
512 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
513 hba->curr_dev_pwr_mode, hba->uic_link_state);
514 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
515 hba->pm_op_in_progress, hba->is_sys_suspended);
516 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
517 hba->auto_bkops_enabled, hba->host->host_self_blocked);
518 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
519 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
520 hba->eh_flags, hba->req_abort_count);
521 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
522 hba->capabilities, hba->caps);
523 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
524 hba->dev_quirks);
528 * ufshcd_print_pwr_info - print power params as saved in hba
529 * power info
530 * @hba: per-adapter instance
532 static void ufshcd_print_pwr_info(struct ufs_hba *hba)
534 static const char * const names[] = {
535 "INVALID MODE",
536 "FAST MODE",
537 "SLOW_MODE",
538 "INVALID MODE",
539 "FASTAUTO_MODE",
540 "SLOWAUTO_MODE",
541 "INVALID MODE",
544 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
545 __func__,
546 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
547 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
548 names[hba->pwr_info.pwr_rx],
549 names[hba->pwr_info.pwr_tx],
550 hba->pwr_info.hs_rate);
554 * ufshcd_wait_for_register - wait for register value to change
555 * @hba - per-adapter interface
556 * @reg - mmio register offset
557 * @mask - mask to apply to read register value
558 * @val - wait condition
559 * @interval_us - polling interval in microsecs
560 * @timeout_ms - timeout in millisecs
561 * @can_sleep - perform sleep or just spin
563 * Returns -ETIMEDOUT on error, zero on success
565 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
566 u32 val, unsigned long interval_us,
567 unsigned long timeout_ms, bool can_sleep)
569 int err = 0;
570 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
572 /* ignore bits that we don't intend to wait on */
573 val = val & mask;
575 while ((ufshcd_readl(hba, reg) & mask) != val) {
576 if (can_sleep)
577 usleep_range(interval_us, interval_us + 50);
578 else
579 udelay(interval_us);
580 if (time_after(jiffies, timeout)) {
581 if ((ufshcd_readl(hba, reg) & mask) != val)
582 err = -ETIMEDOUT;
583 break;
587 return err;
591 * ufshcd_get_intr_mask - Get the interrupt bit mask
592 * @hba: Pointer to adapter instance
594 * Returns interrupt bit mask per version
596 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
598 u32 intr_mask = 0;
600 switch (hba->ufs_version) {
601 case UFSHCI_VERSION_10:
602 intr_mask = INTERRUPT_MASK_ALL_VER_10;
603 break;
604 case UFSHCI_VERSION_11:
605 case UFSHCI_VERSION_20:
606 intr_mask = INTERRUPT_MASK_ALL_VER_11;
607 break;
608 case UFSHCI_VERSION_21:
609 default:
610 intr_mask = INTERRUPT_MASK_ALL_VER_21;
611 break;
614 return intr_mask;
618 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
619 * @hba: Pointer to adapter instance
621 * Returns UFSHCI version supported by the controller
623 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
625 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
626 return ufshcd_vops_get_ufs_hci_version(hba);
628 return ufshcd_readl(hba, REG_UFS_VERSION);
632 * ufshcd_is_device_present - Check if any device connected to
633 * the host controller
634 * @hba: pointer to adapter instance
636 * Returns true if device present, false if no device detected
638 static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
640 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
641 DEVICE_PRESENT) ? true : false;
645 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
646 * @lrbp: pointer to local command reference block
648 * This function is used to get the OCS field from UTRD
649 * Returns the OCS field in the UTRD
651 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
653 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
657 * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
658 * @task_req_descp: pointer to utp_task_req_desc structure
660 * This function is used to get the OCS field from UTMRD
661 * Returns the OCS field in the UTMRD
663 static inline int
664 ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
666 return le32_to_cpu(task_req_descp->header.dword_2) & MASK_OCS;
670 * ufshcd_get_tm_free_slot - get a free slot for task management request
671 * @hba: per adapter instance
672 * @free_slot: pointer to variable with available slot value
674 * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
675 * Returns 0 if free slot is not available, else return 1 with tag value
676 * in @free_slot.
678 static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
680 int tag;
681 bool ret = false;
683 if (!free_slot)
684 goto out;
686 do {
687 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
688 if (tag >= hba->nutmrs)
689 goto out;
690 } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
692 *free_slot = tag;
693 ret = true;
694 out:
695 return ret;
698 static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
700 clear_bit_unlock(slot, &hba->tm_slots_in_use);
704 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
705 * @hba: per adapter instance
706 * @pos: position of the bit to be cleared
708 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
710 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
711 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
712 else
713 ufshcd_writel(hba, ~(1 << pos),
714 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
718 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
719 * @hba: per adapter instance
720 * @pos: position of the bit to be cleared
722 static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
724 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
725 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
726 else
727 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
731 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
732 * @hba: per adapter instance
733 * @tag: position of the bit to be cleared
735 static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
737 __clear_bit(tag, &hba->outstanding_reqs);
741 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
742 * @reg: Register value of host controller status
744 * Returns integer, 0 on Success and positive value if failed
746 static inline int ufshcd_get_lists_status(u32 reg)
748 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
752 * ufshcd_get_uic_cmd_result - Get the UIC command result
753 * @hba: Pointer to adapter instance
755 * This function gets the result of UIC command completion
756 * Returns 0 on success, non zero value on error
758 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
760 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
761 MASK_UIC_COMMAND_RESULT;
765 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
766 * @hba: Pointer to adapter instance
768 * This function gets UIC command argument3
769 * Returns 0 on success, non zero value on error
771 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
773 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
777 * ufshcd_get_req_rsp - returns the TR response transaction type
778 * @ucd_rsp_ptr: pointer to response UPIU
780 static inline int
781 ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
783 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
787 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
788 * @ucd_rsp_ptr: pointer to response UPIU
790 * This function gets the response status and scsi_status from response UPIU
791 * Returns the response result code.
793 static inline int
794 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
796 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
800 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
801 * from response UPIU
802 * @ucd_rsp_ptr: pointer to response UPIU
804 * Return the data segment length.
806 static inline unsigned int
807 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
809 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
810 MASK_RSP_UPIU_DATA_SEG_LEN;
814 * ufshcd_is_exception_event - Check if the device raised an exception event
815 * @ucd_rsp_ptr: pointer to response UPIU
817 * The function checks if the device raised an exception event indicated in
818 * the Device Information field of response UPIU.
820 * Returns true if exception is raised, false otherwise.
822 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
824 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
825 MASK_RSP_EXCEPTION_EVENT ? true : false;
829 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
830 * @hba: per adapter instance
832 static inline void
833 ufshcd_reset_intr_aggr(struct ufs_hba *hba)
835 ufshcd_writel(hba, INT_AGGR_ENABLE |
836 INT_AGGR_COUNTER_AND_TIMER_RESET,
837 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
841 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
842 * @hba: per adapter instance
843 * @cnt: Interrupt aggregation counter threshold
844 * @tmout: Interrupt aggregation timeout value
846 static inline void
847 ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
849 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
850 INT_AGGR_COUNTER_THLD_VAL(cnt) |
851 INT_AGGR_TIMEOUT_VAL(tmout),
852 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
856 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
857 * @hba: per adapter instance
859 static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
861 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
865 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
866 * When run-stop registers are set to 1, it indicates the
867 * host controller that it can process the requests
868 * @hba: per adapter instance
870 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
872 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
873 REG_UTP_TASK_REQ_LIST_RUN_STOP);
874 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
875 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
879 * ufshcd_hba_start - Start controller initialization sequence
880 * @hba: per adapter instance
882 static inline void ufshcd_hba_start(struct ufs_hba *hba)
884 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
888 * ufshcd_is_hba_active - Get controller state
889 * @hba: per adapter instance
891 * Returns false if controller is active, true otherwise
893 static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
895 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
896 ? false : true;
899 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
901 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
902 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
903 (hba->ufs_version == UFSHCI_VERSION_11))
904 return UFS_UNIPRO_VER_1_41;
905 else
906 return UFS_UNIPRO_VER_1_6;
908 EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
910 static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
913 * If both host and device support UniPro ver1.6 or later, PA layer
914 * parameters tuning happens during link startup itself.
916 * We can manually tune PA layer parameters if either host or device
917 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
918 * logic simple, we will only do manual tuning if local unipro version
919 * doesn't support ver1.6 or later.
921 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
922 return true;
923 else
924 return false;
927 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
929 int ret = 0;
930 struct ufs_clk_info *clki;
931 struct list_head *head = &hba->clk_list_head;
932 ktime_t start = ktime_get();
933 bool clk_state_changed = false;
935 if (list_empty(head))
936 goto out;
938 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
939 if (ret)
940 return ret;
942 list_for_each_entry(clki, head, list) {
943 if (!IS_ERR_OR_NULL(clki->clk)) {
944 if (scale_up && clki->max_freq) {
945 if (clki->curr_freq == clki->max_freq)
946 continue;
948 clk_state_changed = true;
949 ret = clk_set_rate(clki->clk, clki->max_freq);
950 if (ret) {
951 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
952 __func__, clki->name,
953 clki->max_freq, ret);
954 break;
956 trace_ufshcd_clk_scaling(dev_name(hba->dev),
957 "scaled up", clki->name,
958 clki->curr_freq,
959 clki->max_freq);
961 clki->curr_freq = clki->max_freq;
963 } else if (!scale_up && clki->min_freq) {
964 if (clki->curr_freq == clki->min_freq)
965 continue;
967 clk_state_changed = true;
968 ret = clk_set_rate(clki->clk, clki->min_freq);
969 if (ret) {
970 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
971 __func__, clki->name,
972 clki->min_freq, ret);
973 break;
975 trace_ufshcd_clk_scaling(dev_name(hba->dev),
976 "scaled down", clki->name,
977 clki->curr_freq,
978 clki->min_freq);
979 clki->curr_freq = clki->min_freq;
982 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
983 clki->name, clk_get_rate(clki->clk));
986 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
988 out:
989 if (clk_state_changed)
990 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
991 (scale_up ? "up" : "down"),
992 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
993 return ret;
997 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
998 * @hba: per adapter instance
999 * @scale_up: True if scaling up and false if scaling down
1001 * Returns true if scaling is required, false otherwise.
1003 static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
1004 bool scale_up)
1006 struct ufs_clk_info *clki;
1007 struct list_head *head = &hba->clk_list_head;
1009 if (list_empty(head))
1010 return false;
1012 list_for_each_entry(clki, head, list) {
1013 if (!IS_ERR_OR_NULL(clki->clk)) {
1014 if (scale_up && clki->max_freq) {
1015 if (clki->curr_freq == clki->max_freq)
1016 continue;
1017 return true;
1018 } else if (!scale_up && clki->min_freq) {
1019 if (clki->curr_freq == clki->min_freq)
1020 continue;
1021 return true;
1026 return false;
1029 static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1030 u64 wait_timeout_us)
1032 unsigned long flags;
1033 int ret = 0;
1034 u32 tm_doorbell;
1035 u32 tr_doorbell;
1036 bool timeout = false, do_last_check = false;
1037 ktime_t start;
1039 ufshcd_hold(hba, false);
1040 spin_lock_irqsave(hba->host->host_lock, flags);
1042 * Wait for all the outstanding tasks/transfer requests.
1043 * Verify by checking the doorbell registers are clear.
1045 start = ktime_get();
1046 do {
1047 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1048 ret = -EBUSY;
1049 goto out;
1052 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1053 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1054 if (!tm_doorbell && !tr_doorbell) {
1055 timeout = false;
1056 break;
1057 } else if (do_last_check) {
1058 break;
1061 spin_unlock_irqrestore(hba->host->host_lock, flags);
1062 schedule();
1063 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1064 wait_timeout_us) {
1065 timeout = true;
1067 * We might have scheduled out for long time so make
1068 * sure to check if doorbells are cleared by this time
1069 * or not.
1071 do_last_check = true;
1073 spin_lock_irqsave(hba->host->host_lock, flags);
1074 } while (tm_doorbell || tr_doorbell);
1076 if (timeout) {
1077 dev_err(hba->dev,
1078 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1079 __func__, tm_doorbell, tr_doorbell);
1080 ret = -EBUSY;
1082 out:
1083 spin_unlock_irqrestore(hba->host->host_lock, flags);
1084 ufshcd_release(hba);
1085 return ret;
1089 * ufshcd_scale_gear - scale up/down UFS gear
1090 * @hba: per adapter instance
1091 * @scale_up: True for scaling up gear and false for scaling down
1093 * Returns 0 for success,
1094 * Returns -EBUSY if scaling can't happen at this time
1095 * Returns non-zero for any other errors
1097 static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1099 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1100 int ret = 0;
1101 struct ufs_pa_layer_attr new_pwr_info;
1103 if (scale_up) {
1104 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1105 sizeof(struct ufs_pa_layer_attr));
1106 } else {
1107 memcpy(&new_pwr_info, &hba->pwr_info,
1108 sizeof(struct ufs_pa_layer_attr));
1110 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1111 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1112 /* save the current power mode */
1113 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1114 &hba->pwr_info,
1115 sizeof(struct ufs_pa_layer_attr));
1117 /* scale down gear */
1118 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1119 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1123 /* check if the power mode needs to be changed or not? */
1124 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1126 if (ret)
1127 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1128 __func__, ret,
1129 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1130 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1132 return ret;
1135 static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1137 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1138 int ret = 0;
1140 * make sure that there are no outstanding requests when
1141 * clock scaling is in progress
1143 ufshcd_scsi_block_requests(hba);
1144 down_write(&hba->clk_scaling_lock);
1145 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1146 ret = -EBUSY;
1147 up_write(&hba->clk_scaling_lock);
1148 ufshcd_scsi_unblock_requests(hba);
1151 return ret;
1154 static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1156 up_write(&hba->clk_scaling_lock);
1157 ufshcd_scsi_unblock_requests(hba);
1161 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1162 * @hba: per adapter instance
1163 * @scale_up: True for scaling up and false for scalin down
1165 * Returns 0 for success,
1166 * Returns -EBUSY if scaling can't happen at this time
1167 * Returns non-zero for any other errors
1169 static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1171 int ret = 0;
1173 /* let's not get into low power until clock scaling is completed */
1174 ufshcd_hold(hba, false);
1176 ret = ufshcd_clock_scaling_prepare(hba);
1177 if (ret)
1178 return ret;
1180 /* scale down the gear before scaling down clocks */
1181 if (!scale_up) {
1182 ret = ufshcd_scale_gear(hba, false);
1183 if (ret)
1184 goto out;
1187 ret = ufshcd_scale_clks(hba, scale_up);
1188 if (ret) {
1189 if (!scale_up)
1190 ufshcd_scale_gear(hba, true);
1191 goto out;
1194 /* scale up the gear after scaling up clocks */
1195 if (scale_up) {
1196 ret = ufshcd_scale_gear(hba, true);
1197 if (ret) {
1198 ufshcd_scale_clks(hba, false);
1199 goto out;
1203 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1205 out:
1206 ufshcd_clock_scaling_unprepare(hba);
1207 ufshcd_release(hba);
1208 return ret;
1211 static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1213 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1214 clk_scaling.suspend_work);
1215 unsigned long irq_flags;
1217 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1218 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1219 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1220 return;
1222 hba->clk_scaling.is_suspended = true;
1223 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1225 __ufshcd_suspend_clkscaling(hba);
1228 static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1230 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1231 clk_scaling.resume_work);
1232 unsigned long irq_flags;
1234 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1235 if (!hba->clk_scaling.is_suspended) {
1236 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1237 return;
1239 hba->clk_scaling.is_suspended = false;
1240 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1242 devfreq_resume_device(hba->devfreq);
1245 static int ufshcd_devfreq_target(struct device *dev,
1246 unsigned long *freq, u32 flags)
1248 int ret = 0;
1249 struct ufs_hba *hba = dev_get_drvdata(dev);
1250 ktime_t start;
1251 bool scale_up, sched_clk_scaling_suspend_work = false;
1252 struct list_head *clk_list = &hba->clk_list_head;
1253 struct ufs_clk_info *clki;
1254 unsigned long irq_flags;
1256 if (!ufshcd_is_clkscaling_supported(hba))
1257 return -EINVAL;
1259 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1260 if (ufshcd_eh_in_progress(hba)) {
1261 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1262 return 0;
1265 if (!hba->clk_scaling.active_reqs)
1266 sched_clk_scaling_suspend_work = true;
1268 if (list_empty(clk_list)) {
1269 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1270 goto out;
1273 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1274 scale_up = (*freq == clki->max_freq) ? true : false;
1275 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1276 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1277 ret = 0;
1278 goto out; /* no state change required */
1280 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1282 start = ktime_get();
1283 ret = ufshcd_devfreq_scale(hba, scale_up);
1285 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1286 (scale_up ? "up" : "down"),
1287 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1289 out:
1290 if (sched_clk_scaling_suspend_work)
1291 queue_work(hba->clk_scaling.workq,
1292 &hba->clk_scaling.suspend_work);
1294 return ret;
1298 static int ufshcd_devfreq_get_dev_status(struct device *dev,
1299 struct devfreq_dev_status *stat)
1301 struct ufs_hba *hba = dev_get_drvdata(dev);
1302 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1303 unsigned long flags;
1305 if (!ufshcd_is_clkscaling_supported(hba))
1306 return -EINVAL;
1308 memset(stat, 0, sizeof(*stat));
1310 spin_lock_irqsave(hba->host->host_lock, flags);
1311 if (!scaling->window_start_t)
1312 goto start_window;
1314 if (scaling->is_busy_started)
1315 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1316 scaling->busy_start_t));
1318 stat->total_time = jiffies_to_usecs((long)jiffies -
1319 (long)scaling->window_start_t);
1320 stat->busy_time = scaling->tot_busy_t;
1321 start_window:
1322 scaling->window_start_t = jiffies;
1323 scaling->tot_busy_t = 0;
1325 if (hba->outstanding_reqs) {
1326 scaling->busy_start_t = ktime_get();
1327 scaling->is_busy_started = true;
1328 } else {
1329 scaling->busy_start_t = 0;
1330 scaling->is_busy_started = false;
1332 spin_unlock_irqrestore(hba->host->host_lock, flags);
1333 return 0;
1336 static struct devfreq_dev_profile ufs_devfreq_profile = {
1337 .polling_ms = 100,
1338 .target = ufshcd_devfreq_target,
1339 .get_dev_status = ufshcd_devfreq_get_dev_status,
1342 static int ufshcd_devfreq_init(struct ufs_hba *hba)
1344 struct list_head *clk_list = &hba->clk_list_head;
1345 struct ufs_clk_info *clki;
1346 struct devfreq *devfreq;
1347 int ret;
1349 /* Skip devfreq if we don't have any clocks in the list */
1350 if (list_empty(clk_list))
1351 return 0;
1353 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1354 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1355 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1357 devfreq = devfreq_add_device(hba->dev,
1358 &ufs_devfreq_profile,
1359 DEVFREQ_GOV_SIMPLE_ONDEMAND,
1360 NULL);
1361 if (IS_ERR(devfreq)) {
1362 ret = PTR_ERR(devfreq);
1363 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
1365 dev_pm_opp_remove(hba->dev, clki->min_freq);
1366 dev_pm_opp_remove(hba->dev, clki->max_freq);
1367 return ret;
1370 hba->devfreq = devfreq;
1372 return 0;
1375 static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1377 struct list_head *clk_list = &hba->clk_list_head;
1378 struct ufs_clk_info *clki;
1380 if (!hba->devfreq)
1381 return;
1383 devfreq_remove_device(hba->devfreq);
1384 hba->devfreq = NULL;
1386 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1387 dev_pm_opp_remove(hba->dev, clki->min_freq);
1388 dev_pm_opp_remove(hba->dev, clki->max_freq);
1391 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1393 unsigned long flags;
1395 devfreq_suspend_device(hba->devfreq);
1396 spin_lock_irqsave(hba->host->host_lock, flags);
1397 hba->clk_scaling.window_start_t = 0;
1398 spin_unlock_irqrestore(hba->host->host_lock, flags);
1401 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1403 unsigned long flags;
1404 bool suspend = false;
1406 if (!ufshcd_is_clkscaling_supported(hba))
1407 return;
1409 spin_lock_irqsave(hba->host->host_lock, flags);
1410 if (!hba->clk_scaling.is_suspended) {
1411 suspend = true;
1412 hba->clk_scaling.is_suspended = true;
1414 spin_unlock_irqrestore(hba->host->host_lock, flags);
1416 if (suspend)
1417 __ufshcd_suspend_clkscaling(hba);
1420 static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1422 unsigned long flags;
1423 bool resume = false;
1425 if (!ufshcd_is_clkscaling_supported(hba))
1426 return;
1428 spin_lock_irqsave(hba->host->host_lock, flags);
1429 if (hba->clk_scaling.is_suspended) {
1430 resume = true;
1431 hba->clk_scaling.is_suspended = false;
1433 spin_unlock_irqrestore(hba->host->host_lock, flags);
1435 if (resume)
1436 devfreq_resume_device(hba->devfreq);
1439 static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1440 struct device_attribute *attr, char *buf)
1442 struct ufs_hba *hba = dev_get_drvdata(dev);
1444 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1447 static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1448 struct device_attribute *attr, const char *buf, size_t count)
1450 struct ufs_hba *hba = dev_get_drvdata(dev);
1451 u32 value;
1452 int err;
1454 if (kstrtou32(buf, 0, &value))
1455 return -EINVAL;
1457 value = !!value;
1458 if (value == hba->clk_scaling.is_allowed)
1459 goto out;
1461 pm_runtime_get_sync(hba->dev);
1462 ufshcd_hold(hba, false);
1464 cancel_work_sync(&hba->clk_scaling.suspend_work);
1465 cancel_work_sync(&hba->clk_scaling.resume_work);
1467 hba->clk_scaling.is_allowed = value;
1469 if (value) {
1470 ufshcd_resume_clkscaling(hba);
1471 } else {
1472 ufshcd_suspend_clkscaling(hba);
1473 err = ufshcd_devfreq_scale(hba, true);
1474 if (err)
1475 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1476 __func__, err);
1479 ufshcd_release(hba);
1480 pm_runtime_put_sync(hba->dev);
1481 out:
1482 return count;
1485 static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1487 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1488 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1489 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1490 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1491 hba->clk_scaling.enable_attr.attr.mode = 0644;
1492 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1493 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1496 static void ufshcd_ungate_work(struct work_struct *work)
1498 int ret;
1499 unsigned long flags;
1500 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1501 clk_gating.ungate_work);
1503 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1505 spin_lock_irqsave(hba->host->host_lock, flags);
1506 if (hba->clk_gating.state == CLKS_ON) {
1507 spin_unlock_irqrestore(hba->host->host_lock, flags);
1508 goto unblock_reqs;
1511 spin_unlock_irqrestore(hba->host->host_lock, flags);
1512 ufshcd_setup_clocks(hba, true);
1514 /* Exit from hibern8 */
1515 if (ufshcd_can_hibern8_during_gating(hba)) {
1516 /* Prevent gating in this path */
1517 hba->clk_gating.is_suspended = true;
1518 if (ufshcd_is_link_hibern8(hba)) {
1519 ret = ufshcd_uic_hibern8_exit(hba);
1520 if (ret)
1521 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1522 __func__, ret);
1523 else
1524 ufshcd_set_link_active(hba);
1526 hba->clk_gating.is_suspended = false;
1528 unblock_reqs:
1529 ufshcd_scsi_unblock_requests(hba);
1533 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1534 * Also, exit from hibern8 mode and set the link as active.
1535 * @hba: per adapter instance
1536 * @async: This indicates whether caller should ungate clocks asynchronously.
1538 int ufshcd_hold(struct ufs_hba *hba, bool async)
1540 int rc = 0;
1541 unsigned long flags;
1543 if (!ufshcd_is_clkgating_allowed(hba))
1544 goto out;
1545 spin_lock_irqsave(hba->host->host_lock, flags);
1546 hba->clk_gating.active_reqs++;
1548 if (ufshcd_eh_in_progress(hba)) {
1549 spin_unlock_irqrestore(hba->host->host_lock, flags);
1550 return 0;
1553 start:
1554 switch (hba->clk_gating.state) {
1555 case CLKS_ON:
1557 * Wait for the ungate work to complete if in progress.
1558 * Though the clocks may be in ON state, the link could
1559 * still be in hibner8 state if hibern8 is allowed
1560 * during clock gating.
1561 * Make sure we exit hibern8 state also in addition to
1562 * clocks being ON.
1564 if (ufshcd_can_hibern8_during_gating(hba) &&
1565 ufshcd_is_link_hibern8(hba)) {
1566 if (async) {
1567 rc = -EAGAIN;
1568 hba->clk_gating.active_reqs--;
1569 break;
1571 spin_unlock_irqrestore(hba->host->host_lock, flags);
1572 flush_work(&hba->clk_gating.ungate_work);
1573 spin_lock_irqsave(hba->host->host_lock, flags);
1574 goto start;
1576 break;
1577 case REQ_CLKS_OFF:
1578 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1579 hba->clk_gating.state = CLKS_ON;
1580 trace_ufshcd_clk_gating(dev_name(hba->dev),
1581 hba->clk_gating.state);
1582 break;
1585 * If we are here, it means gating work is either done or
1586 * currently running. Hence, fall through to cancel gating
1587 * work and to enable clocks.
1589 case CLKS_OFF:
1590 ufshcd_scsi_block_requests(hba);
1591 hba->clk_gating.state = REQ_CLKS_ON;
1592 trace_ufshcd_clk_gating(dev_name(hba->dev),
1593 hba->clk_gating.state);
1594 queue_work(hba->clk_gating.clk_gating_workq,
1595 &hba->clk_gating.ungate_work);
1597 * fall through to check if we should wait for this
1598 * work to be done or not.
1600 case REQ_CLKS_ON:
1601 if (async) {
1602 rc = -EAGAIN;
1603 hba->clk_gating.active_reqs--;
1604 break;
1607 spin_unlock_irqrestore(hba->host->host_lock, flags);
1608 flush_work(&hba->clk_gating.ungate_work);
1609 /* Make sure state is CLKS_ON before returning */
1610 spin_lock_irqsave(hba->host->host_lock, flags);
1611 goto start;
1612 default:
1613 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1614 __func__, hba->clk_gating.state);
1615 break;
1617 spin_unlock_irqrestore(hba->host->host_lock, flags);
1618 out:
1619 return rc;
1621 EXPORT_SYMBOL_GPL(ufshcd_hold);
1623 static void ufshcd_gate_work(struct work_struct *work)
1625 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1626 clk_gating.gate_work.work);
1627 unsigned long flags;
1629 spin_lock_irqsave(hba->host->host_lock, flags);
1631 * In case you are here to cancel this work the gating state
1632 * would be marked as REQ_CLKS_ON. In this case save time by
1633 * skipping the gating work and exit after changing the clock
1634 * state to CLKS_ON.
1636 if (hba->clk_gating.is_suspended ||
1637 (hba->clk_gating.state == REQ_CLKS_ON)) {
1638 hba->clk_gating.state = CLKS_ON;
1639 trace_ufshcd_clk_gating(dev_name(hba->dev),
1640 hba->clk_gating.state);
1641 goto rel_lock;
1644 if (hba->clk_gating.active_reqs
1645 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1646 || hba->lrb_in_use || hba->outstanding_tasks
1647 || hba->active_uic_cmd || hba->uic_async_done)
1648 goto rel_lock;
1650 spin_unlock_irqrestore(hba->host->host_lock, flags);
1652 /* put the link into hibern8 mode before turning off clocks */
1653 if (ufshcd_can_hibern8_during_gating(hba)) {
1654 if (ufshcd_uic_hibern8_enter(hba)) {
1655 hba->clk_gating.state = CLKS_ON;
1656 trace_ufshcd_clk_gating(dev_name(hba->dev),
1657 hba->clk_gating.state);
1658 goto out;
1660 ufshcd_set_link_hibern8(hba);
1663 if (!ufshcd_is_link_active(hba))
1664 ufshcd_setup_clocks(hba, false);
1665 else
1666 /* If link is active, device ref_clk can't be switched off */
1667 __ufshcd_setup_clocks(hba, false, true);
1670 * In case you are here to cancel this work the gating state
1671 * would be marked as REQ_CLKS_ON. In this case keep the state
1672 * as REQ_CLKS_ON which would anyway imply that clocks are off
1673 * and a request to turn them on is pending. By doing this way,
1674 * we keep the state machine in tact and this would ultimately
1675 * prevent from doing cancel work multiple times when there are
1676 * new requests arriving before the current cancel work is done.
1678 spin_lock_irqsave(hba->host->host_lock, flags);
1679 if (hba->clk_gating.state == REQ_CLKS_OFF) {
1680 hba->clk_gating.state = CLKS_OFF;
1681 trace_ufshcd_clk_gating(dev_name(hba->dev),
1682 hba->clk_gating.state);
1684 rel_lock:
1685 spin_unlock_irqrestore(hba->host->host_lock, flags);
1686 out:
1687 return;
1690 /* host lock must be held before calling this variant */
1691 static void __ufshcd_release(struct ufs_hba *hba)
1693 if (!ufshcd_is_clkgating_allowed(hba))
1694 return;
1696 hba->clk_gating.active_reqs--;
1698 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1699 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1700 || hba->lrb_in_use || hba->outstanding_tasks
1701 || hba->active_uic_cmd || hba->uic_async_done
1702 || ufshcd_eh_in_progress(hba))
1703 return;
1705 hba->clk_gating.state = REQ_CLKS_OFF;
1706 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1707 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1708 &hba->clk_gating.gate_work,
1709 msecs_to_jiffies(hba->clk_gating.delay_ms));
1712 void ufshcd_release(struct ufs_hba *hba)
1714 unsigned long flags;
1716 spin_lock_irqsave(hba->host->host_lock, flags);
1717 __ufshcd_release(hba);
1718 spin_unlock_irqrestore(hba->host->host_lock, flags);
1720 EXPORT_SYMBOL_GPL(ufshcd_release);
1722 static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1723 struct device_attribute *attr, char *buf)
1725 struct ufs_hba *hba = dev_get_drvdata(dev);
1727 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1730 static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1731 struct device_attribute *attr, const char *buf, size_t count)
1733 struct ufs_hba *hba = dev_get_drvdata(dev);
1734 unsigned long flags, value;
1736 if (kstrtoul(buf, 0, &value))
1737 return -EINVAL;
1739 spin_lock_irqsave(hba->host->host_lock, flags);
1740 hba->clk_gating.delay_ms = value;
1741 spin_unlock_irqrestore(hba->host->host_lock, flags);
1742 return count;
1745 static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1746 struct device_attribute *attr, char *buf)
1748 struct ufs_hba *hba = dev_get_drvdata(dev);
1750 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1753 static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1754 struct device_attribute *attr, const char *buf, size_t count)
1756 struct ufs_hba *hba = dev_get_drvdata(dev);
1757 unsigned long flags;
1758 u32 value;
1760 if (kstrtou32(buf, 0, &value))
1761 return -EINVAL;
1763 value = !!value;
1764 if (value == hba->clk_gating.is_enabled)
1765 goto out;
1767 if (value) {
1768 ufshcd_release(hba);
1769 } else {
1770 spin_lock_irqsave(hba->host->host_lock, flags);
1771 hba->clk_gating.active_reqs++;
1772 spin_unlock_irqrestore(hba->host->host_lock, flags);
1775 hba->clk_gating.is_enabled = value;
1776 out:
1777 return count;
1780 static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1782 char wq_name[sizeof("ufs_clkscaling_00")];
1784 if (!ufshcd_is_clkscaling_supported(hba))
1785 return;
1787 INIT_WORK(&hba->clk_scaling.suspend_work,
1788 ufshcd_clk_scaling_suspend_work);
1789 INIT_WORK(&hba->clk_scaling.resume_work,
1790 ufshcd_clk_scaling_resume_work);
1792 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1793 hba->host->host_no);
1794 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1796 ufshcd_clkscaling_init_sysfs(hba);
1799 static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1801 if (!ufshcd_is_clkscaling_supported(hba))
1802 return;
1804 destroy_workqueue(hba->clk_scaling.workq);
1805 ufshcd_devfreq_remove(hba);
1808 static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1810 char wq_name[sizeof("ufs_clk_gating_00")];
1812 if (!ufshcd_is_clkgating_allowed(hba))
1813 return;
1815 hba->clk_gating.delay_ms = 150;
1816 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1817 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1819 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1820 hba->host->host_no);
1821 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1822 WQ_MEM_RECLAIM);
1824 hba->clk_gating.is_enabled = true;
1826 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1827 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1828 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1829 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1830 hba->clk_gating.delay_attr.attr.mode = 0644;
1831 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1832 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
1834 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1835 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1836 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1837 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1838 hba->clk_gating.enable_attr.attr.mode = 0644;
1839 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1840 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
1843 static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1845 if (!ufshcd_is_clkgating_allowed(hba))
1846 return;
1847 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1848 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
1849 cancel_work_sync(&hba->clk_gating.ungate_work);
1850 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1851 destroy_workqueue(hba->clk_gating.clk_gating_workq);
1854 /* Must be called with host lock acquired */
1855 static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1857 bool queue_resume_work = false;
1859 if (!ufshcd_is_clkscaling_supported(hba))
1860 return;
1862 if (!hba->clk_scaling.active_reqs++)
1863 queue_resume_work = true;
1865 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1866 return;
1868 if (queue_resume_work)
1869 queue_work(hba->clk_scaling.workq,
1870 &hba->clk_scaling.resume_work);
1872 if (!hba->clk_scaling.window_start_t) {
1873 hba->clk_scaling.window_start_t = jiffies;
1874 hba->clk_scaling.tot_busy_t = 0;
1875 hba->clk_scaling.is_busy_started = false;
1878 if (!hba->clk_scaling.is_busy_started) {
1879 hba->clk_scaling.busy_start_t = ktime_get();
1880 hba->clk_scaling.is_busy_started = true;
1884 static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1886 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1888 if (!ufshcd_is_clkscaling_supported(hba))
1889 return;
1891 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1892 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1893 scaling->busy_start_t));
1894 scaling->busy_start_t = 0;
1895 scaling->is_busy_started = false;
1899 * ufshcd_send_command - Send SCSI or device management commands
1900 * @hba: per adapter instance
1901 * @task_tag: Task tag of the command
1903 static inline
1904 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1906 hba->lrb[task_tag].issue_time_stamp = ktime_get();
1907 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
1908 ufshcd_clk_scaling_start_busy(hba);
1909 __set_bit(task_tag, &hba->outstanding_reqs);
1910 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1911 /* Make sure that doorbell is committed immediately */
1912 wmb();
1913 ufshcd_add_command_trace(hba, task_tag, "send");
1917 * ufshcd_copy_sense_data - Copy sense data in case of check condition
1918 * @lrbp: pointer to local reference block
1920 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1922 int len;
1923 if (lrbp->sense_buffer &&
1924 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
1925 int len_to_copy;
1927 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
1928 len_to_copy = min_t(int, RESPONSE_UPIU_SENSE_DATA_LENGTH, len);
1930 memcpy(lrbp->sense_buffer,
1931 lrbp->ucd_rsp_ptr->sr.sense_data,
1932 min_t(int, len_to_copy, UFSHCD_REQ_SENSE_SIZE));
1937 * ufshcd_copy_query_response() - Copy the Query Response and the data
1938 * descriptor
1939 * @hba: per adapter instance
1940 * @lrbp: pointer to local reference block
1942 static
1943 int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1945 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1947 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
1949 /* Get the descriptor */
1950 if (hba->dev_cmd.query.descriptor &&
1951 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
1952 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
1953 GENERAL_UPIU_REQUEST_SIZE;
1954 u16 resp_len;
1955 u16 buf_len;
1957 /* data segment length */
1958 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
1959 MASK_QUERY_DATA_SEG_LEN;
1960 buf_len = be16_to_cpu(
1961 hba->dev_cmd.query.request.upiu_req.length);
1962 if (likely(buf_len >= resp_len)) {
1963 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1964 } else {
1965 dev_warn(hba->dev,
1966 "%s: Response size is bigger than buffer",
1967 __func__);
1968 return -EINVAL;
1972 return 0;
1976 * ufshcd_hba_capabilities - Read controller capabilities
1977 * @hba: per adapter instance
1979 static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1981 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
1983 /* nutrs and nutmrs are 0 based values */
1984 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1985 hba->nutmrs =
1986 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1990 * ufshcd_ready_for_uic_cmd - Check if controller is ready
1991 * to accept UIC commands
1992 * @hba: per adapter instance
1993 * Return true on success, else false
1995 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1997 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1998 return true;
1999 else
2000 return false;
2004 * ufshcd_get_upmcrs - Get the power mode change request status
2005 * @hba: Pointer to adapter instance
2007 * This function gets the UPMCRS field of HCS register
2008 * Returns value of UPMCRS field
2010 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
2012 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
2016 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
2017 * @hba: per adapter instance
2018 * @uic_cmd: UIC command
2020 * Mutex must be held.
2022 static inline void
2023 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2025 WARN_ON(hba->active_uic_cmd);
2027 hba->active_uic_cmd = uic_cmd;
2029 /* Write Args */
2030 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2031 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2032 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
2034 /* Write UIC Cmd */
2035 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
2036 REG_UIC_COMMAND);
2040 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2041 * @hba: per adapter instance
2042 * @uic_cmd: UIC command
2044 * Must be called with mutex held.
2045 * Returns 0 only if success.
2047 static int
2048 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2050 int ret;
2051 unsigned long flags;
2053 if (wait_for_completion_timeout(&uic_cmd->done,
2054 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2055 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2056 else
2057 ret = -ETIMEDOUT;
2059 spin_lock_irqsave(hba->host->host_lock, flags);
2060 hba->active_uic_cmd = NULL;
2061 spin_unlock_irqrestore(hba->host->host_lock, flags);
2063 return ret;
2067 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2068 * @hba: per adapter instance
2069 * @uic_cmd: UIC command
2070 * @completion: initialize the completion only if this is set to true
2072 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
2073 * with mutex held and host_lock locked.
2074 * Returns 0 only if success.
2076 static int
2077 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2078 bool completion)
2080 if (!ufshcd_ready_for_uic_cmd(hba)) {
2081 dev_err(hba->dev,
2082 "Controller not ready to accept UIC commands\n");
2083 return -EIO;
2086 if (completion)
2087 init_completion(&uic_cmd->done);
2089 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
2091 return 0;
2095 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2096 * @hba: per adapter instance
2097 * @uic_cmd: UIC command
2099 * Returns 0 only if success.
2101 static int
2102 ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2104 int ret;
2105 unsigned long flags;
2107 ufshcd_hold(hba, false);
2108 mutex_lock(&hba->uic_cmd_mutex);
2109 ufshcd_add_delay_before_dme_cmd(hba);
2111 spin_lock_irqsave(hba->host->host_lock, flags);
2112 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
2113 spin_unlock_irqrestore(hba->host->host_lock, flags);
2114 if (!ret)
2115 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2117 mutex_unlock(&hba->uic_cmd_mutex);
2119 ufshcd_release(hba);
2120 return ret;
2124 * ufshcd_map_sg - Map scatter-gather list to prdt
2125 * @hba: per adapter instance
2126 * @lrbp: pointer to local reference block
2128 * Returns 0 in case of success, non-zero value in case of failure
2130 static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2132 struct ufshcd_sg_entry *prd_table;
2133 struct scatterlist *sg;
2134 struct scsi_cmnd *cmd;
2135 int sg_segments;
2136 int i;
2138 cmd = lrbp->cmd;
2139 sg_segments = scsi_dma_map(cmd);
2140 if (sg_segments < 0)
2141 return sg_segments;
2143 if (sg_segments) {
2144 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2145 lrbp->utr_descriptor_ptr->prd_table_length =
2146 cpu_to_le16((u16)(sg_segments *
2147 sizeof(struct ufshcd_sg_entry)));
2148 else
2149 lrbp->utr_descriptor_ptr->prd_table_length =
2150 cpu_to_le16((u16) (sg_segments));
2152 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2154 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2155 prd_table[i].size =
2156 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2157 prd_table[i].base_addr =
2158 cpu_to_le32(lower_32_bits(sg->dma_address));
2159 prd_table[i].upper_addr =
2160 cpu_to_le32(upper_32_bits(sg->dma_address));
2161 prd_table[i].reserved = 0;
2163 } else {
2164 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2167 return 0;
2171 * ufshcd_enable_intr - enable interrupts
2172 * @hba: per adapter instance
2173 * @intrs: interrupt bits
2175 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
2177 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2179 if (hba->ufs_version == UFSHCI_VERSION_10) {
2180 u32 rw;
2181 rw = set & INTERRUPT_MASK_RW_VER_10;
2182 set = rw | ((set ^ intrs) & intrs);
2183 } else {
2184 set |= intrs;
2187 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2191 * ufshcd_disable_intr - disable interrupts
2192 * @hba: per adapter instance
2193 * @intrs: interrupt bits
2195 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2197 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2199 if (hba->ufs_version == UFSHCI_VERSION_10) {
2200 u32 rw;
2201 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2202 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2203 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2205 } else {
2206 set &= ~intrs;
2209 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2213 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2214 * descriptor according to request
2215 * @lrbp: pointer to local reference block
2216 * @upiu_flags: flags required in the header
2217 * @cmd_dir: requests data direction
2219 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
2220 u32 *upiu_flags, enum dma_data_direction cmd_dir)
2222 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2223 u32 data_direction;
2224 u32 dword_0;
2226 if (cmd_dir == DMA_FROM_DEVICE) {
2227 data_direction = UTP_DEVICE_TO_HOST;
2228 *upiu_flags = UPIU_CMD_FLAGS_READ;
2229 } else if (cmd_dir == DMA_TO_DEVICE) {
2230 data_direction = UTP_HOST_TO_DEVICE;
2231 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2232 } else {
2233 data_direction = UTP_NO_DATA_TRANSFER;
2234 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2237 dword_0 = data_direction | (lrbp->command_type
2238 << UPIU_COMMAND_TYPE_OFFSET);
2239 if (lrbp->intr_cmd)
2240 dword_0 |= UTP_REQ_DESC_INT_CMD;
2242 /* Transfer request descriptor header fields */
2243 req_desc->header.dword_0 = cpu_to_le32(dword_0);
2244 /* dword_1 is reserved, hence it is set to 0 */
2245 req_desc->header.dword_1 = 0;
2247 * assigning invalid value for command status. Controller
2248 * updates OCS on command completion, with the command
2249 * status
2251 req_desc->header.dword_2 =
2252 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
2253 /* dword_3 is reserved, hence it is set to 0 */
2254 req_desc->header.dword_3 = 0;
2256 req_desc->prd_table_length = 0;
2260 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2261 * for scsi commands
2262 * @lrbp: local reference block pointer
2263 * @upiu_flags: flags
2265 static
2266 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2268 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2269 unsigned short cdb_len;
2271 /* command descriptor fields */
2272 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2273 UPIU_TRANSACTION_COMMAND, upiu_flags,
2274 lrbp->lun, lrbp->task_tag);
2275 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2276 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2278 /* Total EHS length and Data segment length will be zero */
2279 ucd_req_ptr->header.dword_2 = 0;
2281 ucd_req_ptr->sc.exp_data_transfer_len =
2282 cpu_to_be32(lrbp->cmd->sdb.length);
2284 cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE);
2285 memset(ucd_req_ptr->sc.cdb, 0, MAX_CDB_SIZE);
2286 memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2288 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2292 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2293 * for query requsts
2294 * @hba: UFS hba
2295 * @lrbp: local reference block pointer
2296 * @upiu_flags: flags
2298 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2299 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2301 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2302 struct ufs_query *query = &hba->dev_cmd.query;
2303 u16 len = be16_to_cpu(query->request.upiu_req.length);
2304 u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE;
2306 /* Query request header */
2307 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2308 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2309 lrbp->lun, lrbp->task_tag);
2310 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2311 0, query->request.query_func, 0, 0);
2313 /* Data segment length only need for WRITE_DESC */
2314 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2315 ucd_req_ptr->header.dword_2 =
2316 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2317 else
2318 ucd_req_ptr->header.dword_2 = 0;
2320 /* Copy the Query Request buffer as is */
2321 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2322 QUERY_OSF_SIZE);
2324 /* Copy the Descriptor */
2325 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2326 memcpy(descp, query->descriptor, len);
2328 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2331 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2333 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2335 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2337 /* command descriptor fields */
2338 ucd_req_ptr->header.dword_0 =
2339 UPIU_HEADER_DWORD(
2340 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
2341 /* clear rest of the fields of basic header */
2342 ucd_req_ptr->header.dword_1 = 0;
2343 ucd_req_ptr->header.dword_2 = 0;
2345 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2349 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2350 * for Device Management Purposes
2351 * @hba: per adapter instance
2352 * @lrbp: pointer to local reference block
2354 static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2356 u32 upiu_flags;
2357 int ret = 0;
2359 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2360 (hba->ufs_version == UFSHCI_VERSION_11))
2361 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
2362 else
2363 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2365 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2366 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2367 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2368 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2369 ufshcd_prepare_utp_nop_upiu(lrbp);
2370 else
2371 ret = -EINVAL;
2373 return ret;
2377 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2378 * for SCSI Purposes
2379 * @hba: per adapter instance
2380 * @lrbp: pointer to local reference block
2382 static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2384 u32 upiu_flags;
2385 int ret = 0;
2387 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2388 (hba->ufs_version == UFSHCI_VERSION_11))
2389 lrbp->command_type = UTP_CMD_TYPE_SCSI;
2390 else
2391 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2393 if (likely(lrbp->cmd)) {
2394 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2395 lrbp->cmd->sc_data_direction);
2396 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2397 } else {
2398 ret = -EINVAL;
2401 return ret;
2405 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2406 * @upiu_wlun_id: UPIU W-LUN id
2408 * Returns SCSI W-LUN id
2410 static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2412 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2416 * ufshcd_queuecommand - main entry point for SCSI requests
2417 * @host: SCSI host pointer
2418 * @cmd: command from SCSI Midlayer
2420 * Returns 0 for success, non-zero in case of failure
2422 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2424 struct ufshcd_lrb *lrbp;
2425 struct ufs_hba *hba;
2426 unsigned long flags;
2427 int tag;
2428 int err = 0;
2430 hba = shost_priv(host);
2432 tag = cmd->request->tag;
2433 if (!ufshcd_valid_tag(hba, tag)) {
2434 dev_err(hba->dev,
2435 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2436 __func__, tag, cmd, cmd->request);
2437 BUG();
2440 if (!down_read_trylock(&hba->clk_scaling_lock))
2441 return SCSI_MLQUEUE_HOST_BUSY;
2443 spin_lock_irqsave(hba->host->host_lock, flags);
2444 switch (hba->ufshcd_state) {
2445 case UFSHCD_STATE_OPERATIONAL:
2446 break;
2447 case UFSHCD_STATE_EH_SCHEDULED:
2448 case UFSHCD_STATE_RESET:
2449 err = SCSI_MLQUEUE_HOST_BUSY;
2450 goto out_unlock;
2451 case UFSHCD_STATE_ERROR:
2452 set_host_byte(cmd, DID_ERROR);
2453 cmd->scsi_done(cmd);
2454 goto out_unlock;
2455 default:
2456 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2457 __func__, hba->ufshcd_state);
2458 set_host_byte(cmd, DID_BAD_TARGET);
2459 cmd->scsi_done(cmd);
2460 goto out_unlock;
2463 /* if error handling is in progress, don't issue commands */
2464 if (ufshcd_eh_in_progress(hba)) {
2465 set_host_byte(cmd, DID_ERROR);
2466 cmd->scsi_done(cmd);
2467 goto out_unlock;
2469 spin_unlock_irqrestore(hba->host->host_lock, flags);
2471 hba->req_abort_count = 0;
2473 /* acquire the tag to make sure device cmds don't use it */
2474 if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
2476 * Dev manage command in progress, requeue the command.
2477 * Requeuing the command helps in cases where the request *may*
2478 * find different tag instead of waiting for dev manage command
2479 * completion.
2481 err = SCSI_MLQUEUE_HOST_BUSY;
2482 goto out;
2485 err = ufshcd_hold(hba, true);
2486 if (err) {
2487 err = SCSI_MLQUEUE_HOST_BUSY;
2488 clear_bit_unlock(tag, &hba->lrb_in_use);
2489 goto out;
2491 WARN_ON(hba->clk_gating.state != CLKS_ON);
2493 lrbp = &hba->lrb[tag];
2495 WARN_ON(lrbp->cmd);
2496 lrbp->cmd = cmd;
2497 lrbp->sense_bufflen = UFSHCD_REQ_SENSE_SIZE;
2498 lrbp->sense_buffer = cmd->sense_buffer;
2499 lrbp->task_tag = tag;
2500 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
2501 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
2502 lrbp->req_abort_skip = false;
2504 ufshcd_comp_scsi_upiu(hba, lrbp);
2506 err = ufshcd_map_sg(hba, lrbp);
2507 if (err) {
2508 ufshcd_release(hba);
2509 lrbp->cmd = NULL;
2510 clear_bit_unlock(tag, &hba->lrb_in_use);
2511 goto out;
2513 /* Make sure descriptors are ready before ringing the doorbell */
2514 wmb();
2516 /* issue command to the controller */
2517 spin_lock_irqsave(hba->host->host_lock, flags);
2518 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
2519 ufshcd_send_command(hba, tag);
2520 out_unlock:
2521 spin_unlock_irqrestore(hba->host->host_lock, flags);
2522 out:
2523 up_read(&hba->clk_scaling_lock);
2524 return err;
2527 static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2528 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2530 lrbp->cmd = NULL;
2531 lrbp->sense_bufflen = 0;
2532 lrbp->sense_buffer = NULL;
2533 lrbp->task_tag = tag;
2534 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
2535 lrbp->intr_cmd = true; /* No interrupt aggregation */
2536 hba->dev_cmd.type = cmd_type;
2538 return ufshcd_comp_devman_upiu(hba, lrbp);
2541 static int
2542 ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2544 int err = 0;
2545 unsigned long flags;
2546 u32 mask = 1 << tag;
2548 /* clear outstanding transaction before retry */
2549 spin_lock_irqsave(hba->host->host_lock, flags);
2550 ufshcd_utrl_clear(hba, tag);
2551 spin_unlock_irqrestore(hba->host->host_lock, flags);
2554 * wait for for h/w to clear corresponding bit in door-bell.
2555 * max. wait is 1 sec.
2557 err = ufshcd_wait_for_register(hba,
2558 REG_UTP_TRANSFER_REQ_DOOR_BELL,
2559 mask, ~mask, 1000, 1000, true);
2561 return err;
2564 static int
2565 ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2567 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2569 /* Get the UPIU response */
2570 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2571 UPIU_RSP_CODE_OFFSET;
2572 return query_res->response;
2576 * ufshcd_dev_cmd_completion() - handles device management command responses
2577 * @hba: per adapter instance
2578 * @lrbp: pointer to local reference block
2580 static int
2581 ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2583 int resp;
2584 int err = 0;
2586 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
2587 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2589 switch (resp) {
2590 case UPIU_TRANSACTION_NOP_IN:
2591 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2592 err = -EINVAL;
2593 dev_err(hba->dev, "%s: unexpected response %x\n",
2594 __func__, resp);
2596 break;
2597 case UPIU_TRANSACTION_QUERY_RSP:
2598 err = ufshcd_check_query_response(hba, lrbp);
2599 if (!err)
2600 err = ufshcd_copy_query_response(hba, lrbp);
2601 break;
2602 case UPIU_TRANSACTION_REJECT_UPIU:
2603 /* TODO: handle Reject UPIU Response */
2604 err = -EPERM;
2605 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2606 __func__);
2607 break;
2608 default:
2609 err = -EINVAL;
2610 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2611 __func__, resp);
2612 break;
2615 return err;
2618 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2619 struct ufshcd_lrb *lrbp, int max_timeout)
2621 int err = 0;
2622 unsigned long time_left;
2623 unsigned long flags;
2625 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2626 msecs_to_jiffies(max_timeout));
2628 /* Make sure descriptors are ready before ringing the doorbell */
2629 wmb();
2630 spin_lock_irqsave(hba->host->host_lock, flags);
2631 hba->dev_cmd.complete = NULL;
2632 if (likely(time_left)) {
2633 err = ufshcd_get_tr_ocs(lrbp);
2634 if (!err)
2635 err = ufshcd_dev_cmd_completion(hba, lrbp);
2637 spin_unlock_irqrestore(hba->host->host_lock, flags);
2639 if (!time_left) {
2640 err = -ETIMEDOUT;
2641 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2642 __func__, lrbp->task_tag);
2643 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
2644 /* successfully cleared the command, retry if needed */
2645 err = -EAGAIN;
2647 * in case of an error, after clearing the doorbell,
2648 * we also need to clear the outstanding_request
2649 * field in hba
2651 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
2654 return err;
2658 * ufshcd_get_dev_cmd_tag - Get device management command tag
2659 * @hba: per-adapter instance
2660 * @tag_out: pointer to variable with available slot value
2662 * Get a free slot and lock it until device management command
2663 * completes.
2665 * Returns false if free slot is unavailable for locking, else
2666 * return true with tag value in @tag.
2668 static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
2670 int tag;
2671 bool ret = false;
2672 unsigned long tmp;
2674 if (!tag_out)
2675 goto out;
2677 do {
2678 tmp = ~hba->lrb_in_use;
2679 tag = find_last_bit(&tmp, hba->nutrs);
2680 if (tag >= hba->nutrs)
2681 goto out;
2682 } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
2684 *tag_out = tag;
2685 ret = true;
2686 out:
2687 return ret;
2690 static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
2692 clear_bit_unlock(tag, &hba->lrb_in_use);
2696 * ufshcd_exec_dev_cmd - API for sending device management requests
2697 * @hba: UFS hba
2698 * @cmd_type: specifies the type (NOP, Query...)
2699 * @timeout: time in seconds
2701 * NOTE: Since there is only one available tag for device management commands,
2702 * it is expected you hold the hba->dev_cmd.lock mutex.
2704 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2705 enum dev_cmd_type cmd_type, int timeout)
2707 struct ufshcd_lrb *lrbp;
2708 int err;
2709 int tag;
2710 struct completion wait;
2711 unsigned long flags;
2713 down_read(&hba->clk_scaling_lock);
2716 * Get free slot, sleep if slots are unavailable.
2717 * Even though we use wait_event() which sleeps indefinitely,
2718 * the maximum wait time is bounded by SCSI request timeout.
2720 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
2722 init_completion(&wait);
2723 lrbp = &hba->lrb[tag];
2724 WARN_ON(lrbp->cmd);
2725 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2726 if (unlikely(err))
2727 goto out_put_tag;
2729 hba->dev_cmd.complete = &wait;
2731 ufshcd_add_query_upiu_trace(hba, tag, "query_send");
2732 /* Make sure descriptors are ready before ringing the doorbell */
2733 wmb();
2734 spin_lock_irqsave(hba->host->host_lock, flags);
2735 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
2736 ufshcd_send_command(hba, tag);
2737 spin_unlock_irqrestore(hba->host->host_lock, flags);
2739 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2741 ufshcd_add_query_upiu_trace(hba, tag,
2742 err ? "query_complete_err" : "query_complete");
2744 out_put_tag:
2745 ufshcd_put_dev_cmd_tag(hba, tag);
2746 wake_up(&hba->dev_cmd.tag_wq);
2747 up_read(&hba->clk_scaling_lock);
2748 return err;
2752 * ufshcd_init_query() - init the query response and request parameters
2753 * @hba: per-adapter instance
2754 * @request: address of the request pointer to be initialized
2755 * @response: address of the response pointer to be initialized
2756 * @opcode: operation to perform
2757 * @idn: flag idn to access
2758 * @index: LU number to access
2759 * @selector: query/flag/descriptor further identification
2761 static inline void ufshcd_init_query(struct ufs_hba *hba,
2762 struct ufs_query_req **request, struct ufs_query_res **response,
2763 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2765 *request = &hba->dev_cmd.query.request;
2766 *response = &hba->dev_cmd.query.response;
2767 memset(*request, 0, sizeof(struct ufs_query_req));
2768 memset(*response, 0, sizeof(struct ufs_query_res));
2769 (*request)->upiu_req.opcode = opcode;
2770 (*request)->upiu_req.idn = idn;
2771 (*request)->upiu_req.index = index;
2772 (*request)->upiu_req.selector = selector;
2775 static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2776 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2778 int ret;
2779 int retries;
2781 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2782 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2783 if (ret)
2784 dev_dbg(hba->dev,
2785 "%s: failed with error %d, retries %d\n",
2786 __func__, ret, retries);
2787 else
2788 break;
2791 if (ret)
2792 dev_err(hba->dev,
2793 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2794 __func__, opcode, idn, ret, retries);
2795 return ret;
2799 * ufshcd_query_flag() - API function for sending flag query requests
2800 * @hba: per-adapter instance
2801 * @opcode: flag query to perform
2802 * @idn: flag idn to access
2803 * @flag_res: the flag value after the query request completes
2805 * Returns 0 for success, non-zero in case of failure
2807 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
2808 enum flag_idn idn, bool *flag_res)
2810 struct ufs_query_req *request = NULL;
2811 struct ufs_query_res *response = NULL;
2812 int err, index = 0, selector = 0;
2813 int timeout = QUERY_REQ_TIMEOUT;
2815 BUG_ON(!hba);
2817 ufshcd_hold(hba, false);
2818 mutex_lock(&hba->dev_cmd.lock);
2819 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2820 selector);
2822 switch (opcode) {
2823 case UPIU_QUERY_OPCODE_SET_FLAG:
2824 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2825 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2826 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2827 break;
2828 case UPIU_QUERY_OPCODE_READ_FLAG:
2829 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2830 if (!flag_res) {
2831 /* No dummy reads */
2832 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2833 __func__);
2834 err = -EINVAL;
2835 goto out_unlock;
2837 break;
2838 default:
2839 dev_err(hba->dev,
2840 "%s: Expected query flag opcode but got = %d\n",
2841 __func__, opcode);
2842 err = -EINVAL;
2843 goto out_unlock;
2846 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
2848 if (err) {
2849 dev_err(hba->dev,
2850 "%s: Sending flag query for idn %d failed, err = %d\n",
2851 __func__, idn, err);
2852 goto out_unlock;
2855 if (flag_res)
2856 *flag_res = (be32_to_cpu(response->upiu_res.value) &
2857 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2859 out_unlock:
2860 mutex_unlock(&hba->dev_cmd.lock);
2861 ufshcd_release(hba);
2862 return err;
2866 * ufshcd_query_attr - API function for sending attribute requests
2867 * @hba: per-adapter instance
2868 * @opcode: attribute opcode
2869 * @idn: attribute idn to access
2870 * @index: index field
2871 * @selector: selector field
2872 * @attr_val: the attribute value after the query request completes
2874 * Returns 0 for success, non-zero in case of failure
2876 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2877 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
2879 struct ufs_query_req *request = NULL;
2880 struct ufs_query_res *response = NULL;
2881 int err;
2883 BUG_ON(!hba);
2885 ufshcd_hold(hba, false);
2886 if (!attr_val) {
2887 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2888 __func__, opcode);
2889 err = -EINVAL;
2890 goto out;
2893 mutex_lock(&hba->dev_cmd.lock);
2894 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2895 selector);
2897 switch (opcode) {
2898 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2899 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2900 request->upiu_req.value = cpu_to_be32(*attr_val);
2901 break;
2902 case UPIU_QUERY_OPCODE_READ_ATTR:
2903 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2904 break;
2905 default:
2906 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2907 __func__, opcode);
2908 err = -EINVAL;
2909 goto out_unlock;
2912 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2914 if (err) {
2915 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2916 __func__, opcode, idn, index, err);
2917 goto out_unlock;
2920 *attr_val = be32_to_cpu(response->upiu_res.value);
2922 out_unlock:
2923 mutex_unlock(&hba->dev_cmd.lock);
2924 out:
2925 ufshcd_release(hba);
2926 return err;
2930 * ufshcd_query_attr_retry() - API function for sending query
2931 * attribute with retries
2932 * @hba: per-adapter instance
2933 * @opcode: attribute opcode
2934 * @idn: attribute idn to access
2935 * @index: index field
2936 * @selector: selector field
2937 * @attr_val: the attribute value after the query request
2938 * completes
2940 * Returns 0 for success, non-zero in case of failure
2942 static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2943 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2944 u32 *attr_val)
2946 int ret = 0;
2947 u32 retries;
2949 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2950 ret = ufshcd_query_attr(hba, opcode, idn, index,
2951 selector, attr_val);
2952 if (ret)
2953 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2954 __func__, ret, retries);
2955 else
2956 break;
2959 if (ret)
2960 dev_err(hba->dev,
2961 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2962 __func__, idn, ret, QUERY_REQ_RETRIES);
2963 return ret;
2966 static int __ufshcd_query_descriptor(struct ufs_hba *hba,
2967 enum query_opcode opcode, enum desc_idn idn, u8 index,
2968 u8 selector, u8 *desc_buf, int *buf_len)
2970 struct ufs_query_req *request = NULL;
2971 struct ufs_query_res *response = NULL;
2972 int err;
2974 BUG_ON(!hba);
2976 ufshcd_hold(hba, false);
2977 if (!desc_buf) {
2978 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2979 __func__, opcode);
2980 err = -EINVAL;
2981 goto out;
2984 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
2985 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2986 __func__, *buf_len);
2987 err = -EINVAL;
2988 goto out;
2991 mutex_lock(&hba->dev_cmd.lock);
2992 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2993 selector);
2994 hba->dev_cmd.query.descriptor = desc_buf;
2995 request->upiu_req.length = cpu_to_be16(*buf_len);
2997 switch (opcode) {
2998 case UPIU_QUERY_OPCODE_WRITE_DESC:
2999 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3000 break;
3001 case UPIU_QUERY_OPCODE_READ_DESC:
3002 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3003 break;
3004 default:
3005 dev_err(hba->dev,
3006 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
3007 __func__, opcode);
3008 err = -EINVAL;
3009 goto out_unlock;
3012 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3014 if (err) {
3015 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3016 __func__, opcode, idn, index, err);
3017 goto out_unlock;
3020 *buf_len = be16_to_cpu(response->upiu_res.length);
3022 out_unlock:
3023 hba->dev_cmd.query.descriptor = NULL;
3024 mutex_unlock(&hba->dev_cmd.lock);
3025 out:
3026 ufshcd_release(hba);
3027 return err;
3031 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
3032 * @hba: per-adapter instance
3033 * @opcode: attribute opcode
3034 * @idn: attribute idn to access
3035 * @index: index field
3036 * @selector: selector field
3037 * @desc_buf: the buffer that contains the descriptor
3038 * @buf_len: length parameter passed to the device
3040 * Returns 0 for success, non-zero in case of failure.
3041 * The buf_len parameter will contain, on return, the length parameter
3042 * received on the response.
3044 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3045 enum query_opcode opcode,
3046 enum desc_idn idn, u8 index,
3047 u8 selector,
3048 u8 *desc_buf, int *buf_len)
3050 int err;
3051 int retries;
3053 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3054 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3055 selector, desc_buf, buf_len);
3056 if (!err || err == -EINVAL)
3057 break;
3060 return err;
3064 * ufshcd_read_desc_length - read the specified descriptor length from header
3065 * @hba: Pointer to adapter instance
3066 * @desc_id: descriptor idn value
3067 * @desc_index: descriptor index
3068 * @desc_length: pointer to variable to read the length of descriptor
3070 * Return 0 in case of success, non-zero otherwise
3072 static int ufshcd_read_desc_length(struct ufs_hba *hba,
3073 enum desc_idn desc_id,
3074 int desc_index,
3075 int *desc_length)
3077 int ret;
3078 u8 header[QUERY_DESC_HDR_SIZE];
3079 int header_len = QUERY_DESC_HDR_SIZE;
3081 if (desc_id >= QUERY_DESC_IDN_MAX)
3082 return -EINVAL;
3084 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3085 desc_id, desc_index, 0, header,
3086 &header_len);
3088 if (ret) {
3089 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
3090 __func__, desc_id);
3091 return ret;
3092 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3093 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3094 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3095 desc_id);
3096 ret = -EINVAL;
3099 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3100 return ret;
3105 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3106 * @hba: Pointer to adapter instance
3107 * @desc_id: descriptor idn value
3108 * @desc_len: mapped desc length (out)
3110 * Return 0 in case of success, non-zero otherwise
3112 int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3113 enum desc_idn desc_id, int *desc_len)
3115 switch (desc_id) {
3116 case QUERY_DESC_IDN_DEVICE:
3117 *desc_len = hba->desc_size.dev_desc;
3118 break;
3119 case QUERY_DESC_IDN_POWER:
3120 *desc_len = hba->desc_size.pwr_desc;
3121 break;
3122 case QUERY_DESC_IDN_GEOMETRY:
3123 *desc_len = hba->desc_size.geom_desc;
3124 break;
3125 case QUERY_DESC_IDN_CONFIGURATION:
3126 *desc_len = hba->desc_size.conf_desc;
3127 break;
3128 case QUERY_DESC_IDN_UNIT:
3129 *desc_len = hba->desc_size.unit_desc;
3130 break;
3131 case QUERY_DESC_IDN_INTERCONNECT:
3132 *desc_len = hba->desc_size.interc_desc;
3133 break;
3134 case QUERY_DESC_IDN_STRING:
3135 *desc_len = QUERY_DESC_MAX_SIZE;
3136 break;
3137 case QUERY_DESC_IDN_HEALTH:
3138 *desc_len = hba->desc_size.hlth_desc;
3139 break;
3140 case QUERY_DESC_IDN_RFU_0:
3141 case QUERY_DESC_IDN_RFU_1:
3142 *desc_len = 0;
3143 break;
3144 default:
3145 *desc_len = 0;
3146 return -EINVAL;
3148 return 0;
3150 EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3153 * ufshcd_read_desc_param - read the specified descriptor parameter
3154 * @hba: Pointer to adapter instance
3155 * @desc_id: descriptor idn value
3156 * @desc_index: descriptor index
3157 * @param_offset: offset of the parameter to read
3158 * @param_read_buf: pointer to buffer where parameter would be read
3159 * @param_size: sizeof(param_read_buf)
3161 * Return 0 in case of success, non-zero otherwise
3163 int ufshcd_read_desc_param(struct ufs_hba *hba,
3164 enum desc_idn desc_id,
3165 int desc_index,
3166 u8 param_offset,
3167 u8 *param_read_buf,
3168 u8 param_size)
3170 int ret;
3171 u8 *desc_buf;
3172 int buff_len;
3173 bool is_kmalloc = true;
3175 /* Safety check */
3176 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
3177 return -EINVAL;
3179 /* Get the max length of descriptor from structure filled up at probe
3180 * time.
3182 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3184 /* Sanity checks */
3185 if (ret || !buff_len) {
3186 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3187 __func__);
3188 return ret;
3191 /* Check whether we need temp memory */
3192 if (param_offset != 0 || param_size < buff_len) {
3193 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3194 if (!desc_buf)
3195 return -ENOMEM;
3196 } else {
3197 desc_buf = param_read_buf;
3198 is_kmalloc = false;
3201 /* Request for full descriptor */
3202 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3203 desc_id, desc_index, 0,
3204 desc_buf, &buff_len);
3206 if (ret) {
3207 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3208 __func__, desc_id, desc_index, param_offset, ret);
3209 goto out;
3212 /* Sanity check */
3213 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3214 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3215 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3216 ret = -EINVAL;
3217 goto out;
3220 /* Check wherher we will not copy more data, than available */
3221 if (is_kmalloc && param_size > buff_len)
3222 param_size = buff_len;
3224 if (is_kmalloc)
3225 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3226 out:
3227 if (is_kmalloc)
3228 kfree(desc_buf);
3229 return ret;
3232 static inline int ufshcd_read_desc(struct ufs_hba *hba,
3233 enum desc_idn desc_id,
3234 int desc_index,
3235 u8 *buf,
3236 u32 size)
3238 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3241 static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3242 u8 *buf,
3243 u32 size)
3245 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
3248 static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
3250 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3254 * ufshcd_read_string_desc - read string descriptor
3255 * @hba: pointer to adapter instance
3256 * @desc_index: descriptor index
3257 * @buf: pointer to buffer where descriptor would be read
3258 * @size: size of buf
3259 * @ascii: if true convert from unicode to ascii characters
3261 * Return 0 in case of success, non-zero otherwise
3263 int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index,
3264 u8 *buf, u32 size, bool ascii)
3266 int err = 0;
3268 err = ufshcd_read_desc(hba,
3269 QUERY_DESC_IDN_STRING, desc_index, buf, size);
3271 if (err) {
3272 dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n",
3273 __func__, QUERY_REQ_RETRIES, err);
3274 goto out;
3277 if (ascii) {
3278 int desc_len;
3279 int ascii_len;
3280 int i;
3281 char *buff_ascii;
3283 desc_len = buf[0];
3284 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3285 ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3286 if (size < ascii_len + QUERY_DESC_HDR_SIZE) {
3287 dev_err(hba->dev, "%s: buffer allocated size is too small\n",
3288 __func__);
3289 err = -ENOMEM;
3290 goto out;
3293 buff_ascii = kmalloc(ascii_len, GFP_KERNEL);
3294 if (!buff_ascii) {
3295 err = -ENOMEM;
3296 goto out;
3300 * the descriptor contains string in UTF16 format
3301 * we need to convert to utf-8 so it can be displayed
3303 utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE],
3304 desc_len - QUERY_DESC_HDR_SIZE,
3305 UTF16_BIG_ENDIAN, buff_ascii, ascii_len);
3307 /* replace non-printable or non-ASCII characters with spaces */
3308 for (i = 0; i < ascii_len; i++)
3309 ufshcd_remove_non_printable(&buff_ascii[i]);
3311 memset(buf + QUERY_DESC_HDR_SIZE, 0,
3312 size - QUERY_DESC_HDR_SIZE);
3313 memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len);
3314 buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE;
3315 kfree(buff_ascii);
3317 out:
3318 return err;
3322 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3323 * @hba: Pointer to adapter instance
3324 * @lun: lun id
3325 * @param_offset: offset of the parameter to read
3326 * @param_read_buf: pointer to buffer where parameter would be read
3327 * @param_size: sizeof(param_read_buf)
3329 * Return 0 in case of success, non-zero otherwise
3331 static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3332 int lun,
3333 enum unit_desc_param param_offset,
3334 u8 *param_read_buf,
3335 u32 param_size)
3338 * Unit descriptors are only available for general purpose LUs (LUN id
3339 * from 0 to 7) and RPMB Well known LU.
3341 if (!ufs_is_valid_unit_desc_lun(lun))
3342 return -EOPNOTSUPP;
3344 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3345 param_offset, param_read_buf, param_size);
3349 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3350 * @hba: per adapter instance
3352 * 1. Allocate DMA memory for Command Descriptor array
3353 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3354 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3355 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3356 * (UTMRDL)
3357 * 4. Allocate memory for local reference block(lrb).
3359 * Returns 0 for success, non-zero in case of failure
3361 static int ufshcd_memory_alloc(struct ufs_hba *hba)
3363 size_t utmrdl_size, utrdl_size, ucdl_size;
3365 /* Allocate memory for UTP command descriptors */
3366 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
3367 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3368 ucdl_size,
3369 &hba->ucdl_dma_addr,
3370 GFP_KERNEL);
3373 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3374 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3375 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3376 * be aligned to 128 bytes as well
3378 if (!hba->ucdl_base_addr ||
3379 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
3380 dev_err(hba->dev,
3381 "Command Descriptor Memory allocation failed\n");
3382 goto out;
3386 * Allocate memory for UTP Transfer descriptors
3387 * UFSHCI requires 1024 byte alignment of UTRD
3389 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
3390 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3391 utrdl_size,
3392 &hba->utrdl_dma_addr,
3393 GFP_KERNEL);
3394 if (!hba->utrdl_base_addr ||
3395 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
3396 dev_err(hba->dev,
3397 "Transfer Descriptor Memory allocation failed\n");
3398 goto out;
3402 * Allocate memory for UTP Task Management descriptors
3403 * UFSHCI requires 1024 byte alignment of UTMRD
3405 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
3406 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3407 utmrdl_size,
3408 &hba->utmrdl_dma_addr,
3409 GFP_KERNEL);
3410 if (!hba->utmrdl_base_addr ||
3411 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
3412 dev_err(hba->dev,
3413 "Task Management Descriptor Memory allocation failed\n");
3414 goto out;
3417 /* Allocate memory for local reference block */
3418 hba->lrb = devm_kcalloc(hba->dev,
3419 hba->nutrs, sizeof(struct ufshcd_lrb),
3420 GFP_KERNEL);
3421 if (!hba->lrb) {
3422 dev_err(hba->dev, "LRB Memory allocation failed\n");
3423 goto out;
3425 return 0;
3426 out:
3427 return -ENOMEM;
3431 * ufshcd_host_memory_configure - configure local reference block with
3432 * memory offsets
3433 * @hba: per adapter instance
3435 * Configure Host memory space
3436 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3437 * address.
3438 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3439 * and PRDT offset.
3440 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3441 * into local reference block.
3443 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3445 struct utp_transfer_cmd_desc *cmd_descp;
3446 struct utp_transfer_req_desc *utrdlp;
3447 dma_addr_t cmd_desc_dma_addr;
3448 dma_addr_t cmd_desc_element_addr;
3449 u16 response_offset;
3450 u16 prdt_offset;
3451 int cmd_desc_size;
3452 int i;
3454 utrdlp = hba->utrdl_base_addr;
3455 cmd_descp = hba->ucdl_base_addr;
3457 response_offset =
3458 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3459 prdt_offset =
3460 offsetof(struct utp_transfer_cmd_desc, prd_table);
3462 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3463 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3465 for (i = 0; i < hba->nutrs; i++) {
3466 /* Configure UTRD with command descriptor base address */
3467 cmd_desc_element_addr =
3468 (cmd_desc_dma_addr + (cmd_desc_size * i));
3469 utrdlp[i].command_desc_base_addr_lo =
3470 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3471 utrdlp[i].command_desc_base_addr_hi =
3472 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3474 /* Response upiu and prdt offset should be in double words */
3475 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3476 utrdlp[i].response_upiu_offset =
3477 cpu_to_le16(response_offset);
3478 utrdlp[i].prd_table_offset =
3479 cpu_to_le16(prdt_offset);
3480 utrdlp[i].response_upiu_length =
3481 cpu_to_le16(ALIGNED_UPIU_SIZE);
3482 } else {
3483 utrdlp[i].response_upiu_offset =
3484 cpu_to_le16((response_offset >> 2));
3485 utrdlp[i].prd_table_offset =
3486 cpu_to_le16((prdt_offset >> 2));
3487 utrdlp[i].response_upiu_length =
3488 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3491 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
3492 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3493 (i * sizeof(struct utp_transfer_req_desc));
3494 hba->lrb[i].ucd_req_ptr =
3495 (struct utp_upiu_req *)(cmd_descp + i);
3496 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
3497 hba->lrb[i].ucd_rsp_ptr =
3498 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
3499 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3500 response_offset;
3501 hba->lrb[i].ucd_prdt_ptr =
3502 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
3503 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3504 prdt_offset;
3509 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3510 * @hba: per adapter instance
3512 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3513 * in order to initialize the Unipro link startup procedure.
3514 * Once the Unipro links are up, the device connected to the controller
3515 * is detected.
3517 * Returns 0 on success, non-zero value on failure
3519 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3521 struct uic_command uic_cmd = {0};
3522 int ret;
3524 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3526 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3527 if (ret)
3528 dev_dbg(hba->dev,
3529 "dme-link-startup: error code %d\n", ret);
3530 return ret;
3533 * ufshcd_dme_reset - UIC command for DME_RESET
3534 * @hba: per adapter instance
3536 * DME_RESET command is issued in order to reset UniPro stack.
3537 * This function now deal with cold reset.
3539 * Returns 0 on success, non-zero value on failure
3541 static int ufshcd_dme_reset(struct ufs_hba *hba)
3543 struct uic_command uic_cmd = {0};
3544 int ret;
3546 uic_cmd.command = UIC_CMD_DME_RESET;
3548 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3549 if (ret)
3550 dev_err(hba->dev,
3551 "dme-reset: error code %d\n", ret);
3553 return ret;
3557 * ufshcd_dme_enable - UIC command for DME_ENABLE
3558 * @hba: per adapter instance
3560 * DME_ENABLE command is issued in order to enable UniPro stack.
3562 * Returns 0 on success, non-zero value on failure
3564 static int ufshcd_dme_enable(struct ufs_hba *hba)
3566 struct uic_command uic_cmd = {0};
3567 int ret;
3569 uic_cmd.command = UIC_CMD_DME_ENABLE;
3571 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3572 if (ret)
3573 dev_err(hba->dev,
3574 "dme-reset: error code %d\n", ret);
3576 return ret;
3579 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3581 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3582 unsigned long min_sleep_time_us;
3584 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3585 return;
3588 * last_dme_cmd_tstamp will be 0 only for 1st call to
3589 * this function
3591 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3592 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3593 } else {
3594 unsigned long delta =
3595 (unsigned long) ktime_to_us(
3596 ktime_sub(ktime_get(),
3597 hba->last_dme_cmd_tstamp));
3599 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3600 min_sleep_time_us =
3601 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3602 else
3603 return; /* no more delay required */
3606 /* allow sleep for extra 50us if needed */
3607 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3611 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3612 * @hba: per adapter instance
3613 * @attr_sel: uic command argument1
3614 * @attr_set: attribute set type as uic command argument2
3615 * @mib_val: setting value as uic command argument3
3616 * @peer: indicate whether peer or local
3618 * Returns 0 on success, non-zero value on failure
3620 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3621 u8 attr_set, u32 mib_val, u8 peer)
3623 struct uic_command uic_cmd = {0};
3624 static const char *const action[] = {
3625 "dme-set",
3626 "dme-peer-set"
3628 const char *set = action[!!peer];
3629 int ret;
3630 int retries = UFS_UIC_COMMAND_RETRIES;
3632 uic_cmd.command = peer ?
3633 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3634 uic_cmd.argument1 = attr_sel;
3635 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3636 uic_cmd.argument3 = mib_val;
3638 do {
3639 /* for peer attributes we retry upon failure */
3640 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3641 if (ret)
3642 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3643 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3644 } while (ret && peer && --retries);
3646 if (ret)
3647 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
3648 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3649 UFS_UIC_COMMAND_RETRIES - retries);
3651 return ret;
3653 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3656 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3657 * @hba: per adapter instance
3658 * @attr_sel: uic command argument1
3659 * @mib_val: the value of the attribute as returned by the UIC command
3660 * @peer: indicate whether peer or local
3662 * Returns 0 on success, non-zero value on failure
3664 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3665 u32 *mib_val, u8 peer)
3667 struct uic_command uic_cmd = {0};
3668 static const char *const action[] = {
3669 "dme-get",
3670 "dme-peer-get"
3672 const char *get = action[!!peer];
3673 int ret;
3674 int retries = UFS_UIC_COMMAND_RETRIES;
3675 struct ufs_pa_layer_attr orig_pwr_info;
3676 struct ufs_pa_layer_attr temp_pwr_info;
3677 bool pwr_mode_change = false;
3679 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3680 orig_pwr_info = hba->pwr_info;
3681 temp_pwr_info = orig_pwr_info;
3683 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3684 orig_pwr_info.pwr_rx == FAST_MODE) {
3685 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3686 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3687 pwr_mode_change = true;
3688 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3689 orig_pwr_info.pwr_rx == SLOW_MODE) {
3690 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3691 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3692 pwr_mode_change = true;
3694 if (pwr_mode_change) {
3695 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3696 if (ret)
3697 goto out;
3701 uic_cmd.command = peer ?
3702 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3703 uic_cmd.argument1 = attr_sel;
3705 do {
3706 /* for peer attributes we retry upon failure */
3707 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3708 if (ret)
3709 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3710 get, UIC_GET_ATTR_ID(attr_sel), ret);
3711 } while (ret && peer && --retries);
3713 if (ret)
3714 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
3715 get, UIC_GET_ATTR_ID(attr_sel),
3716 UFS_UIC_COMMAND_RETRIES - retries);
3718 if (mib_val && !ret)
3719 *mib_val = uic_cmd.argument3;
3721 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3722 && pwr_mode_change)
3723 ufshcd_change_power_mode(hba, &orig_pwr_info);
3724 out:
3725 return ret;
3727 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3730 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3731 * state) and waits for it to take effect.
3733 * @hba: per adapter instance
3734 * @cmd: UIC command to execute
3736 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3737 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3738 * and device UniPro link and hence it's final completion would be indicated by
3739 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3740 * addition to normal UIC command completion Status (UCCS). This function only
3741 * returns after the relevant status bits indicate the completion.
3743 * Returns 0 on success, non-zero value on failure
3745 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3747 struct completion uic_async_done;
3748 unsigned long flags;
3749 u8 status;
3750 int ret;
3751 bool reenable_intr = false;
3753 mutex_lock(&hba->uic_cmd_mutex);
3754 init_completion(&uic_async_done);
3755 ufshcd_add_delay_before_dme_cmd(hba);
3757 spin_lock_irqsave(hba->host->host_lock, flags);
3758 hba->uic_async_done = &uic_async_done;
3759 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3760 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3762 * Make sure UIC command completion interrupt is disabled before
3763 * issuing UIC command.
3765 wmb();
3766 reenable_intr = true;
3768 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3769 spin_unlock_irqrestore(hba->host->host_lock, flags);
3770 if (ret) {
3771 dev_err(hba->dev,
3772 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3773 cmd->command, cmd->argument3, ret);
3774 goto out;
3777 if (!wait_for_completion_timeout(hba->uic_async_done,
3778 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3779 dev_err(hba->dev,
3780 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3781 cmd->command, cmd->argument3);
3782 ret = -ETIMEDOUT;
3783 goto out;
3786 status = ufshcd_get_upmcrs(hba);
3787 if (status != PWR_LOCAL) {
3788 dev_err(hba->dev,
3789 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
3790 cmd->command, status);
3791 ret = (status != PWR_OK) ? status : -1;
3793 out:
3794 if (ret) {
3795 ufshcd_print_host_state(hba);
3796 ufshcd_print_pwr_info(hba);
3797 ufshcd_print_host_regs(hba);
3800 spin_lock_irqsave(hba->host->host_lock, flags);
3801 hba->active_uic_cmd = NULL;
3802 hba->uic_async_done = NULL;
3803 if (reenable_intr)
3804 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
3805 spin_unlock_irqrestore(hba->host->host_lock, flags);
3806 mutex_unlock(&hba->uic_cmd_mutex);
3808 return ret;
3812 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3813 * using DME_SET primitives.
3814 * @hba: per adapter instance
3815 * @mode: powr mode value
3817 * Returns 0 on success, non-zero value on failure
3819 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
3821 struct uic_command uic_cmd = {0};
3822 int ret;
3824 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3825 ret = ufshcd_dme_set(hba,
3826 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3827 if (ret) {
3828 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3829 __func__, ret);
3830 goto out;
3834 uic_cmd.command = UIC_CMD_DME_SET;
3835 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3836 uic_cmd.argument3 = mode;
3837 ufshcd_hold(hba, false);
3838 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3839 ufshcd_release(hba);
3841 out:
3842 return ret;
3845 static int ufshcd_link_recovery(struct ufs_hba *hba)
3847 int ret;
3848 unsigned long flags;
3850 spin_lock_irqsave(hba->host->host_lock, flags);
3851 hba->ufshcd_state = UFSHCD_STATE_RESET;
3852 ufshcd_set_eh_in_progress(hba);
3853 spin_unlock_irqrestore(hba->host->host_lock, flags);
3855 ret = ufshcd_host_reset_and_restore(hba);
3857 spin_lock_irqsave(hba->host->host_lock, flags);
3858 if (ret)
3859 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3860 ufshcd_clear_eh_in_progress(hba);
3861 spin_unlock_irqrestore(hba->host->host_lock, flags);
3863 if (ret)
3864 dev_err(hba->dev, "%s: link recovery failed, err %d",
3865 __func__, ret);
3867 return ret;
3870 static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3872 int ret;
3873 struct uic_command uic_cmd = {0};
3874 ktime_t start = ktime_get();
3876 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3878 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
3879 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3880 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3881 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3883 if (ret) {
3884 int err;
3886 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3887 __func__, ret);
3890 * If link recovery fails then return error code returned from
3891 * ufshcd_link_recovery().
3892 * If link recovery succeeds then return -EAGAIN to attempt
3893 * hibern8 enter retry again.
3895 err = ufshcd_link_recovery(hba);
3896 if (err) {
3897 dev_err(hba->dev, "%s: link recovery failed", __func__);
3898 ret = err;
3899 } else {
3900 ret = -EAGAIN;
3902 } else
3903 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3904 POST_CHANGE);
3906 return ret;
3909 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3911 int ret = 0, retries;
3913 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3914 ret = __ufshcd_uic_hibern8_enter(hba);
3915 if (!ret)
3916 goto out;
3918 out:
3919 return ret;
3922 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3924 struct uic_command uic_cmd = {0};
3925 int ret;
3926 ktime_t start = ktime_get();
3928 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3930 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3931 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3932 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3933 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3935 if (ret) {
3936 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3937 __func__, ret);
3938 ret = ufshcd_link_recovery(hba);
3939 } else {
3940 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3941 POST_CHANGE);
3942 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3943 hba->ufs_stats.hibern8_exit_cnt++;
3946 return ret;
3949 static void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
3951 unsigned long flags;
3953 if (!(hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) || !hba->ahit)
3954 return;
3956 spin_lock_irqsave(hba->host->host_lock, flags);
3957 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3958 spin_unlock_irqrestore(hba->host->host_lock, flags);
3962 * ufshcd_init_pwr_info - setting the POR (power on reset)
3963 * values in hba power info
3964 * @hba: per-adapter instance
3966 static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3968 hba->pwr_info.gear_rx = UFS_PWM_G1;
3969 hba->pwr_info.gear_tx = UFS_PWM_G1;
3970 hba->pwr_info.lane_rx = 1;
3971 hba->pwr_info.lane_tx = 1;
3972 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3973 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3974 hba->pwr_info.hs_rate = 0;
3978 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3979 * @hba: per-adapter instance
3981 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
3983 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3985 if (hba->max_pwr_info.is_valid)
3986 return 0;
3988 pwr_info->pwr_tx = FAST_MODE;
3989 pwr_info->pwr_rx = FAST_MODE;
3990 pwr_info->hs_rate = PA_HS_MODE_B;
3992 /* Get the connected lane count */
3993 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3994 &pwr_info->lane_rx);
3995 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3996 &pwr_info->lane_tx);
3998 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3999 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
4000 __func__,
4001 pwr_info->lane_rx,
4002 pwr_info->lane_tx);
4003 return -EINVAL;
4007 * First, get the maximum gears of HS speed.
4008 * If a zero value, it means there is no HSGEAR capability.
4009 * Then, get the maximum gears of PWM speed.
4011 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4012 if (!pwr_info->gear_rx) {
4013 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4014 &pwr_info->gear_rx);
4015 if (!pwr_info->gear_rx) {
4016 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4017 __func__, pwr_info->gear_rx);
4018 return -EINVAL;
4020 pwr_info->pwr_rx = SLOW_MODE;
4023 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4024 &pwr_info->gear_tx);
4025 if (!pwr_info->gear_tx) {
4026 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4027 &pwr_info->gear_tx);
4028 if (!pwr_info->gear_tx) {
4029 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4030 __func__, pwr_info->gear_tx);
4031 return -EINVAL;
4033 pwr_info->pwr_tx = SLOW_MODE;
4036 hba->max_pwr_info.is_valid = true;
4037 return 0;
4040 static int ufshcd_change_power_mode(struct ufs_hba *hba,
4041 struct ufs_pa_layer_attr *pwr_mode)
4043 int ret;
4045 /* if already configured to the requested pwr_mode */
4046 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4047 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4048 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4049 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4050 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4051 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4052 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4053 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4054 return 0;
4058 * Configure attributes for power mode change with below.
4059 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4060 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4061 * - PA_HSSERIES
4063 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4064 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4065 pwr_mode->lane_rx);
4066 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4067 pwr_mode->pwr_rx == FAST_MODE)
4068 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
4069 else
4070 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
4072 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4073 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4074 pwr_mode->lane_tx);
4075 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4076 pwr_mode->pwr_tx == FAST_MODE)
4077 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
4078 else
4079 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
4081 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4082 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4083 pwr_mode->pwr_rx == FAST_MODE ||
4084 pwr_mode->pwr_tx == FAST_MODE)
4085 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4086 pwr_mode->hs_rate);
4088 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4089 | pwr_mode->pwr_tx);
4091 if (ret) {
4092 dev_err(hba->dev,
4093 "%s: power mode change failed %d\n", __func__, ret);
4094 } else {
4095 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4096 pwr_mode);
4098 memcpy(&hba->pwr_info, pwr_mode,
4099 sizeof(struct ufs_pa_layer_attr));
4102 return ret;
4106 * ufshcd_config_pwr_mode - configure a new power mode
4107 * @hba: per-adapter instance
4108 * @desired_pwr_mode: desired power configuration
4110 int ufshcd_config_pwr_mode(struct ufs_hba *hba,
4111 struct ufs_pa_layer_attr *desired_pwr_mode)
4113 struct ufs_pa_layer_attr final_params = { 0 };
4114 int ret;
4116 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4117 desired_pwr_mode, &final_params);
4119 if (ret)
4120 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4122 ret = ufshcd_change_power_mode(hba, &final_params);
4123 if (!ret)
4124 ufshcd_print_pwr_info(hba);
4126 return ret;
4128 EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
4131 * ufshcd_complete_dev_init() - checks device readiness
4132 * @hba: per-adapter instance
4134 * Set fDeviceInit flag and poll until device toggles it.
4136 static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4138 int i;
4139 int err;
4140 bool flag_res = 1;
4142 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4143 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
4144 if (err) {
4145 dev_err(hba->dev,
4146 "%s setting fDeviceInit flag failed with error %d\n",
4147 __func__, err);
4148 goto out;
4151 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4152 for (i = 0; i < 1000 && !err && flag_res; i++)
4153 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4154 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4156 if (err)
4157 dev_err(hba->dev,
4158 "%s reading fDeviceInit flag failed with error %d\n",
4159 __func__, err);
4160 else if (flag_res)
4161 dev_err(hba->dev,
4162 "%s fDeviceInit was not cleared by the device\n",
4163 __func__);
4165 out:
4166 return err;
4170 * ufshcd_make_hba_operational - Make UFS controller operational
4171 * @hba: per adapter instance
4173 * To bring UFS host controller to operational state,
4174 * 1. Enable required interrupts
4175 * 2. Configure interrupt aggregation
4176 * 3. Program UTRL and UTMRL base address
4177 * 4. Configure run-stop-registers
4179 * Returns 0 on success, non-zero value on failure
4181 static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4183 int err = 0;
4184 u32 reg;
4186 /* Enable required interrupts */
4187 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4189 /* Configure interrupt aggregation */
4190 if (ufshcd_is_intr_aggr_allowed(hba))
4191 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4192 else
4193 ufshcd_disable_intr_aggr(hba);
4195 /* Configure UTRL and UTMRL base address registers */
4196 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4197 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4198 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4199 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4200 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4201 REG_UTP_TASK_REQ_LIST_BASE_L);
4202 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4203 REG_UTP_TASK_REQ_LIST_BASE_H);
4206 * Make sure base address and interrupt setup are updated before
4207 * enabling the run/stop registers below.
4209 wmb();
4212 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
4214 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
4215 if (!(ufshcd_get_lists_status(reg))) {
4216 ufshcd_enable_run_stop_reg(hba);
4217 } else {
4218 dev_err(hba->dev,
4219 "Host controller not ready to process requests");
4220 err = -EIO;
4221 goto out;
4224 out:
4225 return err;
4229 * ufshcd_hba_stop - Send controller to reset state
4230 * @hba: per adapter instance
4231 * @can_sleep: perform sleep or just spin
4233 static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4235 int err;
4237 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4238 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4239 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4240 10, 1, can_sleep);
4241 if (err)
4242 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4246 * ufshcd_hba_execute_hce - initialize the controller
4247 * @hba: per adapter instance
4249 * The controller resets itself and controller firmware initialization
4250 * sequence kicks off. When controller is ready it will set
4251 * the Host Controller Enable bit to 1.
4253 * Returns 0 on success, non-zero value on failure
4255 static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
4257 int retry;
4260 * msleep of 1 and 5 used in this function might result in msleep(20),
4261 * but it was necessary to send the UFS FPGA to reset mode during
4262 * development and testing of this driver. msleep can be changed to
4263 * mdelay and retry count can be reduced based on the controller.
4265 if (!ufshcd_is_hba_active(hba))
4266 /* change controller state to "reset state" */
4267 ufshcd_hba_stop(hba, true);
4269 /* UniPro link is disabled at this point */
4270 ufshcd_set_link_off(hba);
4272 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4274 /* start controller initialization sequence */
4275 ufshcd_hba_start(hba);
4278 * To initialize a UFS host controller HCE bit must be set to 1.
4279 * During initialization the HCE bit value changes from 1->0->1.
4280 * When the host controller completes initialization sequence
4281 * it sets the value of HCE bit to 1. The same HCE bit is read back
4282 * to check if the controller has completed initialization sequence.
4283 * So without this delay the value HCE = 1, set in the previous
4284 * instruction might be read back.
4285 * This delay can be changed based on the controller.
4287 msleep(1);
4289 /* wait for the host controller to complete initialization */
4290 retry = 10;
4291 while (ufshcd_is_hba_active(hba)) {
4292 if (retry) {
4293 retry--;
4294 } else {
4295 dev_err(hba->dev,
4296 "Controller enable failed\n");
4297 return -EIO;
4299 msleep(5);
4302 /* enable UIC related interrupts */
4303 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4305 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4307 return 0;
4310 static int ufshcd_hba_enable(struct ufs_hba *hba)
4312 int ret;
4314 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4315 ufshcd_set_link_off(hba);
4316 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4318 /* enable UIC related interrupts */
4319 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4320 ret = ufshcd_dme_reset(hba);
4321 if (!ret) {
4322 ret = ufshcd_dme_enable(hba);
4323 if (!ret)
4324 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4325 if (ret)
4326 dev_err(hba->dev,
4327 "Host controller enable failed with non-hce\n");
4329 } else {
4330 ret = ufshcd_hba_execute_hce(hba);
4333 return ret;
4335 static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4337 int tx_lanes, i, err = 0;
4339 if (!peer)
4340 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4341 &tx_lanes);
4342 else
4343 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4344 &tx_lanes);
4345 for (i = 0; i < tx_lanes; i++) {
4346 if (!peer)
4347 err = ufshcd_dme_set(hba,
4348 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4349 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4351 else
4352 err = ufshcd_dme_peer_set(hba,
4353 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4354 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4356 if (err) {
4357 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4358 __func__, peer, i, err);
4359 break;
4363 return err;
4366 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4368 return ufshcd_disable_tx_lcc(hba, true);
4372 * ufshcd_link_startup - Initialize unipro link startup
4373 * @hba: per adapter instance
4375 * Returns 0 for success, non-zero in case of failure
4377 static int ufshcd_link_startup(struct ufs_hba *hba)
4379 int ret;
4380 int retries = DME_LINKSTARTUP_RETRIES;
4381 bool link_startup_again = false;
4384 * If UFS device isn't active then we will have to issue link startup
4385 * 2 times to make sure the device state move to active.
4387 if (!ufshcd_is_ufs_dev_active(hba))
4388 link_startup_again = true;
4390 link_startup:
4391 do {
4392 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
4394 ret = ufshcd_dme_link_startup(hba);
4396 /* check if device is detected by inter-connect layer */
4397 if (!ret && !ufshcd_is_device_present(hba)) {
4398 dev_err(hba->dev, "%s: Device not present\n", __func__);
4399 ret = -ENXIO;
4400 goto out;
4404 * DME link lost indication is only received when link is up,
4405 * but we can't be sure if the link is up until link startup
4406 * succeeds. So reset the local Uni-Pro and try again.
4408 if (ret && ufshcd_hba_enable(hba))
4409 goto out;
4410 } while (ret && retries--);
4412 if (ret)
4413 /* failed to get the link up... retire */
4414 goto out;
4416 if (link_startup_again) {
4417 link_startup_again = false;
4418 retries = DME_LINKSTARTUP_RETRIES;
4419 goto link_startup;
4422 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4423 ufshcd_init_pwr_info(hba);
4424 ufshcd_print_pwr_info(hba);
4426 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4427 ret = ufshcd_disable_device_tx_lcc(hba);
4428 if (ret)
4429 goto out;
4432 /* Include any host controller configuration via UIC commands */
4433 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4434 if (ret)
4435 goto out;
4437 ret = ufshcd_make_hba_operational(hba);
4438 out:
4439 if (ret) {
4440 dev_err(hba->dev, "link startup failed %d\n", ret);
4441 ufshcd_print_host_state(hba);
4442 ufshcd_print_pwr_info(hba);
4443 ufshcd_print_host_regs(hba);
4445 return ret;
4449 * ufshcd_verify_dev_init() - Verify device initialization
4450 * @hba: per-adapter instance
4452 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4453 * device Transport Protocol (UTP) layer is ready after a reset.
4454 * If the UTP layer at the device side is not initialized, it may
4455 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4456 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4458 static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4460 int err = 0;
4461 int retries;
4463 ufshcd_hold(hba, false);
4464 mutex_lock(&hba->dev_cmd.lock);
4465 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4466 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4467 NOP_OUT_TIMEOUT);
4469 if (!err || err == -ETIMEDOUT)
4470 break;
4472 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4474 mutex_unlock(&hba->dev_cmd.lock);
4475 ufshcd_release(hba);
4477 if (err)
4478 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4479 return err;
4483 * ufshcd_set_queue_depth - set lun queue depth
4484 * @sdev: pointer to SCSI device
4486 * Read bLUQueueDepth value and activate scsi tagged command
4487 * queueing. For WLUN, queue depth is set to 1. For best-effort
4488 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4489 * value that host can queue.
4491 static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4493 int ret = 0;
4494 u8 lun_qdepth;
4495 struct ufs_hba *hba;
4497 hba = shost_priv(sdev->host);
4499 lun_qdepth = hba->nutrs;
4500 ret = ufshcd_read_unit_desc_param(hba,
4501 ufshcd_scsi_to_upiu_lun(sdev->lun),
4502 UNIT_DESC_PARAM_LU_Q_DEPTH,
4503 &lun_qdepth,
4504 sizeof(lun_qdepth));
4506 /* Some WLUN doesn't support unit descriptor */
4507 if (ret == -EOPNOTSUPP)
4508 lun_qdepth = 1;
4509 else if (!lun_qdepth)
4510 /* eventually, we can figure out the real queue depth */
4511 lun_qdepth = hba->nutrs;
4512 else
4513 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4515 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4516 __func__, lun_qdepth);
4517 scsi_change_queue_depth(sdev, lun_qdepth);
4521 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4522 * @hba: per-adapter instance
4523 * @lun: UFS device lun id
4524 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4526 * Returns 0 in case of success and b_lu_write_protect status would be returned
4527 * @b_lu_write_protect parameter.
4528 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4529 * Returns -EINVAL in case of invalid parameters passed to this function.
4531 static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4532 u8 lun,
4533 u8 *b_lu_write_protect)
4535 int ret;
4537 if (!b_lu_write_protect)
4538 ret = -EINVAL;
4540 * According to UFS device spec, RPMB LU can't be write
4541 * protected so skip reading bLUWriteProtect parameter for
4542 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4544 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4545 ret = -ENOTSUPP;
4546 else
4547 ret = ufshcd_read_unit_desc_param(hba,
4548 lun,
4549 UNIT_DESC_PARAM_LU_WR_PROTECT,
4550 b_lu_write_protect,
4551 sizeof(*b_lu_write_protect));
4552 return ret;
4556 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4557 * status
4558 * @hba: per-adapter instance
4559 * @sdev: pointer to SCSI device
4562 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4563 struct scsi_device *sdev)
4565 if (hba->dev_info.f_power_on_wp_en &&
4566 !hba->dev_info.is_lu_power_on_wp) {
4567 u8 b_lu_write_protect;
4569 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4570 &b_lu_write_protect) &&
4571 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4572 hba->dev_info.is_lu_power_on_wp = true;
4577 * ufshcd_slave_alloc - handle initial SCSI device configurations
4578 * @sdev: pointer to SCSI device
4580 * Returns success
4582 static int ufshcd_slave_alloc(struct scsi_device *sdev)
4584 struct ufs_hba *hba;
4586 hba = shost_priv(sdev->host);
4588 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4589 sdev->use_10_for_ms = 1;
4591 /* allow SCSI layer to restart the device in case of errors */
4592 sdev->allow_restart = 1;
4594 /* REPORT SUPPORTED OPERATION CODES is not supported */
4595 sdev->no_report_opcodes = 1;
4597 /* WRITE_SAME command is not supported */
4598 sdev->no_write_same = 1;
4600 ufshcd_set_queue_depth(sdev);
4602 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4604 return 0;
4608 * ufshcd_change_queue_depth - change queue depth
4609 * @sdev: pointer to SCSI device
4610 * @depth: required depth to set
4612 * Change queue depth and make sure the max. limits are not crossed.
4614 static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
4616 struct ufs_hba *hba = shost_priv(sdev->host);
4618 if (depth > hba->nutrs)
4619 depth = hba->nutrs;
4620 return scsi_change_queue_depth(sdev, depth);
4624 * ufshcd_slave_configure - adjust SCSI device configurations
4625 * @sdev: pointer to SCSI device
4627 static int ufshcd_slave_configure(struct scsi_device *sdev)
4629 struct request_queue *q = sdev->request_queue;
4631 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4632 blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
4634 return 0;
4638 * ufshcd_slave_destroy - remove SCSI device configurations
4639 * @sdev: pointer to SCSI device
4641 static void ufshcd_slave_destroy(struct scsi_device *sdev)
4643 struct ufs_hba *hba;
4645 hba = shost_priv(sdev->host);
4646 /* Drop the reference as it won't be needed anymore */
4647 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4648 unsigned long flags;
4650 spin_lock_irqsave(hba->host->host_lock, flags);
4651 hba->sdev_ufs_device = NULL;
4652 spin_unlock_irqrestore(hba->host->host_lock, flags);
4657 * ufshcd_task_req_compl - handle task management request completion
4658 * @hba: per adapter instance
4659 * @index: index of the completed request
4660 * @resp: task management service response
4662 * Returns non-zero value on error, zero on success
4664 static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index, u8 *resp)
4666 struct utp_task_req_desc *task_req_descp;
4667 struct utp_upiu_task_rsp *task_rsp_upiup;
4668 unsigned long flags;
4669 int ocs_value;
4670 int task_result;
4672 spin_lock_irqsave(hba->host->host_lock, flags);
4674 /* Clear completed tasks from outstanding_tasks */
4675 __clear_bit(index, &hba->outstanding_tasks);
4677 task_req_descp = hba->utmrdl_base_addr;
4678 ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
4680 if (ocs_value == OCS_SUCCESS) {
4681 task_rsp_upiup = (struct utp_upiu_task_rsp *)
4682 task_req_descp[index].task_rsp_upiu;
4683 task_result = be32_to_cpu(task_rsp_upiup->output_param1);
4684 task_result = task_result & MASK_TM_SERVICE_RESP;
4685 if (resp)
4686 *resp = (u8)task_result;
4687 } else {
4688 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
4689 __func__, ocs_value);
4691 spin_unlock_irqrestore(hba->host->host_lock, flags);
4693 return ocs_value;
4697 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
4698 * @lrbp: pointer to local reference block of completed command
4699 * @scsi_status: SCSI command status
4701 * Returns value base on SCSI command status
4703 static inline int
4704 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4706 int result = 0;
4708 switch (scsi_status) {
4709 case SAM_STAT_CHECK_CONDITION:
4710 ufshcd_copy_sense_data(lrbp);
4711 case SAM_STAT_GOOD:
4712 result |= DID_OK << 16 |
4713 COMMAND_COMPLETE << 8 |
4714 scsi_status;
4715 break;
4716 case SAM_STAT_TASK_SET_FULL:
4717 case SAM_STAT_BUSY:
4718 case SAM_STAT_TASK_ABORTED:
4719 ufshcd_copy_sense_data(lrbp);
4720 result |= scsi_status;
4721 break;
4722 default:
4723 result |= DID_ERROR << 16;
4724 break;
4725 } /* end of switch */
4727 return result;
4731 * ufshcd_transfer_rsp_status - Get overall status of the response
4732 * @hba: per adapter instance
4733 * @lrbp: pointer to local reference block of completed command
4735 * Returns result of the command to notify SCSI midlayer
4737 static inline int
4738 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4740 int result = 0;
4741 int scsi_status;
4742 int ocs;
4744 /* overall command status of utrd */
4745 ocs = ufshcd_get_tr_ocs(lrbp);
4747 switch (ocs) {
4748 case OCS_SUCCESS:
4749 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
4750 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
4751 switch (result) {
4752 case UPIU_TRANSACTION_RESPONSE:
4754 * get the response UPIU result to extract
4755 * the SCSI command status
4757 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4760 * get the result based on SCSI status response
4761 * to notify the SCSI midlayer of the command status
4763 scsi_status = result & MASK_SCSI_STATUS;
4764 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
4767 * Currently we are only supporting BKOPs exception
4768 * events hence we can ignore BKOPs exception event
4769 * during power management callbacks. BKOPs exception
4770 * event is not expected to be raised in runtime suspend
4771 * callback as it allows the urgent bkops.
4772 * During system suspend, we are anyway forcefully
4773 * disabling the bkops and if urgent bkops is needed
4774 * it will be enabled on system resume. Long term
4775 * solution could be to abort the system suspend if
4776 * UFS device needs urgent BKOPs.
4778 if (!hba->pm_op_in_progress &&
4779 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
4780 schedule_work(&hba->eeh_work);
4781 break;
4782 case UPIU_TRANSACTION_REJECT_UPIU:
4783 /* TODO: handle Reject UPIU Response */
4784 result = DID_ERROR << 16;
4785 dev_err(hba->dev,
4786 "Reject UPIU not fully implemented\n");
4787 break;
4788 default:
4789 result = DID_ERROR << 16;
4790 dev_err(hba->dev,
4791 "Unexpected request response code = %x\n",
4792 result);
4793 break;
4795 break;
4796 case OCS_ABORTED:
4797 result |= DID_ABORT << 16;
4798 break;
4799 case OCS_INVALID_COMMAND_STATUS:
4800 result |= DID_REQUEUE << 16;
4801 break;
4802 case OCS_INVALID_CMD_TABLE_ATTR:
4803 case OCS_INVALID_PRDT_ATTR:
4804 case OCS_MISMATCH_DATA_BUF_SIZE:
4805 case OCS_MISMATCH_RESP_UPIU_SIZE:
4806 case OCS_PEER_COMM_FAILURE:
4807 case OCS_FATAL_ERROR:
4808 default:
4809 result |= DID_ERROR << 16;
4810 dev_err(hba->dev,
4811 "OCS error from controller = %x for tag %d\n",
4812 ocs, lrbp->task_tag);
4813 ufshcd_print_host_regs(hba);
4814 ufshcd_print_host_state(hba);
4815 break;
4816 } /* end of switch */
4818 if ((host_byte(result) != DID_OK) && !hba->silence_err_logs)
4819 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
4820 return result;
4824 * ufshcd_uic_cmd_compl - handle completion of uic command
4825 * @hba: per adapter instance
4826 * @intr_status: interrupt status generated by the controller
4828 static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
4830 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
4831 hba->active_uic_cmd->argument2 |=
4832 ufshcd_get_uic_cmd_result(hba);
4833 hba->active_uic_cmd->argument3 =
4834 ufshcd_get_dme_attr_val(hba);
4835 complete(&hba->active_uic_cmd->done);
4838 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
4839 complete(hba->uic_async_done);
4843 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
4844 * @hba: per adapter instance
4845 * @completed_reqs: requests to complete
4847 static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4848 unsigned long completed_reqs)
4850 struct ufshcd_lrb *lrbp;
4851 struct scsi_cmnd *cmd;
4852 int result;
4853 int index;
4855 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4856 lrbp = &hba->lrb[index];
4857 cmd = lrbp->cmd;
4858 if (cmd) {
4859 ufshcd_add_command_trace(hba, index, "complete");
4860 result = ufshcd_transfer_rsp_status(hba, lrbp);
4861 scsi_dma_unmap(cmd);
4862 cmd->result = result;
4863 /* Mark completed command as NULL in LRB */
4864 lrbp->cmd = NULL;
4865 clear_bit_unlock(index, &hba->lrb_in_use);
4866 /* Do not touch lrbp after scsi done */
4867 cmd->scsi_done(cmd);
4868 __ufshcd_release(hba);
4869 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4870 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
4871 if (hba->dev_cmd.complete) {
4872 ufshcd_add_command_trace(hba, index,
4873 "dev_complete");
4874 complete(hba->dev_cmd.complete);
4877 if (ufshcd_is_clkscaling_supported(hba))
4878 hba->clk_scaling.active_reqs--;
4880 lrbp->compl_time_stamp = ktime_get();
4883 /* clear corresponding bits of completed commands */
4884 hba->outstanding_reqs ^= completed_reqs;
4886 ufshcd_clk_scaling_update_busy(hba);
4888 /* we might have free'd some tags above */
4889 wake_up(&hba->dev_cmd.tag_wq);
4893 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4894 * @hba: per adapter instance
4896 static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
4898 unsigned long completed_reqs;
4899 u32 tr_doorbell;
4901 /* Resetting interrupt aggregation counters first and reading the
4902 * DOOR_BELL afterward allows us to handle all the completed requests.
4903 * In order to prevent other interrupts starvation the DB is read once
4904 * after reset. The down side of this solution is the possibility of
4905 * false interrupt if device completes another request after resetting
4906 * aggregation and before reading the DB.
4908 if (ufshcd_is_intr_aggr_allowed(hba) &&
4909 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
4910 ufshcd_reset_intr_aggr(hba);
4912 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4913 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4915 __ufshcd_transfer_req_compl(hba, completed_reqs);
4919 * ufshcd_disable_ee - disable exception event
4920 * @hba: per-adapter instance
4921 * @mask: exception event to disable
4923 * Disables exception event in the device so that the EVENT_ALERT
4924 * bit is not set.
4926 * Returns zero on success, non-zero error value on failure.
4928 static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4930 int err = 0;
4931 u32 val;
4933 if (!(hba->ee_ctrl_mask & mask))
4934 goto out;
4936 val = hba->ee_ctrl_mask & ~mask;
4937 val &= MASK_EE_STATUS;
4938 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4939 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4940 if (!err)
4941 hba->ee_ctrl_mask &= ~mask;
4942 out:
4943 return err;
4947 * ufshcd_enable_ee - enable exception event
4948 * @hba: per-adapter instance
4949 * @mask: exception event to enable
4951 * Enable corresponding exception event in the device to allow
4952 * device to alert host in critical scenarios.
4954 * Returns zero on success, non-zero error value on failure.
4956 static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4958 int err = 0;
4959 u32 val;
4961 if (hba->ee_ctrl_mask & mask)
4962 goto out;
4964 val = hba->ee_ctrl_mask | mask;
4965 val &= MASK_EE_STATUS;
4966 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4967 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4968 if (!err)
4969 hba->ee_ctrl_mask |= mask;
4970 out:
4971 return err;
4975 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4976 * @hba: per-adapter instance
4978 * Allow device to manage background operations on its own. Enabling
4979 * this might lead to inconsistent latencies during normal data transfers
4980 * as the device is allowed to manage its own way of handling background
4981 * operations.
4983 * Returns zero on success, non-zero on failure.
4985 static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4987 int err = 0;
4989 if (hba->auto_bkops_enabled)
4990 goto out;
4992 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4993 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4994 if (err) {
4995 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4996 __func__, err);
4997 goto out;
5000 hba->auto_bkops_enabled = true;
5001 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
5003 /* No need of URGENT_BKOPS exception from the device */
5004 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5005 if (err)
5006 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5007 __func__, err);
5008 out:
5009 return err;
5013 * ufshcd_disable_auto_bkops - block device in doing background operations
5014 * @hba: per-adapter instance
5016 * Disabling background operations improves command response latency but
5017 * has drawback of device moving into critical state where the device is
5018 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5019 * host is idle so that BKOPS are managed effectively without any negative
5020 * impacts.
5022 * Returns zero on success, non-zero on failure.
5024 static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5026 int err = 0;
5028 if (!hba->auto_bkops_enabled)
5029 goto out;
5032 * If host assisted BKOPs is to be enabled, make sure
5033 * urgent bkops exception is allowed.
5035 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5036 if (err) {
5037 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5038 __func__, err);
5039 goto out;
5042 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
5043 QUERY_FLAG_IDN_BKOPS_EN, NULL);
5044 if (err) {
5045 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5046 __func__, err);
5047 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5048 goto out;
5051 hba->auto_bkops_enabled = false;
5052 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
5053 hba->is_urgent_bkops_lvl_checked = false;
5054 out:
5055 return err;
5059 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
5060 * @hba: per adapter instance
5062 * After a device reset the device may toggle the BKOPS_EN flag
5063 * to default value. The s/w tracking variables should be updated
5064 * as well. This function would change the auto-bkops state based on
5065 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
5067 static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
5069 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5070 hba->auto_bkops_enabled = false;
5071 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5072 ufshcd_enable_auto_bkops(hba);
5073 } else {
5074 hba->auto_bkops_enabled = true;
5075 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5076 ufshcd_disable_auto_bkops(hba);
5078 hba->is_urgent_bkops_lvl_checked = false;
5081 static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5083 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5084 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5088 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5089 * @hba: per-adapter instance
5090 * @status: bkops_status value
5092 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5093 * flag in the device to permit background operations if the device
5094 * bkops_status is greater than or equal to "status" argument passed to
5095 * this function, disable otherwise.
5097 * Returns 0 for success, non-zero in case of failure.
5099 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5100 * to know whether auto bkops is enabled or disabled after this function
5101 * returns control to it.
5103 static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5104 enum bkops_status status)
5106 int err;
5107 u32 curr_status = 0;
5109 err = ufshcd_get_bkops_status(hba, &curr_status);
5110 if (err) {
5111 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5112 __func__, err);
5113 goto out;
5114 } else if (curr_status > BKOPS_STATUS_MAX) {
5115 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5116 __func__, curr_status);
5117 err = -EINVAL;
5118 goto out;
5121 if (curr_status >= status)
5122 err = ufshcd_enable_auto_bkops(hba);
5123 else
5124 err = ufshcd_disable_auto_bkops(hba);
5125 out:
5126 return err;
5130 * ufshcd_urgent_bkops - handle urgent bkops exception event
5131 * @hba: per-adapter instance
5133 * Enable fBackgroundOpsEn flag in the device to permit background
5134 * operations.
5136 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5137 * and negative error value for any other failure.
5139 static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5141 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
5144 static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5146 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5147 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5150 static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5152 int err;
5153 u32 curr_status = 0;
5155 if (hba->is_urgent_bkops_lvl_checked)
5156 goto enable_auto_bkops;
5158 err = ufshcd_get_bkops_status(hba, &curr_status);
5159 if (err) {
5160 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5161 __func__, err);
5162 goto out;
5166 * We are seeing that some devices are raising the urgent bkops
5167 * exception events even when BKOPS status doesn't indicate performace
5168 * impacted or critical. Handle these device by determining their urgent
5169 * bkops status at runtime.
5171 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5172 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5173 __func__, curr_status);
5174 /* update the current status as the urgent bkops level */
5175 hba->urgent_bkops_lvl = curr_status;
5176 hba->is_urgent_bkops_lvl_checked = true;
5179 enable_auto_bkops:
5180 err = ufshcd_enable_auto_bkops(hba);
5181 out:
5182 if (err < 0)
5183 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5184 __func__, err);
5188 * ufshcd_exception_event_handler - handle exceptions raised by device
5189 * @work: pointer to work data
5191 * Read bExceptionEventStatus attribute from the device and handle the
5192 * exception event accordingly.
5194 static void ufshcd_exception_event_handler(struct work_struct *work)
5196 struct ufs_hba *hba;
5197 int err;
5198 u32 status = 0;
5199 hba = container_of(work, struct ufs_hba, eeh_work);
5201 pm_runtime_get_sync(hba->dev);
5202 scsi_block_requests(hba->host);
5203 err = ufshcd_get_ee_status(hba, &status);
5204 if (err) {
5205 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5206 __func__, err);
5207 goto out;
5210 status &= hba->ee_ctrl_mask;
5212 if (status & MASK_EE_URGENT_BKOPS)
5213 ufshcd_bkops_exception_event_handler(hba);
5215 out:
5216 scsi_unblock_requests(hba->host);
5217 pm_runtime_put_sync(hba->dev);
5218 return;
5221 /* Complete requests that have door-bell cleared */
5222 static void ufshcd_complete_requests(struct ufs_hba *hba)
5224 ufshcd_transfer_req_compl(hba);
5225 ufshcd_tmc_handler(hba);
5229 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5230 * to recover from the DL NAC errors or not.
5231 * @hba: per-adapter instance
5233 * Returns true if error handling is required, false otherwise
5235 static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5237 unsigned long flags;
5238 bool err_handling = true;
5240 spin_lock_irqsave(hba->host->host_lock, flags);
5242 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5243 * device fatal error and/or DL NAC & REPLAY timeout errors.
5245 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5246 goto out;
5248 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5249 ((hba->saved_err & UIC_ERROR) &&
5250 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5251 goto out;
5253 if ((hba->saved_err & UIC_ERROR) &&
5254 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5255 int err;
5257 * wait for 50ms to see if we can get any other errors or not.
5259 spin_unlock_irqrestore(hba->host->host_lock, flags);
5260 msleep(50);
5261 spin_lock_irqsave(hba->host->host_lock, flags);
5264 * now check if we have got any other severe errors other than
5265 * DL NAC error?
5267 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5268 ((hba->saved_err & UIC_ERROR) &&
5269 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5270 goto out;
5273 * As DL NAC is the only error received so far, send out NOP
5274 * command to confirm if link is still active or not.
5275 * - If we don't get any response then do error recovery.
5276 * - If we get response then clear the DL NAC error bit.
5279 spin_unlock_irqrestore(hba->host->host_lock, flags);
5280 err = ufshcd_verify_dev_init(hba);
5281 spin_lock_irqsave(hba->host->host_lock, flags);
5283 if (err)
5284 goto out;
5286 /* Link seems to be alive hence ignore the DL NAC errors */
5287 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5288 hba->saved_err &= ~UIC_ERROR;
5289 /* clear NAC error */
5290 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5291 if (!hba->saved_uic_err) {
5292 err_handling = false;
5293 goto out;
5296 out:
5297 spin_unlock_irqrestore(hba->host->host_lock, flags);
5298 return err_handling;
5302 * ufshcd_err_handler - handle UFS errors that require s/w attention
5303 * @work: pointer to work structure
5305 static void ufshcd_err_handler(struct work_struct *work)
5307 struct ufs_hba *hba;
5308 unsigned long flags;
5309 u32 err_xfer = 0;
5310 u32 err_tm = 0;
5311 int err = 0;
5312 int tag;
5313 bool needs_reset = false;
5315 hba = container_of(work, struct ufs_hba, eh_work);
5317 pm_runtime_get_sync(hba->dev);
5318 ufshcd_hold(hba, false);
5320 spin_lock_irqsave(hba->host->host_lock, flags);
5321 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
5322 goto out;
5324 hba->ufshcd_state = UFSHCD_STATE_RESET;
5325 ufshcd_set_eh_in_progress(hba);
5327 /* Complete requests that have door-bell cleared by h/w */
5328 ufshcd_complete_requests(hba);
5330 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5331 bool ret;
5333 spin_unlock_irqrestore(hba->host->host_lock, flags);
5334 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5335 ret = ufshcd_quirk_dl_nac_errors(hba);
5336 spin_lock_irqsave(hba->host->host_lock, flags);
5337 if (!ret)
5338 goto skip_err_handling;
5340 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5341 ((hba->saved_err & UIC_ERROR) &&
5342 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5343 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5344 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5345 needs_reset = true;
5348 * if host reset is required then skip clearing the pending
5349 * transfers forcefully because they will get cleared during
5350 * host reset and restore
5352 if (needs_reset)
5353 goto skip_pending_xfer_clear;
5355 /* release lock as clear command might sleep */
5356 spin_unlock_irqrestore(hba->host->host_lock, flags);
5357 /* Clear pending transfer requests */
5358 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5359 if (ufshcd_clear_cmd(hba, tag)) {
5360 err_xfer = true;
5361 goto lock_skip_pending_xfer_clear;
5365 /* Clear pending task management requests */
5366 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5367 if (ufshcd_clear_tm_cmd(hba, tag)) {
5368 err_tm = true;
5369 goto lock_skip_pending_xfer_clear;
5373 lock_skip_pending_xfer_clear:
5374 spin_lock_irqsave(hba->host->host_lock, flags);
5376 /* Complete the requests that are cleared by s/w */
5377 ufshcd_complete_requests(hba);
5379 if (err_xfer || err_tm)
5380 needs_reset = true;
5382 skip_pending_xfer_clear:
5383 /* Fatal errors need reset */
5384 if (needs_reset) {
5385 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5388 * ufshcd_reset_and_restore() does the link reinitialization
5389 * which will need atleast one empty doorbell slot to send the
5390 * device management commands (NOP and query commands).
5391 * If there is no slot empty at this moment then free up last
5392 * slot forcefully.
5394 if (hba->outstanding_reqs == max_doorbells)
5395 __ufshcd_transfer_req_compl(hba,
5396 (1UL << (hba->nutrs - 1)));
5398 spin_unlock_irqrestore(hba->host->host_lock, flags);
5399 err = ufshcd_reset_and_restore(hba);
5400 spin_lock_irqsave(hba->host->host_lock, flags);
5401 if (err) {
5402 dev_err(hba->dev, "%s: reset and restore failed\n",
5403 __func__);
5404 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5407 * Inform scsi mid-layer that we did reset and allow to handle
5408 * Unit Attention properly.
5410 scsi_report_bus_reset(hba->host, 0);
5411 hba->saved_err = 0;
5412 hba->saved_uic_err = 0;
5415 skip_err_handling:
5416 if (!needs_reset) {
5417 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5418 if (hba->saved_err || hba->saved_uic_err)
5419 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5420 __func__, hba->saved_err, hba->saved_uic_err);
5423 ufshcd_clear_eh_in_progress(hba);
5425 out:
5426 spin_unlock_irqrestore(hba->host->host_lock, flags);
5427 ufshcd_scsi_unblock_requests(hba);
5428 ufshcd_release(hba);
5429 pm_runtime_put_sync(hba->dev);
5432 static void ufshcd_update_uic_reg_hist(struct ufs_uic_err_reg_hist *reg_hist,
5433 u32 reg)
5435 reg_hist->reg[reg_hist->pos] = reg;
5436 reg_hist->tstamp[reg_hist->pos] = ktime_get();
5437 reg_hist->pos = (reg_hist->pos + 1) % UIC_ERR_REG_HIST_LENGTH;
5441 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5442 * @hba: per-adapter instance
5444 static void ufshcd_update_uic_error(struct ufs_hba *hba)
5446 u32 reg;
5448 /* PHY layer lane error */
5449 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5450 /* Ignore LINERESET indication, as this is not an error */
5451 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
5452 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
5454 * To know whether this error is fatal or not, DB timeout
5455 * must be checked but this error is handled separately.
5457 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
5458 ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg);
5461 /* PA_INIT_ERROR is fatal and needs UIC reset */
5462 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
5463 if (reg)
5464 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dl_err, reg);
5466 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5467 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5468 else if (hba->dev_quirks &
5469 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5470 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5471 hba->uic_error |=
5472 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5473 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5474 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5477 /* UIC NL/TL/DME errors needs software retry */
5478 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
5479 if (reg) {
5480 ufshcd_update_uic_reg_hist(&hba->ufs_stats.nl_err, reg);
5481 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
5484 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
5485 if (reg) {
5486 ufshcd_update_uic_reg_hist(&hba->ufs_stats.tl_err, reg);
5487 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
5490 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
5491 if (reg) {
5492 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dme_err, reg);
5493 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
5496 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5497 __func__, hba->uic_error);
5501 * ufshcd_check_errors - Check for errors that need s/w attention
5502 * @hba: per-adapter instance
5504 static void ufshcd_check_errors(struct ufs_hba *hba)
5506 bool queue_eh_work = false;
5508 if (hba->errors & INT_FATAL_ERRORS)
5509 queue_eh_work = true;
5511 if (hba->errors & UIC_ERROR) {
5512 hba->uic_error = 0;
5513 ufshcd_update_uic_error(hba);
5514 if (hba->uic_error)
5515 queue_eh_work = true;
5518 if (queue_eh_work) {
5520 * update the transfer error masks to sticky bits, let's do this
5521 * irrespective of current ufshcd_state.
5523 hba->saved_err |= hba->errors;
5524 hba->saved_uic_err |= hba->uic_error;
5526 /* handle fatal errors only when link is functional */
5527 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5528 /* block commands from scsi mid-layer */
5529 ufshcd_scsi_block_requests(hba);
5531 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
5533 /* dump controller state before resetting */
5534 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5535 bool pr_prdt = !!(hba->saved_err &
5536 SYSTEM_BUS_FATAL_ERROR);
5538 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5539 __func__, hba->saved_err,
5540 hba->saved_uic_err);
5542 ufshcd_print_host_regs(hba);
5543 ufshcd_print_pwr_info(hba);
5544 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5545 ufshcd_print_trs(hba, hba->outstanding_reqs,
5546 pr_prdt);
5548 schedule_work(&hba->eh_work);
5552 * if (!queue_eh_work) -
5553 * Other errors are either non-fatal where host recovers
5554 * itself without s/w intervention or errors that will be
5555 * handled by the SCSI core layer.
5560 * ufshcd_tmc_handler - handle task management function completion
5561 * @hba: per adapter instance
5563 static void ufshcd_tmc_handler(struct ufs_hba *hba)
5565 u32 tm_doorbell;
5567 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
5568 hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
5569 wake_up(&hba->tm_wq);
5573 * ufshcd_sl_intr - Interrupt service routine
5574 * @hba: per adapter instance
5575 * @intr_status: contains interrupts generated by the controller
5577 static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5579 hba->errors = UFSHCD_ERROR_MASK & intr_status;
5580 if (hba->errors)
5581 ufshcd_check_errors(hba);
5583 if (intr_status & UFSHCD_UIC_MASK)
5584 ufshcd_uic_cmd_compl(hba, intr_status);
5586 if (intr_status & UTP_TASK_REQ_COMPL)
5587 ufshcd_tmc_handler(hba);
5589 if (intr_status & UTP_TRANSFER_REQ_COMPL)
5590 ufshcd_transfer_req_compl(hba);
5594 * ufshcd_intr - Main interrupt service routine
5595 * @irq: irq number
5596 * @__hba: pointer to adapter instance
5598 * Returns IRQ_HANDLED - If interrupt is valid
5599 * IRQ_NONE - If invalid interrupt
5601 static irqreturn_t ufshcd_intr(int irq, void *__hba)
5603 u32 intr_status, enabled_intr_status;
5604 irqreturn_t retval = IRQ_NONE;
5605 struct ufs_hba *hba = __hba;
5606 int retries = hba->nutrs;
5608 spin_lock(hba->host->host_lock);
5609 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5612 * There could be max of hba->nutrs reqs in flight and in worst case
5613 * if the reqs get finished 1 by 1 after the interrupt status is
5614 * read, make sure we handle them by checking the interrupt status
5615 * again in a loop until we process all of the reqs before returning.
5617 do {
5618 enabled_intr_status =
5619 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5620 if (intr_status)
5621 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
5622 if (enabled_intr_status) {
5623 ufshcd_sl_intr(hba, enabled_intr_status);
5624 retval = IRQ_HANDLED;
5627 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5628 } while (intr_status && --retries);
5630 spin_unlock(hba->host->host_lock);
5631 return retval;
5634 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5636 int err = 0;
5637 u32 mask = 1 << tag;
5638 unsigned long flags;
5640 if (!test_bit(tag, &hba->outstanding_tasks))
5641 goto out;
5643 spin_lock_irqsave(hba->host->host_lock, flags);
5644 ufshcd_utmrl_clear(hba, tag);
5645 spin_unlock_irqrestore(hba->host->host_lock, flags);
5647 /* poll for max. 1 sec to clear door bell register by h/w */
5648 err = ufshcd_wait_for_register(hba,
5649 REG_UTP_TASK_REQ_DOOR_BELL,
5650 mask, 0, 1000, 1000, true);
5651 out:
5652 return err;
5656 * ufshcd_issue_tm_cmd - issues task management commands to controller
5657 * @hba: per adapter instance
5658 * @lun_id: LUN ID to which TM command is sent
5659 * @task_id: task ID to which the TM command is applicable
5660 * @tm_function: task management function opcode
5661 * @tm_response: task management service response return value
5663 * Returns non-zero value on error, zero on success.
5665 static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5666 u8 tm_function, u8 *tm_response)
5668 struct utp_task_req_desc *task_req_descp;
5669 struct utp_upiu_task_req *task_req_upiup;
5670 struct Scsi_Host *host;
5671 unsigned long flags;
5672 int free_slot;
5673 int err;
5674 int task_tag;
5676 host = hba->host;
5679 * Get free slot, sleep if slots are unavailable.
5680 * Even though we use wait_event() which sleeps indefinitely,
5681 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5683 wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
5684 ufshcd_hold(hba, false);
5686 spin_lock_irqsave(host->host_lock, flags);
5687 task_req_descp = hba->utmrdl_base_addr;
5688 task_req_descp += free_slot;
5690 /* Configure task request descriptor */
5691 task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5692 task_req_descp->header.dword_2 =
5693 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5695 /* Configure task request UPIU */
5696 task_req_upiup =
5697 (struct utp_upiu_task_req *) task_req_descp->task_req_upiu;
5698 task_tag = hba->nutrs + free_slot;
5699 task_req_upiup->header.dword_0 =
5700 UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0,
5701 lun_id, task_tag);
5702 task_req_upiup->header.dword_1 =
5703 UPIU_HEADER_DWORD(0, tm_function, 0, 0);
5705 * The host shall provide the same value for LUN field in the basic
5706 * header and for Input Parameter.
5708 task_req_upiup->input_param1 = cpu_to_be32(lun_id);
5709 task_req_upiup->input_param2 = cpu_to_be32(task_id);
5711 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5713 /* send command to the controller */
5714 __set_bit(free_slot, &hba->outstanding_tasks);
5716 /* Make sure descriptors are ready before ringing the task doorbell */
5717 wmb();
5719 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
5720 /* Make sure that doorbell is committed immediately */
5721 wmb();
5723 spin_unlock_irqrestore(host->host_lock, flags);
5725 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5727 /* wait until the task management command is completed */
5728 err = wait_event_timeout(hba->tm_wq,
5729 test_bit(free_slot, &hba->tm_condition),
5730 msecs_to_jiffies(TM_CMD_TIMEOUT));
5731 if (!err) {
5732 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
5733 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5734 __func__, tm_function);
5735 if (ufshcd_clear_tm_cmd(hba, free_slot))
5736 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5737 __func__, free_slot);
5738 err = -ETIMEDOUT;
5739 } else {
5740 err = ufshcd_task_req_compl(hba, free_slot, tm_response);
5741 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
5744 clear_bit(free_slot, &hba->tm_condition);
5745 ufshcd_put_tm_slot(hba, free_slot);
5746 wake_up(&hba->tm_tag_wq);
5748 ufshcd_release(hba);
5749 return err;
5753 * ufshcd_eh_device_reset_handler - device reset handler registered to
5754 * scsi layer.
5755 * @cmd: SCSI command pointer
5757 * Returns SUCCESS/FAILED
5759 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
5761 struct Scsi_Host *host;
5762 struct ufs_hba *hba;
5763 unsigned int tag;
5764 u32 pos;
5765 int err;
5766 u8 resp = 0xF;
5767 struct ufshcd_lrb *lrbp;
5768 unsigned long flags;
5770 host = cmd->device->host;
5771 hba = shost_priv(host);
5772 tag = cmd->request->tag;
5774 lrbp = &hba->lrb[tag];
5775 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
5776 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
5777 if (!err)
5778 err = resp;
5779 goto out;
5782 /* clear the commands that were pending for corresponding LUN */
5783 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
5784 if (hba->lrb[pos].lun == lrbp->lun) {
5785 err = ufshcd_clear_cmd(hba, pos);
5786 if (err)
5787 break;
5790 spin_lock_irqsave(host->host_lock, flags);
5791 ufshcd_transfer_req_compl(hba);
5792 spin_unlock_irqrestore(host->host_lock, flags);
5794 out:
5795 hba->req_abort_count = 0;
5796 if (!err) {
5797 err = SUCCESS;
5798 } else {
5799 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
5800 err = FAILED;
5802 return err;
5805 static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
5807 struct ufshcd_lrb *lrbp;
5808 int tag;
5810 for_each_set_bit(tag, &bitmap, hba->nutrs) {
5811 lrbp = &hba->lrb[tag];
5812 lrbp->req_abort_skip = true;
5817 * ufshcd_abort - abort a specific command
5818 * @cmd: SCSI command pointer
5820 * Abort the pending command in device by sending UFS_ABORT_TASK task management
5821 * command, and in host controller by clearing the door-bell register. There can
5822 * be race between controller sending the command to the device while abort is
5823 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
5824 * really issued and then try to abort it.
5826 * Returns SUCCESS/FAILED
5828 static int ufshcd_abort(struct scsi_cmnd *cmd)
5830 struct Scsi_Host *host;
5831 struct ufs_hba *hba;
5832 unsigned long flags;
5833 unsigned int tag;
5834 int err = 0;
5835 int poll_cnt;
5836 u8 resp = 0xF;
5837 struct ufshcd_lrb *lrbp;
5838 u32 reg;
5840 host = cmd->device->host;
5841 hba = shost_priv(host);
5842 tag = cmd->request->tag;
5843 lrbp = &hba->lrb[tag];
5844 if (!ufshcd_valid_tag(hba, tag)) {
5845 dev_err(hba->dev,
5846 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
5847 __func__, tag, cmd, cmd->request);
5848 BUG();
5852 * Task abort to the device W-LUN is illegal. When this command
5853 * will fail, due to spec violation, scsi err handling next step
5854 * will be to send LU reset which, again, is a spec violation.
5855 * To avoid these unnecessary/illegal step we skip to the last error
5856 * handling stage: reset and restore.
5858 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
5859 return ufshcd_eh_host_reset_handler(cmd);
5861 ufshcd_hold(hba, false);
5862 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5863 /* If command is already aborted/completed, return SUCCESS */
5864 if (!(test_bit(tag, &hba->outstanding_reqs))) {
5865 dev_err(hba->dev,
5866 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
5867 __func__, tag, hba->outstanding_reqs, reg);
5868 goto out;
5871 if (!(reg & (1 << tag))) {
5872 dev_err(hba->dev,
5873 "%s: cmd was completed, but without a notifying intr, tag = %d",
5874 __func__, tag);
5877 /* Print Transfer Request of aborted task */
5878 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
5881 * Print detailed info about aborted request.
5882 * As more than one request might get aborted at the same time,
5883 * print full information only for the first aborted request in order
5884 * to reduce repeated printouts. For other aborted requests only print
5885 * basic details.
5887 scsi_print_command(hba->lrb[tag].cmd);
5888 if (!hba->req_abort_count) {
5889 ufshcd_print_host_regs(hba);
5890 ufshcd_print_host_state(hba);
5891 ufshcd_print_pwr_info(hba);
5892 ufshcd_print_trs(hba, 1 << tag, true);
5893 } else {
5894 ufshcd_print_trs(hba, 1 << tag, false);
5896 hba->req_abort_count++;
5898 /* Skip task abort in case previous aborts failed and report failure */
5899 if (lrbp->req_abort_skip) {
5900 err = -EIO;
5901 goto out;
5904 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
5905 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
5906 UFS_QUERY_TASK, &resp);
5907 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
5908 /* cmd pending in the device */
5909 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
5910 __func__, tag);
5911 break;
5912 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
5914 * cmd not pending in the device, check if it is
5915 * in transition.
5917 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
5918 __func__, tag);
5919 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5920 if (reg & (1 << tag)) {
5921 /* sleep for max. 200us to stabilize */
5922 usleep_range(100, 200);
5923 continue;
5925 /* command completed already */
5926 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
5927 __func__, tag);
5928 goto out;
5929 } else {
5930 dev_err(hba->dev,
5931 "%s: no response from device. tag = %d, err %d\n",
5932 __func__, tag, err);
5933 if (!err)
5934 err = resp; /* service response error */
5935 goto out;
5939 if (!poll_cnt) {
5940 err = -EBUSY;
5941 goto out;
5944 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
5945 UFS_ABORT_TASK, &resp);
5946 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
5947 if (!err) {
5948 err = resp; /* service response error */
5949 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
5950 __func__, tag, err);
5952 goto out;
5955 err = ufshcd_clear_cmd(hba, tag);
5956 if (err) {
5957 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
5958 __func__, tag, err);
5959 goto out;
5962 scsi_dma_unmap(cmd);
5964 spin_lock_irqsave(host->host_lock, flags);
5965 ufshcd_outstanding_req_clear(hba, tag);
5966 hba->lrb[tag].cmd = NULL;
5967 spin_unlock_irqrestore(host->host_lock, flags);
5969 clear_bit_unlock(tag, &hba->lrb_in_use);
5970 wake_up(&hba->dev_cmd.tag_wq);
5972 out:
5973 if (!err) {
5974 err = SUCCESS;
5975 } else {
5976 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
5977 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
5978 err = FAILED;
5982 * This ufshcd_release() corresponds to the original scsi cmd that got
5983 * aborted here (as we won't get any IRQ for it).
5985 ufshcd_release(hba);
5986 return err;
5990 * ufshcd_host_reset_and_restore - reset and restore host controller
5991 * @hba: per-adapter instance
5993 * Note that host controller reset may issue DME_RESET to
5994 * local and remote (device) Uni-Pro stack and the attributes
5995 * are reset to default state.
5997 * Returns zero on success, non-zero on failure
5999 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6001 int err;
6002 unsigned long flags;
6005 * Stop the host controller and complete the requests
6006 * cleared by h/w
6008 spin_lock_irqsave(hba->host->host_lock, flags);
6009 ufshcd_hba_stop(hba, false);
6010 hba->silence_err_logs = true;
6011 ufshcd_complete_requests(hba);
6012 hba->silence_err_logs = false;
6013 spin_unlock_irqrestore(hba->host->host_lock, flags);
6015 /* scale up clocks to max frequency before full reinitialization */
6016 ufshcd_scale_clks(hba, true);
6018 err = ufshcd_hba_enable(hba);
6019 if (err)
6020 goto out;
6022 /* Establish the link again and restore the device */
6023 err = ufshcd_probe_hba(hba);
6025 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
6026 err = -EIO;
6027 out:
6028 if (err)
6029 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
6031 return err;
6035 * ufshcd_reset_and_restore - reset and re-initialize host/device
6036 * @hba: per-adapter instance
6038 * Reset and recover device, host and re-establish link. This
6039 * is helpful to recover the communication in fatal error conditions.
6041 * Returns zero on success, non-zero on failure
6043 static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6045 int err = 0;
6046 int retries = MAX_HOST_RESET_RETRIES;
6048 do {
6049 err = ufshcd_host_reset_and_restore(hba);
6050 } while (err && --retries);
6052 return err;
6056 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
6057 * @cmd: SCSI command pointer
6059 * Returns SUCCESS/FAILED
6061 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6063 int err;
6064 unsigned long flags;
6065 struct ufs_hba *hba;
6067 hba = shost_priv(cmd->device->host);
6069 ufshcd_hold(hba, false);
6071 * Check if there is any race with fatal error handling.
6072 * If so, wait for it to complete. Even though fatal error
6073 * handling does reset and restore in some cases, don't assume
6074 * anything out of it. We are just avoiding race here.
6076 do {
6077 spin_lock_irqsave(hba->host->host_lock, flags);
6078 if (!(work_pending(&hba->eh_work) ||
6079 hba->ufshcd_state == UFSHCD_STATE_RESET ||
6080 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
6081 break;
6082 spin_unlock_irqrestore(hba->host->host_lock, flags);
6083 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
6084 flush_work(&hba->eh_work);
6085 } while (1);
6087 hba->ufshcd_state = UFSHCD_STATE_RESET;
6088 ufshcd_set_eh_in_progress(hba);
6089 spin_unlock_irqrestore(hba->host->host_lock, flags);
6091 err = ufshcd_reset_and_restore(hba);
6093 spin_lock_irqsave(hba->host->host_lock, flags);
6094 if (!err) {
6095 err = SUCCESS;
6096 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6097 } else {
6098 err = FAILED;
6099 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6101 ufshcd_clear_eh_in_progress(hba);
6102 spin_unlock_irqrestore(hba->host->host_lock, flags);
6104 ufshcd_release(hba);
6105 return err;
6109 * ufshcd_get_max_icc_level - calculate the ICC level
6110 * @sup_curr_uA: max. current supported by the regulator
6111 * @start_scan: row at the desc table to start scan from
6112 * @buff: power descriptor buffer
6114 * Returns calculated max ICC level for specific regulator
6116 static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6118 int i;
6119 int curr_uA;
6120 u16 data;
6121 u16 unit;
6123 for (i = start_scan; i >= 0; i--) {
6124 data = be16_to_cpup((__be16 *)&buff[2 * i]);
6125 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6126 ATTR_ICC_LVL_UNIT_OFFSET;
6127 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6128 switch (unit) {
6129 case UFSHCD_NANO_AMP:
6130 curr_uA = curr_uA / 1000;
6131 break;
6132 case UFSHCD_MILI_AMP:
6133 curr_uA = curr_uA * 1000;
6134 break;
6135 case UFSHCD_AMP:
6136 curr_uA = curr_uA * 1000 * 1000;
6137 break;
6138 case UFSHCD_MICRO_AMP:
6139 default:
6140 break;
6142 if (sup_curr_uA >= curr_uA)
6143 break;
6145 if (i < 0) {
6146 i = 0;
6147 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6150 return (u32)i;
6154 * ufshcd_calc_icc_level - calculate the max ICC level
6155 * In case regulators are not initialized we'll return 0
6156 * @hba: per-adapter instance
6157 * @desc_buf: power descriptor buffer to extract ICC levels from.
6158 * @len: length of desc_buff
6160 * Returns calculated ICC level
6162 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6163 u8 *desc_buf, int len)
6165 u32 icc_level = 0;
6167 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6168 !hba->vreg_info.vccq2) {
6169 dev_err(hba->dev,
6170 "%s: Regulator capability was not set, actvIccLevel=%d",
6171 __func__, icc_level);
6172 goto out;
6175 if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
6176 icc_level = ufshcd_get_max_icc_level(
6177 hba->vreg_info.vcc->max_uA,
6178 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6179 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6181 if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
6182 icc_level = ufshcd_get_max_icc_level(
6183 hba->vreg_info.vccq->max_uA,
6184 icc_level,
6185 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6187 if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
6188 icc_level = ufshcd_get_max_icc_level(
6189 hba->vreg_info.vccq2->max_uA,
6190 icc_level,
6191 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6192 out:
6193 return icc_level;
6196 static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6198 int ret;
6199 int buff_len = hba->desc_size.pwr_desc;
6200 u8 *desc_buf;
6202 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6203 if (!desc_buf)
6204 return;
6206 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6207 if (ret) {
6208 dev_err(hba->dev,
6209 "%s: Failed reading power descriptor.len = %d ret = %d",
6210 __func__, buff_len, ret);
6211 goto out;
6214 hba->init_prefetch_data.icc_level =
6215 ufshcd_find_max_sup_active_icc_level(hba,
6216 desc_buf, buff_len);
6217 dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6218 __func__, hba->init_prefetch_data.icc_level);
6220 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6221 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6222 &hba->init_prefetch_data.icc_level);
6224 if (ret)
6225 dev_err(hba->dev,
6226 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6227 __func__, hba->init_prefetch_data.icc_level , ret);
6229 out:
6230 kfree(desc_buf);
6234 * ufshcd_scsi_add_wlus - Adds required W-LUs
6235 * @hba: per-adapter instance
6237 * UFS device specification requires the UFS devices to support 4 well known
6238 * logical units:
6239 * "REPORT_LUNS" (address: 01h)
6240 * "UFS Device" (address: 50h)
6241 * "RPMB" (address: 44h)
6242 * "BOOT" (address: 30h)
6243 * UFS device's power management needs to be controlled by "POWER CONDITION"
6244 * field of SSU (START STOP UNIT) command. But this "power condition" field
6245 * will take effect only when its sent to "UFS device" well known logical unit
6246 * hence we require the scsi_device instance to represent this logical unit in
6247 * order for the UFS host driver to send the SSU command for power management.
6249 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6250 * Block) LU so user space process can control this LU. User space may also
6251 * want to have access to BOOT LU.
6253 * This function adds scsi device instances for each of all well known LUs
6254 * (except "REPORT LUNS" LU).
6256 * Returns zero on success (all required W-LUs are added successfully),
6257 * non-zero error value on failure (if failed to add any of the required W-LU).
6259 static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6261 int ret = 0;
6262 struct scsi_device *sdev_rpmb;
6263 struct scsi_device *sdev_boot;
6265 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6266 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6267 if (IS_ERR(hba->sdev_ufs_device)) {
6268 ret = PTR_ERR(hba->sdev_ufs_device);
6269 hba->sdev_ufs_device = NULL;
6270 goto out;
6272 scsi_device_put(hba->sdev_ufs_device);
6274 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
6275 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
6276 if (IS_ERR(sdev_rpmb)) {
6277 ret = PTR_ERR(sdev_rpmb);
6278 goto remove_sdev_ufs_device;
6280 scsi_device_put(sdev_rpmb);
6282 sdev_boot = __scsi_add_device(hba->host, 0, 0,
6283 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6284 if (IS_ERR(sdev_boot))
6285 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6286 else
6287 scsi_device_put(sdev_boot);
6288 goto out;
6290 remove_sdev_ufs_device:
6291 scsi_remove_device(hba->sdev_ufs_device);
6292 out:
6293 return ret;
6296 static int ufs_get_device_desc(struct ufs_hba *hba,
6297 struct ufs_dev_desc *dev_desc)
6299 int err;
6300 size_t buff_len;
6301 u8 model_index;
6302 u8 *desc_buf;
6304 buff_len = max_t(size_t, hba->desc_size.dev_desc,
6305 QUERY_DESC_MAX_SIZE + 1);
6306 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6307 if (!desc_buf) {
6308 err = -ENOMEM;
6309 goto out;
6312 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
6313 if (err) {
6314 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6315 __func__, err);
6316 goto out;
6320 * getting vendor (manufacturerID) and Bank Index in big endian
6321 * format
6323 dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
6324 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6326 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
6328 /* Zero-pad entire buffer for string termination. */
6329 memset(desc_buf, 0, buff_len);
6331 err = ufshcd_read_string_desc(hba, model_index, desc_buf,
6332 QUERY_DESC_MAX_SIZE, true/*ASCII*/);
6333 if (err) {
6334 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6335 __func__, err);
6336 goto out;
6339 desc_buf[QUERY_DESC_MAX_SIZE] = '\0';
6340 strlcpy(dev_desc->model, (desc_buf + QUERY_DESC_HDR_SIZE),
6341 min_t(u8, desc_buf[QUERY_DESC_LENGTH_OFFSET],
6342 MAX_MODEL_LEN));
6344 /* Null terminate the model string */
6345 dev_desc->model[MAX_MODEL_LEN] = '\0';
6347 out:
6348 kfree(desc_buf);
6349 return err;
6352 static void ufs_fixup_device_setup(struct ufs_hba *hba,
6353 struct ufs_dev_desc *dev_desc)
6355 struct ufs_dev_fix *f;
6357 for (f = ufs_fixups; f->quirk; f++) {
6358 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6359 f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
6360 (STR_PRFX_EQUAL(f->card.model, dev_desc->model) ||
6361 !strcmp(f->card.model, UFS_ANY_MODEL)))
6362 hba->dev_quirks |= f->quirk;
6367 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6368 * @hba: per-adapter instance
6370 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6371 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6372 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6373 * the hibern8 exit latency.
6375 * Returns zero on success, non-zero error value on failure.
6377 static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6379 int ret = 0;
6380 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6382 ret = ufshcd_dme_peer_get(hba,
6383 UIC_ARG_MIB_SEL(
6384 RX_MIN_ACTIVATETIME_CAPABILITY,
6385 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6386 &peer_rx_min_activatetime);
6387 if (ret)
6388 goto out;
6390 /* make sure proper unit conversion is applied */
6391 tuned_pa_tactivate =
6392 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6393 / PA_TACTIVATE_TIME_UNIT_US);
6394 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6395 tuned_pa_tactivate);
6397 out:
6398 return ret;
6402 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6403 * @hba: per-adapter instance
6405 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6406 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6407 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6408 * This optimal value can help reduce the hibern8 exit latency.
6410 * Returns zero on success, non-zero error value on failure.
6412 static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6414 int ret = 0;
6415 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6416 u32 max_hibern8_time, tuned_pa_hibern8time;
6418 ret = ufshcd_dme_get(hba,
6419 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6420 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6421 &local_tx_hibern8_time_cap);
6422 if (ret)
6423 goto out;
6425 ret = ufshcd_dme_peer_get(hba,
6426 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6427 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6428 &peer_rx_hibern8_time_cap);
6429 if (ret)
6430 goto out;
6432 max_hibern8_time = max(local_tx_hibern8_time_cap,
6433 peer_rx_hibern8_time_cap);
6434 /* make sure proper unit conversion is applied */
6435 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6436 / PA_HIBERN8_TIME_UNIT_US);
6437 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6438 tuned_pa_hibern8time);
6439 out:
6440 return ret;
6444 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6445 * less than device PA_TACTIVATE time.
6446 * @hba: per-adapter instance
6448 * Some UFS devices require host PA_TACTIVATE to be lower than device
6449 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6450 * for such devices.
6452 * Returns zero on success, non-zero error value on failure.
6454 static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6456 int ret = 0;
6457 u32 granularity, peer_granularity;
6458 u32 pa_tactivate, peer_pa_tactivate;
6459 u32 pa_tactivate_us, peer_pa_tactivate_us;
6460 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6462 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6463 &granularity);
6464 if (ret)
6465 goto out;
6467 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6468 &peer_granularity);
6469 if (ret)
6470 goto out;
6472 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6473 (granularity > PA_GRANULARITY_MAX_VAL)) {
6474 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6475 __func__, granularity);
6476 return -EINVAL;
6479 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6480 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6481 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6482 __func__, peer_granularity);
6483 return -EINVAL;
6486 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6487 if (ret)
6488 goto out;
6490 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6491 &peer_pa_tactivate);
6492 if (ret)
6493 goto out;
6495 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6496 peer_pa_tactivate_us = peer_pa_tactivate *
6497 gran_to_us_table[peer_granularity - 1];
6499 if (pa_tactivate_us > peer_pa_tactivate_us) {
6500 u32 new_peer_pa_tactivate;
6502 new_peer_pa_tactivate = pa_tactivate_us /
6503 gran_to_us_table[peer_granularity - 1];
6504 new_peer_pa_tactivate++;
6505 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6506 new_peer_pa_tactivate);
6509 out:
6510 return ret;
6513 static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6515 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6516 ufshcd_tune_pa_tactivate(hba);
6517 ufshcd_tune_pa_hibern8time(hba);
6520 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6521 /* set 1ms timeout for PA_TACTIVATE */
6522 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
6524 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6525 ufshcd_quirk_tune_host_pa_tactivate(hba);
6527 ufshcd_vops_apply_dev_quirks(hba);
6530 static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6532 int err_reg_hist_size = sizeof(struct ufs_uic_err_reg_hist);
6534 hba->ufs_stats.hibern8_exit_cnt = 0;
6535 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
6537 memset(&hba->ufs_stats.pa_err, 0, err_reg_hist_size);
6538 memset(&hba->ufs_stats.dl_err, 0, err_reg_hist_size);
6539 memset(&hba->ufs_stats.nl_err, 0, err_reg_hist_size);
6540 memset(&hba->ufs_stats.tl_err, 0, err_reg_hist_size);
6541 memset(&hba->ufs_stats.dme_err, 0, err_reg_hist_size);
6543 hba->req_abort_count = 0;
6546 static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6548 int err;
6550 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6551 &hba->desc_size.dev_desc);
6552 if (err)
6553 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6555 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6556 &hba->desc_size.pwr_desc);
6557 if (err)
6558 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6560 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6561 &hba->desc_size.interc_desc);
6562 if (err)
6563 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6565 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6566 &hba->desc_size.conf_desc);
6567 if (err)
6568 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6570 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6571 &hba->desc_size.unit_desc);
6572 if (err)
6573 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6575 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6576 &hba->desc_size.geom_desc);
6577 if (err)
6578 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
6579 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6580 &hba->desc_size.hlth_desc);
6581 if (err)
6582 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
6585 static void ufshcd_def_desc_sizes(struct ufs_hba *hba)
6587 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6588 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6589 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6590 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6591 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6592 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
6593 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
6597 * ufshcd_probe_hba - probe hba to detect device and initialize
6598 * @hba: per-adapter instance
6600 * Execute link-startup and verify device initialization
6602 static int ufshcd_probe_hba(struct ufs_hba *hba)
6604 struct ufs_dev_desc card = {0};
6605 int ret;
6606 ktime_t start = ktime_get();
6608 ret = ufshcd_link_startup(hba);
6609 if (ret)
6610 goto out;
6612 /* set the default level for urgent bkops */
6613 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6614 hba->is_urgent_bkops_lvl_checked = false;
6616 /* Debug counters initialization */
6617 ufshcd_clear_dbg_ufs_stats(hba);
6619 /* UniPro link is active now */
6620 ufshcd_set_link_active(hba);
6622 /* Enable Auto-Hibernate if configured */
6623 ufshcd_auto_hibern8_enable(hba);
6625 ret = ufshcd_verify_dev_init(hba);
6626 if (ret)
6627 goto out;
6629 ret = ufshcd_complete_dev_init(hba);
6630 if (ret)
6631 goto out;
6633 /* Init check for device descriptor sizes */
6634 ufshcd_init_desc_sizes(hba);
6636 ret = ufs_get_device_desc(hba, &card);
6637 if (ret) {
6638 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6639 __func__, ret);
6640 goto out;
6643 ufs_fixup_device_setup(hba, &card);
6644 ufshcd_tune_unipro_params(hba);
6646 ret = ufshcd_set_vccq_rail_unused(hba,
6647 (hba->dev_quirks & UFS_DEVICE_NO_VCCQ) ? true : false);
6648 if (ret)
6649 goto out;
6651 /* UFS device is also active now */
6652 ufshcd_set_ufs_dev_active(hba);
6653 ufshcd_force_reset_auto_bkops(hba);
6654 hba->wlun_dev_clr_ua = true;
6656 if (ufshcd_get_max_pwr_mode(hba)) {
6657 dev_err(hba->dev,
6658 "%s: Failed getting max supported power mode\n",
6659 __func__);
6660 } else {
6661 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
6662 if (ret) {
6663 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6664 __func__, ret);
6665 goto out;
6669 /* set the state as operational after switching to desired gear */
6670 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6673 * If we are in error handling context or in power management callbacks
6674 * context, no need to scan the host
6676 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6677 bool flag;
6679 /* clear any previous UFS device information */
6680 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
6681 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
6682 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
6683 hba->dev_info.f_power_on_wp_en = flag;
6685 if (!hba->is_init_prefetch)
6686 ufshcd_init_icc_levels(hba);
6688 /* Add required well known logical units to scsi mid layer */
6689 ret = ufshcd_scsi_add_wlus(hba);
6690 if (ret)
6691 goto out;
6693 /* Initialize devfreq after UFS device is detected */
6694 if (ufshcd_is_clkscaling_supported(hba)) {
6695 memcpy(&hba->clk_scaling.saved_pwr_info.info,
6696 &hba->pwr_info,
6697 sizeof(struct ufs_pa_layer_attr));
6698 hba->clk_scaling.saved_pwr_info.is_valid = true;
6699 if (!hba->devfreq) {
6700 ret = ufshcd_devfreq_init(hba);
6701 if (ret)
6702 goto out;
6704 hba->clk_scaling.is_allowed = true;
6707 scsi_scan_host(hba->host);
6708 pm_runtime_put_sync(hba->dev);
6711 if (!hba->is_init_prefetch)
6712 hba->is_init_prefetch = true;
6714 out:
6716 * If we failed to initialize the device or the device is not
6717 * present, turn off the power/clocks etc.
6719 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6720 pm_runtime_put_sync(hba->dev);
6721 ufshcd_exit_clk_scaling(hba);
6722 ufshcd_hba_exit(hba);
6725 trace_ufshcd_init(dev_name(hba->dev), ret,
6726 ktime_to_us(ktime_sub(ktime_get(), start)),
6727 hba->curr_dev_pwr_mode, hba->uic_link_state);
6728 return ret;
6732 * ufshcd_async_scan - asynchronous execution for probing hba
6733 * @data: data pointer to pass to this function
6734 * @cookie: cookie data
6736 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
6738 struct ufs_hba *hba = (struct ufs_hba *)data;
6740 ufshcd_probe_hba(hba);
6743 static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
6745 unsigned long flags;
6746 struct Scsi_Host *host;
6747 struct ufs_hba *hba;
6748 int index;
6749 bool found = false;
6751 if (!scmd || !scmd->device || !scmd->device->host)
6752 return BLK_EH_DONE;
6754 host = scmd->device->host;
6755 hba = shost_priv(host);
6756 if (!hba)
6757 return BLK_EH_DONE;
6759 spin_lock_irqsave(host->host_lock, flags);
6761 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
6762 if (hba->lrb[index].cmd == scmd) {
6763 found = true;
6764 break;
6768 spin_unlock_irqrestore(host->host_lock, flags);
6771 * Bypass SCSI error handling and reset the block layer timer if this
6772 * SCSI command was not actually dispatched to UFS driver, otherwise
6773 * let SCSI layer handle the error as usual.
6775 return found ? BLK_EH_DONE : BLK_EH_RESET_TIMER;
6778 static const struct attribute_group *ufshcd_driver_groups[] = {
6779 &ufs_sysfs_unit_descriptor_group,
6780 &ufs_sysfs_lun_attributes_group,
6781 NULL,
6784 static struct scsi_host_template ufshcd_driver_template = {
6785 .module = THIS_MODULE,
6786 .name = UFSHCD,
6787 .proc_name = UFSHCD,
6788 .queuecommand = ufshcd_queuecommand,
6789 .slave_alloc = ufshcd_slave_alloc,
6790 .slave_configure = ufshcd_slave_configure,
6791 .slave_destroy = ufshcd_slave_destroy,
6792 .change_queue_depth = ufshcd_change_queue_depth,
6793 .eh_abort_handler = ufshcd_abort,
6794 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
6795 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
6796 .eh_timed_out = ufshcd_eh_timed_out,
6797 .this_id = -1,
6798 .sg_tablesize = SG_ALL,
6799 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
6800 .can_queue = UFSHCD_CAN_QUEUE,
6801 .max_host_blocked = 1,
6802 .track_queue_depth = 1,
6803 .sdev_groups = ufshcd_driver_groups,
6806 static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
6807 int ua)
6809 int ret;
6811 if (!vreg)
6812 return 0;
6815 * "set_load" operation shall be required on those regulators
6816 * which specifically configured current limitation. Otherwise
6817 * zero max_uA may cause unexpected behavior when regulator is
6818 * enabled or set as high power mode.
6820 if (!vreg->max_uA)
6821 return 0;
6823 ret = regulator_set_load(vreg->reg, ua);
6824 if (ret < 0) {
6825 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
6826 __func__, vreg->name, ua, ret);
6829 return ret;
6832 static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
6833 struct ufs_vreg *vreg)
6835 if (!vreg)
6836 return 0;
6837 else if (vreg->unused)
6838 return 0;
6839 else
6840 return ufshcd_config_vreg_load(hba->dev, vreg,
6841 UFS_VREG_LPM_LOAD_UA);
6844 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
6845 struct ufs_vreg *vreg)
6847 if (!vreg)
6848 return 0;
6849 else if (vreg->unused)
6850 return 0;
6851 else
6852 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
6855 static int ufshcd_config_vreg(struct device *dev,
6856 struct ufs_vreg *vreg, bool on)
6858 int ret = 0;
6859 struct regulator *reg;
6860 const char *name;
6861 int min_uV, uA_load;
6863 BUG_ON(!vreg);
6865 reg = vreg->reg;
6866 name = vreg->name;
6868 if (regulator_count_voltages(reg) > 0) {
6869 if (vreg->min_uV && vreg->max_uV) {
6870 min_uV = on ? vreg->min_uV : 0;
6871 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
6872 if (ret) {
6873 dev_err(dev,
6874 "%s: %s set voltage failed, err=%d\n",
6875 __func__, name, ret);
6876 goto out;
6880 uA_load = on ? vreg->max_uA : 0;
6881 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
6882 if (ret)
6883 goto out;
6885 out:
6886 return ret;
6889 static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
6891 int ret = 0;
6893 if (!vreg)
6894 goto out;
6895 else if (vreg->enabled || vreg->unused)
6896 goto out;
6898 ret = ufshcd_config_vreg(dev, vreg, true);
6899 if (!ret)
6900 ret = regulator_enable(vreg->reg);
6902 if (!ret)
6903 vreg->enabled = true;
6904 else
6905 dev_err(dev, "%s: %s enable failed, err=%d\n",
6906 __func__, vreg->name, ret);
6907 out:
6908 return ret;
6911 static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
6913 int ret = 0;
6915 if (!vreg)
6916 goto out;
6917 else if (!vreg->enabled || vreg->unused)
6918 goto out;
6920 ret = regulator_disable(vreg->reg);
6922 if (!ret) {
6923 /* ignore errors on applying disable config */
6924 ufshcd_config_vreg(dev, vreg, false);
6925 vreg->enabled = false;
6926 } else {
6927 dev_err(dev, "%s: %s disable failed, err=%d\n",
6928 __func__, vreg->name, ret);
6930 out:
6931 return ret;
6934 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
6936 int ret = 0;
6937 struct device *dev = hba->dev;
6938 struct ufs_vreg_info *info = &hba->vreg_info;
6940 if (!info)
6941 goto out;
6943 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
6944 if (ret)
6945 goto out;
6947 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
6948 if (ret)
6949 goto out;
6951 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
6952 if (ret)
6953 goto out;
6955 out:
6956 if (ret) {
6957 ufshcd_toggle_vreg(dev, info->vccq2, false);
6958 ufshcd_toggle_vreg(dev, info->vccq, false);
6959 ufshcd_toggle_vreg(dev, info->vcc, false);
6961 return ret;
6964 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
6966 struct ufs_vreg_info *info = &hba->vreg_info;
6968 if (info)
6969 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
6971 return 0;
6974 static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
6976 int ret = 0;
6978 if (!vreg)
6979 goto out;
6981 vreg->reg = devm_regulator_get(dev, vreg->name);
6982 if (IS_ERR(vreg->reg)) {
6983 ret = PTR_ERR(vreg->reg);
6984 dev_err(dev, "%s: %s get failed, err=%d\n",
6985 __func__, vreg->name, ret);
6987 out:
6988 return ret;
6991 static int ufshcd_init_vreg(struct ufs_hba *hba)
6993 int ret = 0;
6994 struct device *dev = hba->dev;
6995 struct ufs_vreg_info *info = &hba->vreg_info;
6997 if (!info)
6998 goto out;
7000 ret = ufshcd_get_vreg(dev, info->vcc);
7001 if (ret)
7002 goto out;
7004 ret = ufshcd_get_vreg(dev, info->vccq);
7005 if (ret)
7006 goto out;
7008 ret = ufshcd_get_vreg(dev, info->vccq2);
7009 out:
7010 return ret;
7013 static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7015 struct ufs_vreg_info *info = &hba->vreg_info;
7017 if (info)
7018 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7020 return 0;
7023 static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused)
7025 int ret = 0;
7026 struct ufs_vreg_info *info = &hba->vreg_info;
7028 if (!info)
7029 goto out;
7030 else if (!info->vccq)
7031 goto out;
7033 if (unused) {
7034 /* shut off the rail here */
7035 ret = ufshcd_toggle_vreg(hba->dev, info->vccq, false);
7037 * Mark this rail as no longer used, so it doesn't get enabled
7038 * later by mistake
7040 if (!ret)
7041 info->vccq->unused = true;
7042 } else {
7044 * rail should have been already enabled hence just make sure
7045 * that unused flag is cleared.
7047 info->vccq->unused = false;
7049 out:
7050 return ret;
7053 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7054 bool skip_ref_clk)
7056 int ret = 0;
7057 struct ufs_clk_info *clki;
7058 struct list_head *head = &hba->clk_list_head;
7059 unsigned long flags;
7060 ktime_t start = ktime_get();
7061 bool clk_state_changed = false;
7063 if (list_empty(head))
7064 goto out;
7067 * vendor specific setup_clocks ops may depend on clocks managed by
7068 * this standard driver hence call the vendor specific setup_clocks
7069 * before disabling the clocks managed here.
7071 if (!on) {
7072 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7073 if (ret)
7074 return ret;
7077 list_for_each_entry(clki, head, list) {
7078 if (!IS_ERR_OR_NULL(clki->clk)) {
7079 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7080 continue;
7082 clk_state_changed = on ^ clki->enabled;
7083 if (on && !clki->enabled) {
7084 ret = clk_prepare_enable(clki->clk);
7085 if (ret) {
7086 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7087 __func__, clki->name, ret);
7088 goto out;
7090 } else if (!on && clki->enabled) {
7091 clk_disable_unprepare(clki->clk);
7093 clki->enabled = on;
7094 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7095 clki->name, on ? "en" : "dis");
7100 * vendor specific setup_clocks ops may depend on clocks managed by
7101 * this standard driver hence call the vendor specific setup_clocks
7102 * after enabling the clocks managed here.
7104 if (on) {
7105 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7106 if (ret)
7107 return ret;
7110 out:
7111 if (ret) {
7112 list_for_each_entry(clki, head, list) {
7113 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7114 clk_disable_unprepare(clki->clk);
7116 } else if (!ret && on) {
7117 spin_lock_irqsave(hba->host->host_lock, flags);
7118 hba->clk_gating.state = CLKS_ON;
7119 trace_ufshcd_clk_gating(dev_name(hba->dev),
7120 hba->clk_gating.state);
7121 spin_unlock_irqrestore(hba->host->host_lock, flags);
7124 if (clk_state_changed)
7125 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7126 (on ? "on" : "off"),
7127 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
7128 return ret;
7131 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7133 return __ufshcd_setup_clocks(hba, on, false);
7136 static int ufshcd_init_clocks(struct ufs_hba *hba)
7138 int ret = 0;
7139 struct ufs_clk_info *clki;
7140 struct device *dev = hba->dev;
7141 struct list_head *head = &hba->clk_list_head;
7143 if (list_empty(head))
7144 goto out;
7146 list_for_each_entry(clki, head, list) {
7147 if (!clki->name)
7148 continue;
7150 clki->clk = devm_clk_get(dev, clki->name);
7151 if (IS_ERR(clki->clk)) {
7152 ret = PTR_ERR(clki->clk);
7153 dev_err(dev, "%s: %s clk get failed, %d\n",
7154 __func__, clki->name, ret);
7155 goto out;
7158 if (clki->max_freq) {
7159 ret = clk_set_rate(clki->clk, clki->max_freq);
7160 if (ret) {
7161 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7162 __func__, clki->name,
7163 clki->max_freq, ret);
7164 goto out;
7166 clki->curr_freq = clki->max_freq;
7168 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7169 clki->name, clk_get_rate(clki->clk));
7171 out:
7172 return ret;
7175 static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7177 int err = 0;
7179 if (!hba->vops)
7180 goto out;
7182 err = ufshcd_vops_init(hba);
7183 if (err)
7184 goto out;
7186 err = ufshcd_vops_setup_regulators(hba, true);
7187 if (err)
7188 goto out_exit;
7190 goto out;
7192 out_exit:
7193 ufshcd_vops_exit(hba);
7194 out:
7195 if (err)
7196 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
7197 __func__, ufshcd_get_var_name(hba), err);
7198 return err;
7201 static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7203 if (!hba->vops)
7204 return;
7206 ufshcd_vops_setup_regulators(hba, false);
7208 ufshcd_vops_exit(hba);
7211 static int ufshcd_hba_init(struct ufs_hba *hba)
7213 int err;
7216 * Handle host controller power separately from the UFS device power
7217 * rails as it will help controlling the UFS host controller power
7218 * collapse easily which is different than UFS device power collapse.
7219 * Also, enable the host controller power before we go ahead with rest
7220 * of the initialization here.
7222 err = ufshcd_init_hba_vreg(hba);
7223 if (err)
7224 goto out;
7226 err = ufshcd_setup_hba_vreg(hba, true);
7227 if (err)
7228 goto out;
7230 err = ufshcd_init_clocks(hba);
7231 if (err)
7232 goto out_disable_hba_vreg;
7234 err = ufshcd_setup_clocks(hba, true);
7235 if (err)
7236 goto out_disable_hba_vreg;
7238 err = ufshcd_init_vreg(hba);
7239 if (err)
7240 goto out_disable_clks;
7242 err = ufshcd_setup_vreg(hba, true);
7243 if (err)
7244 goto out_disable_clks;
7246 err = ufshcd_variant_hba_init(hba);
7247 if (err)
7248 goto out_disable_vreg;
7250 hba->is_powered = true;
7251 goto out;
7253 out_disable_vreg:
7254 ufshcd_setup_vreg(hba, false);
7255 out_disable_clks:
7256 ufshcd_setup_clocks(hba, false);
7257 out_disable_hba_vreg:
7258 ufshcd_setup_hba_vreg(hba, false);
7259 out:
7260 return err;
7263 static void ufshcd_hba_exit(struct ufs_hba *hba)
7265 if (hba->is_powered) {
7266 ufshcd_variant_hba_exit(hba);
7267 ufshcd_setup_vreg(hba, false);
7268 ufshcd_suspend_clkscaling(hba);
7269 if (ufshcd_is_clkscaling_supported(hba))
7270 if (hba->devfreq)
7271 ufshcd_suspend_clkscaling(hba);
7272 ufshcd_setup_clocks(hba, false);
7273 ufshcd_setup_hba_vreg(hba, false);
7274 hba->is_powered = false;
7278 static int
7279 ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
7281 unsigned char cmd[6] = {REQUEST_SENSE,
7285 UFSHCD_REQ_SENSE_SIZE,
7287 char *buffer;
7288 int ret;
7290 buffer = kzalloc(UFSHCD_REQ_SENSE_SIZE, GFP_KERNEL);
7291 if (!buffer) {
7292 ret = -ENOMEM;
7293 goto out;
7296 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
7297 UFSHCD_REQ_SENSE_SIZE, NULL, NULL,
7298 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
7299 if (ret)
7300 pr_err("%s: failed with err %d\n", __func__, ret);
7302 kfree(buffer);
7303 out:
7304 return ret;
7308 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7309 * power mode
7310 * @hba: per adapter instance
7311 * @pwr_mode: device power mode to set
7313 * Returns 0 if requested power mode is set successfully
7314 * Returns non-zero if failed to set the requested power mode
7316 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7317 enum ufs_dev_pwr_mode pwr_mode)
7319 unsigned char cmd[6] = { START_STOP };
7320 struct scsi_sense_hdr sshdr;
7321 struct scsi_device *sdp;
7322 unsigned long flags;
7323 int ret;
7325 spin_lock_irqsave(hba->host->host_lock, flags);
7326 sdp = hba->sdev_ufs_device;
7327 if (sdp) {
7328 ret = scsi_device_get(sdp);
7329 if (!ret && !scsi_device_online(sdp)) {
7330 ret = -ENODEV;
7331 scsi_device_put(sdp);
7333 } else {
7334 ret = -ENODEV;
7336 spin_unlock_irqrestore(hba->host->host_lock, flags);
7338 if (ret)
7339 return ret;
7342 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7343 * handling, which would wait for host to be resumed. Since we know
7344 * we are functional while we are here, skip host resume in error
7345 * handling context.
7347 hba->host->eh_noresume = 1;
7348 if (hba->wlun_dev_clr_ua) {
7349 ret = ufshcd_send_request_sense(hba, sdp);
7350 if (ret)
7351 goto out;
7352 /* Unit attention condition is cleared now */
7353 hba->wlun_dev_clr_ua = false;
7356 cmd[4] = pwr_mode << 4;
7359 * Current function would be generally called from the power management
7360 * callbacks hence set the RQF_PM flag so that it doesn't resume the
7361 * already suspended childs.
7363 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7364 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
7365 if (ret) {
7366 sdev_printk(KERN_WARNING, sdp,
7367 "START_STOP failed for power mode: %d, result %x\n",
7368 pwr_mode, ret);
7369 if (driver_byte(ret) == DRIVER_SENSE)
7370 scsi_print_sense_hdr(sdp, NULL, &sshdr);
7373 if (!ret)
7374 hba->curr_dev_pwr_mode = pwr_mode;
7375 out:
7376 scsi_device_put(sdp);
7377 hba->host->eh_noresume = 0;
7378 return ret;
7381 static int ufshcd_link_state_transition(struct ufs_hba *hba,
7382 enum uic_link_state req_link_state,
7383 int check_for_bkops)
7385 int ret = 0;
7387 if (req_link_state == hba->uic_link_state)
7388 return 0;
7390 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7391 ret = ufshcd_uic_hibern8_enter(hba);
7392 if (!ret)
7393 ufshcd_set_link_hibern8(hba);
7394 else
7395 goto out;
7398 * If autobkops is enabled, link can't be turned off because
7399 * turning off the link would also turn off the device.
7401 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7402 (!check_for_bkops || (check_for_bkops &&
7403 !hba->auto_bkops_enabled))) {
7405 * Let's make sure that link is in low power mode, we are doing
7406 * this currently by putting the link in Hibern8. Otherway to
7407 * put the link in low power mode is to send the DME end point
7408 * to device and then send the DME reset command to local
7409 * unipro. But putting the link in hibern8 is much faster.
7411 ret = ufshcd_uic_hibern8_enter(hba);
7412 if (ret)
7413 goto out;
7415 * Change controller state to "reset state" which
7416 * should also put the link in off/reset state
7418 ufshcd_hba_stop(hba, true);
7420 * TODO: Check if we need any delay to make sure that
7421 * controller is reset
7423 ufshcd_set_link_off(hba);
7426 out:
7427 return ret;
7430 static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7433 * It seems some UFS devices may keep drawing more than sleep current
7434 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7435 * To avoid this situation, add 2ms delay before putting these UFS
7436 * rails in LPM mode.
7438 if (!ufshcd_is_link_active(hba) &&
7439 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7440 usleep_range(2000, 2100);
7443 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7444 * power.
7446 * If UFS device and link is in OFF state, all power supplies (VCC,
7447 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7448 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7449 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7451 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7452 * in low power state which would save some power.
7454 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7455 !hba->dev_info.is_lu_power_on_wp) {
7456 ufshcd_setup_vreg(hba, false);
7457 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7458 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7459 if (!ufshcd_is_link_active(hba)) {
7460 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7461 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7466 static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7468 int ret = 0;
7470 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7471 !hba->dev_info.is_lu_power_on_wp) {
7472 ret = ufshcd_setup_vreg(hba, true);
7473 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7474 if (!ret && !ufshcd_is_link_active(hba)) {
7475 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7476 if (ret)
7477 goto vcc_disable;
7478 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7479 if (ret)
7480 goto vccq_lpm;
7482 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
7484 goto out;
7486 vccq_lpm:
7487 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7488 vcc_disable:
7489 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7490 out:
7491 return ret;
7494 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7496 if (ufshcd_is_link_off(hba))
7497 ufshcd_setup_hba_vreg(hba, false);
7500 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7502 if (ufshcd_is_link_off(hba))
7503 ufshcd_setup_hba_vreg(hba, true);
7507 * ufshcd_suspend - helper function for suspend operations
7508 * @hba: per adapter instance
7509 * @pm_op: desired low power operation type
7511 * This function will try to put the UFS device and link into low power
7512 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7513 * (System PM level).
7515 * If this function is called during shutdown, it will make sure that
7516 * both UFS device and UFS link is powered off.
7518 * NOTE: UFS device & link must be active before we enter in this function.
7520 * Returns 0 for success and non-zero for failure
7522 static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7524 int ret = 0;
7525 enum ufs_pm_level pm_lvl;
7526 enum ufs_dev_pwr_mode req_dev_pwr_mode;
7527 enum uic_link_state req_link_state;
7529 hba->pm_op_in_progress = 1;
7530 if (!ufshcd_is_shutdown_pm(pm_op)) {
7531 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7532 hba->rpm_lvl : hba->spm_lvl;
7533 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7534 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7535 } else {
7536 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7537 req_link_state = UIC_LINK_OFF_STATE;
7541 * If we can't transition into any of the low power modes
7542 * just gate the clocks.
7544 ufshcd_hold(hba, false);
7545 hba->clk_gating.is_suspended = true;
7547 if (hba->clk_scaling.is_allowed) {
7548 cancel_work_sync(&hba->clk_scaling.suspend_work);
7549 cancel_work_sync(&hba->clk_scaling.resume_work);
7550 ufshcd_suspend_clkscaling(hba);
7553 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7554 req_link_state == UIC_LINK_ACTIVE_STATE) {
7555 goto disable_clks;
7558 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7559 (req_link_state == hba->uic_link_state))
7560 goto enable_gating;
7562 /* UFS device & link must be active before we enter in this function */
7563 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7564 ret = -EINVAL;
7565 goto enable_gating;
7568 if (ufshcd_is_runtime_pm(pm_op)) {
7569 if (ufshcd_can_autobkops_during_suspend(hba)) {
7571 * The device is idle with no requests in the queue,
7572 * allow background operations if bkops status shows
7573 * that performance might be impacted.
7575 ret = ufshcd_urgent_bkops(hba);
7576 if (ret)
7577 goto enable_gating;
7578 } else {
7579 /* make sure that auto bkops is disabled */
7580 ufshcd_disable_auto_bkops(hba);
7584 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7585 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7586 !ufshcd_is_runtime_pm(pm_op))) {
7587 /* ensure that bkops is disabled */
7588 ufshcd_disable_auto_bkops(hba);
7589 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7590 if (ret)
7591 goto enable_gating;
7594 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7595 if (ret)
7596 goto set_dev_active;
7598 ufshcd_vreg_set_lpm(hba);
7600 disable_clks:
7602 * Call vendor specific suspend callback. As these callbacks may access
7603 * vendor specific host controller register space call them before the
7604 * host clocks are ON.
7606 ret = ufshcd_vops_suspend(hba, pm_op);
7607 if (ret)
7608 goto set_link_active;
7610 if (!ufshcd_is_link_active(hba))
7611 ufshcd_setup_clocks(hba, false);
7612 else
7613 /* If link is active, device ref_clk can't be switched off */
7614 __ufshcd_setup_clocks(hba, false, true);
7616 hba->clk_gating.state = CLKS_OFF;
7617 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
7619 * Disable the host irq as host controller as there won't be any
7620 * host controller transaction expected till resume.
7622 ufshcd_disable_irq(hba);
7623 /* Put the host controller in low power mode if possible */
7624 ufshcd_hba_vreg_set_lpm(hba);
7625 goto out;
7627 set_link_active:
7628 if (hba->clk_scaling.is_allowed)
7629 ufshcd_resume_clkscaling(hba);
7630 ufshcd_vreg_set_hpm(hba);
7631 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7632 ufshcd_set_link_active(hba);
7633 else if (ufshcd_is_link_off(hba))
7634 ufshcd_host_reset_and_restore(hba);
7635 set_dev_active:
7636 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7637 ufshcd_disable_auto_bkops(hba);
7638 enable_gating:
7639 if (hba->clk_scaling.is_allowed)
7640 ufshcd_resume_clkscaling(hba);
7641 hba->clk_gating.is_suspended = false;
7642 ufshcd_release(hba);
7643 out:
7644 hba->pm_op_in_progress = 0;
7645 return ret;
7649 * ufshcd_resume - helper function for resume operations
7650 * @hba: per adapter instance
7651 * @pm_op: runtime PM or system PM
7653 * This function basically brings the UFS device, UniPro link and controller
7654 * to active state.
7656 * Returns 0 for success and non-zero for failure
7658 static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7660 int ret;
7661 enum uic_link_state old_link_state;
7663 hba->pm_op_in_progress = 1;
7664 old_link_state = hba->uic_link_state;
7666 ufshcd_hba_vreg_set_hpm(hba);
7667 /* Make sure clocks are enabled before accessing controller */
7668 ret = ufshcd_setup_clocks(hba, true);
7669 if (ret)
7670 goto out;
7672 /* enable the host irq as host controller would be active soon */
7673 ret = ufshcd_enable_irq(hba);
7674 if (ret)
7675 goto disable_irq_and_vops_clks;
7677 ret = ufshcd_vreg_set_hpm(hba);
7678 if (ret)
7679 goto disable_irq_and_vops_clks;
7682 * Call vendor specific resume callback. As these callbacks may access
7683 * vendor specific host controller register space call them when the
7684 * host clocks are ON.
7686 ret = ufshcd_vops_resume(hba, pm_op);
7687 if (ret)
7688 goto disable_vreg;
7690 if (ufshcd_is_link_hibern8(hba)) {
7691 ret = ufshcd_uic_hibern8_exit(hba);
7692 if (!ret)
7693 ufshcd_set_link_active(hba);
7694 else
7695 goto vendor_suspend;
7696 } else if (ufshcd_is_link_off(hba)) {
7697 ret = ufshcd_host_reset_and_restore(hba);
7699 * ufshcd_host_reset_and_restore() should have already
7700 * set the link state as active
7702 if (ret || !ufshcd_is_link_active(hba))
7703 goto vendor_suspend;
7706 if (!ufshcd_is_ufs_dev_active(hba)) {
7707 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7708 if (ret)
7709 goto set_old_link_state;
7712 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
7713 ufshcd_enable_auto_bkops(hba);
7714 else
7716 * If BKOPs operations are urgently needed at this moment then
7717 * keep auto-bkops enabled or else disable it.
7719 ufshcd_urgent_bkops(hba);
7721 hba->clk_gating.is_suspended = false;
7723 if (hba->clk_scaling.is_allowed)
7724 ufshcd_resume_clkscaling(hba);
7726 /* Schedule clock gating in case of no access to UFS device yet */
7727 ufshcd_release(hba);
7729 /* Enable Auto-Hibernate if configured */
7730 ufshcd_auto_hibern8_enable(hba);
7732 goto out;
7734 set_old_link_state:
7735 ufshcd_link_state_transition(hba, old_link_state, 0);
7736 vendor_suspend:
7737 ufshcd_vops_suspend(hba, pm_op);
7738 disable_vreg:
7739 ufshcd_vreg_set_lpm(hba);
7740 disable_irq_and_vops_clks:
7741 ufshcd_disable_irq(hba);
7742 if (hba->clk_scaling.is_allowed)
7743 ufshcd_suspend_clkscaling(hba);
7744 ufshcd_setup_clocks(hba, false);
7745 out:
7746 hba->pm_op_in_progress = 0;
7747 return ret;
7751 * ufshcd_system_suspend - system suspend routine
7752 * @hba: per adapter instance
7754 * Check the description of ufshcd_suspend() function for more details.
7756 * Returns 0 for success and non-zero for failure
7758 int ufshcd_system_suspend(struct ufs_hba *hba)
7760 int ret = 0;
7761 ktime_t start = ktime_get();
7763 if (!hba || !hba->is_powered)
7764 return 0;
7766 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
7767 hba->curr_dev_pwr_mode) &&
7768 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
7769 hba->uic_link_state))
7770 goto out;
7772 if (pm_runtime_suspended(hba->dev)) {
7774 * UFS device and/or UFS link low power states during runtime
7775 * suspend seems to be different than what is expected during
7776 * system suspend. Hence runtime resume the devic & link and
7777 * let the system suspend low power states to take effect.
7778 * TODO: If resume takes longer time, we might have optimize
7779 * it in future by not resuming everything if possible.
7781 ret = ufshcd_runtime_resume(hba);
7782 if (ret)
7783 goto out;
7786 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
7787 out:
7788 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
7789 ktime_to_us(ktime_sub(ktime_get(), start)),
7790 hba->curr_dev_pwr_mode, hba->uic_link_state);
7791 if (!ret)
7792 hba->is_sys_suspended = true;
7793 return ret;
7795 EXPORT_SYMBOL(ufshcd_system_suspend);
7798 * ufshcd_system_resume - system resume routine
7799 * @hba: per adapter instance
7801 * Returns 0 for success and non-zero for failure
7804 int ufshcd_system_resume(struct ufs_hba *hba)
7806 int ret = 0;
7807 ktime_t start = ktime_get();
7809 if (!hba)
7810 return -EINVAL;
7812 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
7814 * Let the runtime resume take care of resuming
7815 * if runtime suspended.
7817 goto out;
7818 else
7819 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
7820 out:
7821 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
7822 ktime_to_us(ktime_sub(ktime_get(), start)),
7823 hba->curr_dev_pwr_mode, hba->uic_link_state);
7824 if (!ret)
7825 hba->is_sys_suspended = false;
7826 return ret;
7828 EXPORT_SYMBOL(ufshcd_system_resume);
7831 * ufshcd_runtime_suspend - runtime suspend routine
7832 * @hba: per adapter instance
7834 * Check the description of ufshcd_suspend() function for more details.
7836 * Returns 0 for success and non-zero for failure
7838 int ufshcd_runtime_suspend(struct ufs_hba *hba)
7840 int ret = 0;
7841 ktime_t start = ktime_get();
7843 if (!hba)
7844 return -EINVAL;
7846 if (!hba->is_powered)
7847 goto out;
7848 else
7849 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
7850 out:
7851 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
7852 ktime_to_us(ktime_sub(ktime_get(), start)),
7853 hba->curr_dev_pwr_mode, hba->uic_link_state);
7854 return ret;
7856 EXPORT_SYMBOL(ufshcd_runtime_suspend);
7859 * ufshcd_runtime_resume - runtime resume routine
7860 * @hba: per adapter instance
7862 * This function basically brings the UFS device, UniPro link and controller
7863 * to active state. Following operations are done in this function:
7865 * 1. Turn on all the controller related clocks
7866 * 2. Bring the UniPro link out of Hibernate state
7867 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
7868 * to active state.
7869 * 4. If auto-bkops is enabled on the device, disable it.
7871 * So following would be the possible power state after this function return
7872 * successfully:
7873 * S1: UFS device in Active state with VCC rail ON
7874 * UniPro link in Active state
7875 * All the UFS/UniPro controller clocks are ON
7877 * Returns 0 for success and non-zero for failure
7879 int ufshcd_runtime_resume(struct ufs_hba *hba)
7881 int ret = 0;
7882 ktime_t start = ktime_get();
7884 if (!hba)
7885 return -EINVAL;
7887 if (!hba->is_powered)
7888 goto out;
7889 else
7890 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
7891 out:
7892 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
7893 ktime_to_us(ktime_sub(ktime_get(), start)),
7894 hba->curr_dev_pwr_mode, hba->uic_link_state);
7895 return ret;
7897 EXPORT_SYMBOL(ufshcd_runtime_resume);
7899 int ufshcd_runtime_idle(struct ufs_hba *hba)
7901 return 0;
7903 EXPORT_SYMBOL(ufshcd_runtime_idle);
7906 * ufshcd_shutdown - shutdown routine
7907 * @hba: per adapter instance
7909 * This function would power off both UFS device and UFS link.
7911 * Returns 0 always to allow force shutdown even in case of errors.
7913 int ufshcd_shutdown(struct ufs_hba *hba)
7915 int ret = 0;
7917 if (!hba->is_powered)
7918 goto out;
7920 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
7921 goto out;
7923 if (pm_runtime_suspended(hba->dev)) {
7924 ret = ufshcd_runtime_resume(hba);
7925 if (ret)
7926 goto out;
7929 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
7930 out:
7931 if (ret)
7932 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
7933 /* allow force shutdown even in case of errors */
7934 return 0;
7936 EXPORT_SYMBOL(ufshcd_shutdown);
7939 * ufshcd_remove - de-allocate SCSI host and host memory space
7940 * data structure memory
7941 * @hba: per adapter instance
7943 void ufshcd_remove(struct ufs_hba *hba)
7945 ufs_sysfs_remove_nodes(hba->dev);
7946 scsi_remove_host(hba->host);
7947 /* disable interrupts */
7948 ufshcd_disable_intr(hba, hba->intr_mask);
7949 ufshcd_hba_stop(hba, true);
7951 ufshcd_exit_clk_scaling(hba);
7952 ufshcd_exit_clk_gating(hba);
7953 if (ufshcd_is_clkscaling_supported(hba))
7954 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
7955 ufshcd_hba_exit(hba);
7957 EXPORT_SYMBOL_GPL(ufshcd_remove);
7960 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
7961 * @hba: pointer to Host Bus Adapter (HBA)
7963 void ufshcd_dealloc_host(struct ufs_hba *hba)
7965 scsi_host_put(hba->host);
7967 EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
7970 * ufshcd_set_dma_mask - Set dma mask based on the controller
7971 * addressing capability
7972 * @hba: per adapter instance
7974 * Returns 0 for success, non-zero for failure
7976 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
7978 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
7979 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
7980 return 0;
7982 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
7986 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
7987 * @dev: pointer to device handle
7988 * @hba_handle: driver private handle
7989 * Returns 0 on success, non-zero value on failure
7991 int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
7993 struct Scsi_Host *host;
7994 struct ufs_hba *hba;
7995 int err = 0;
7997 if (!dev) {
7998 dev_err(dev,
7999 "Invalid memory reference for dev is NULL\n");
8000 err = -ENODEV;
8001 goto out_error;
8004 host = scsi_host_alloc(&ufshcd_driver_template,
8005 sizeof(struct ufs_hba));
8006 if (!host) {
8007 dev_err(dev, "scsi_host_alloc failed\n");
8008 err = -ENOMEM;
8009 goto out_error;
8013 * Do not use blk-mq at this time because blk-mq does not support
8014 * runtime pm.
8016 host->use_blk_mq = false;
8018 hba = shost_priv(host);
8019 hba->host = host;
8020 hba->dev = dev;
8021 *hba_handle = hba;
8023 INIT_LIST_HEAD(&hba->clk_list_head);
8025 out_error:
8026 return err;
8028 EXPORT_SYMBOL(ufshcd_alloc_host);
8031 * ufshcd_init - Driver initialization routine
8032 * @hba: per-adapter instance
8033 * @mmio_base: base register address
8034 * @irq: Interrupt line of device
8035 * Returns 0 on success, non-zero value on failure
8037 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8039 int err;
8040 struct Scsi_Host *host = hba->host;
8041 struct device *dev = hba->dev;
8043 if (!mmio_base) {
8044 dev_err(hba->dev,
8045 "Invalid memory reference for mmio_base is NULL\n");
8046 err = -ENODEV;
8047 goto out_error;
8050 hba->mmio_base = mmio_base;
8051 hba->irq = irq;
8053 /* Set descriptor lengths to specification defaults */
8054 ufshcd_def_desc_sizes(hba);
8056 err = ufshcd_hba_init(hba);
8057 if (err)
8058 goto out_error;
8060 /* Read capabilities registers */
8061 ufshcd_hba_capabilities(hba);
8063 /* Get UFS version supported by the controller */
8064 hba->ufs_version = ufshcd_get_ufs_version(hba);
8066 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8067 (hba->ufs_version != UFSHCI_VERSION_11) &&
8068 (hba->ufs_version != UFSHCI_VERSION_20) &&
8069 (hba->ufs_version != UFSHCI_VERSION_21))
8070 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8071 hba->ufs_version);
8073 /* Get Interrupt bit mask per version */
8074 hba->intr_mask = ufshcd_get_intr_mask(hba);
8076 err = ufshcd_set_dma_mask(hba);
8077 if (err) {
8078 dev_err(hba->dev, "set dma mask failed\n");
8079 goto out_disable;
8082 /* Allocate memory for host memory space */
8083 err = ufshcd_memory_alloc(hba);
8084 if (err) {
8085 dev_err(hba->dev, "Memory allocation failed\n");
8086 goto out_disable;
8089 /* Configure LRB */
8090 ufshcd_host_memory_configure(hba);
8092 host->can_queue = hba->nutrs;
8093 host->cmd_per_lun = hba->nutrs;
8094 host->max_id = UFSHCD_MAX_ID;
8095 host->max_lun = UFS_MAX_LUNS;
8096 host->max_channel = UFSHCD_MAX_CHANNEL;
8097 host->unique_id = host->host_no;
8098 host->max_cmd_len = MAX_CDB_SIZE;
8100 hba->max_pwr_info.is_valid = false;
8102 /* Initailize wait queue for task management */
8103 init_waitqueue_head(&hba->tm_wq);
8104 init_waitqueue_head(&hba->tm_tag_wq);
8106 /* Initialize work queues */
8107 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
8108 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
8110 /* Initialize UIC command mutex */
8111 mutex_init(&hba->uic_cmd_mutex);
8113 /* Initialize mutex for device management commands */
8114 mutex_init(&hba->dev_cmd.lock);
8116 init_rwsem(&hba->clk_scaling_lock);
8118 /* Initialize device management tag acquire wait queue */
8119 init_waitqueue_head(&hba->dev_cmd.tag_wq);
8121 ufshcd_init_clk_gating(hba);
8123 ufshcd_init_clk_scaling(hba);
8126 * In order to avoid any spurious interrupt immediately after
8127 * registering UFS controller interrupt handler, clear any pending UFS
8128 * interrupt status and disable all the UFS interrupts.
8130 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8131 REG_INTERRUPT_STATUS);
8132 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8134 * Make sure that UFS interrupts are disabled and any pending interrupt
8135 * status is cleared before registering UFS interrupt handler.
8137 mb();
8139 /* IRQ registration */
8140 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
8141 if (err) {
8142 dev_err(hba->dev, "request irq failed\n");
8143 goto exit_gating;
8144 } else {
8145 hba->is_irq_enabled = true;
8148 err = scsi_add_host(host, hba->dev);
8149 if (err) {
8150 dev_err(hba->dev, "scsi_add_host failed\n");
8151 goto exit_gating;
8154 /* Host controller enable */
8155 err = ufshcd_hba_enable(hba);
8156 if (err) {
8157 dev_err(hba->dev, "Host controller enable failed\n");
8158 ufshcd_print_host_regs(hba);
8159 ufshcd_print_host_state(hba);
8160 goto out_remove_scsi_host;
8164 * Set the default power management level for runtime and system PM.
8165 * Default power saving mode is to keep UFS link in Hibern8 state
8166 * and UFS device in sleep state.
8168 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8169 UFS_SLEEP_PWR_MODE,
8170 UIC_LINK_HIBERN8_STATE);
8171 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8172 UFS_SLEEP_PWR_MODE,
8173 UIC_LINK_HIBERN8_STATE);
8175 /* Set the default auto-hiberate idle timer value to 150 ms */
8176 if (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) {
8177 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8178 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8181 /* Hold auto suspend until async scan completes */
8182 pm_runtime_get_sync(dev);
8183 atomic_set(&hba->scsi_block_reqs_cnt, 0);
8185 * We are assuming that device wasn't put in sleep/power-down
8186 * state exclusively during the boot stage before kernel.
8187 * This assumption helps avoid doing link startup twice during
8188 * ufshcd_probe_hba().
8190 ufshcd_set_ufs_dev_active(hba);
8192 async_schedule(ufshcd_async_scan, hba);
8193 ufs_sysfs_add_nodes(hba->dev);
8195 return 0;
8197 out_remove_scsi_host:
8198 scsi_remove_host(hba->host);
8199 exit_gating:
8200 ufshcd_exit_clk_scaling(hba);
8201 ufshcd_exit_clk_gating(hba);
8202 out_disable:
8203 hba->is_irq_enabled = false;
8204 ufshcd_hba_exit(hba);
8205 out_error:
8206 return err;
8208 EXPORT_SYMBOL_GPL(ufshcd_init);
8210 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8211 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
8212 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
8213 MODULE_LICENSE("GPL");
8214 MODULE_VERSION(UFSHCD_DRIVER_VERSION);