drivers/tty/rocket.c

   1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
   2 /*
   3  * RocketPort device driver for Linux
   4  *
   5  * Written by Theodore Ts'o, 1995, 1996, 1997, 1998, 1999, 2000.
   6  *
   7  * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2003 by Comtrol, Inc.
   8  */
   9
  10 /*
  11  * Kernel Synchronization:
  12  *
  13  * This driver has 2 kernel control paths - exception handlers (calls into the driver
  14  * from user mode) and the timer bottom half (tasklet).  This is a polled driver, interrupts
  15  * are not used.
  16  *
  17  * Critical data:
  18  * -  rp_table[], accessed through passed "info" pointers, is a global (static) array of
  19  *    serial port state information and the xmit_buf circular buffer.  Protected by
  20  *    a per port spinlock.
  21  * -  xmit_flags[], an array of ints indexed by line (port) number, indicating that there
  22  *    is data to be transmitted.  Protected by atomic bit operations.
  23  * -  rp_num_ports, int indicating number of open ports, protected by atomic operations.
  24  *
  25  * rp_write() and rp_write_char() functions use a per port semaphore to protect against
  26  * simultaneous access to the same port by more than one process.
  27  */
  28
  29 /****** Defines ******/
  30 #define ROCKET_PARANOIA_CHECK
  31 #define ROCKET_DISABLE_SIMUSAGE
  32
  33 #undef ROCKET_SOFT_FLOW
  34 #undef ROCKET_DEBUG_OPEN
  35 #undef ROCKET_DEBUG_INTR
  36 #undef ROCKET_DEBUG_WRITE
  37 #undef ROCKET_DEBUG_FLOW
  38 #undef ROCKET_DEBUG_THROTTLE
  39 #undef ROCKET_DEBUG_WAIT_UNTIL_SENT
  40 #undef ROCKET_DEBUG_RECEIVE
  41 #undef ROCKET_DEBUG_HANGUP
  42 #undef REV_PCI_ORDER
  43 #undef ROCKET_DEBUG_IO
  44
  45 #define POLL_PERIOD (HZ/100)    /*  Polling period .01 seconds (10ms) */
  46
  47 /****** Kernel includes ******/
  48
  49 #include <linux/module.h>
  50 #include <linux/errno.h>
  51 #include <linux/major.h>
  52 #include <linux/kernel.h>
  53 #include <linux/signal.h>
  54 #include <linux/slab.h>
  55 #include <linux/mm.h>
  56 #include <linux/sched.h>
  57 #include <linux/timer.h>
  58 #include <linux/interrupt.h>
  59 #include <linux/tty.h>
  60 #include <linux/tty_driver.h>
  61 #include <linux/tty_flip.h>
  62 #include <linux/serial.h>
  63 #include <linux/string.h>
  64 #include <linux/fcntl.h>
  65 #include <linux/ptrace.h>
  66 #include <linux/mutex.h>
  67 #include <linux/ioport.h>
  68 #include <linux/delay.h>
  69 #include <linux/completion.h>
  70 #include <linux/wait.h>
  71 #include <linux/pci.h>
  72 #include <linux/uaccess.h>
  73 #include <linux/atomic.h>
  74 #include <asm/unaligned.h>
  75 #include <linux/bitops.h>
  76 #include <linux/spinlock.h>
  77 #include <linux/init.h>
  78
  79 /****** RocketPort includes ******/
  80
  81 #include "rocket_int.h"
  82 #include "rocket.h"
  83
  84 #define ROCKET_VERSION "2.09"
  85 #define ROCKET_DATE "12-June-2003"
  86
  87 /****** RocketPort Local Variables ******/
  88
  89 static void rp_do_poll(struct timer_list *unused);
  90
  91 static struct tty_driver *rocket_driver;
  92
  93 static struct rocket_version driver_version = {
  94         ROCKET_VERSION, ROCKET_DATE
  95 };
  96
  97 static struct r_port *rp_table[MAX_RP_PORTS];          /*  The main repository of serial port state information. */
  98 static unsigned int xmit_flags[NUM_BOARDS];            /*  Bit significant, indicates port had data to transmit. */
  99                                                        /*  eg.  Bit 0 indicates port 0 has xmit data, ...        */
 100 static atomic_t rp_num_ports_open;                     /*  Number of serial ports open                           */
 101 static DEFINE_TIMER(rocket_timer, rp_do_poll);
 102
 103 static unsigned long board1;                           /* ISA addresses, retrieved from rocketport.conf          */
 104 static unsigned long board2;
 105 static unsigned long board3;
 106 static unsigned long board4;
 107 static unsigned long controller;
 108 static bool support_low_speed;
 109 static unsigned long modem1;
 110 static unsigned long modem2;
 111 static unsigned long modem3;
 112 static unsigned long modem4;
 113 static unsigned long pc104_1[8];
 114 static unsigned long pc104_2[8];
 115 static unsigned long pc104_3[8];
 116 static unsigned long pc104_4[8];
 117 static unsigned long *pc104[4] = { pc104_1, pc104_2, pc104_3, pc104_4 };
 118
 119 static int rp_baud_base[NUM_BOARDS];                   /*  Board config info (Someday make a per-board structure)  */
 120 static unsigned long rcktpt_io_addr[NUM_BOARDS];
 121 static int rcktpt_type[NUM_BOARDS];
 122 static int is_PCI[NUM_BOARDS];
 123 static rocketModel_t rocketModel[NUM_BOARDS];
 124 static int max_board;
 125 static const struct tty_port_operations rocket_port_ops;
 126
 127 /*
 128  * The following arrays define the interrupt bits corresponding to each AIOP.
 129  * These bits are different between the ISA and regular PCI boards and the
 130  * Universal PCI boards.
 131  */
 132
 133 static Word_t aiop_intr_bits[AIOP_CTL_SIZE] = {
 134         AIOP_INTR_BIT_0,
 135         AIOP_INTR_BIT_1,
 136         AIOP_INTR_BIT_2,
 137         AIOP_INTR_BIT_3
 138 };
 139
 140 #ifdef CONFIG_PCI
 141 static Word_t upci_aiop_intr_bits[AIOP_CTL_SIZE] = {
 142         UPCI_AIOP_INTR_BIT_0,
 143         UPCI_AIOP_INTR_BIT_1,
 144         UPCI_AIOP_INTR_BIT_2,
 145         UPCI_AIOP_INTR_BIT_3
 146 };
 147 #endif
 148
 149 static Byte_t RData[RDATASIZE] = {
 150         0x00, 0x09, 0xf6, 0x82,
 151         0x02, 0x09, 0x86, 0xfb,
 152         0x04, 0x09, 0x00, 0x0a,
 153         0x06, 0x09, 0x01, 0x0a,
 154         0x08, 0x09, 0x8a, 0x13,
 155         0x0a, 0x09, 0xc5, 0x11,
 156         0x0c, 0x09, 0x86, 0x85,
 157         0x0e, 0x09, 0x20, 0x0a,
 158         0x10, 0x09, 0x21, 0x0a,
 159         0x12, 0x09, 0x41, 0xff,
 160         0x14, 0x09, 0x82, 0x00,
 161         0x16, 0x09, 0x82, 0x7b,
 162         0x18, 0x09, 0x8a, 0x7d,
 163         0x1a, 0x09, 0x88, 0x81,
 164         0x1c, 0x09, 0x86, 0x7a,
 165         0x1e, 0x09, 0x84, 0x81,
 166         0x20, 0x09, 0x82, 0x7c,
 167         0x22, 0x09, 0x0a, 0x0a
 168 };
 169
 170 static Byte_t RRegData[RREGDATASIZE] = {
 171         0x00, 0x09, 0xf6, 0x82, /* 00: Stop Rx processor */
 172         0x08, 0x09, 0x8a, 0x13, /* 04: Tx software flow control */
 173         0x0a, 0x09, 0xc5, 0x11, /* 08: XON char */
 174         0x0c, 0x09, 0x86, 0x85, /* 0c: XANY */
 175         0x12, 0x09, 0x41, 0xff, /* 10: Rx mask char */
 176         0x14, 0x09, 0x82, 0x00, /* 14: Compare/Ignore #0 */
 177         0x16, 0x09, 0x82, 0x7b, /* 18: Compare #1 */
 178         0x18, 0x09, 0x8a, 0x7d, /* 1c: Compare #2 */
 179         0x1a, 0x09, 0x88, 0x81, /* 20: Interrupt #1 */
 180         0x1c, 0x09, 0x86, 0x7a, /* 24: Ignore/Replace #1 */
 181         0x1e, 0x09, 0x84, 0x81, /* 28: Interrupt #2 */
 182         0x20, 0x09, 0x82, 0x7c, /* 2c: Ignore/Replace #2 */
 183         0x22, 0x09, 0x0a, 0x0a  /* 30: Rx FIFO Enable */
 184 };
 185
 186 static CONTROLLER_T sController[CTL_SIZE] = {
 187         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 188          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
 189         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 190          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
 191         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 192          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
 193         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 194          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}}
 195 };
 196
 197 static Byte_t sBitMapClrTbl[8] = {
 198         0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f
 199 };
 200
 201 static Byte_t sBitMapSetTbl[8] = {
 202         0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80
 203 };
 204
 205 static int sClockPrescale = 0x14;
 206
 207 /*
 208  *  Line number is the ttySIx number (x), the Minor number.  We
 209  *  assign them sequentially, starting at zero.  The following
 210  *  array keeps track of the line number assigned to a given board/aiop/channel.
 211  */
 212 static unsigned char lineNumbers[MAX_RP_PORTS];
 213 static unsigned long nextLineNumber;
 214
 215 /*****  RocketPort Static Prototypes   *********/
 216 static int __init init_ISA(int i);
 217 static void rp_wait_until_sent(struct tty_struct *tty, int timeout);
 218 static void rp_flush_buffer(struct tty_struct *tty);
 219 static unsigned char GetLineNumber(int ctrl, int aiop, int ch);
 220 static unsigned char SetLineNumber(int ctrl, int aiop, int ch);
 221 static void rp_start(struct tty_struct *tty);
 222 static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
 223                      int ChanNum);
 224 static void sSetInterfaceMode(CHANNEL_T * ChP, Byte_t mode);
 225 static void sFlushRxFIFO(CHANNEL_T * ChP);
 226 static void sFlushTxFIFO(CHANNEL_T * ChP);
 227 static void sEnInterrupts(CHANNEL_T * ChP, Word_t Flags);
 228 static void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags);
 229 static void sModemReset(CONTROLLER_T * CtlP, int chan, int on);
 230 static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on);
 231 static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data);
 232 static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
 233                            ByteIO_t * AiopIOList, int AiopIOListSize,
 234                            int IRQNum, Byte_t Frequency, int PeriodicOnly);
 235 static int sReadAiopID(ByteIO_t io);
 236 static int sReadAiopNumChan(WordIO_t io);
 237
 238 MODULE_AUTHOR("Theodore Ts'o");
 239 MODULE_DESCRIPTION("Comtrol RocketPort driver");
 240 module_param_hw(board1, ulong, ioport, 0);
 241 MODULE_PARM_DESC(board1, "I/O port for (ISA) board #1");
 242 module_param_hw(board2, ulong, ioport, 0);
 243 MODULE_PARM_DESC(board2, "I/O port for (ISA) board #2");
 244 module_param_hw(board3, ulong, ioport, 0);
 245 MODULE_PARM_DESC(board3, "I/O port for (ISA) board #3");
 246 module_param_hw(board4, ulong, ioport, 0);
 247 MODULE_PARM_DESC(board4, "I/O port for (ISA) board #4");
 248 module_param_hw(controller, ulong, ioport, 0);
 249 MODULE_PARM_DESC(controller, "I/O port for (ISA) rocketport controller");
 250 module_param(support_low_speed, bool, 0);
 251 MODULE_PARM_DESC(support_low_speed, "1 means support 50 baud, 0 means support 460400 baud");
 252 module_param(modem1, ulong, 0);
 253 MODULE_PARM_DESC(modem1, "1 means (ISA) board #1 is a RocketModem");
 254 module_param(modem2, ulong, 0);
 255 MODULE_PARM_DESC(modem2, "1 means (ISA) board #2 is a RocketModem");
 256 module_param(modem3, ulong, 0);
 257 MODULE_PARM_DESC(modem3, "1 means (ISA) board #3 is a RocketModem");
 258 module_param(modem4, ulong, 0);
 259 MODULE_PARM_DESC(modem4, "1 means (ISA) board #4 is a RocketModem");
 260 module_param_array(pc104_1, ulong, NULL, 0);
 261 MODULE_PARM_DESC(pc104_1, "set interface types for ISA(PC104) board #1 (e.g. pc104_1=232,232,485,485,...");
 262 module_param_array(pc104_2, ulong, NULL, 0);
 263 MODULE_PARM_DESC(pc104_2, "set interface types for ISA(PC104) board #2 (e.g. pc104_2=232,232,485,485,...");
 264 module_param_array(pc104_3, ulong, NULL, 0);
 265 MODULE_PARM_DESC(pc104_3, "set interface types for ISA(PC104) board #3 (e.g. pc104_3=232,232,485,485,...");
 266 module_param_array(pc104_4, ulong, NULL, 0);
 267 MODULE_PARM_DESC(pc104_4, "set interface types for ISA(PC104) board #4 (e.g. pc104_4=232,232,485,485,...");
 268
 269 static int __init rp_init(void);
 270 static void rp_cleanup_module(void);
 271
 272 module_init(rp_init);
 273 module_exit(rp_cleanup_module);
 274
 275
 276 MODULE_LICENSE("Dual BSD/GPL");
 277
 278 /*************************************************************************/
 279 /*                     Module code starts here                           */
 280
 281 static inline int rocket_paranoia_check(struct r_port *info,
 282                                         const char *routine)
 283 {
 284 #ifdef ROCKET_PARANOIA_CHECK
 285         if (!info)
 286                 return 1;
 287         if (info->magic != RPORT_MAGIC) {
 288                 printk(KERN_WARNING "Warning: bad magic number for rocketport "
 289                                 "struct in %s\n", routine);
 290                 return 1;
 291         }
 292 #endif
 293         return 0;
 294 }
 295
 296
 297 /*  Serial port receive data function.  Called (from timer poll) when an AIOPIC signals
 298  *  that receive data is present on a serial port.  Pulls data from FIFO, moves it into the
 299  *  tty layer.
 300  */
 301 static void rp_do_receive(struct r_port *info, CHANNEL_t *cp,
 302                 unsigned int ChanStatus)
 303 {
 304         unsigned int CharNStat;
 305         int ToRecv, wRecv, space;
 306         unsigned char *cbuf;
 307
 308         ToRecv = sGetRxCnt(cp);
 309 #ifdef ROCKET_DEBUG_INTR
 310         printk(KERN_INFO "rp_do_receive(%d)...\n", ToRecv);
 311 #endif
 312         if (ToRecv == 0)
 313                 return;
 314
 315         /*
 316          * if status indicates there are errored characters in the
 317          * FIFO, then enter status mode (a word in FIFO holds
 318          * character and status).
 319          */
 320         if (ChanStatus & (RXFOVERFL | RXBREAK | RXFRAME | RXPARITY)) {
 321                 if (!(ChanStatus & STATMODE)) {
 322 #ifdef ROCKET_DEBUG_RECEIVE
 323                         printk(KERN_INFO "Entering STATMODE...\n");
 324 #endif
 325                         ChanStatus |= STATMODE;
 326                         sEnRxStatusMode(cp);
 327                 }
 328         }
 329
 330         /*
 331          * if we previously entered status mode, then read down the
 332          * FIFO one word at a time, pulling apart the character and
 333          * the status.  Update error counters depending on status
 334          */
 335         if (ChanStatus & STATMODE) {
 336 #ifdef ROCKET_DEBUG_RECEIVE
 337                 printk(KERN_INFO "Ignore %x, read %x...\n",
 338                         info->ignore_status_mask, info->read_status_mask);
 339 #endif
 340                 while (ToRecv) {
 341                         char flag;
 342
 343                         CharNStat = sInW(sGetTxRxDataIO(cp));
 344 #ifdef ROCKET_DEBUG_RECEIVE
 345                         printk(KERN_INFO "%x...\n", CharNStat);
 346 #endif
 347                         if (CharNStat & STMBREAKH)
 348                                 CharNStat &= ~(STMFRAMEH | STMPARITYH);
 349                         if (CharNStat & info->ignore_status_mask) {
 350                                 ToRecv--;
 351                                 continue;
 352                         }
 353                         CharNStat &= info->read_status_mask;
 354                         if (CharNStat & STMBREAKH)
 355                                 flag = TTY_BREAK;
 356                         else if (CharNStat & STMPARITYH)
 357                                 flag = TTY_PARITY;
 358                         else if (CharNStat & STMFRAMEH)
 359                                 flag = TTY_FRAME;
 360                         else if (CharNStat & STMRCVROVRH)
 361                                 flag = TTY_OVERRUN;
 362                         else
 363                                 flag = TTY_NORMAL;
 364                         tty_insert_flip_char(&info->port, CharNStat & 0xff,
 365                                         flag);
 366                         ToRecv--;
 367                 }
 368
 369                 /*
 370                  * after we've emptied the FIFO in status mode, turn
 371                  * status mode back off
 372                  */
 373                 if (sGetRxCnt(cp) == 0) {
 374 #ifdef ROCKET_DEBUG_RECEIVE
 375                         printk(KERN_INFO "Status mode off.\n");
 376 #endif
 377                         sDisRxStatusMode(cp);
 378                 }
 379         } else {
 380                 /*
 381                  * we aren't in status mode, so read down the FIFO two
 382                  * characters at time by doing repeated word IO
 383                  * transfer.
 384                  */
 385                 space = tty_prepare_flip_string(&info->port, &cbuf, ToRecv);
 386                 if (space < ToRecv) {
 387 #ifdef ROCKET_DEBUG_RECEIVE
 388                         printk(KERN_INFO "rp_do_receive:insufficient space ToRecv=%d space=%d\n", ToRecv, space);
 389 #endif
 390                         if (space <= 0)
 391                                 return;
 392                         ToRecv = space;
 393                 }
 394                 wRecv = ToRecv >> 1;
 395                 if (wRecv)
 396                         sInStrW(sGetTxRxDataIO(cp), (unsigned short *) cbuf, wRecv);
 397                 if (ToRecv & 1)
 398                         cbuf[ToRecv - 1] = sInB(sGetTxRxDataIO(cp));
 399         }
 400         /*  Push the data up to the tty layer */
 401         tty_flip_buffer_push(&info->port);
 402 }
 403
 404 /*
 405  *  Serial port transmit data function.  Called from the timer polling loop as a
 406  *  result of a bit set in xmit_flags[], indicating data (from the tty layer) is ready
 407  *  to be sent out the serial port.  Data is buffered in rp_table[line].xmit_buf, it is
 408  *  moved to the port's xmit FIFO.  *info is critical data, protected by spinlocks.
 409  */
 410 static void rp_do_transmit(struct r_port *info)
 411 {
 412         int c;
 413         CHANNEL_t *cp = &info->channel;
 414         struct tty_struct *tty;
 415         unsigned long flags;
 416
 417 #ifdef ROCKET_DEBUG_INTR
 418         printk(KERN_DEBUG "%s\n", __func__);
 419 #endif
 420         if (!info)
 421                 return;
 422         tty = tty_port_tty_get(&info->port);
 423
 424         if (tty == NULL) {
 425                 printk(KERN_WARNING "rp: WARNING %s called with tty==NULL\n", __func__);
 426                 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
 427                 return;
 428         }
 429
 430         spin_lock_irqsave(&info->slock, flags);
 431         info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
 432
 433         /*  Loop sending data to FIFO until done or FIFO full */
 434         while (1) {
 435                 if (tty->stopped)
 436                         break;
 437                 c = min(info->xmit_fifo_room, info->xmit_cnt);
 438                 c = min(c, XMIT_BUF_SIZE - info->xmit_tail);
 439                 if (c <= 0 || info->xmit_fifo_room <= 0)
 440                         break;
 441                 sOutStrW(sGetTxRxDataIO(cp), (unsigned short *) (info->xmit_buf + info->xmit_tail), c / 2);
 442                 if (c & 1)
 443                         sOutB(sGetTxRxDataIO(cp), info->xmit_buf[info->xmit_tail + c - 1]);
 444                 info->xmit_tail += c;
 445                 info->xmit_tail &= XMIT_BUF_SIZE - 1;
 446                 info->xmit_cnt -= c;
 447                 info->xmit_fifo_room -= c;
 448 #ifdef ROCKET_DEBUG_INTR
 449                 printk(KERN_INFO "tx %d chars...\n", c);
 450 #endif
 451         }
 452
 453         if (info->xmit_cnt == 0)
 454                 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
 455
 456         if (info->xmit_cnt < WAKEUP_CHARS) {
 457                 tty_wakeup(tty);
 458 #ifdef ROCKETPORT_HAVE_POLL_WAIT
 459                 wake_up_interruptible(&tty->poll_wait);
 460 #endif
 461         }
 462
 463         spin_unlock_irqrestore(&info->slock, flags);
 464         tty_kref_put(tty);
 465
 466 #ifdef ROCKET_DEBUG_INTR
 467         printk(KERN_DEBUG "(%d,%d,%d,%d)...\n", info->xmit_cnt, info->xmit_head,
 468                info->xmit_tail, info->xmit_fifo_room);
 469 #endif
 470 }
 471
 472 /*
 473  *  Called when a serial port signals it has read data in it's RX FIFO.
 474  *  It checks what interrupts are pending and services them, including
 475  *  receiving serial data.
 476  */
 477 static void rp_handle_port(struct r_port *info)
 478 {
 479         CHANNEL_t *cp;
 480         unsigned int IntMask, ChanStatus;
 481
 482         if (!info)
 483                 return;
 484
 485         if (!tty_port_initialized(&info->port)) {
 486                 printk(KERN_WARNING "rp: WARNING: rp_handle_port called with "
 487                                 "info->flags & NOT_INIT\n");
 488                 return;
 489         }
 490
 491         cp = &info->channel;
 492
 493         IntMask = sGetChanIntID(cp) & info->intmask;
 494 #ifdef ROCKET_DEBUG_INTR
 495         printk(KERN_INFO "rp_interrupt %02x...\n", IntMask);
 496 #endif
 497         ChanStatus = sGetChanStatus(cp);
 498         if (IntMask & RXF_TRIG) {       /* Rx FIFO trigger level */
 499                 rp_do_receive(info, cp, ChanStatus);
 500         }
 501         if (IntMask & DELTA_CD) {       /* CD change  */
 502 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_INTR) || defined(ROCKET_DEBUG_HANGUP))
 503                 printk(KERN_INFO "ttyR%d CD now %s...\n", info->line,
 504                        (ChanStatus & CD_ACT) ? "on" : "off");
 505 #endif
 506                 if (!(ChanStatus & CD_ACT) && info->cd_status) {
 507 #ifdef ROCKET_DEBUG_HANGUP
 508                         printk(KERN_INFO "CD drop, calling hangup.\n");
 509 #endif
 510                         tty_port_tty_hangup(&info->port, false);
 511                 }
 512                 info->cd_status = (ChanStatus & CD_ACT) ? 1 : 0;
 513                 wake_up_interruptible(&info->port.open_wait);
 514         }
 515 #ifdef ROCKET_DEBUG_INTR
 516         if (IntMask & DELTA_CTS) {      /* CTS change */
 517                 printk(KERN_INFO "CTS change...\n");
 518         }
 519         if (IntMask & DELTA_DSR) {      /* DSR change */
 520                 printk(KERN_INFO "DSR change...\n");
 521         }
 522 #endif
 523 }
 524
 525 /*
 526  *  The top level polling routine.  Repeats every 1/100 HZ (10ms).
 527  */
 528 static void rp_do_poll(struct timer_list *unused)
 529 {
 530         CONTROLLER_t *ctlp;
 531         int ctrl, aiop, ch, line;
 532         unsigned int xmitmask, i;
 533         unsigned int CtlMask;
 534         unsigned char AiopMask;
 535         Word_t bit;
 536
 537         /*  Walk through all the boards (ctrl's) */
 538         for (ctrl = 0; ctrl < max_board; ctrl++) {
 539                 if (rcktpt_io_addr[ctrl] <= 0)
 540                         continue;
 541
 542                 /*  Get a ptr to the board's control struct */
 543                 ctlp = sCtlNumToCtlPtr(ctrl);
 544
 545                 /*  Get the interrupt status from the board */
 546 #ifdef CONFIG_PCI
 547                 if (ctlp->BusType == isPCI)
 548                         CtlMask = sPCIGetControllerIntStatus(ctlp);
 549                 else
 550 #endif
 551                         CtlMask = sGetControllerIntStatus(ctlp);
 552
 553                 /*  Check if any AIOP read bits are set */
 554                 for (aiop = 0; CtlMask; aiop++) {
 555                         bit = ctlp->AiopIntrBits[aiop];
 556                         if (CtlMask & bit) {
 557                                 CtlMask &= ~bit;
 558                                 AiopMask = sGetAiopIntStatus(ctlp, aiop);
 559
 560                                 /*  Check if any port read bits are set */
 561                                 for (ch = 0; AiopMask;  AiopMask >>= 1, ch++) {
 562                                         if (AiopMask & 1) {
 563
 564                                                 /*  Get the line number (/dev/ttyRx number). */
 565                                                 /*  Read the data from the port. */
 566                                                 line = GetLineNumber(ctrl, aiop, ch);
 567                                                 rp_handle_port(rp_table[line]);
 568                                         }
 569                                 }
 570                         }
 571                 }
 572
 573                 xmitmask = xmit_flags[ctrl];
 574
 575                 /*
 576                  *  xmit_flags contains bit-significant flags, indicating there is data
 577                  *  to xmit on the port. Bit 0 is port 0 on this board, bit 1 is port
 578                  *  1, ... (32 total possible).  The variable i has the aiop and ch
 579                  *  numbers encoded in it (port 0-7 are aiop0, 8-15 are aiop1, etc).
 580                  */
 581                 if (xmitmask) {
 582                         for (i = 0; i < rocketModel[ctrl].numPorts; i++) {
 583                                 if (xmitmask & (1 << i)) {
 584                                         aiop = (i & 0x18) >> 3;
 585                                         ch = i & 0x07;
 586                                         line = GetLineNumber(ctrl, aiop, ch);
 587                                         rp_do_transmit(rp_table[line]);
 588                                 }
 589                         }
 590                 }
 591         }
 592
 593         /*
 594          * Reset the timer so we get called at the next clock tick (10ms).
 595          */
 596         if (atomic_read(&rp_num_ports_open))
 597                 mod_timer(&rocket_timer, jiffies + POLL_PERIOD);
 598 }
 599
 600 /*
 601  *  Initializes the r_port structure for a port, as well as enabling the port on
 602  *  the board.
 603  *  Inputs:  board, aiop, chan numbers
 604  */
 605 static void __init
 606 init_r_port(int board, int aiop, int chan, struct pci_dev *pci_dev)
 607 {
 608         unsigned rocketMode;
 609         struct r_port *info;
 610         int line;
 611         CONTROLLER_T *ctlp;
 612
 613         /*  Get the next available line number */
 614         line = SetLineNumber(board, aiop, chan);
 615
 616         ctlp = sCtlNumToCtlPtr(board);
 617
 618         /*  Get a r_port struct for the port, fill it in and save it globally, indexed by line number */
 619         info = kzalloc(sizeof (struct r_port), GFP_KERNEL);
 620         if (!info) {
 621                 printk(KERN_ERR "Couldn't allocate info struct for line #%d\n",
 622                                 line);
 623                 return;
 624         }
 625
 626         info->magic = RPORT_MAGIC;
 627         info->line = line;
 628         info->ctlp = ctlp;
 629         info->board = board;
 630         info->aiop = aiop;
 631         info->chan = chan;
 632         tty_port_init(&info->port);
 633         info->port.ops = &rocket_port_ops;
 634         info->flags &= ~ROCKET_MODE_MASK;
 635         if (board < ARRAY_SIZE(pc104) && line < ARRAY_SIZE(pc104_1))
 636                 switch (pc104[board][line]) {
 637                 case 422:
 638                         info->flags |= ROCKET_MODE_RS422;
 639                         break;
 640                 case 485:
 641                         info->flags |= ROCKET_MODE_RS485;
 642                         break;
 643                 case 232:
 644                 default:
 645                         info->flags |= ROCKET_MODE_RS232;
 646                         break;
 647                 }
 648         else
 649                 info->flags |= ROCKET_MODE_RS232;
 650
 651         info->intmask = RXF_TRIG | TXFIFO_MT | SRC_INT | DELTA_CD | DELTA_CTS | DELTA_DSR;
 652         if (sInitChan(ctlp, &info->channel, aiop, chan) == 0) {
 653                 printk(KERN_ERR "RocketPort sInitChan(%d, %d, %d) failed!\n",
 654                                 board, aiop, chan);
 655                 tty_port_destroy(&info->port);
 656                 kfree(info);
 657                 return;
 658         }
 659
 660         rocketMode = info->flags & ROCKET_MODE_MASK;
 661
 662         if ((info->flags & ROCKET_RTS_TOGGLE) || (rocketMode == ROCKET_MODE_RS485))
 663                 sEnRTSToggle(&info->channel);
 664         else
 665                 sDisRTSToggle(&info->channel);
 666
 667         if (ctlp->boardType == ROCKET_TYPE_PC104) {
 668                 switch (rocketMode) {
 669                 case ROCKET_MODE_RS485:
 670                         sSetInterfaceMode(&info->channel, InterfaceModeRS485);
 671                         break;
 672                 case ROCKET_MODE_RS422:
 673                         sSetInterfaceMode(&info->channel, InterfaceModeRS422);
 674                         break;
 675                 case ROCKET_MODE_RS232:
 676                 default:
 677                         if (info->flags & ROCKET_RTS_TOGGLE)
 678                                 sSetInterfaceMode(&info->channel, InterfaceModeRS232T);
 679                         else
 680                                 sSetInterfaceMode(&info->channel, InterfaceModeRS232);
 681                         break;
 682                 }
 683         }
 684         spin_lock_init(&info->slock);
 685         mutex_init(&info->write_mtx);
 686         rp_table[line] = info;
 687         tty_port_register_device(&info->port, rocket_driver, line,
 688                         pci_dev ? &pci_dev->dev : NULL);
 689 }
 690
 691 /*
 692  *  Configures a rocketport port according to its termio settings.  Called from
 693  *  user mode into the driver (exception handler).  *info CD manipulation is spinlock protected.
 694  */
 695 static void configure_r_port(struct tty_struct *tty, struct r_port *info,
 696                              struct ktermios *old_termios)
 697 {
 698         unsigned cflag;
 699         unsigned long flags;
 700         unsigned rocketMode;
 701         int bits, baud, divisor;
 702         CHANNEL_t *cp;
 703         struct ktermios *t = &tty->termios;
 704
 705         cp = &info->channel;
 706         cflag = t->c_cflag;
 707
 708         /* Byte size and parity */
 709         if ((cflag & CSIZE) == CS8) {
 710                 sSetData8(cp);
 711                 bits = 10;
 712         } else {
 713                 sSetData7(cp);
 714                 bits = 9;
 715         }
 716         if (cflag & CSTOPB) {
 717                 sSetStop2(cp);
 718                 bits++;
 719         } else {
 720                 sSetStop1(cp);
 721         }
 722
 723         if (cflag & PARENB) {
 724                 sEnParity(cp);
 725                 bits++;
 726                 if (cflag & PARODD) {
 727                         sSetOddParity(cp);
 728                 } else {
 729                         sSetEvenParity(cp);
 730                 }
 731         } else {
 732                 sDisParity(cp);
 733         }
 734
 735         /* baud rate */
 736         baud = tty_get_baud_rate(tty);
 737         if (!baud)
 738                 baud = 9600;
 739         divisor = ((rp_baud_base[info->board] + (baud >> 1)) / baud) - 1;
 740         if ((divisor >= 8192 || divisor < 0) && old_termios) {
 741                 baud = tty_termios_baud_rate(old_termios);
 742                 if (!baud)
 743                         baud = 9600;
 744                 divisor = (rp_baud_base[info->board] / baud) - 1;
 745         }
 746         if (divisor >= 8192 || divisor < 0) {
 747                 baud = 9600;
 748                 divisor = (rp_baud_base[info->board] / baud) - 1;
 749         }
 750         info->cps = baud / bits;
 751         sSetBaud(cp, divisor);
 752
 753         /* FIXME: Should really back compute a baud rate from the divisor */
 754         tty_encode_baud_rate(tty, baud, baud);
 755
 756         if (cflag & CRTSCTS) {
 757                 info->intmask |= DELTA_CTS;
 758                 sEnCTSFlowCtl(cp);
 759         } else {
 760                 info->intmask &= ~DELTA_CTS;
 761                 sDisCTSFlowCtl(cp);
 762         }
 763         if (cflag & CLOCAL) {
 764                 info->intmask &= ~DELTA_CD;
 765         } else {
 766                 spin_lock_irqsave(&info->slock, flags);
 767                 if (sGetChanStatus(cp) & CD_ACT)
 768                         info->cd_status = 1;
 769                 else
 770                         info->cd_status = 0;
 771                 info->intmask |= DELTA_CD;
 772                 spin_unlock_irqrestore(&info->slock, flags);
 773         }
 774
 775         /*
 776          * Handle software flow control in the board
 777          */
 778 #ifdef ROCKET_SOFT_FLOW
 779         if (I_IXON(tty)) {
 780                 sEnTxSoftFlowCtl(cp);
 781                 if (I_IXANY(tty)) {
 782                         sEnIXANY(cp);
 783                 } else {
 784                         sDisIXANY(cp);
 785                 }
 786                 sSetTxXONChar(cp, START_CHAR(tty));
 787                 sSetTxXOFFChar(cp, STOP_CHAR(tty));
 788         } else {
 789                 sDisTxSoftFlowCtl(cp);
 790                 sDisIXANY(cp);
 791                 sClrTxXOFF(cp);
 792         }
 793 #endif
 794
 795         /*
 796          * Set up ignore/read mask words
 797          */
 798         info->read_status_mask = STMRCVROVRH | 0xFF;
 799         if (I_INPCK(tty))
 800                 info->read_status_mask |= STMFRAMEH | STMPARITYH;
 801         if (I_BRKINT(tty) || I_PARMRK(tty))
 802                 info->read_status_mask |= STMBREAKH;
 803
 804         /*
 805          * Characters to ignore
 806          */
 807         info->ignore_status_mask = 0;
 808         if (I_IGNPAR(tty))
 809                 info->ignore_status_mask |= STMFRAMEH | STMPARITYH;
 810         if (I_IGNBRK(tty)) {
 811                 info->ignore_status_mask |= STMBREAKH;
 812                 /*
 813                  * If we're ignoring parity and break indicators,
 814                  * ignore overruns too.  (For real raw support).
 815                  */
 816                 if (I_IGNPAR(tty))
 817                         info->ignore_status_mask |= STMRCVROVRH;
 818         }
 819
 820         rocketMode = info->flags & ROCKET_MODE_MASK;
 821
 822         if ((info->flags & ROCKET_RTS_TOGGLE)
 823             || (rocketMode == ROCKET_MODE_RS485))
 824                 sEnRTSToggle(cp);
 825         else
 826                 sDisRTSToggle(cp);
 827
 828         sSetRTS(&info->channel);
 829
 830         if (cp->CtlP->boardType == ROCKET_TYPE_PC104) {
 831                 switch (rocketMode) {
 832                 case ROCKET_MODE_RS485:
 833                         sSetInterfaceMode(cp, InterfaceModeRS485);
 834                         break;
 835                 case ROCKET_MODE_RS422:
 836                         sSetInterfaceMode(cp, InterfaceModeRS422);
 837                         break;
 838                 case ROCKET_MODE_RS232:
 839                 default:
 840                         if (info->flags & ROCKET_RTS_TOGGLE)
 841                                 sSetInterfaceMode(cp, InterfaceModeRS232T);
 842                         else
 843                                 sSetInterfaceMode(cp, InterfaceModeRS232);
 844                         break;
 845                 }
 846         }
 847 }
 848
 849 static int carrier_raised(struct tty_port *port)
 850 {
 851         struct r_port *info = container_of(port, struct r_port, port);
 852         return (sGetChanStatusLo(&info->channel) & CD_ACT) ? 1 : 0;
 853 }
 854
 855 static void dtr_rts(struct tty_port *port, int on)
 856 {
 857         struct r_port *info = container_of(port, struct r_port, port);
 858         if (on) {
 859                 sSetDTR(&info->channel);
 860                 sSetRTS(&info->channel);
 861         } else {
 862                 sClrDTR(&info->channel);
 863                 sClrRTS(&info->channel);
 864         }
 865 }
 866
 867 /*
 868  *  Exception handler that opens a serial port.  Creates xmit_buf storage, fills in
 869  *  port's r_port struct.  Initializes the port hardware.
 870  */
 871 static int rp_open(struct tty_struct *tty, struct file *filp)
 872 {
 873         struct r_port *info;
 874         struct tty_port *port;
 875         int retval;
 876         CHANNEL_t *cp;
 877         unsigned long page;
 878
 879         info = rp_table[tty->index];
 880         if (info == NULL)
 881                 return -ENXIO;
 882         port = &info->port;
 883
 884         page = __get_free_page(GFP_KERNEL);
 885         if (!page)
 886                 return -ENOMEM;
 887
 888         /*
 889          * We must not sleep from here until the port is marked fully in use.
 890          */
 891         if (info->xmit_buf)
 892                 free_page(page);
 893         else
 894                 info->xmit_buf = (unsigned char *) page;
 895
 896         tty->driver_data = info;
 897         tty_port_tty_set(port, tty);
 898
 899         if (port->count++ == 0) {
 900                 atomic_inc(&rp_num_ports_open);
 901
 902 #ifdef ROCKET_DEBUG_OPEN
 903                 printk(KERN_INFO "rocket mod++ = %d...\n",
 904                                 atomic_read(&rp_num_ports_open));
 905 #endif
 906         }
 907 #ifdef ROCKET_DEBUG_OPEN
 908         printk(KERN_INFO "rp_open ttyR%d, count=%d\n", info->line, info->port.count);
 909 #endif
 910
 911         /*
 912          * Info->count is now 1; so it's safe to sleep now.
 913          */
 914         if (!tty_port_initialized(port)) {
 915                 cp = &info->channel;
 916                 sSetRxTrigger(cp, TRIG_1);
 917                 if (sGetChanStatus(cp) & CD_ACT)
 918                         info->cd_status = 1;
 919                 else
 920                         info->cd_status = 0;
 921                 sDisRxStatusMode(cp);
 922                 sFlushRxFIFO(cp);
 923                 sFlushTxFIFO(cp);
 924
 925                 sEnInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
 926                 sSetRxTrigger(cp, TRIG_1);
 927
 928                 sGetChanStatus(cp);
 929                 sDisRxStatusMode(cp);
 930                 sClrTxXOFF(cp);
 931
 932                 sDisCTSFlowCtl(cp);
 933                 sDisTxSoftFlowCtl(cp);
 934
 935                 sEnRxFIFO(cp);
 936                 sEnTransmit(cp);
 937
 938                 tty_port_set_initialized(&info->port, 1);
 939
 940                 configure_r_port(tty, info, NULL);
 941                 if (C_BAUD(tty)) {
 942                         sSetDTR(cp);
 943                         sSetRTS(cp);
 944                 }
 945         }
 946         /*  Starts (or resets) the maint polling loop */
 947         mod_timer(&rocket_timer, jiffies + POLL_PERIOD);
 948
 949         retval = tty_port_block_til_ready(port, tty, filp);
 950         if (retval) {
 951 #ifdef ROCKET_DEBUG_OPEN
 952                 printk(KERN_INFO "rp_open returning after block_til_ready with %d\n", retval);
 953 #endif
 954                 return retval;
 955         }
 956         return 0;
 957 }
 958
 959 /*
 960  *  Exception handler that closes a serial port. info->port.count is considered critical.
 961  */
 962 static void rp_close(struct tty_struct *tty, struct file *filp)
 963 {
 964         struct r_port *info = tty->driver_data;
 965         struct tty_port *port = &info->port;
 966         int timeout;
 967         CHANNEL_t *cp;
 968
 969         if (rocket_paranoia_check(info, "rp_close"))
 970                 return;
 971
 972 #ifdef ROCKET_DEBUG_OPEN
 973         printk(KERN_INFO "rp_close ttyR%d, count = %d\n", info->line, info->port.count);
 974 #endif
 975
 976         if (tty_port_close_start(port, tty, filp) == 0)
 977                 return;
 978
 979         mutex_lock(&port->mutex);
 980         cp = &info->channel;
 981         /*
 982          * Before we drop DTR, make sure the UART transmitter
 983          * has completely drained; this is especially
 984          * important if there is a transmit FIFO!
 985          */
 986         timeout = (sGetTxCnt(cp) + 1) * HZ / info->cps;
 987         if (timeout == 0)
 988                 timeout = 1;
 989         rp_wait_until_sent(tty, timeout);
 990         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
 991
 992         sDisTransmit(cp);
 993         sDisInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
 994         sDisCTSFlowCtl(cp);
 995         sDisTxSoftFlowCtl(cp);
 996         sClrTxXOFF(cp);
 997         sFlushRxFIFO(cp);
 998         sFlushTxFIFO(cp);
 999         sClrRTS(cp);
1000         if (C_HUPCL(tty))
1001                 sClrDTR(cp);
1002
1003         rp_flush_buffer(tty);
1004
1005         tty_ldisc_flush(tty);
1006
1007         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1008
1009         /* We can't yet use tty_port_close_end as the buffer handling in this
1010            driver is a bit different to the usual */
1011
1012         if (port->blocked_open) {
1013                 if (port->close_delay) {
1014                         msleep_interruptible(jiffies_to_msecs(port->close_delay));
1015                 }
1016                 wake_up_interruptible(&port->open_wait);
1017         } else {
1018                 if (info->xmit_buf) {
1019                         free_page((unsigned long) info->xmit_buf);
1020                         info->xmit_buf = NULL;
1021                 }
1022         }
1023         spin_lock_irq(&port->lock);
1024         tty->closing = 0;
1025         spin_unlock_irq(&port->lock);
1026         tty_port_set_initialized(port, 0);
1027         tty_port_set_active(port, 0);
1028         mutex_unlock(&port->mutex);
1029         tty_port_tty_set(port, NULL);
1030
1031         atomic_dec(&rp_num_ports_open);
1032
1033 #ifdef ROCKET_DEBUG_OPEN
1034         printk(KERN_INFO "rocket mod-- = %d...\n",
1035                         atomic_read(&rp_num_ports_open));
1036         printk(KERN_INFO "rp_close ttyR%d complete shutdown\n", info->line);
1037 #endif
1038
1039 }
1040
1041 static void rp_set_termios(struct tty_struct *tty,
1042                            struct ktermios *old_termios)
1043 {
1044         struct r_port *info = tty->driver_data;
1045         CHANNEL_t *cp;
1046         unsigned cflag;
1047
1048         if (rocket_paranoia_check(info, "rp_set_termios"))
1049                 return;
1050
1051         cflag = tty->termios.c_cflag;
1052
1053         /*
1054          * This driver doesn't support CS5 or CS6
1055          */
1056         if (((cflag & CSIZE) == CS5) || ((cflag & CSIZE) == CS6))
1057                 tty->termios.c_cflag =
1058                     ((cflag & ~CSIZE) | (old_termios->c_cflag & CSIZE));
1059         /* Or CMSPAR */
1060         tty->termios.c_cflag &= ~CMSPAR;
1061
1062         configure_r_port(tty, info, old_termios);
1063
1064         cp = &info->channel;
1065
1066         /* Handle transition to B0 status */
1067         if ((old_termios->c_cflag & CBAUD) && !C_BAUD(tty)) {
1068                 sClrDTR(cp);
1069                 sClrRTS(cp);
1070         }
1071
1072         /* Handle transition away from B0 status */
1073         if (!(old_termios->c_cflag & CBAUD) && C_BAUD(tty)) {
1074                 sSetRTS(cp);
1075                 sSetDTR(cp);
1076         }
1077
1078         if ((old_termios->c_cflag & CRTSCTS) && !C_CRTSCTS(tty))
1079                 rp_start(tty);
1080 }
1081
1082 static int rp_break(struct tty_struct *tty, int break_state)
1083 {
1084         struct r_port *info = tty->driver_data;
1085         unsigned long flags;
1086
1087         if (rocket_paranoia_check(info, "rp_break"))
1088                 return -EINVAL;
1089
1090         spin_lock_irqsave(&info->slock, flags);
1091         if (break_state == -1)
1092                 sSendBreak(&info->channel);
1093         else
1094                 sClrBreak(&info->channel);
1095         spin_unlock_irqrestore(&info->slock, flags);
1096         return 0;
1097 }
1098
1099 /*
1100  * sGetChanRI used to be a macro in rocket_int.h. When the functionality for
1101  * the UPCI boards was added, it was decided to make this a function because
1102  * the macro was getting too complicated. All cases except the first one
1103  * (UPCIRingInd) are taken directly from the original macro.
1104  */
1105 static int sGetChanRI(CHANNEL_T * ChP)
1106 {
1107         CONTROLLER_t *CtlP = ChP->CtlP;
1108         int ChanNum = ChP->ChanNum;
1109         int RingInd = 0;
1110
1111         if (CtlP->UPCIRingInd)
1112                 RingInd = !(sInB(CtlP->UPCIRingInd) & sBitMapSetTbl[ChanNum]);
1113         else if (CtlP->AltChanRingIndicator)
1114                 RingInd = sInB((ByteIO_t) (ChP->ChanStat + 8)) & DSR_ACT;
1115         else if (CtlP->boardType == ROCKET_TYPE_PC104)
1116                 RingInd = !(sInB(CtlP->AiopIO[3]) & sBitMapSetTbl[ChanNum]);
1117
1118         return RingInd;
1119 }
1120
1121 /********************************************************************************************/
1122 /*  Here are the routines used by rp_ioctl.  These are all called from exception handlers.  */
1123
1124 /*
1125  *  Returns the state of the serial modem control lines.  These next 2 functions
1126  *  are the way kernel versions > 2.5 handle modem control lines rather than IOCTLs.
1127  */
1128 static int rp_tiocmget(struct tty_struct *tty)
1129 {
1130         struct r_port *info = tty->driver_data;
1131         unsigned int control, result, ChanStatus;
1132
1133         ChanStatus = sGetChanStatusLo(&info->channel);
1134         control = info->channel.TxControl[3];
1135         result = ((control & SET_RTS) ? TIOCM_RTS : 0) |
1136                 ((control & SET_DTR) ?  TIOCM_DTR : 0) |
1137                 ((ChanStatus & CD_ACT) ? TIOCM_CAR : 0) |
1138                 (sGetChanRI(&info->channel) ? TIOCM_RNG : 0) |
1139                 ((ChanStatus & DSR_ACT) ? TIOCM_DSR : 0) |
1140                 ((ChanStatus & CTS_ACT) ? TIOCM_CTS : 0);
1141
1142         return result;
1143 }
1144
1145 /*
1146  *  Sets the modem control lines
1147  */
1148 static int rp_tiocmset(struct tty_struct *tty,
1149                                 unsigned int set, unsigned int clear)
1150 {
1151         struct r_port *info = tty->driver_data;
1152
1153         if (set & TIOCM_RTS)
1154                 info->channel.TxControl[3] |= SET_RTS;
1155         if (set & TIOCM_DTR)
1156                 info->channel.TxControl[3] |= SET_DTR;
1157         if (clear & TIOCM_RTS)
1158                 info->channel.TxControl[3] &= ~SET_RTS;
1159         if (clear & TIOCM_DTR)
1160                 info->channel.TxControl[3] &= ~SET_DTR;
1161
1162         out32(info->channel.IndexAddr, info->channel.TxControl);
1163         return 0;
1164 }
1165
1166 static int get_config(struct r_port *info, struct rocket_config __user *retinfo)
1167 {
1168         struct rocket_config tmp;
1169
1170         memset(&tmp, 0, sizeof (tmp));
1171         mutex_lock(&info->port.mutex);
1172         tmp.line = info->line;
1173         tmp.flags = info->flags;
1174         tmp.close_delay = info->port.close_delay;
1175         tmp.closing_wait = info->port.closing_wait;
1176         tmp.port = rcktpt_io_addr[(info->line >> 5) & 3];
1177         mutex_unlock(&info->port.mutex);
1178
1179         if (copy_to_user(retinfo, &tmp, sizeof (*retinfo)))
1180                 return -EFAULT;
1181         return 0;
1182 }
1183
1184 static int set_config(struct tty_struct *tty, struct r_port *info,
1185                                         struct rocket_config __user *new_info)
1186 {
1187         struct rocket_config new_serial;
1188
1189         if (copy_from_user(&new_serial, new_info, sizeof (new_serial)))
1190                 return -EFAULT;
1191
1192         mutex_lock(&info->port.mutex);
1193         if (!capable(CAP_SYS_ADMIN))
1194         {
1195                 if ((new_serial.flags & ~ROCKET_USR_MASK) != (info->flags & ~ROCKET_USR_MASK)) {
1196                         mutex_unlock(&info->port.mutex);
1197                         return -EPERM;
1198                 }
1199                 info->flags = ((info->flags & ~ROCKET_USR_MASK) | (new_serial.flags & ROCKET_USR_MASK));
1200                 mutex_unlock(&info->port.mutex);
1201                 return 0;
1202         }
1203
1204         if ((new_serial.flags ^ info->flags) & ROCKET_SPD_MASK) {
1205                 /* warn about deprecation, unless clearing */
1206                 if (new_serial.flags & ROCKET_SPD_MASK)
1207                         dev_warn_ratelimited(tty->dev, "use of SPD flags is deprecated\n");
1208         }
1209
1210         info->flags = ((info->flags & ~ROCKET_FLAGS) | (new_serial.flags & ROCKET_FLAGS));
1211         info->port.close_delay = new_serial.close_delay;
1212         info->port.closing_wait = new_serial.closing_wait;
1213
1214         mutex_unlock(&info->port.mutex);
1215
1216         configure_r_port(tty, info, NULL);
1217         return 0;
1218 }
1219
1220 /*
1221  *  This function fills in a rocket_ports struct with information
1222  *  about what boards/ports are in the system.  This info is passed
1223  *  to user space.  See setrocket.c where the info is used to create
1224  *  the /dev/ttyRx ports.
1225  */
1226 static int get_ports(struct r_port *info, struct rocket_ports __user *retports)
1227 {
1228         struct rocket_ports tmp;
1229         int board;
1230
1231         memset(&tmp, 0, sizeof (tmp));
1232         tmp.tty_major = rocket_driver->major;
1233
1234         for (board = 0; board < 4; board++) {
1235                 tmp.rocketModel[board].model = rocketModel[board].model;
1236                 strcpy(tmp.rocketModel[board].modelString, rocketModel[board].modelString);
1237                 tmp.rocketModel[board].numPorts = rocketModel[board].numPorts;
1238                 tmp.rocketModel[board].loadrm2 = rocketModel[board].loadrm2;
1239                 tmp.rocketModel[board].startingPortNumber = rocketModel[board].startingPortNumber;
1240         }
1241         if (copy_to_user(retports, &tmp, sizeof (*retports)))
1242                 return -EFAULT;
1243         return 0;
1244 }
1245
1246 static int reset_rm2(struct r_port *info, void __user *arg)
1247 {
1248         int reset;
1249
1250         if (!capable(CAP_SYS_ADMIN))
1251                 return -EPERM;
1252
1253         if (copy_from_user(&reset, arg, sizeof (int)))
1254                 return -EFAULT;
1255         if (reset)
1256                 reset = 1;
1257
1258         if (rcktpt_type[info->board] != ROCKET_TYPE_MODEMII &&
1259             rcktpt_type[info->board] != ROCKET_TYPE_MODEMIII)
1260                 return -EINVAL;
1261
1262         if (info->ctlp->BusType == isISA)
1263                 sModemReset(info->ctlp, info->chan, reset);
1264         else
1265                 sPCIModemReset(info->ctlp, info->chan, reset);
1266
1267         return 0;
1268 }
1269
1270 static int get_version(struct r_port *info, struct rocket_version __user *retvers)
1271 {
1272         if (copy_to_user(retvers, &driver_version, sizeof (*retvers)))
1273                 return -EFAULT;
1274         return 0;
1275 }
1276
1277 /*  IOCTL call handler into the driver */
1278 static int rp_ioctl(struct tty_struct *tty,
1279                     unsigned int cmd, unsigned long arg)
1280 {
1281         struct r_port *info = tty->driver_data;
1282         void __user *argp = (void __user *)arg;
1283         int ret = 0;
1284
1285         if (cmd != RCKP_GET_PORTS && rocket_paranoia_check(info, "rp_ioctl"))
1286                 return -ENXIO;
1287
1288         switch (cmd) {
1289         case RCKP_GET_STRUCT:
1290                 if (copy_to_user(argp, info, sizeof (struct r_port)))
1291                         ret = -EFAULT;
1292                 break;
1293         case RCKP_GET_CONFIG:
1294                 ret = get_config(info, argp);
1295                 break;
1296         case RCKP_SET_CONFIG:
1297                 ret = set_config(tty, info, argp);
1298                 break;
1299         case RCKP_GET_PORTS:
1300                 ret = get_ports(info, argp);
1301                 break;
1302         case RCKP_RESET_RM2:
1303                 ret = reset_rm2(info, argp);
1304                 break;
1305         case RCKP_GET_VERSION:
1306                 ret = get_version(info, argp);
1307                 break;
1308         default:
1309                 ret = -ENOIOCTLCMD;
1310         }
1311         return ret;
1312 }
1313
1314 static void rp_send_xchar(struct tty_struct *tty, char ch)
1315 {
1316         struct r_port *info = tty->driver_data;
1317         CHANNEL_t *cp;
1318
1319         if (rocket_paranoia_check(info, "rp_send_xchar"))
1320                 return;
1321
1322         cp = &info->channel;
1323         if (sGetTxCnt(cp))
1324                 sWriteTxPrioByte(cp, ch);
1325         else
1326                 sWriteTxByte(sGetTxRxDataIO(cp), ch);
1327 }
1328
1329 static void rp_throttle(struct tty_struct *tty)
1330 {
1331         struct r_port *info = tty->driver_data;
1332
1333 #ifdef ROCKET_DEBUG_THROTTLE
1334         printk(KERN_INFO "throttle %s ....\n", tty->name);
1335 #endif
1336
1337         if (rocket_paranoia_check(info, "rp_throttle"))
1338                 return;
1339
1340         if (I_IXOFF(tty))
1341                 rp_send_xchar(tty, STOP_CHAR(tty));
1342
1343         sClrRTS(&info->channel);
1344 }
1345
1346 static void rp_unthrottle(struct tty_struct *tty)
1347 {
1348         struct r_port *info = tty->driver_data;
1349 #ifdef ROCKET_DEBUG_THROTTLE
1350         printk(KERN_INFO "unthrottle %s ....\n", tty->name);
1351 #endif
1352
1353         if (rocket_paranoia_check(info, "rp_unthrottle"))
1354                 return;
1355
1356         if (I_IXOFF(tty))
1357                 rp_send_xchar(tty, START_CHAR(tty));
1358
1359         sSetRTS(&info->channel);
1360 }
1361
1362 /*
1363  * ------------------------------------------------------------
1364  * rp_stop() and rp_start()
1365  *
1366  * This routines are called before setting or resetting tty->stopped.
1367  * They enable or disable transmitter interrupts, as necessary.
1368  * ------------------------------------------------------------
1369  */
1370 static void rp_stop(struct tty_struct *tty)
1371 {
1372         struct r_port *info = tty->driver_data;
1373
1374 #ifdef ROCKET_DEBUG_FLOW
1375         printk(KERN_INFO "stop %s: %d %d....\n", tty->name,
1376                info->xmit_cnt, info->xmit_fifo_room);
1377 #endif
1378
1379         if (rocket_paranoia_check(info, "rp_stop"))
1380                 return;
1381
1382         if (sGetTxCnt(&info->channel))
1383                 sDisTransmit(&info->channel);
1384 }
1385
1386 static void rp_start(struct tty_struct *tty)
1387 {
1388         struct r_port *info = tty->driver_data;
1389
1390 #ifdef ROCKET_DEBUG_FLOW
1391         printk(KERN_INFO "start %s: %d %d....\n", tty->name,
1392                info->xmit_cnt, info->xmit_fifo_room);
1393 #endif
1394
1395         if (rocket_paranoia_check(info, "rp_stop"))
1396                 return;
1397
1398         sEnTransmit(&info->channel);
1399         set_bit((info->aiop * 8) + info->chan,
1400                 (void *) &xmit_flags[info->board]);
1401 }
1402
1403 /*
1404  * rp_wait_until_sent() --- wait until the transmitter is empty
1405  */
1406 static void rp_wait_until_sent(struct tty_struct *tty, int timeout)
1407 {
1408         struct r_port *info = tty->driver_data;
1409         CHANNEL_t *cp;
1410         unsigned long orig_jiffies;
1411         int check_time, exit_time;
1412         int txcnt;
1413
1414         if (rocket_paranoia_check(info, "rp_wait_until_sent"))
1415                 return;
1416
1417         cp = &info->channel;
1418
1419         orig_jiffies = jiffies;
1420 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1421         printk(KERN_INFO "In %s(%d) (jiff=%lu)...\n", __func__, timeout,
1422                jiffies);
1423         printk(KERN_INFO "cps=%d...\n", info->cps);
1424 #endif
1425         while (1) {
1426                 txcnt = sGetTxCnt(cp);
1427                 if (!txcnt) {
1428                         if (sGetChanStatusLo(cp) & TXSHRMT)
1429                                 break;
1430                         check_time = (HZ / info->cps) / 5;
1431                 } else {
1432                         check_time = HZ * txcnt / info->cps;
1433                 }
1434                 if (timeout) {
1435                         exit_time = orig_jiffies + timeout - jiffies;
1436                         if (exit_time <= 0)
1437                                 break;
1438                         if (exit_time < check_time)
1439                                 check_time = exit_time;
1440                 }
1441                 if (check_time == 0)
1442                         check_time = 1;
1443 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1444                 printk(KERN_INFO "txcnt = %d (jiff=%lu,check=%d)...\n", txcnt,
1445                                 jiffies, check_time);
1446 #endif
1447                 msleep_interruptible(jiffies_to_msecs(check_time));
1448                 if (signal_pending(current))
1449                         break;
1450         }
1451         __set_current_state(TASK_RUNNING);
1452 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1453         printk(KERN_INFO "txcnt = %d (jiff=%lu)...done\n", txcnt, jiffies);
1454 #endif
1455 }
1456
1457 /*
1458  * rp_hangup() --- called by tty_hangup() when a hangup is signaled.
1459  */
1460 static void rp_hangup(struct tty_struct *tty)
1461 {
1462         CHANNEL_t *cp;
1463         struct r_port *info = tty->driver_data;
1464         unsigned long flags;
1465
1466         if (rocket_paranoia_check(info, "rp_hangup"))
1467                 return;
1468
1469 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_HANGUP))
1470         printk(KERN_INFO "rp_hangup of ttyR%d...\n", info->line);
1471 #endif
1472         rp_flush_buffer(tty);
1473         spin_lock_irqsave(&info->port.lock, flags);
1474         if (info->port.count)
1475                 atomic_dec(&rp_num_ports_open);
1476         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1477         spin_unlock_irqrestore(&info->port.lock, flags);
1478
1479         tty_port_hangup(&info->port);
1480
1481         cp = &info->channel;
1482         sDisRxFIFO(cp);
1483         sDisTransmit(cp);
1484         sDisInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
1485         sDisCTSFlowCtl(cp);
1486         sDisTxSoftFlowCtl(cp);
1487         sClrTxXOFF(cp);
1488         tty_port_set_initialized(&info->port, 0);
1489
1490         wake_up_interruptible(&info->port.open_wait);
1491 }
1492
1493 /*
1494  *  Exception handler - write char routine.  The RocketPort driver uses a
1495  *  double-buffering strategy, with the twist that if the in-memory CPU
1496  *  buffer is empty, and there's space in the transmit FIFO, the
1497  *  writing routines will write directly to transmit FIFO.
1498  *  Write buffer and counters protected by spinlocks
1499  */
1500 static int rp_put_char(struct tty_struct *tty, unsigned char ch)
1501 {
1502         struct r_port *info = tty->driver_data;
1503         CHANNEL_t *cp;
1504         unsigned long flags;
1505
1506         if (rocket_paranoia_check(info, "rp_put_char"))
1507                 return 0;
1508
1509         /*
1510          * Grab the port write mutex, locking out other processes that try to
1511          * write to this port
1512          */
1513         mutex_lock(&info->write_mtx);
1514
1515 #ifdef ROCKET_DEBUG_WRITE
1516         printk(KERN_INFO "rp_put_char %c...\n", ch);
1517 #endif
1518
1519         spin_lock_irqsave(&info->slock, flags);
1520         cp = &info->channel;
1521
1522         if (!tty->stopped && info->xmit_fifo_room == 0)
1523                 info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
1524
1525         if (tty->stopped || info->xmit_fifo_room == 0 || info->xmit_cnt != 0) {
1526                 info->xmit_buf[info->xmit_head++] = ch;
1527                 info->xmit_head &= XMIT_BUF_SIZE - 1;
1528                 info->xmit_cnt++;
1529                 set_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1530         } else {
1531                 sOutB(sGetTxRxDataIO(cp), ch);
1532                 info->xmit_fifo_room--;
1533         }
1534         spin_unlock_irqrestore(&info->slock, flags);
1535         mutex_unlock(&info->write_mtx);
1536         return 1;
1537 }
1538
1539 /*
1540  *  Exception handler - write routine, called when user app writes to the device.
1541  *  A per port write mutex is used to protect from another process writing to
1542  *  this port at the same time.  This other process could be running on the other CPU
1543  *  or get control of the CPU if the copy_from_user() blocks due to a page fault (swapped out).
1544  *  Spinlocks protect the info xmit members.
1545  */
1546 static int rp_write(struct tty_struct *tty,
1547                     const unsigned char *buf, int count)
1548 {
1549         struct r_port *info = tty->driver_data;
1550         CHANNEL_t *cp;
1551         const unsigned char *b;
1552         int c, retval = 0;
1553         unsigned long flags;
1554
1555         if (count <= 0 || rocket_paranoia_check(info, "rp_write"))
1556                 return 0;
1557
1558         if (mutex_lock_interruptible(&info->write_mtx))
1559                 return -ERESTARTSYS;
1560
1561 #ifdef ROCKET_DEBUG_WRITE
1562         printk(KERN_INFO "rp_write %d chars...\n", count);
1563 #endif
1564         cp = &info->channel;
1565
1566         if (!tty->stopped && info->xmit_fifo_room < count)
1567                 info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
1568
1569         /*
1570          *  If the write queue for the port is empty, and there is FIFO space, stuff bytes
1571          *  into FIFO.  Use the write queue for temp storage.
1572          */
1573         if (!tty->stopped && info->xmit_cnt == 0 && info->xmit_fifo_room > 0) {
1574                 c = min(count, info->xmit_fifo_room);
1575                 b = buf;
1576
1577                 /*  Push data into FIFO, 2 bytes at a time */
1578                 sOutStrW(sGetTxRxDataIO(cp), (unsigned short *) b, c / 2);
1579
1580                 /*  If there is a byte remaining, write it */
1581                 if (c & 1)
1582                         sOutB(sGetTxRxDataIO(cp), b[c - 1]);
1583
1584                 retval += c;
1585                 buf += c;
1586                 count -= c;
1587
1588                 spin_lock_irqsave(&info->slock, flags);
1589                 info->xmit_fifo_room -= c;
1590                 spin_unlock_irqrestore(&info->slock, flags);
1591         }
1592
1593         /* If count is zero, we wrote it all and are done */
1594         if (!count)
1595                 goto end;
1596
1597         /*  Write remaining data into the port's xmit_buf */
1598         while (1) {
1599                 /* Hung up ? */
1600                 if (!tty_port_active(&info->port))
1601                         goto end;
1602                 c = min(count, XMIT_BUF_SIZE - info->xmit_cnt - 1);
1603                 c = min(c, XMIT_BUF_SIZE - info->xmit_head);
1604                 if (c <= 0)
1605                         break;
1606
1607                 b = buf;
1608                 memcpy(info->xmit_buf + info->xmit_head, b, c);
1609
1610                 spin_lock_irqsave(&info->slock, flags);
1611                 info->xmit_head =
1612                     (info->xmit_head + c) & (XMIT_BUF_SIZE - 1);
1613                 info->xmit_cnt += c;
1614                 spin_unlock_irqrestore(&info->slock, flags);
1615
1616                 buf += c;
1617                 count -= c;
1618                 retval += c;
1619         }
1620
1621         if ((retval > 0) && !tty->stopped)
1622                 set_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1623
1624 end:
1625         if (info->xmit_cnt < WAKEUP_CHARS) {
1626                 tty_wakeup(tty);
1627 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1628                 wake_up_interruptible(&tty->poll_wait);
1629 #endif
1630         }
1631         mutex_unlock(&info->write_mtx);
1632         return retval;
1633 }
1634
1635 /*
1636  * Return the number of characters that can be sent.  We estimate
1637  * only using the in-memory transmit buffer only, and ignore the
1638  * potential space in the transmit FIFO.
1639  */
1640 static int rp_write_room(struct tty_struct *tty)
1641 {
1642         struct r_port *info = tty->driver_data;
1643         int ret;
1644
1645         if (rocket_paranoia_check(info, "rp_write_room"))
1646                 return 0;
1647
1648         ret = XMIT_BUF_SIZE - info->xmit_cnt - 1;
1649         if (ret < 0)
1650                 ret = 0;
1651 #ifdef ROCKET_DEBUG_WRITE
1652         printk(KERN_INFO "rp_write_room returns %d...\n", ret);
1653 #endif
1654         return ret;
1655 }
1656
1657 /*
1658  * Return the number of characters in the buffer.  Again, this only
1659  * counts those characters in the in-memory transmit buffer.
1660  */
1661 static int rp_chars_in_buffer(struct tty_struct *tty)
1662 {
1663         struct r_port *info = tty->driver_data;
1664
1665         if (rocket_paranoia_check(info, "rp_chars_in_buffer"))
1666                 return 0;
1667
1668 #ifdef ROCKET_DEBUG_WRITE
1669         printk(KERN_INFO "rp_chars_in_buffer returns %d...\n", info->xmit_cnt);
1670 #endif
1671         return info->xmit_cnt;
1672 }
1673
1674 /*
1675  *  Flushes the TX fifo for a port, deletes data in the xmit_buf stored in the
1676  *  r_port struct for the port.  Note that spinlock are used to protect info members,
1677  *  do not call this function if the spinlock is already held.
1678  */
1679 static void rp_flush_buffer(struct tty_struct *tty)
1680 {
1681         struct r_port *info = tty->driver_data;
1682         CHANNEL_t *cp;
1683         unsigned long flags;
1684
1685         if (rocket_paranoia_check(info, "rp_flush_buffer"))
1686                 return;
1687
1688         spin_lock_irqsave(&info->slock, flags);
1689         info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1690         spin_unlock_irqrestore(&info->slock, flags);
1691
1692 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1693         wake_up_interruptible(&tty->poll_wait);
1694 #endif
1695         tty_wakeup(tty);
1696
1697         cp = &info->channel;
1698         sFlushTxFIFO(cp);
1699 }
1700
1701 #ifdef CONFIG_PCI
1702
1703 static const struct pci_device_id rocket_pci_ids[] = {
1704         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP4QUAD) },
1705         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP8OCTA) },
1706         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_URP8OCTA) },
1707         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP8INTF) },
1708         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_URP8INTF) },
1709         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP8J) },
1710         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP4J) },
1711         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP8SNI) },
1712         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP16SNI) },
1713         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP16INTF) },
1714         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_URP16INTF) },
1715         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_CRP16INTF) },
1716         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP32INTF) },
1717         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_URP32INTF) },
1718         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RPP4) },
1719         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RPP8) },
1720         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP2_232) },
1721         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP2_422) },
1722         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP6M) },
1723         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP4M) },
1724         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_UPCI_RM3_8PORT) },
1725         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_UPCI_RM3_4PORT) },
1726         { }
1727 };
1728 MODULE_DEVICE_TABLE(pci, rocket_pci_ids);
1729
1730 /*  Resets the speaker controller on RocketModem II and III devices */
1731 static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model)
1732 {
1733         ByteIO_t addr;
1734
1735         /* RocketModem II speaker control is at the 8th port location of offset 0x40 */
1736         if ((model == MODEL_RP4M) || (model == MODEL_RP6M)) {
1737                 addr = CtlP->AiopIO[0] + 0x4F;
1738                 sOutB(addr, 0);
1739         }
1740
1741         /* RocketModem III speaker control is at the 1st port location of offset 0x80 */
1742         if ((model == MODEL_UPCI_RM3_8PORT)
1743             || (model == MODEL_UPCI_RM3_4PORT)) {
1744                 addr = CtlP->AiopIO[0] + 0x88;
1745                 sOutB(addr, 0);
1746         }
1747 }
1748
1749 /***************************************************************************
1750 Function: sPCIInitController
1751 Purpose:  Initialization of controller global registers and controller
1752           structure.
1753 Call:     sPCIInitController(CtlP,CtlNum,AiopIOList,AiopIOListSize,
1754                           IRQNum,Frequency,PeriodicOnly)
1755           CONTROLLER_T *CtlP; Ptr to controller structure
1756           int CtlNum; Controller number
1757           ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
1758              This list must be in the order the AIOPs will be found on the
1759              controller.  Once an AIOP in the list is not found, it is
1760              assumed that there are no more AIOPs on the controller.
1761           int AiopIOListSize; Number of addresses in AiopIOList
1762           int IRQNum; Interrupt Request number.  Can be any of the following:
1763                          0: Disable global interrupts
1764                          3: IRQ 3
1765                          4: IRQ 4
1766                          5: IRQ 5
1767                          9: IRQ 9
1768                          10: IRQ 10
1769                          11: IRQ 11
1770                          12: IRQ 12
1771                          15: IRQ 15
1772           Byte_t Frequency: A flag identifying the frequency
1773                    of the periodic interrupt, can be any one of the following:
1774                       FREQ_DIS - periodic interrupt disabled
1775                       FREQ_137HZ - 137 Hertz
1776                       FREQ_69HZ - 69 Hertz
1777                       FREQ_34HZ - 34 Hertz
1778                       FREQ_17HZ - 17 Hertz
1779                       FREQ_9HZ - 9 Hertz
1780                       FREQ_4HZ - 4 Hertz
1781                    If IRQNum is set to 0 the Frequency parameter is
1782                    overidden, it is forced to a value of FREQ_DIS.
1783           int PeriodicOnly: 1 if all interrupts except the periodic
1784                                interrupt are to be blocked.
1785                             0 is both the periodic interrupt and
1786                                other channel interrupts are allowed.
1787                             If IRQNum is set to 0 the PeriodicOnly parameter is
1788                                overidden, it is forced to a value of 0.
1789 Return:   int: Number of AIOPs on the controller, or CTLID_NULL if controller
1790                initialization failed.
1791
1792 Comments:
1793           If periodic interrupts are to be disabled but AIOP interrupts
1794           are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
1795
1796           If interrupts are to be completely disabled set IRQNum to 0.
1797
1798           Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
1799           invalid combination.
1800
1801           This function performs initialization of global interrupt modes,
1802           but it does not actually enable global interrupts.  To enable
1803           and disable global interrupts use functions sEnGlobalInt() and
1804           sDisGlobalInt().  Enabling of global interrupts is normally not
1805           done until all other initializations are complete.
1806
1807           Even if interrupts are globally enabled, they must also be
1808           individually enabled for each channel that is to generate
1809           interrupts.
1810
1811 Warnings: No range checking on any of the parameters is done.
1812
1813           No context switches are allowed while executing this function.
1814
1815           After this function all AIOPs on the controller are disabled,
1816           they can be enabled with sEnAiop().
1817 */
1818 static int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum,
1819                               ByteIO_t * AiopIOList, int AiopIOListSize,
1820                               WordIO_t ConfigIO, int IRQNum, Byte_t Frequency,
1821                               int PeriodicOnly, int altChanRingIndicator,
1822                               int UPCIRingInd)
1823 {
1824         int i;
1825         ByteIO_t io;
1826
1827         CtlP->AltChanRingIndicator = altChanRingIndicator;
1828         CtlP->UPCIRingInd = UPCIRingInd;
1829         CtlP->CtlNum = CtlNum;
1830         CtlP->CtlID = CTLID_0001;       /* controller release 1 */
1831         CtlP->BusType = isPCI;  /* controller release 1 */
1832
1833         if (ConfigIO) {
1834                 CtlP->isUPCI = 1;
1835                 CtlP->PCIIO = ConfigIO + _PCI_9030_INT_CTRL;
1836                 CtlP->PCIIO2 = ConfigIO + _PCI_9030_GPIO_CTRL;
1837                 CtlP->AiopIntrBits = upci_aiop_intr_bits;
1838         } else {
1839                 CtlP->isUPCI = 0;
1840                 CtlP->PCIIO =
1841                     (WordIO_t) ((ByteIO_t) AiopIOList[0] + _PCI_INT_FUNC);
1842                 CtlP->AiopIntrBits = aiop_intr_bits;
1843         }
1844
1845         sPCIControllerEOI(CtlP);        /* clear EOI if warm init */
1846         /* Init AIOPs */
1847         CtlP->NumAiop = 0;
1848         for (i = 0; i < AiopIOListSize; i++) {
1849                 io = AiopIOList[i];
1850                 CtlP->AiopIO[i] = (WordIO_t) io;
1851                 CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
1852
1853                 CtlP->AiopID[i] = sReadAiopID(io);      /* read AIOP ID */
1854                 if (CtlP->AiopID[i] == AIOPID_NULL)     /* if AIOP does not exist */
1855                         break;  /* done looking for AIOPs */
1856
1857                 CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */
1858                 sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE);    /* clock prescaler */
1859                 sOutB(io + _INDX_DATA, sClockPrescale);
1860                 CtlP->NumAiop++;        /* bump count of AIOPs */
1861         }
1862
1863         if (CtlP->NumAiop == 0)
1864                 return (-1);
1865         else
1866                 return (CtlP->NumAiop);
1867 }
1868
1869 /*
1870  *  Called when a PCI card is found.  Retrieves and stores model information,
1871  *  init's aiopic and serial port hardware.
1872  *  Inputs:  i is the board number (0-n)
1873  */
1874 static __init int register_PCI(int i, struct pci_dev *dev)
1875 {
1876         int num_aiops, aiop, max_num_aiops, num_chan, chan;
1877         unsigned int aiopio[MAX_AIOPS_PER_BOARD];
1878         CONTROLLER_t *ctlp;
1879
1880         int fast_clock = 0;
1881         int altChanRingIndicator = 0;
1882         int ports_per_aiop = 8;
1883         WordIO_t ConfigIO = 0;
1884         ByteIO_t UPCIRingInd = 0;
1885
1886         if (!dev || !pci_match_id(rocket_pci_ids, dev) ||
1887             pci_enable_device(dev) || i >= NUM_BOARDS)
1888                 return 0;
1889
1890         rcktpt_io_addr[i] = pci_resource_start(dev, 0);
1891
1892         rcktpt_type[i] = ROCKET_TYPE_NORMAL;
1893         rocketModel[i].loadrm2 = 0;
1894         rocketModel[i].startingPortNumber = nextLineNumber;
1895
1896         /*  Depending on the model, set up some config variables */
1897         switch (dev->device) {
1898         case PCI_DEVICE_ID_RP4QUAD:
1899                 max_num_aiops = 1;
1900                 ports_per_aiop = 4;
1901                 rocketModel[i].model = MODEL_RP4QUAD;
1902                 strcpy(rocketModel[i].modelString, "RocketPort 4 port w/quad cable");
1903                 rocketModel[i].numPorts = 4;
1904                 break;
1905         case PCI_DEVICE_ID_RP8OCTA:
1906                 max_num_aiops = 1;
1907                 rocketModel[i].model = MODEL_RP8OCTA;
1908                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/octa cable");
1909                 rocketModel[i].numPorts = 8;
1910                 break;
1911         case PCI_DEVICE_ID_URP8OCTA:
1912                 max_num_aiops = 1;
1913                 rocketModel[i].model = MODEL_UPCI_RP8OCTA;
1914                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 8 port w/octa cable");
1915                 rocketModel[i].numPorts = 8;
1916                 break;
1917         case PCI_DEVICE_ID_RP8INTF:
1918                 max_num_aiops = 1;
1919                 rocketModel[i].model = MODEL_RP8INTF;
1920                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/external I/F");
1921                 rocketModel[i].numPorts = 8;
1922                 break;
1923         case PCI_DEVICE_ID_URP8INTF:
1924                 max_num_aiops = 1;
1925                 rocketModel[i].model = MODEL_UPCI_RP8INTF;
1926                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 8 port w/external I/F");
1927                 rocketModel[i].numPorts = 8;
1928                 break;
1929         case PCI_DEVICE_ID_RP8J:
1930                 max_num_aiops = 1;
1931                 rocketModel[i].model = MODEL_RP8J;
1932                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/RJ11 connectors");
1933                 rocketModel[i].numPorts = 8;
1934                 break;
1935         case PCI_DEVICE_ID_RP4J:
1936                 max_num_aiops = 1;
1937                 ports_per_aiop = 4;
1938                 rocketModel[i].model = MODEL_RP4J;
1939                 strcpy(rocketModel[i].modelString, "RocketPort 4 port w/RJ45 connectors");
1940                 rocketModel[i].numPorts = 4;
1941                 break;
1942         case PCI_DEVICE_ID_RP8SNI:
1943                 max_num_aiops = 1;
1944                 rocketModel[i].model = MODEL_RP8SNI;
1945                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/ custom DB78");
1946                 rocketModel[i].numPorts = 8;
1947                 break;
1948         case PCI_DEVICE_ID_RP16SNI:
1949                 max_num_aiops = 2;
1950                 rocketModel[i].model = MODEL_RP16SNI;
1951                 strcpy(rocketModel[i].modelString, "RocketPort 16 port w/ custom DB78");
1952                 rocketModel[i].numPorts = 16;
1953                 break;
1954         case PCI_DEVICE_ID_RP16INTF:
1955                 max_num_aiops = 2;
1956                 rocketModel[i].model = MODEL_RP16INTF;
1957                 strcpy(rocketModel[i].modelString, "RocketPort 16 port w/external I/F");
1958                 rocketModel[i].numPorts = 16;
1959                 break;
1960         case PCI_DEVICE_ID_URP16INTF:
1961                 max_num_aiops = 2;
1962                 rocketModel[i].model = MODEL_UPCI_RP16INTF;
1963                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 16 port w/external I/F");
1964                 rocketModel[i].numPorts = 16;
1965                 break;
1966         case PCI_DEVICE_ID_CRP16INTF:
1967                 max_num_aiops = 2;
1968                 rocketModel[i].model = MODEL_CPCI_RP16INTF;
1969                 strcpy(rocketModel[i].modelString, "RocketPort Compact PCI 16 port w/external I/F");
1970                 rocketModel[i].numPorts = 16;
1971                 break;
1972         case PCI_DEVICE_ID_RP32INTF:
1973                 max_num_aiops = 4;
1974                 rocketModel[i].model = MODEL_RP32INTF;
1975                 strcpy(rocketModel[i].modelString, "RocketPort 32 port w/external I/F");
1976                 rocketModel[i].numPorts = 32;
1977                 break;
1978         case PCI_DEVICE_ID_URP32INTF:
1979                 max_num_aiops = 4;
1980                 rocketModel[i].model = MODEL_UPCI_RP32INTF;
1981                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 32 port w/external I/F");
1982                 rocketModel[i].numPorts = 32;
1983                 break;
1984         case PCI_DEVICE_ID_RPP4:
1985                 max_num_aiops = 1;
1986                 ports_per_aiop = 4;
1987                 altChanRingIndicator++;
1988                 fast_clock++;
1989                 rocketModel[i].model = MODEL_RPP4;
1990                 strcpy(rocketModel[i].modelString, "RocketPort Plus 4 port");
1991                 rocketModel[i].numPorts = 4;
1992                 break;
1993         case PCI_DEVICE_ID_RPP8:
1994                 max_num_aiops = 2;
1995                 ports_per_aiop = 4;
1996                 altChanRingIndicator++;
1997                 fast_clock++;
1998                 rocketModel[i].model = MODEL_RPP8;
1999                 strcpy(rocketModel[i].modelString, "RocketPort Plus 8 port");
2000                 rocketModel[i].numPorts = 8;
2001                 break;
2002         case PCI_DEVICE_ID_RP2_232:
2003                 max_num_aiops = 1;
2004                 ports_per_aiop = 2;
2005                 altChanRingIndicator++;
2006                 fast_clock++;
2007                 rocketModel[i].model = MODEL_RP2_232;
2008                 strcpy(rocketModel[i].modelString, "RocketPort Plus 2 port RS232");
2009                 rocketModel[i].numPorts = 2;
2010                 break;
2011         case PCI_DEVICE_ID_RP2_422:
2012                 max_num_aiops = 1;
2013                 ports_per_aiop = 2;
2014                 altChanRingIndicator++;
2015                 fast_clock++;
2016                 rocketModel[i].model = MODEL_RP2_422;
2017                 strcpy(rocketModel[i].modelString, "RocketPort Plus 2 port RS422");
2018                 rocketModel[i].numPorts = 2;
2019                 break;
2020         case PCI_DEVICE_ID_RP6M:
2021
2022                 max_num_aiops = 1;
2023                 ports_per_aiop = 6;
2024
2025                 /*  If revision is 1, the rocketmodem flash must be loaded.
2026                  *  If it is 2 it is a "socketed" version. */
2027                 if (dev->revision == 1) {
2028                         rcktpt_type[i] = ROCKET_TYPE_MODEMII;
2029                         rocketModel[i].loadrm2 = 1;
2030                 } else {
2031                         rcktpt_type[i] = ROCKET_TYPE_MODEM;
2032                 }
2033
2034                 rocketModel[i].model = MODEL_RP6M;
2035                 strcpy(rocketModel[i].modelString, "RocketModem 6 port");
2036                 rocketModel[i].numPorts = 6;
2037                 break;
2038         case PCI_DEVICE_ID_RP4M:
2039                 max_num_aiops = 1;
2040                 ports_per_aiop = 4;
2041                 if (dev->revision == 1) {
2042                         rcktpt_type[i] = ROCKET_TYPE_MODEMII;
2043                         rocketModel[i].loadrm2 = 1;
2044                 } else {
2045                         rcktpt_type[i] = ROCKET_TYPE_MODEM;
2046                 }
2047
2048                 rocketModel[i].model = MODEL_RP4M;
2049                 strcpy(rocketModel[i].modelString, "RocketModem 4 port");
2050                 rocketModel[i].numPorts = 4;
2051                 break;
2052         default:
2053                 max_num_aiops = 0;
2054                 break;
2055         }
2056
2057         /*
2058          * Check for UPCI boards.
2059          */
2060
2061         switch (dev->device) {
2062         case PCI_DEVICE_ID_URP32INTF:
2063         case PCI_DEVICE_ID_URP8INTF:
2064         case PCI_DEVICE_ID_URP16INTF:
2065         case PCI_DEVICE_ID_CRP16INTF:
2066         case PCI_DEVICE_ID_URP8OCTA:
2067                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2068                 ConfigIO = pci_resource_start(dev, 1);
2069                 if (dev->device == PCI_DEVICE_ID_URP8OCTA) {
2070                         UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2071
2072                         /*
2073                          * Check for octa or quad cable.
2074                          */
2075                         if (!
2076                             (sInW(ConfigIO + _PCI_9030_GPIO_CTRL) &
2077                              PCI_GPIO_CTRL_8PORT)) {
2078                                 ports_per_aiop = 4;
2079                                 rocketModel[i].numPorts = 4;
2080                         }
2081                 }
2082                 break;
2083         case PCI_DEVICE_ID_UPCI_RM3_8PORT:
2084                 max_num_aiops = 1;
2085                 rocketModel[i].model = MODEL_UPCI_RM3_8PORT;
2086                 strcpy(rocketModel[i].modelString, "RocketModem III 8 port");
2087                 rocketModel[i].numPorts = 8;
2088                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2089                 UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2090                 ConfigIO = pci_resource_start(dev, 1);
2091                 rcktpt_type[i] = ROCKET_TYPE_MODEMIII;
2092                 break;
2093         case PCI_DEVICE_ID_UPCI_RM3_4PORT:
2094                 max_num_aiops = 1;
2095                 rocketModel[i].model = MODEL_UPCI_RM3_4PORT;
2096                 strcpy(rocketModel[i].modelString, "RocketModem III 4 port");
2097                 rocketModel[i].numPorts = 4;
2098                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2099                 UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2100                 ConfigIO = pci_resource_start(dev, 1);
2101                 rcktpt_type[i] = ROCKET_TYPE_MODEMIII;
2102                 break;
2103         default:
2104                 break;
2105         }
2106
2107         if (fast_clock) {
2108                 sClockPrescale = 0x12;  /* mod 2 (divide by 3) */
2109                 rp_baud_base[i] = 921600;
2110         } else {
2111                 /*
2112                  * If support_low_speed is set, use the slow clock
2113                  * prescale, which supports 50 bps
2114                  */
2115                 if (support_low_speed) {
2116                         /* mod 9 (divide by 10) prescale */
2117                         sClockPrescale = 0x19;
2118                         rp_baud_base[i] = 230400;
2119                 } else {
2120                         /* mod 4 (divide by 5) prescale */
2121                         sClockPrescale = 0x14;
2122                         rp_baud_base[i] = 460800;
2123                 }
2124         }
2125
2126         for (aiop = 0; aiop < max_num_aiops; aiop++)
2127                 aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x40);
2128         ctlp = sCtlNumToCtlPtr(i);
2129         num_aiops = sPCIInitController(ctlp, i, aiopio, max_num_aiops, ConfigIO, 0, FREQ_DIS, 0, altChanRingIndicator, UPCIRingInd);
2130         for (aiop = 0; aiop < max_num_aiops; aiop++)
2131                 ctlp->AiopNumChan[aiop] = ports_per_aiop;
2132
2133         dev_info(&dev->dev, "comtrol PCI controller #%d found at "
2134                 "address %04lx, %d AIOP(s) (%s), creating ttyR%d - %ld\n",
2135                 i, rcktpt_io_addr[i], num_aiops, rocketModel[i].modelString,
2136                 rocketModel[i].startingPortNumber,
2137                 rocketModel[i].startingPortNumber + rocketModel[i].numPorts-1);
2138
2139         if (num_aiops <= 0) {
2140                 rcktpt_io_addr[i] = 0;
2141                 return (0);
2142         }
2143         is_PCI[i] = 1;
2144
2145         /*  Reset the AIOPIC, init the serial ports */
2146         for (aiop = 0; aiop < num_aiops; aiop++) {
2147                 sResetAiopByNum(ctlp, aiop);
2148                 num_chan = ports_per_aiop;
2149                 for (chan = 0; chan < num_chan; chan++)
2150                         init_r_port(i, aiop, chan, dev);
2151         }
2152
2153         /*  Rocket modems must be reset */
2154         if ((rcktpt_type[i] == ROCKET_TYPE_MODEM) ||
2155             (rcktpt_type[i] == ROCKET_TYPE_MODEMII) ||
2156             (rcktpt_type[i] == ROCKET_TYPE_MODEMIII)) {
2157                 num_chan = ports_per_aiop;
2158                 for (chan = 0; chan < num_chan; chan++)
2159                         sPCIModemReset(ctlp, chan, 1);
2160                 msleep(500);
2161                 for (chan = 0; chan < num_chan; chan++)
2162                         sPCIModemReset(ctlp, chan, 0);
2163                 msleep(500);
2164                 rmSpeakerReset(ctlp, rocketModel[i].model);
2165         }
2166         return (1);
2167 }
2168
2169 /*
2170  *  Probes for PCI cards, inits them if found
2171  *  Input:   board_found = number of ISA boards already found, or the
2172  *           starting board number
2173  *  Returns: Number of PCI boards found
2174  */
2175 static int __init init_PCI(int boards_found)
2176 {
2177         struct pci_dev *dev = NULL;
2178         int count = 0;
2179
2180         /*  Work through the PCI device list, pulling out ours */
2181         while ((dev = pci_get_device(PCI_VENDOR_ID_RP, PCI_ANY_ID, dev))) {
2182                 if (register_PCI(count + boards_found, dev))
2183                         count++;
2184         }
2185         return (count);
2186 }
2187
2188 #endif                          /* CONFIG_PCI */
2189
2190 /*
2191  *  Probes for ISA cards
2192  *  Input:   i = the board number to look for
2193  *  Returns: 1 if board found, 0 else
2194  */
2195 static int __init init_ISA(int i)
2196 {
2197         int num_aiops, num_chan = 0, total_num_chan = 0;
2198         int aiop, chan;
2199         unsigned int aiopio[MAX_AIOPS_PER_BOARD];
2200         CONTROLLER_t *ctlp;
2201         char *type_string;
2202
2203         /*  If io_addr is zero, no board configured */
2204         if (rcktpt_io_addr[i] == 0)
2205                 return (0);
2206
2207         /*  Reserve the IO region */
2208         if (!request_region(rcktpt_io_addr[i], 64, "Comtrol RocketPort")) {
2209                 printk(KERN_ERR "Unable to reserve IO region for configured "
2210                                 "ISA RocketPort at address 0x%lx, board not "
2211                                 "installed...\n", rcktpt_io_addr[i]);
2212                 rcktpt_io_addr[i] = 0;
2213                 return (0);
2214         }
2215
2216         ctlp = sCtlNumToCtlPtr(i);
2217
2218         ctlp->boardType = rcktpt_type[i];
2219
2220         switch (rcktpt_type[i]) {
2221         case ROCKET_TYPE_PC104:
2222                 type_string = "(PC104)";
2223                 break;
2224         case ROCKET_TYPE_MODEM:
2225                 type_string = "(RocketModem)";
2226                 break;
2227         case ROCKET_TYPE_MODEMII:
2228                 type_string = "(RocketModem II)";
2229                 break;
2230         default:
2231                 type_string = "";
2232                 break;
2233         }
2234
2235         /*
2236          * If support_low_speed is set, use the slow clock prescale,
2237          * which supports 50 bps
2238          */
2239         if (support_low_speed) {
2240                 sClockPrescale = 0x19;  /* mod 9 (divide by 10) prescale */
2241                 rp_baud_base[i] = 230400;
2242         } else {
2243                 sClockPrescale = 0x14;  /* mod 4 (divide by 5) prescale */
2244                 rp_baud_base[i] = 460800;
2245         }
2246
2247         for (aiop = 0; aiop < MAX_AIOPS_PER_BOARD; aiop++)
2248                 aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x400);
2249
2250         num_aiops = sInitController(ctlp, i, controller + (i * 0x400), aiopio,  MAX_AIOPS_PER_BOARD, 0, FREQ_DIS, 0);
2251
2252         if (ctlp->boardType == ROCKET_TYPE_PC104) {
2253                 sEnAiop(ctlp, 2);       /* only one AIOPIC, but these */
2254                 sEnAiop(ctlp, 3);       /* CSels used for other stuff */
2255         }
2256
2257         /*  If something went wrong initing the AIOP's release the ISA IO memory */
2258         if (num_aiops <= 0) {
2259                 release_region(rcktpt_io_addr[i], 64);
2260                 rcktpt_io_addr[i] = 0;
2261                 return (0);
2262         }
2263
2264         rocketModel[i].startingPortNumber = nextLineNumber;
2265
2266         for (aiop = 0; aiop < num_aiops; aiop++) {
2267                 sResetAiopByNum(ctlp, aiop);
2268                 sEnAiop(ctlp, aiop);
2269                 num_chan = sGetAiopNumChan(ctlp, aiop);
2270                 total_num_chan += num_chan;
2271                 for (chan = 0; chan < num_chan; chan++)
2272                         init_r_port(i, aiop, chan, NULL);
2273         }
2274         is_PCI[i] = 0;
2275         if ((rcktpt_type[i] == ROCKET_TYPE_MODEM) || (rcktpt_type[i] == ROCKET_TYPE_MODEMII)) {
2276                 num_chan = sGetAiopNumChan(ctlp, 0);
2277                 total_num_chan = num_chan;
2278                 for (chan = 0; chan < num_chan; chan++)
2279                         sModemReset(ctlp, chan, 1);
2280                 msleep(500);
2281                 for (chan = 0; chan < num_chan; chan++)
2282                         sModemReset(ctlp, chan, 0);
2283                 msleep(500);
2284                 strcpy(rocketModel[i].modelString, "RocketModem ISA");
2285         } else {
2286                 strcpy(rocketModel[i].modelString, "RocketPort ISA");
2287         }
2288         rocketModel[i].numPorts = total_num_chan;
2289         rocketModel[i].model = MODEL_ISA;
2290
2291         printk(KERN_INFO "RocketPort ISA card #%d found at 0x%lx - %d AIOPs %s\n",
2292                i, rcktpt_io_addr[i], num_aiops, type_string);
2293
2294         printk(KERN_INFO "Installing %s, creating /dev/ttyR%d - %ld\n",
2295                rocketModel[i].modelString,
2296                rocketModel[i].startingPortNumber,
2297                rocketModel[i].startingPortNumber +
2298                rocketModel[i].numPorts - 1);
2299
2300         return (1);
2301 }
2302
2303 static const struct tty_operations rocket_ops = {
2304         .open = rp_open,
2305         .close = rp_close,
2306         .write = rp_write,
2307         .put_char = rp_put_char,
2308         .write_room = rp_write_room,
2309         .chars_in_buffer = rp_chars_in_buffer,
2310         .flush_buffer = rp_flush_buffer,
2311         .ioctl = rp_ioctl,
2312         .throttle = rp_throttle,
2313         .unthrottle = rp_unthrottle,
2314         .set_termios = rp_set_termios,
2315         .stop = rp_stop,
2316         .start = rp_start,
2317         .hangup = rp_hangup,
2318         .break_ctl = rp_break,
2319         .send_xchar = rp_send_xchar,
2320         .wait_until_sent = rp_wait_until_sent,
2321         .tiocmget = rp_tiocmget,
2322         .tiocmset = rp_tiocmset,
2323 };
2324
2325 static const struct tty_port_operations rocket_port_ops = {
2326         .carrier_raised = carrier_raised,
2327         .dtr_rts = dtr_rts,
2328 };
2329
2330 /*
2331  * The module "startup" routine; it's run when the module is loaded.
2332  */
2333 static int __init rp_init(void)
2334 {
2335         int ret = -ENOMEM, pci_boards_found, isa_boards_found, i;
2336
2337         printk(KERN_INFO "RocketPort device driver module, version %s, %s\n",
2338                ROCKET_VERSION, ROCKET_DATE);
2339
2340         rocket_driver = alloc_tty_driver(MAX_RP_PORTS);
2341         if (!rocket_driver)
2342                 goto err;
2343
2344         /*
2345          *  If board 1 is non-zero, there is at least one ISA configured.  If controller is
2346          *  zero, use the default controller IO address of board1 + 0x40.
2347          */
2348         if (board1) {
2349                 if (controller == 0)
2350                         controller = board1 + 0x40;
2351         } else {
2352                 controller = 0;  /*  Used as a flag, meaning no ISA boards */
2353         }
2354
2355         /*  If an ISA card is configured, reserve the 4 byte IO space for the Mudbac controller */
2356         if (controller && (!request_region(controller, 4, "Comtrol RocketPort"))) {
2357                 printk(KERN_ERR "Unable to reserve IO region for first "
2358                         "configured ISA RocketPort controller 0x%lx.  "
2359                         "Driver exiting\n", controller);
2360                 ret = -EBUSY;
2361                 goto err_tty;
2362         }
2363
2364         /*  Store ISA variable retrieved from command line or .conf file. */
2365         rcktpt_io_addr[0] = board1;
2366         rcktpt_io_addr[1] = board2;
2367         rcktpt_io_addr[2] = board3;
2368         rcktpt_io_addr[3] = board4;
2369
2370         rcktpt_type[0] = modem1 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2371         rcktpt_type[0] = pc104_1[0] ? ROCKET_TYPE_PC104 : rcktpt_type[0];
2372         rcktpt_type[1] = modem2 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2373         rcktpt_type[1] = pc104_2[0] ? ROCKET_TYPE_PC104 : rcktpt_type[1];
2374         rcktpt_type[2] = modem3 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2375         rcktpt_type[2] = pc104_3[0] ? ROCKET_TYPE_PC104 : rcktpt_type[2];
2376         rcktpt_type[3] = modem4 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2377         rcktpt_type[3] = pc104_4[0] ? ROCKET_TYPE_PC104 : rcktpt_type[3];
2378
2379         /*
2380          * Set up the tty driver structure and then register this
2381          * driver with the tty layer.
2382          */
2383
2384         rocket_driver->flags = TTY_DRIVER_DYNAMIC_DEV;
2385         rocket_driver->name = "ttyR";
2386         rocket_driver->driver_name = "Comtrol RocketPort";
2387         rocket_driver->major = TTY_ROCKET_MAJOR;
2388         rocket_driver->minor_start = 0;
2389         rocket_driver->type = TTY_DRIVER_TYPE_SERIAL;
2390         rocket_driver->subtype = SERIAL_TYPE_NORMAL;
2391         rocket_driver->init_termios = tty_std_termios;
2392         rocket_driver->init_termios.c_cflag =
2393             B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2394         rocket_driver->init_termios.c_ispeed = 9600;
2395         rocket_driver->init_termios.c_ospeed = 9600;
2396 #ifdef ROCKET_SOFT_FLOW
2397         rocket_driver->flags |= TTY_DRIVER_REAL_RAW;
2398 #endif
2399         tty_set_operations(rocket_driver, &rocket_ops);
2400
2401         ret = tty_register_driver(rocket_driver);
2402         if (ret < 0) {
2403                 printk(KERN_ERR "Couldn't install tty RocketPort driver\n");
2404                 goto err_controller;
2405         }
2406
2407 #ifdef ROCKET_DEBUG_OPEN
2408         printk(KERN_INFO "RocketPort driver is major %d\n", rocket_driver.major);
2409 #endif
2410
2411         /*
2412          *  OK, let's probe each of the controllers looking for boards.  Any boards found
2413          *  will be initialized here.
2414          */
2415         isa_boards_found = 0;
2416         pci_boards_found = 0;
2417
2418         for (i = 0; i < NUM_BOARDS; i++) {
2419                 if (init_ISA(i))
2420                         isa_boards_found++;
2421         }
2422
2423 #ifdef CONFIG_PCI
2424         if (isa_boards_found < NUM_BOARDS)
2425                 pci_boards_found = init_PCI(isa_boards_found);
2426 #endif
2427
2428         max_board = pci_boards_found + isa_boards_found;
2429
2430         if (max_board == 0) {
2431                 printk(KERN_ERR "No rocketport ports found; unloading driver\n");
2432                 ret = -ENXIO;
2433                 goto err_ttyu;
2434         }
2435
2436         return 0;
2437 err_ttyu:
2438         tty_unregister_driver(rocket_driver);
2439 err_controller:
2440         if (controller)
2441                 release_region(controller, 4);
2442 err_tty:
2443         put_tty_driver(rocket_driver);
2444 err:
2445         return ret;
2446 }
2447
2448
2449 static void rp_cleanup_module(void)
2450 {
2451         int retval;
2452         int i;
2453
2454         del_timer_sync(&rocket_timer);
2455
2456         retval = tty_unregister_driver(rocket_driver);
2457         if (retval)
2458                 printk(KERN_ERR "Error %d while trying to unregister "
2459                        "rocketport driver\n", -retval);
2460
2461         for (i = 0; i < MAX_RP_PORTS; i++)
2462                 if (rp_table[i]) {
2463                         tty_unregister_device(rocket_driver, i);
2464                         tty_port_destroy(&rp_table[i]->port);
2465                         kfree(rp_table[i]);
2466                 }
2467
2468         put_tty_driver(rocket_driver);
2469
2470         for (i = 0; i < NUM_BOARDS; i++) {
2471                 if (rcktpt_io_addr[i] <= 0 || is_PCI[i])
2472                         continue;
2473                 release_region(rcktpt_io_addr[i], 64);
2474         }
2475         if (controller)
2476                 release_region(controller, 4);
2477 }
2478
2479 /***************************************************************************
2480 Function: sInitController
2481 Purpose:  Initialization of controller global registers and controller
2482           structure.
2483 Call:     sInitController(CtlP,CtlNum,MudbacIO,AiopIOList,AiopIOListSize,
2484                           IRQNum,Frequency,PeriodicOnly)
2485           CONTROLLER_T *CtlP; Ptr to controller structure
2486           int CtlNum; Controller number
2487           ByteIO_t MudbacIO; Mudbac base I/O address.
2488           ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2489              This list must be in the order the AIOPs will be found on the
2490              controller.  Once an AIOP in the list is not found, it is
2491              assumed that there are no more AIOPs on the controller.
2492           int AiopIOListSize; Number of addresses in AiopIOList
2493           int IRQNum; Interrupt Request number.  Can be any of the following:
2494                          0: Disable global interrupts
2495                          3: IRQ 3
2496                          4: IRQ 4
2497                          5: IRQ 5
2498                          9: IRQ 9
2499                          10: IRQ 10
2500                          11: IRQ 11
2501                          12: IRQ 12
2502                          15: IRQ 15
2503           Byte_t Frequency: A flag identifying the frequency
2504                    of the periodic interrupt, can be any one of the following:
2505                       FREQ_DIS - periodic interrupt disabled
2506                       FREQ_137HZ - 137 Hertz
2507                       FREQ_69HZ - 69 Hertz
2508                       FREQ_34HZ - 34 Hertz
2509                       FREQ_17HZ - 17 Hertz
2510                       FREQ_9HZ - 9 Hertz
2511                       FREQ_4HZ - 4 Hertz
2512                    If IRQNum is set to 0 the Frequency parameter is
2513                    overidden, it is forced to a value of FREQ_DIS.
2514           int PeriodicOnly: 1 if all interrupts except the periodic
2515                                interrupt are to be blocked.
2516                             0 is both the periodic interrupt and
2517                                other channel interrupts are allowed.
2518                             If IRQNum is set to 0 the PeriodicOnly parameter is
2519                                overidden, it is forced to a value of 0.
2520 Return:   int: Number of AIOPs on the controller, or CTLID_NULL if controller
2521                initialization failed.
2522
2523 Comments:
2524           If periodic interrupts are to be disabled but AIOP interrupts
2525           are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
2526
2527           If interrupts are to be completely disabled set IRQNum to 0.
2528
2529           Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
2530           invalid combination.
2531
2532           This function performs initialization of global interrupt modes,
2533           but it does not actually enable global interrupts.  To enable
2534           and disable global interrupts use functions sEnGlobalInt() and
2535           sDisGlobalInt().  Enabling of global interrupts is normally not
2536           done until all other initializations are complete.
2537
2538           Even if interrupts are globally enabled, they must also be
2539           individually enabled for each channel that is to generate
2540           interrupts.
2541
2542 Warnings: No range checking on any of the parameters is done.
2543
2544           No context switches are allowed while executing this function.
2545
2546           After this function all AIOPs on the controller are disabled,
2547           they can be enabled with sEnAiop().
2548 */
2549 static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
2550                            ByteIO_t * AiopIOList, int AiopIOListSize,
2551                            int IRQNum, Byte_t Frequency, int PeriodicOnly)
2552 {
2553         int i;
2554         ByteIO_t io;
2555         int done;
2556
2557         CtlP->AiopIntrBits = aiop_intr_bits;
2558         CtlP->AltChanRingIndicator = 0;
2559         CtlP->CtlNum = CtlNum;
2560         CtlP->CtlID = CTLID_0001;       /* controller release 1 */
2561         CtlP->BusType = isISA;
2562         CtlP->MBaseIO = MudbacIO;
2563         CtlP->MReg1IO = MudbacIO + 1;
2564         CtlP->MReg2IO = MudbacIO + 2;
2565         CtlP->MReg3IO = MudbacIO + 3;
2566 #if 1
2567         CtlP->MReg2 = 0;        /* interrupt disable */
2568         CtlP->MReg3 = 0;        /* no periodic interrupts */
2569 #else
2570         if (sIRQMap[IRQNum] == 0) {     /* interrupts globally disabled */
2571                 CtlP->MReg2 = 0;        /* interrupt disable */
2572                 CtlP->MReg3 = 0;        /* no periodic interrupts */
2573         } else {
2574                 CtlP->MReg2 = sIRQMap[IRQNum];  /* set IRQ number */
2575                 CtlP->MReg3 = Frequency;        /* set frequency */
2576                 if (PeriodicOnly) {     /* periodic interrupt only */
2577                         CtlP->MReg3 |= PERIODIC_ONLY;
2578                 }
2579         }
2580 #endif
2581         sOutB(CtlP->MReg2IO, CtlP->MReg2);
2582         sOutB(CtlP->MReg3IO, CtlP->MReg3);
2583         sControllerEOI(CtlP);   /* clear EOI if warm init */
2584         /* Init AIOPs */
2585         CtlP->NumAiop = 0;
2586         for (i = done = 0; i < AiopIOListSize; i++) {
2587                 io = AiopIOList[i];
2588                 CtlP->AiopIO[i] = (WordIO_t) io;
2589                 CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
2590                 sOutB(CtlP->MReg2IO, CtlP->MReg2 | (i & 0x03)); /* AIOP index */
2591                 sOutB(MudbacIO, (Byte_t) (io >> 6));    /* set up AIOP I/O in MUDBAC */
2592                 if (done)
2593                         continue;
2594                 sEnAiop(CtlP, i);       /* enable the AIOP */
2595                 CtlP->AiopID[i] = sReadAiopID(io);      /* read AIOP ID */
2596                 if (CtlP->AiopID[i] == AIOPID_NULL)     /* if AIOP does not exist */
2597                         done = 1;       /* done looking for AIOPs */
2598                 else {
2599                         CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */
2600                         sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE);    /* clock prescaler */
2601                         sOutB(io + _INDX_DATA, sClockPrescale);
2602                         CtlP->NumAiop++;        /* bump count of AIOPs */
2603                 }
2604                 sDisAiop(CtlP, i);      /* disable AIOP */
2605         }
2606
2607         if (CtlP->NumAiop == 0)
2608                 return (-1);
2609         else
2610                 return (CtlP->NumAiop);
2611 }
2612
2613 /***************************************************************************
2614 Function: sReadAiopID
2615 Purpose:  Read the AIOP idenfication number directly from an AIOP.
2616 Call:     sReadAiopID(io)
2617           ByteIO_t io: AIOP base I/O address
2618 Return:   int: Flag AIOPID_XXXX if a valid AIOP is found, where X
2619                  is replace by an identifying number.
2620           Flag AIOPID_NULL if no valid AIOP is found
2621 Warnings: No context switches are allowed while executing this function.
2622
2623 */
2624 static int sReadAiopID(ByteIO_t io)
2625 {
2626         Byte_t AiopID;          /* ID byte from AIOP */
2627
2628         sOutB(io + _CMD_REG, RESET_ALL);        /* reset AIOP */
2629         sOutB(io + _CMD_REG, 0x0);
2630         AiopID = sInW(io + _CHN_STAT0) & 0x07;
2631         if (AiopID == 0x06)
2632                 return (1);
2633         else                    /* AIOP does not exist */
2634                 return (-1);
2635 }
2636
2637 /***************************************************************************
2638 Function: sReadAiopNumChan
2639 Purpose:  Read the number of channels available in an AIOP directly from
2640           an AIOP.
2641 Call:     sReadAiopNumChan(io)
2642           WordIO_t io: AIOP base I/O address
2643 Return:   int: The number of channels available
2644 Comments: The number of channels is determined by write/reads from identical
2645           offsets within the SRAM address spaces for channels 0 and 4.
2646           If the channel 4 space is mirrored to channel 0 it is a 4 channel
2647           AIOP, otherwise it is an 8 channel.
2648 Warnings: No context switches are allowed while executing this function.
2649 */
2650 static int sReadAiopNumChan(WordIO_t io)
2651 {
2652         Word_t x;
2653         static Byte_t R[4] = { 0x00, 0x00, 0x34, 0x12 };
2654
2655         /* write to chan 0 SRAM */
2656         out32((DWordIO_t) io + _INDX_ADDR, R);
2657         sOutW(io + _INDX_ADDR, 0);      /* read from SRAM, chan 0 */
2658         x = sInW(io + _INDX_DATA);
2659         sOutW(io + _INDX_ADDR, 0x4000); /* read from SRAM, chan 4 */
2660         if (x != sInW(io + _INDX_DATA)) /* if different must be 8 chan */
2661                 return (8);
2662         else
2663                 return (4);
2664 }
2665
2666 /***************************************************************************
2667 Function: sInitChan
2668 Purpose:  Initialization of a channel and channel structure
2669 Call:     sInitChan(CtlP,ChP,AiopNum,ChanNum)
2670           CONTROLLER_T *CtlP; Ptr to controller structure
2671           CHANNEL_T *ChP; Ptr to channel structure
2672           int AiopNum; AIOP number within controller
2673           int ChanNum; Channel number within AIOP
2674 Return:   int: 1 if initialization succeeded, 0 if it fails because channel
2675                number exceeds number of channels available in AIOP.
2676 Comments: This function must be called before a channel can be used.
2677 Warnings: No range checking on any of the parameters is done.
2678
2679           No context switches are allowed while executing this function.
2680 */
2681 static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
2682                      int ChanNum)
2683 {
2684         int i;
2685         WordIO_t AiopIO;
2686         WordIO_t ChIOOff;
2687         Byte_t *ChR;
2688         Word_t ChOff;
2689         static Byte_t R[4];
2690         int brd9600;
2691
2692         if (ChanNum >= CtlP->AiopNumChan[AiopNum])
2693                 return 0;       /* exceeds num chans in AIOP */
2694
2695         /* Channel, AIOP, and controller identifiers */
2696         ChP->CtlP = CtlP;
2697         ChP->ChanID = CtlP->AiopID[AiopNum];
2698         ChP->AiopNum = AiopNum;
2699         ChP->ChanNum = ChanNum;
2700
2701         /* Global direct addresses */
2702         AiopIO = CtlP->AiopIO[AiopNum];
2703         ChP->Cmd = (ByteIO_t) AiopIO + _CMD_REG;
2704         ChP->IntChan = (ByteIO_t) AiopIO + _INT_CHAN;
2705         ChP->IntMask = (ByteIO_t) AiopIO + _INT_MASK;
2706         ChP->IndexAddr = (DWordIO_t) AiopIO + _INDX_ADDR;
2707         ChP->IndexData = AiopIO + _INDX_DATA;
2708
2709         /* Channel direct addresses */
2710         ChIOOff = AiopIO + ChP->ChanNum * 2;
2711         ChP->TxRxData = ChIOOff + _TD0;
2712         ChP->ChanStat = ChIOOff + _CHN_STAT0;
2713         ChP->TxRxCount = ChIOOff + _FIFO_CNT0;
2714         ChP->IntID = (ByteIO_t) AiopIO + ChP->ChanNum + _INT_ID0;
2715
2716         /* Initialize the channel from the RData array */
2717         for (i = 0; i < RDATASIZE; i += 4) {
2718                 R[0] = RData[i];
2719                 R[1] = RData[i + 1] + 0x10 * ChanNum;
2720                 R[2] = RData[i + 2];
2721                 R[3] = RData[i + 3];
2722                 out32(ChP->IndexAddr, R);
2723         }
2724
2725         ChR = ChP->R;
2726         for (i = 0; i < RREGDATASIZE; i += 4) {
2727                 ChR[i] = RRegData[i];
2728                 ChR[i + 1] = RRegData[i + 1] + 0x10 * ChanNum;
2729                 ChR[i + 2] = RRegData[i + 2];
2730                 ChR[i + 3] = RRegData[i + 3];
2731         }
2732
2733         /* Indexed registers */
2734         ChOff = (Word_t) ChanNum *0x1000;
2735
2736         if (sClockPrescale == 0x14)
2737                 brd9600 = 47;
2738         else
2739                 brd9600 = 23;
2740
2741         ChP->BaudDiv[0] = (Byte_t) (ChOff + _BAUD);
2742         ChP->BaudDiv[1] = (Byte_t) ((ChOff + _BAUD) >> 8);
2743         ChP->BaudDiv[2] = (Byte_t) brd9600;
2744         ChP->BaudDiv[3] = (Byte_t) (brd9600 >> 8);
2745         out32(ChP->IndexAddr, ChP->BaudDiv);
2746
2747         ChP->TxControl[0] = (Byte_t) (ChOff + _TX_CTRL);
2748         ChP->TxControl[1] = (Byte_t) ((ChOff + _TX_CTRL) >> 8);
2749         ChP->TxControl[2] = 0;
2750         ChP->TxControl[3] = 0;
2751         out32(ChP->IndexAddr, ChP->TxControl);
2752
2753         ChP->RxControl[0] = (Byte_t) (ChOff + _RX_CTRL);
2754         ChP->RxControl[1] = (Byte_t) ((ChOff + _RX_CTRL) >> 8);
2755         ChP->RxControl[2] = 0;
2756         ChP->RxControl[3] = 0;
2757         out32(ChP->IndexAddr, ChP->RxControl);
2758
2759         ChP->TxEnables[0] = (Byte_t) (ChOff + _TX_ENBLS);
2760         ChP->TxEnables[1] = (Byte_t) ((ChOff + _TX_ENBLS) >> 8);
2761         ChP->TxEnables[2] = 0;
2762         ChP->TxEnables[3] = 0;
2763         out32(ChP->IndexAddr, ChP->TxEnables);
2764
2765         ChP->TxCompare[0] = (Byte_t) (ChOff + _TXCMP1);
2766         ChP->TxCompare[1] = (Byte_t) ((ChOff + _TXCMP1) >> 8);
2767         ChP->TxCompare[2] = 0;
2768         ChP->TxCompare[3] = 0;
2769         out32(ChP->IndexAddr, ChP->TxCompare);
2770
2771         ChP->TxReplace1[0] = (Byte_t) (ChOff + _TXREP1B1);
2772         ChP->TxReplace1[1] = (Byte_t) ((ChOff + _TXREP1B1) >> 8);
2773         ChP->TxReplace1[2] = 0;
2774         ChP->TxReplace1[3] = 0;
2775         out32(ChP->IndexAddr, ChP->TxReplace1);
2776
2777         ChP->TxReplace2[0] = (Byte_t) (ChOff + _TXREP2);
2778         ChP->TxReplace2[1] = (Byte_t) ((ChOff + _TXREP2) >> 8);
2779         ChP->TxReplace2[2] = 0;
2780         ChP->TxReplace2[3] = 0;
2781         out32(ChP->IndexAddr, ChP->TxReplace2);
2782
2783         ChP->TxFIFOPtrs = ChOff + _TXF_OUTP;
2784         ChP->TxFIFO = ChOff + _TX_FIFO;
2785
2786         sOutB(ChP->Cmd, (Byte_t) ChanNum | RESTXFCNT);  /* apply reset Tx FIFO count */
2787         sOutB(ChP->Cmd, (Byte_t) ChanNum);      /* remove reset Tx FIFO count */
2788         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxFIFOPtrs);      /* clear Tx in/out ptrs */
2789         sOutW(ChP->IndexData, 0);
2790         ChP->RxFIFOPtrs = ChOff + _RXF_OUTP;
2791         ChP->RxFIFO = ChOff + _RX_FIFO;
2792
2793         sOutB(ChP->Cmd, (Byte_t) ChanNum | RESRXFCNT);  /* apply reset Rx FIFO count */
2794         sOutB(ChP->Cmd, (Byte_t) ChanNum);      /* remove reset Rx FIFO count */
2795         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs);      /* clear Rx out ptr */
2796         sOutW(ChP->IndexData, 0);
2797         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs + 2);  /* clear Rx in ptr */
2798         sOutW(ChP->IndexData, 0);
2799         ChP->TxPrioCnt = ChOff + _TXP_CNT;
2800         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxPrioCnt);
2801         sOutB(ChP->IndexData, 0);
2802         ChP->TxPrioPtr = ChOff + _TXP_PNTR;
2803         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxPrioPtr);
2804         sOutB(ChP->IndexData, 0);
2805         ChP->TxPrioBuf = ChOff + _TXP_BUF;
2806         sEnRxProcessor(ChP);    /* start the Rx processor */
2807
2808         return 1;
2809 }
2810
2811 /***************************************************************************
2812 Function: sStopRxProcessor
2813 Purpose:  Stop the receive processor from processing a channel.
2814 Call:     sStopRxProcessor(ChP)
2815           CHANNEL_T *ChP; Ptr to channel structure
2816
2817 Comments: The receive processor can be started again with sStartRxProcessor().
2818           This function causes the receive processor to skip over the
2819           stopped channel.  It does not stop it from processing other channels.
2820
2821 Warnings: No context switches are allowed while executing this function.
2822
2823           Do not leave the receive processor stopped for more than one
2824           character time.
2825
2826           After calling this function a delay of 4 uS is required to ensure
2827           that the receive processor is no longer processing this channel.
2828 */
2829 static void sStopRxProcessor(CHANNEL_T * ChP)
2830 {
2831         Byte_t R[4];
2832
2833         R[0] = ChP->R[0];
2834         R[1] = ChP->R[1];
2835         R[2] = 0x0a;
2836         R[3] = ChP->R[3];
2837         out32(ChP->IndexAddr, R);
2838 }
2839
2840 /***************************************************************************
2841 Function: sFlushRxFIFO
2842 Purpose:  Flush the Rx FIFO
2843 Call:     sFlushRxFIFO(ChP)
2844           CHANNEL_T *ChP; Ptr to channel structure
2845 Return:   void
2846 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
2847           while it is being flushed the receive processor is stopped
2848           and the transmitter is disabled.  After these operations a
2849           4 uS delay is done before clearing the pointers to allow
2850           the receive processor to stop.  These items are handled inside
2851           this function.
2852 Warnings: No context switches are allowed while executing this function.
2853 */
2854 static void sFlushRxFIFO(CHANNEL_T * ChP)
2855 {
2856         int i;
2857         Byte_t Ch;              /* channel number within AIOP */
2858         int RxFIFOEnabled;      /* 1 if Rx FIFO enabled */
2859
2860         if (sGetRxCnt(ChP) == 0)        /* Rx FIFO empty */
2861                 return;         /* don't need to flush */
2862
2863         RxFIFOEnabled = 0;
2864         if (ChP->R[0x32] == 0x08) {     /* Rx FIFO is enabled */
2865                 RxFIFOEnabled = 1;
2866                 sDisRxFIFO(ChP);        /* disable it */
2867                 for (i = 0; i < 2000 / 200; i++)        /* delay 2 uS to allow proc to disable FIFO */
2868                         sInB(ChP->IntChan);     /* depends on bus i/o timing */
2869         }
2870         sGetChanStatus(ChP);    /* clear any pending Rx errors in chan stat */
2871         Ch = (Byte_t) sGetChanNum(ChP);
2872         sOutB(ChP->Cmd, Ch | RESRXFCNT);        /* apply reset Rx FIFO count */
2873         sOutB(ChP->Cmd, Ch);    /* remove reset Rx FIFO count */
2874         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs);      /* clear Rx out ptr */
2875         sOutW(ChP->IndexData, 0);
2876         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs + 2);  /* clear Rx in ptr */
2877         sOutW(ChP->IndexData, 0);
2878         if (RxFIFOEnabled)
2879                 sEnRxFIFO(ChP); /* enable Rx FIFO */
2880 }
2881
2882 /***************************************************************************
2883 Function: sFlushTxFIFO
2884 Purpose:  Flush the Tx FIFO
2885 Call:     sFlushTxFIFO(ChP)
2886           CHANNEL_T *ChP; Ptr to channel structure
2887 Return:   void
2888 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
2889           while it is being flushed the receive processor is stopped
2890           and the transmitter is disabled.  After these operations a
2891           4 uS delay is done before clearing the pointers to allow
2892           the receive processor to stop.  These items are handled inside
2893           this function.
2894 Warnings: No context switches are allowed while executing this function.
2895 */
2896 static void sFlushTxFIFO(CHANNEL_T * ChP)
2897 {
2898         int i;
2899         Byte_t Ch;              /* channel number within AIOP */
2900         int TxEnabled;          /* 1 if transmitter enabled */
2901
2902         if (sGetTxCnt(ChP) == 0)        /* Tx FIFO empty */
2903                 return;         /* don't need to flush */
2904
2905         TxEnabled = 0;
2906         if (ChP->TxControl[3] & TX_ENABLE) {
2907                 TxEnabled = 1;
2908                 sDisTransmit(ChP);      /* disable transmitter */
2909         }
2910         sStopRxProcessor(ChP);  /* stop Rx processor */
2911         for (i = 0; i < 4000 / 200; i++)        /* delay 4 uS to allow proc to stop */
2912                 sInB(ChP->IntChan);     /* depends on bus i/o timing */
2913         Ch = (Byte_t) sGetChanNum(ChP);
2914         sOutB(ChP->Cmd, Ch | RESTXFCNT);        /* apply reset Tx FIFO count */
2915         sOutB(ChP->Cmd, Ch);    /* remove reset Tx FIFO count */
2916         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxFIFOPtrs);      /* clear Tx in/out ptrs */
2917         sOutW(ChP->IndexData, 0);
2918         if (TxEnabled)
2919                 sEnTransmit(ChP);       /* enable transmitter */
2920         sStartRxProcessor(ChP); /* restart Rx processor */
2921 }
2922
2923 /***************************************************************************
2924 Function: sWriteTxPrioByte
2925 Purpose:  Write a byte of priority transmit data to a channel
2926 Call:     sWriteTxPrioByte(ChP,Data)
2927           CHANNEL_T *ChP; Ptr to channel structure
2928           Byte_t Data; The transmit data byte
2929
2930 Return:   int: 1 if the bytes is successfully written, otherwise 0.
2931
2932 Comments: The priority byte is transmitted before any data in the Tx FIFO.
2933
2934 Warnings: No context switches are allowed while executing this function.
2935 */
2936 static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data)
2937 {
2938         Byte_t DWBuf[4];        /* buffer for double word writes */
2939         Word_t *WordPtr;        /* must be far because Win SS != DS */
2940         register DWordIO_t IndexAddr;
2941
2942         if (sGetTxCnt(ChP) > 1) {       /* write it to Tx priority buffer */
2943                 IndexAddr = ChP->IndexAddr;
2944                 sOutW((WordIO_t) IndexAddr, ChP->TxPrioCnt);    /* get priority buffer status */
2945                 if (sInB((ByteIO_t) ChP->IndexData) & PRI_PEND) /* priority buffer busy */
2946                         return (0);     /* nothing sent */
2947
2948                 WordPtr = (Word_t *) (&DWBuf[0]);
2949                 *WordPtr = ChP->TxPrioBuf;      /* data byte address */
2950
2951                 DWBuf[2] = Data;        /* data byte value */
2952                 out32(IndexAddr, DWBuf);        /* write it out */
2953
2954                 *WordPtr = ChP->TxPrioCnt;      /* Tx priority count address */
2955
2956                 DWBuf[2] = PRI_PEND + 1;        /* indicate 1 byte pending */
2957                 DWBuf[3] = 0;   /* priority buffer pointer */
2958                 out32(IndexAddr, DWBuf);        /* write it out */
2959         } else {                /* write it to Tx FIFO */
2960
2961                 sWriteTxByte(sGetTxRxDataIO(ChP), Data);
2962         }
2963         return (1);             /* 1 byte sent */
2964 }
2965
2966 /***************************************************************************
2967 Function: sEnInterrupts
2968 Purpose:  Enable one or more interrupts for a channel
2969 Call:     sEnInterrupts(ChP,Flags)
2970           CHANNEL_T *ChP; Ptr to channel structure
2971           Word_t Flags: Interrupt enable flags, can be any combination
2972              of the following flags:
2973                 TXINT_EN:   Interrupt on Tx FIFO empty
2974                 RXINT_EN:   Interrupt on Rx FIFO at trigger level (see
2975                             sSetRxTrigger())
2976                 SRCINT_EN:  Interrupt on SRC (Special Rx Condition)
2977                 MCINT_EN:   Interrupt on modem input change
2978                 CHANINT_EN: Allow channel interrupt signal to the AIOP's
2979                             Interrupt Channel Register.
2980 Return:   void
2981 Comments: If an interrupt enable flag is set in Flags, that interrupt will be
2982           enabled.  If an interrupt enable flag is not set in Flags, that
2983           interrupt will not be changed.  Interrupts can be disabled with
2984           function sDisInterrupts().
2985
2986           This function sets the appropriate bit for the channel in the AIOP's
2987           Interrupt Mask Register if the CHANINT_EN flag is set.  This allows
2988           this channel's bit to be set in the AIOP's Interrupt Channel Register.
2989
2990           Interrupts must also be globally enabled before channel interrupts
2991           will be passed on to the host.  This is done with function
2992           sEnGlobalInt().
2993
2994           In some cases it may be desirable to disable interrupts globally but
2995           enable channel interrupts.  This would allow the global interrupt
2996           status register to be used to determine which AIOPs need service.
2997 */
2998 static void sEnInterrupts(CHANNEL_T * ChP, Word_t Flags)
2999 {
3000         Byte_t Mask;            /* Interrupt Mask Register */
3001
3002         ChP->RxControl[2] |=
3003             ((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
3004
3005         out32(ChP->IndexAddr, ChP->RxControl);
3006
3007         ChP->TxControl[2] |= ((Byte_t) Flags & TXINT_EN);
3008
3009         out32(ChP->IndexAddr, ChP->TxControl);
3010
3011         if (Flags & CHANINT_EN) {
3012                 Mask = sInB(ChP->IntMask) | sBitMapSetTbl[ChP->ChanNum];
3013                 sOutB(ChP->IntMask, Mask);
3014         }
3015 }
3016
3017 /***************************************************************************
3018 Function: sDisInterrupts
3019 Purpose:  Disable one or more interrupts for a channel
3020 Call:     sDisInterrupts(ChP,Flags)
3021           CHANNEL_T *ChP; Ptr to channel structure
3022           Word_t Flags: Interrupt flags, can be any combination
3023              of the following flags:
3024                 TXINT_EN:   Interrupt on Tx FIFO empty
3025                 RXINT_EN:   Interrupt on Rx FIFO at trigger level (see
3026                             sSetRxTrigger())
3027                 SRCINT_EN:  Interrupt on SRC (Special Rx Condition)
3028                 MCINT_EN:   Interrupt on modem input change
3029                 CHANINT_EN: Disable channel interrupt signal to the
3030                             AIOP's Interrupt Channel Register.
3031 Return:   void
3032 Comments: If an interrupt flag is set in Flags, that interrupt will be
3033           disabled.  If an interrupt flag is not set in Flags, that
3034           interrupt will not be changed.  Interrupts can be enabled with
3035           function sEnInterrupts().
3036
3037           This function clears the appropriate bit for the channel in the AIOP's
3038           Interrupt Mask Register if the CHANINT_EN flag is set.  This blocks
3039           this channel's bit from being set in the AIOP's Interrupt Channel
3040           Register.
3041 */
3042 static void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags)
3043 {
3044         Byte_t Mask;            /* Interrupt Mask Register */
3045
3046         ChP->RxControl[2] &=
3047             ~((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
3048         out32(ChP->IndexAddr, ChP->RxControl);
3049         ChP->TxControl[2] &= ~((Byte_t) Flags & TXINT_EN);
3050         out32(ChP->IndexAddr, ChP->TxControl);
3051
3052         if (Flags & CHANINT_EN) {
3053                 Mask = sInB(ChP->IntMask) & sBitMapClrTbl[ChP->ChanNum];
3054                 sOutB(ChP->IntMask, Mask);
3055         }
3056 }
3057
3058 static void sSetInterfaceMode(CHANNEL_T * ChP, Byte_t mode)
3059 {
3060         sOutB(ChP->CtlP->AiopIO[2], (mode & 0x18) | ChP->ChanNum);
3061 }
3062
3063 /*
3064  *  Not an official SSCI function, but how to reset RocketModems.
3065  *  ISA bus version
3066  */
3067 static void sModemReset(CONTROLLER_T * CtlP, int chan, int on)
3068 {
3069         ByteIO_t addr;
3070         Byte_t val;
3071
3072         addr = CtlP->AiopIO[0] + 0x400;
3073         val = sInB(CtlP->MReg3IO);
3074         /* if AIOP[1] is not enabled, enable it */
3075         if ((val & 2) == 0) {
3076                 val = sInB(CtlP->MReg2IO);
3077                 sOutB(CtlP->MReg2IO, (val & 0xfc) | (1 & 0x03));
3078                 sOutB(CtlP->MBaseIO, (unsigned char) (addr >> 6));
3079         }
3080
3081         sEnAiop(CtlP, 1);
3082         if (!on)
3083                 addr += 8;
3084         sOutB(addr + chan, 0);  /* apply or remove reset */
3085         sDisAiop(CtlP, 1);
3086 }
3087
3088 /*
3089  *  Not an official SSCI function, but how to reset RocketModems.
3090  *  PCI bus version
3091  */
3092 static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on)
3093 {
3094         ByteIO_t addr;
3095
3096         addr = CtlP->AiopIO[0] + 0x40;  /* 2nd AIOP */
3097         if (!on)
3098                 addr += 8;
3099         sOutB(addr + chan, 0);  /* apply or remove reset */
3100 }
3101
3102 /*  Returns the line number given the controller (board), aiop and channel number */
3103 static unsigned char GetLineNumber(int ctrl, int aiop, int ch)
3104 {
3105         return lineNumbers[(ctrl << 5) | (aiop << 3) | ch];
3106 }
3107
3108 /*
3109  *  Stores the line number associated with a given controller (board), aiop
3110  *  and channel number.
3111  *  Returns:  The line number assigned
3112  */
3113 static unsigned char SetLineNumber(int ctrl, int aiop, int ch)
3114 {
3115         lineNumbers[(ctrl << 5) | (aiop << 3) | ch] = nextLineNumber++;
3116         return (nextLineNumber - 1);
3117 }