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Linux 4.19.133
[linux/fpc-iii.git] / drivers / usb / gadget / udc / atmel_usba_udc.c
bloba4ab230335786853798e137b168fb784e38aa2aa
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Driver for the Atmel USBA high speed USB device controller
4 *
5 * Copyright (C) 2005-2007 Atmel Corporation
6 */
7 #include <linux/clk.h>
8 #include <linux/clk/at91_pmc.h>
9 #include <linux/module.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/io.h>
13 #include <linux/slab.h>
14 #include <linux/device.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/list.h>
17 #include <linux/mfd/syscon.h>
18 #include <linux/platform_device.h>
19 #include <linux/regmap.h>
20 #include <linux/ctype.h>
21 #include <linux/usb/ch9.h>
22 #include <linux/usb/gadget.h>
23 #include <linux/delay.h>
24 #include <linux/of.h>
25 #include <linux/irq.h>
26 #include <linux/gpio/consumer.h>
27
28 #include "atmel_usba_udc.h"
29 #define USBA_VBUS_IRQFLAGS (IRQF_ONESHOT \
30 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING)
31
32 #ifdef CONFIG_USB_GADGET_DEBUG_FS
33 #include <linux/debugfs.h>
34 #include <linux/uaccess.h>
35
36 static int queue_dbg_open(struct inode *inode, struct file *file)
37 {
38 struct usba_ep *ep = inode->i_private;
39 struct usba_request *req, *req_copy;
40 struct list_head *queue_data;
41
42 queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
43 if (!queue_data)
44 return -ENOMEM;
45 INIT_LIST_HEAD(queue_data);
46
47 spin_lock_irq(&ep->udc->lock);
48 list_for_each_entry(req, &ep->queue, queue) {
49 req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
50 if (!req_copy)
51 goto fail;
52 list_add_tail(&req_copy->queue, queue_data);
53 }
54 spin_unlock_irq(&ep->udc->lock);
55
56 file->private_data = queue_data;
57 return 0;
58
59 fail:
60 spin_unlock_irq(&ep->udc->lock);
61 list_for_each_entry_safe(req, req_copy, queue_data, queue) {
62 list_del(&req->queue);
63 kfree(req);
64 }
65 kfree(queue_data);
66 return -ENOMEM;
67 }
68
69 /*
70 * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
71 *
72 * b: buffer address
73 * l: buffer length
74 * I/i: interrupt/no interrupt
75 * Z/z: zero/no zero
76 * S/s: short ok/short not ok
77 * s: status
78 * n: nr_packets
79 * F/f: submitted/not submitted to FIFO
80 * D/d: using/not using DMA
81 * L/l: last transaction/not last transaction
82 */
83 static ssize_t queue_dbg_read(struct file *file, char __user *buf,
84 size_t nbytes, loff_t *ppos)
85 {
86 struct list_head *queue = file->private_data;
87 struct usba_request *req, *tmp_req;
88 size_t len, remaining, actual = 0;
89 char tmpbuf[38];
90
91 if (!access_ok(VERIFY_WRITE, buf, nbytes))
92 return -EFAULT;
93
94 inode_lock(file_inode(file));
95 list_for_each_entry_safe(req, tmp_req, queue, queue) {
96 len = snprintf(tmpbuf, sizeof(tmpbuf),
97 "%8p %08x %c%c%c %5d %c%c%c\n",
98 req->req.buf, req->req.length,
99 req->req.no_interrupt ? 'i' : 'I',
100 req->req.zero ? 'Z' : 'z',
101 req->req.short_not_ok ? 's' : 'S',
102 req->req.status,
103 req->submitted ? 'F' : 'f',
104 req->using_dma ? 'D' : 'd',
105 req->last_transaction ? 'L' : 'l');
106 len = min(len, sizeof(tmpbuf));
107 if (len > nbytes)
108 break;
109
110 list_del(&req->queue);
111 kfree(req);
112
113 remaining = __copy_to_user(buf, tmpbuf, len);
114 actual += len - remaining;
115 if (remaining)
116 break;
117
118 nbytes -= len;
119 buf += len;
120 }
121 inode_unlock(file_inode(file));
122
123 return actual;
124 }
125
126 static int queue_dbg_release(struct inode *inode, struct file *file)
127 {
128 struct list_head *queue_data = file->private_data;
129 struct usba_request *req, *tmp_req;
130
131 list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
132 list_del(&req->queue);
133 kfree(req);
134 }
135 kfree(queue_data);
136 return 0;
137 }
138
139 static int regs_dbg_open(struct inode *inode, struct file *file)
140 {
141 struct usba_udc *udc;
142 unsigned int i;
143 u32 *data;
144 int ret = -ENOMEM;
145
146 inode_lock(inode);
147 udc = inode->i_private;
148 data = kmalloc(inode->i_size, GFP_KERNEL);
149 if (!data)
150 goto out;
151
152 spin_lock_irq(&udc->lock);
153 for (i = 0; i < inode->i_size / 4; i++)
154 data[i] = readl_relaxed(udc->regs + i * 4);
155 spin_unlock_irq(&udc->lock);
156
157 file->private_data = data;
158 ret = 0;
159
160 out:
161 inode_unlock(inode);
162
163 return ret;
164 }
165
166 static ssize_t regs_dbg_read(struct file *file, char __user *buf,
167 size_t nbytes, loff_t *ppos)
168 {
169 struct inode *inode = file_inode(file);
170 int ret;
171
172 inode_lock(inode);
173 ret = simple_read_from_buffer(buf, nbytes, ppos,
174 file->private_data,
175 file_inode(file)->i_size);
176 inode_unlock(inode);
177
178 return ret;
179 }
180
181 static int regs_dbg_release(struct inode *inode, struct file *file)
182 {
183 kfree(file->private_data);
184 return 0;
185 }
186
187 const struct file_operations queue_dbg_fops = {
188 .owner = THIS_MODULE,
189 .open = queue_dbg_open,
190 .llseek = no_llseek,
191 .read = queue_dbg_read,
192 .release = queue_dbg_release,
193 };
194
195 const struct file_operations regs_dbg_fops = {
196 .owner = THIS_MODULE,
197 .open = regs_dbg_open,
198 .llseek = generic_file_llseek,
199 .read = regs_dbg_read,
200 .release = regs_dbg_release,
201 };
202
203 static void usba_ep_init_debugfs(struct usba_udc *udc,
204 struct usba_ep *ep)
205 {
206 struct dentry *ep_root;
207
208 ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
209 ep->debugfs_dir = ep_root;
210
211 debugfs_create_file("queue", 0400, ep_root, ep, &queue_dbg_fops);
212 if (ep->can_dma)
213 debugfs_create_u32("dma_status", 0400, ep_root,
214 &ep->last_dma_status);
215 if (ep_is_control(ep))
216 debugfs_create_u32("state", 0400, ep_root, &ep->state);
217 }
218
219 static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
220 {
221 debugfs_remove_recursive(ep->debugfs_dir);
222 }
223
224 static void usba_init_debugfs(struct usba_udc *udc)
225 {
226 struct dentry *root;
227 struct resource *regs_resource;
228
229 root = debugfs_create_dir(udc->gadget.name, NULL);
230 udc->debugfs_root = root;
231
232 regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
233 CTRL_IOMEM_ID);
234
235 if (regs_resource) {
236 debugfs_create_file_size("regs", 0400, root, udc,
237 &regs_dbg_fops,
238 resource_size(regs_resource));
239 }
240
241 usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
242 }
243
244 static void usba_cleanup_debugfs(struct usba_udc *udc)
245 {
246 usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
247 debugfs_remove_recursive(udc->debugfs_root);
248 }
249 #else
250 static inline void usba_ep_init_debugfs(struct usba_udc *udc,
251 struct usba_ep *ep)
252 {
253
254 }
255
256 static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
257 {
258
259 }
260
261 static inline void usba_init_debugfs(struct usba_udc *udc)
262 {
263
264 }
265
266 static inline void usba_cleanup_debugfs(struct usba_udc *udc)
267 {
268
269 }
270 #endif
271
272 static ushort fifo_mode;
273
274 module_param(fifo_mode, ushort, 0x0);
275 MODULE_PARM_DESC(fifo_mode, "Endpoint configuration mode");
276
277 /* mode 0 - uses autoconfig */
278
279 /* mode 1 - fits in 8KB, generic max fifo configuration */
280 static struct usba_fifo_cfg mode_1_cfg[] = {
281 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
282 { .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 2, },
283 { .hw_ep_num = 2, .fifo_size = 1024, .nr_banks = 1, },
284 { .hw_ep_num = 3, .fifo_size = 1024, .nr_banks = 1, },
285 { .hw_ep_num = 4, .fifo_size = 1024, .nr_banks = 1, },
286 { .hw_ep_num = 5, .fifo_size = 1024, .nr_banks = 1, },
287 { .hw_ep_num = 6, .fifo_size = 1024, .nr_banks = 1, },
288 };
289
290 /* mode 2 - fits in 8KB, performance max fifo configuration */
291 static struct usba_fifo_cfg mode_2_cfg[] = {
292 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
293 { .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 3, },
294 { .hw_ep_num = 2, .fifo_size = 1024, .nr_banks = 2, },
295 { .hw_ep_num = 3, .fifo_size = 1024, .nr_banks = 2, },
296 };
297
298 /* mode 3 - fits in 8KB, mixed fifo configuration */
299 static struct usba_fifo_cfg mode_3_cfg[] = {
300 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
301 { .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 2, },
302 { .hw_ep_num = 2, .fifo_size = 512, .nr_banks = 2, },
303 { .hw_ep_num = 3, .fifo_size = 512, .nr_banks = 2, },
304 { .hw_ep_num = 4, .fifo_size = 512, .nr_banks = 2, },
305 { .hw_ep_num = 5, .fifo_size = 512, .nr_banks = 2, },
306 { .hw_ep_num = 6, .fifo_size = 512, .nr_banks = 2, },
307 };
308
309 /* mode 4 - fits in 8KB, custom fifo configuration */
310 static struct usba_fifo_cfg mode_4_cfg[] = {
311 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
312 { .hw_ep_num = 1, .fifo_size = 512, .nr_banks = 2, },
313 { .hw_ep_num = 2, .fifo_size = 512, .nr_banks = 2, },
314 { .hw_ep_num = 3, .fifo_size = 8, .nr_banks = 2, },
315 { .hw_ep_num = 4, .fifo_size = 512, .nr_banks = 2, },
316 { .hw_ep_num = 5, .fifo_size = 512, .nr_banks = 2, },
317 { .hw_ep_num = 6, .fifo_size = 16, .nr_banks = 2, },
318 { .hw_ep_num = 7, .fifo_size = 8, .nr_banks = 2, },
319 { .hw_ep_num = 8, .fifo_size = 8, .nr_banks = 2, },
320 };
321 /* Add additional configurations here */
322
323 static int usba_config_fifo_table(struct usba_udc *udc)
324 {
325 int n;
326
327 switch (fifo_mode) {
328 default:
329 fifo_mode = 0;
330 case 0:
331 udc->fifo_cfg = NULL;
332 n = 0;
333 break;
334 case 1:
335 udc->fifo_cfg = mode_1_cfg;
336 n = ARRAY_SIZE(mode_1_cfg);
337 break;
338 case 2:
339 udc->fifo_cfg = mode_2_cfg;
340 n = ARRAY_SIZE(mode_2_cfg);
341 break;
342 case 3:
343 udc->fifo_cfg = mode_3_cfg;
344 n = ARRAY_SIZE(mode_3_cfg);
345 break;
346 case 4:
347 udc->fifo_cfg = mode_4_cfg;
348 n = ARRAY_SIZE(mode_4_cfg);
349 break;
350 }
351 DBG(DBG_HW, "Setup fifo_mode %d\n", fifo_mode);
352
353 return n;
354 }
355
356 static inline u32 usba_int_enb_get(struct usba_udc *udc)
357 {
358 return udc->int_enb_cache;
359 }
360
361 static inline void usba_int_enb_set(struct usba_udc *udc, u32 val)
362 {
363 usba_writel(udc, INT_ENB, val);
364 udc->int_enb_cache = val;
365 }
366
367 static int vbus_is_present(struct usba_udc *udc)
368 {
369 if (udc->vbus_pin)
370 return gpiod_get_value(udc->vbus_pin);
371
372 /* No Vbus detection: Assume always present */
373 return 1;
374 }
375
376 static void toggle_bias(struct usba_udc *udc, int is_on)
377 {
378 if (udc->errata && udc->errata->toggle_bias)
379 udc->errata->toggle_bias(udc, is_on);
380 }
381
382 static void generate_bias_pulse(struct usba_udc *udc)
383 {
384 if (!udc->bias_pulse_needed)
385 return;
386
387 if (udc->errata && udc->errata->pulse_bias)
388 udc->errata->pulse_bias(udc);
389
390 udc->bias_pulse_needed = false;
391 }
392
393 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
394 {
395 unsigned int transaction_len;
396
397 transaction_len = req->req.length - req->req.actual;
398 req->last_transaction = 1;
399 if (transaction_len > ep->ep.maxpacket) {
400 transaction_len = ep->ep.maxpacket;
401 req->last_transaction = 0;
402 } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
403 req->last_transaction = 0;
404
405 DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
406 ep->ep.name, req, transaction_len,
407 req->last_transaction ? ", done" : "");
408
409 memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
410 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
411 req->req.actual += transaction_len;
412 }
413
414 static void submit_request(struct usba_ep *ep, struct usba_request *req)
415 {
416 DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
417 ep->ep.name, req, req->req.length);
418
419 req->req.actual = 0;
420 req->submitted = 1;
421
422 if (req->using_dma) {
423 if (req->req.length == 0) {
424 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
425 return;
426 }
427
428 if (req->req.zero)
429 usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
430 else
431 usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
432
433 usba_dma_writel(ep, ADDRESS, req->req.dma);
434 usba_dma_writel(ep, CONTROL, req->ctrl);
435 } else {
436 next_fifo_transaction(ep, req);
437 if (req->last_transaction) {
438 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
439 if (ep_is_control(ep))
440 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
441 } else {
442 if (ep_is_control(ep))
443 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
444 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
445 }
446 }
447 }
448
449 static void submit_next_request(struct usba_ep *ep)
450 {
451 struct usba_request *req;
452
453 if (list_empty(&ep->queue)) {
454 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
455 return;
456 }
457
458 req = list_entry(ep->queue.next, struct usba_request, queue);
459 if (!req->submitted)
460 submit_request(ep, req);
461 }
462
463 static void send_status(struct usba_udc *udc, struct usba_ep *ep)
464 {
465 ep->state = STATUS_STAGE_IN;
466 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
467 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
468 }
469
470 static void receive_data(struct usba_ep *ep)
471 {
472 struct usba_udc *udc = ep->udc;
473 struct usba_request *req;
474 unsigned long status;
475 unsigned int bytecount, nr_busy;
476 int is_complete = 0;
477
478 status = usba_ep_readl(ep, STA);
479 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
480
481 DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
482
483 while (nr_busy > 0) {
484 if (list_empty(&ep->queue)) {
485 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
486 break;
487 }
488 req = list_entry(ep->queue.next,
489 struct usba_request, queue);
490
491 bytecount = USBA_BFEXT(BYTE_COUNT, status);
492
493 if (status & (1 << 31))
494 is_complete = 1;
495 if (req->req.actual + bytecount >= req->req.length) {
496 is_complete = 1;
497 bytecount = req->req.length - req->req.actual;
498 }
499
500 memcpy_fromio(req->req.buf + req->req.actual,
501 ep->fifo, bytecount);
502 req->req.actual += bytecount;
503
504 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
505
506 if (is_complete) {
507 DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
508 req->req.status = 0;
509 list_del_init(&req->queue);
510 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
511 spin_unlock(&udc->lock);
512 usb_gadget_giveback_request(&ep->ep, &req->req);
513 spin_lock(&udc->lock);
514 }
515
516 status = usba_ep_readl(ep, STA);
517 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
518
519 if (is_complete && ep_is_control(ep)) {
520 send_status(udc, ep);
521 break;
522 }
523 }
524 }
525
526 static void
527 request_complete(struct usba_ep *ep, struct usba_request *req, int status)
528 {
529 struct usba_udc *udc = ep->udc;
530
531 WARN_ON(!list_empty(&req->queue));
532
533 if (req->req.status == -EINPROGRESS)
534 req->req.status = status;
535
536 if (req->using_dma)
537 usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in);
538
539 DBG(DBG_GADGET | DBG_REQ,
540 "%s: req %p complete: status %d, actual %u\n",
541 ep->ep.name, req, req->req.status, req->req.actual);
542
543 spin_unlock(&udc->lock);
544 usb_gadget_giveback_request(&ep->ep, &req->req);
545 spin_lock(&udc->lock);
546 }
547
548 static void
549 request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
550 {
551 struct usba_request *req, *tmp_req;
552
553 list_for_each_entry_safe(req, tmp_req, list, queue) {
554 list_del_init(&req->queue);
555 request_complete(ep, req, status);
556 }
557 }
558
559 static int
560 usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
561 {
562 struct usba_ep *ep = to_usba_ep(_ep);
563 struct usba_udc *udc = ep->udc;
564 unsigned long flags, maxpacket;
565 unsigned int nr_trans;
566
567 DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
568
569 maxpacket = usb_endpoint_maxp(desc);
570
571 if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
572 || ep->index == 0
573 || desc->bDescriptorType != USB_DT_ENDPOINT
574 || maxpacket == 0
575 || maxpacket > ep->fifo_size) {
576 DBG(DBG_ERR, "ep_enable: Invalid argument");
577 return -EINVAL;
578 }
579
580 ep->is_isoc = 0;
581 ep->is_in = 0;
582
583 DBG(DBG_ERR, "%s: EPT_CFG = 0x%lx (maxpacket = %lu)\n",
584 ep->ep.name, ep->ept_cfg, maxpacket);
585
586 if (usb_endpoint_dir_in(desc)) {
587 ep->is_in = 1;
588 ep->ept_cfg |= USBA_EPT_DIR_IN;
589 }
590
591 switch (usb_endpoint_type(desc)) {
592 case USB_ENDPOINT_XFER_CONTROL:
593 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
594 break;
595 case USB_ENDPOINT_XFER_ISOC:
596 if (!ep->can_isoc) {
597 DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
598 ep->ep.name);
599 return -EINVAL;
600 }
601
602 /*
603 * Bits 11:12 specify number of _additional_
604 * transactions per microframe.
605 */
606 nr_trans = usb_endpoint_maxp_mult(desc);
607 if (nr_trans > 3)
608 return -EINVAL;
609
610 ep->is_isoc = 1;
611 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
612 ep->ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
613
614 break;
615 case USB_ENDPOINT_XFER_BULK:
616 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
617 break;
618 case USB_ENDPOINT_XFER_INT:
619 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
620 break;
621 }
622
623 spin_lock_irqsave(&ep->udc->lock, flags);
624
625 ep->ep.desc = desc;
626 ep->ep.maxpacket = maxpacket;
627
628 usba_ep_writel(ep, CFG, ep->ept_cfg);
629 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
630
631 if (ep->can_dma) {
632 u32 ctrl;
633
634 usba_int_enb_set(udc, usba_int_enb_get(udc) |
635 USBA_BF(EPT_INT, 1 << ep->index) |
636 USBA_BF(DMA_INT, 1 << ep->index));
637 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
638 usba_ep_writel(ep, CTL_ENB, ctrl);
639 } else {
640 usba_int_enb_set(udc, usba_int_enb_get(udc) |
641 USBA_BF(EPT_INT, 1 << ep->index));
642 }
643
644 spin_unlock_irqrestore(&udc->lock, flags);
645
646 DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
647 (unsigned long)usba_ep_readl(ep, CFG));
648 DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
649 (unsigned long)usba_int_enb_get(udc));
650
651 return 0;
652 }
653
654 static int usba_ep_disable(struct usb_ep *_ep)
655 {
656 struct usba_ep *ep = to_usba_ep(_ep);
657 struct usba_udc *udc = ep->udc;
658 LIST_HEAD(req_list);
659 unsigned long flags;
660
661 DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
662
663 spin_lock_irqsave(&udc->lock, flags);
664
665 if (!ep->ep.desc) {
666 spin_unlock_irqrestore(&udc->lock, flags);
667 /* REVISIT because this driver disables endpoints in
668 * reset_all_endpoints() before calling disconnect(),
669 * most gadget drivers would trigger this non-error ...
670 */
671 if (udc->gadget.speed != USB_SPEED_UNKNOWN)
672 DBG(DBG_ERR, "ep_disable: %s not enabled\n",
673 ep->ep.name);
674 return -EINVAL;
675 }
676 ep->ep.desc = NULL;
677
678 list_splice_init(&ep->queue, &req_list);
679 if (ep->can_dma) {
680 usba_dma_writel(ep, CONTROL, 0);
681 usba_dma_writel(ep, ADDRESS, 0);
682 usba_dma_readl(ep, STATUS);
683 }
684 usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
685 usba_int_enb_set(udc, usba_int_enb_get(udc) &
686 ~USBA_BF(EPT_INT, 1 << ep->index));
687
688 request_complete_list(ep, &req_list, -ESHUTDOWN);
689
690 spin_unlock_irqrestore(&udc->lock, flags);
691
692 return 0;
693 }
694
695 static struct usb_request *
696 usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
697 {
698 struct usba_request *req;
699
700 DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
701
702 req = kzalloc(sizeof(*req), gfp_flags);
703 if (!req)
704 return NULL;
705
706 INIT_LIST_HEAD(&req->queue);
707
708 return &req->req;
709 }
710
711 static void
712 usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
713 {
714 struct usba_request *req = to_usba_req(_req);
715
716 DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
717
718 kfree(req);
719 }
720
721 static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
722 struct usba_request *req, gfp_t gfp_flags)
723 {
724 unsigned long flags;
725 int ret;
726
727 DBG(DBG_DMA, "%s: req l/%u d/%pad %c%c%c\n",
728 ep->ep.name, req->req.length, &req->req.dma,
729 req->req.zero ? 'Z' : 'z',
730 req->req.short_not_ok ? 'S' : 's',
731 req->req.no_interrupt ? 'I' : 'i');
732
733 if (req->req.length > 0x10000) {
734 /* Lengths from 0 to 65536 (inclusive) are supported */
735 DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
736 return -EINVAL;
737 }
738
739 ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in);
740 if (ret)
741 return ret;
742
743 req->using_dma = 1;
744 req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
745 | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
746 | USBA_DMA_END_BUF_EN;
747
748 if (!ep->is_in)
749 req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
750
751 /*
752 * Add this request to the queue and submit for DMA if
753 * possible. Check if we're still alive first -- we may have
754 * received a reset since last time we checked.
755 */
756 ret = -ESHUTDOWN;
757 spin_lock_irqsave(&udc->lock, flags);
758 if (ep->ep.desc) {
759 if (list_empty(&ep->queue))
760 submit_request(ep, req);
761
762 list_add_tail(&req->queue, &ep->queue);
763 ret = 0;
764 }
765 spin_unlock_irqrestore(&udc->lock, flags);
766
767 return ret;
768 }
769
770 static int
771 usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
772 {
773 struct usba_request *req = to_usba_req(_req);
774 struct usba_ep *ep = to_usba_ep(_ep);
775 struct usba_udc *udc = ep->udc;
776 unsigned long flags;
777 int ret;
778
779 DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
780 ep->ep.name, req, _req->length);
781
782 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
783 !ep->ep.desc)
784 return -ESHUTDOWN;
785
786 req->submitted = 0;
787 req->using_dma = 0;
788 req->last_transaction = 0;
789
790 _req->status = -EINPROGRESS;
791 _req->actual = 0;
792
793 if (ep->can_dma)
794 return queue_dma(udc, ep, req, gfp_flags);
795
796 /* May have received a reset since last time we checked */
797 ret = -ESHUTDOWN;
798 spin_lock_irqsave(&udc->lock, flags);
799 if (ep->ep.desc) {
800 list_add_tail(&req->queue, &ep->queue);
801
802 if ((!ep_is_control(ep) && ep->is_in) ||
803 (ep_is_control(ep)
804 && (ep->state == DATA_STAGE_IN
805 || ep->state == STATUS_STAGE_IN)))
806 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
807 else
808 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
809 ret = 0;
810 }
811 spin_unlock_irqrestore(&udc->lock, flags);
812
813 return ret;
814 }
815
816 static void
817 usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
818 {
819 req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
820 }
821
822 static int stop_dma(struct usba_ep *ep, u32 *pstatus)
823 {
824 unsigned int timeout;
825 u32 status;
826
827 /*
828 * Stop the DMA controller. When writing both CH_EN
829 * and LINK to 0, the other bits are not affected.
830 */
831 usba_dma_writel(ep, CONTROL, 0);
832
833 /* Wait for the FIFO to empty */
834 for (timeout = 40; timeout; --timeout) {
835 status = usba_dma_readl(ep, STATUS);
836 if (!(status & USBA_DMA_CH_EN))
837 break;
838 udelay(1);
839 }
840
841 if (pstatus)
842 *pstatus = status;
843
844 if (timeout == 0) {
845 dev_err(&ep->udc->pdev->dev,
846 "%s: timed out waiting for DMA FIFO to empty\n",
847 ep->ep.name);
848 return -ETIMEDOUT;
849 }
850
851 return 0;
852 }
853
854 static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
855 {
856 struct usba_ep *ep = to_usba_ep(_ep);
857 struct usba_udc *udc = ep->udc;
858 struct usba_request *req;
859 unsigned long flags;
860 u32 status;
861
862 DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
863 ep->ep.name, req);
864
865 spin_lock_irqsave(&udc->lock, flags);
866
867 list_for_each_entry(req, &ep->queue, queue) {
868 if (&req->req == _req)
869 break;
870 }
871
872 if (&req->req != _req) {
873 spin_unlock_irqrestore(&udc->lock, flags);
874 return -EINVAL;
875 }
876
877 if (req->using_dma) {
878 /*
879 * If this request is currently being transferred,
880 * stop the DMA controller and reset the FIFO.
881 */
882 if (ep->queue.next == &req->queue) {
883 status = usba_dma_readl(ep, STATUS);
884 if (status & USBA_DMA_CH_EN)
885 stop_dma(ep, &status);
886
887 #ifdef CONFIG_USB_GADGET_DEBUG_FS
888 ep->last_dma_status = status;
889 #endif
890
891 usba_writel(udc, EPT_RST, 1 << ep->index);
892
893 usba_update_req(ep, req, status);
894 }
895 }
896
897 /*
898 * Errors should stop the queue from advancing until the
899 * completion function returns.
900 */
901 list_del_init(&req->queue);
902
903 request_complete(ep, req, -ECONNRESET);
904
905 /* Process the next request if any */
906 submit_next_request(ep);
907 spin_unlock_irqrestore(&udc->lock, flags);
908
909 return 0;
910 }
911
912 static int usba_ep_set_halt(struct usb_ep *_ep, int value)
913 {
914 struct usba_ep *ep = to_usba_ep(_ep);
915 struct usba_udc *udc = ep->udc;
916 unsigned long flags;
917 int ret = 0;
918
919 DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
920 value ? "set" : "clear");
921
922 if (!ep->ep.desc) {
923 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
924 ep->ep.name);
925 return -ENODEV;
926 }
927 if (ep->is_isoc) {
928 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
929 ep->ep.name);
930 return -ENOTTY;
931 }
932
933 spin_lock_irqsave(&udc->lock, flags);
934
935 /*
936 * We can't halt IN endpoints while there are still data to be
937 * transferred
938 */
939 if (!list_empty(&ep->queue)
940 || ((value && ep->is_in && (usba_ep_readl(ep, STA)
941 & USBA_BF(BUSY_BANKS, -1L))))) {
942 ret = -EAGAIN;
943 } else {
944 if (value)
945 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
946 else
947 usba_ep_writel(ep, CLR_STA,
948 USBA_FORCE_STALL | USBA_TOGGLE_CLR);
949 usba_ep_readl(ep, STA);
950 }
951
952 spin_unlock_irqrestore(&udc->lock, flags);
953
954 return ret;
955 }
956
957 static int usba_ep_fifo_status(struct usb_ep *_ep)
958 {
959 struct usba_ep *ep = to_usba_ep(_ep);
960
961 return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
962 }
963
964 static void usba_ep_fifo_flush(struct usb_ep *_ep)
965 {
966 struct usba_ep *ep = to_usba_ep(_ep);
967 struct usba_udc *udc = ep->udc;
968
969 usba_writel(udc, EPT_RST, 1 << ep->index);
970 }
971
972 static const struct usb_ep_ops usba_ep_ops = {
973 .enable = usba_ep_enable,
974 .disable = usba_ep_disable,
975 .alloc_request = usba_ep_alloc_request,
976 .free_request = usba_ep_free_request,
977 .queue = usba_ep_queue,
978 .dequeue = usba_ep_dequeue,
979 .set_halt = usba_ep_set_halt,
980 .fifo_status = usba_ep_fifo_status,
981 .fifo_flush = usba_ep_fifo_flush,
982 };
983
984 static int usba_udc_get_frame(struct usb_gadget *gadget)
985 {
986 struct usba_udc *udc = to_usba_udc(gadget);
987
988 return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
989 }
990
991 static int usba_udc_wakeup(struct usb_gadget *gadget)
992 {
993 struct usba_udc *udc = to_usba_udc(gadget);
994 unsigned long flags;
995 u32 ctrl;
996 int ret = -EINVAL;
997
998 spin_lock_irqsave(&udc->lock, flags);
999 if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
1000 ctrl = usba_readl(udc, CTRL);
1001 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
1002 ret = 0;
1003 }
1004 spin_unlock_irqrestore(&udc->lock, flags);
1005
1006 return ret;
1007 }
1008
1009 static int
1010 usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1011 {
1012 struct usba_udc *udc = to_usba_udc(gadget);
1013 unsigned long flags;
1014
1015 gadget->is_selfpowered = (is_selfpowered != 0);
1016 spin_lock_irqsave(&udc->lock, flags);
1017 if (is_selfpowered)
1018 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
1019 else
1020 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1021 spin_unlock_irqrestore(&udc->lock, flags);
1022
1023 return 0;
1024 }
1025
1026 static int atmel_usba_start(struct usb_gadget *gadget,
1027 struct usb_gadget_driver *driver);
1028 static int atmel_usba_stop(struct usb_gadget *gadget);
1029
1030 static struct usb_ep *atmel_usba_match_ep(struct usb_gadget *gadget,
1031 struct usb_endpoint_descriptor *desc,
1032 struct usb_ss_ep_comp_descriptor *ep_comp)
1033 {
1034 struct usb_ep *_ep;
1035 struct usba_ep *ep;
1036
1037 /* Look at endpoints until an unclaimed one looks usable */
1038 list_for_each_entry(_ep, &gadget->ep_list, ep_list) {
1039 if (usb_gadget_ep_match_desc(gadget, _ep, desc, ep_comp))
1040 goto found_ep;
1041 }
1042 /* Fail */
1043 return NULL;
1044
1045 found_ep:
1046
1047 if (fifo_mode == 0) {
1048 /* Optimize hw fifo size based on ep type and other info */
1049 ep = to_usba_ep(_ep);
1050
1051 switch (usb_endpoint_type(desc)) {
1052 case USB_ENDPOINT_XFER_CONTROL:
1053 break;
1054
1055 case USB_ENDPOINT_XFER_ISOC:
1056 ep->fifo_size = 1024;
1057 ep->nr_banks = 2;
1058 break;
1059
1060 case USB_ENDPOINT_XFER_BULK:
1061 ep->fifo_size = 512;
1062 ep->nr_banks = 1;
1063 break;
1064
1065 case USB_ENDPOINT_XFER_INT:
1066 if (desc->wMaxPacketSize == 0)
1067 ep->fifo_size =
1068 roundup_pow_of_two(_ep->maxpacket_limit);
1069 else
1070 ep->fifo_size =
1071 roundup_pow_of_two(le16_to_cpu(desc->wMaxPacketSize));
1072 ep->nr_banks = 1;
1073 break;
1074 }
1075
1076 /* It might be a little bit late to set this */
1077 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
1078
1079 /* Generate ept_cfg basd on FIFO size and number of banks */
1080 if (ep->fifo_size <= 8)
1081 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
1082 else
1083 /* LSB is bit 1, not 0 */
1084 ep->ept_cfg =
1085 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
1086
1087 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
1088
1089 ep->udc->configured_ep++;
1090 }
1091
1092 return _ep;
1093 }
1094
1095 static const struct usb_gadget_ops usba_udc_ops = {
1096 .get_frame = usba_udc_get_frame,
1097 .wakeup = usba_udc_wakeup,
1098 .set_selfpowered = usba_udc_set_selfpowered,
1099 .udc_start = atmel_usba_start,
1100 .udc_stop = atmel_usba_stop,
1101 .match_ep = atmel_usba_match_ep,
1102 };
1103
1104 static struct usb_endpoint_descriptor usba_ep0_desc = {
1105 .bLength = USB_DT_ENDPOINT_SIZE,
1106 .bDescriptorType = USB_DT_ENDPOINT,
1107 .bEndpointAddress = 0,
1108 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
1109 .wMaxPacketSize = cpu_to_le16(64),
1110 /* FIXME: I have no idea what to put here */
1111 .bInterval = 1,
1112 };
1113
1114 static struct usb_gadget usba_gadget_template = {
1115 .ops = &usba_udc_ops,
1116 .max_speed = USB_SPEED_HIGH,
1117 .name = "atmel_usba_udc",
1118 };
1119
1120 /*
1121 * Called with interrupts disabled and udc->lock held.
1122 */
1123 static void reset_all_endpoints(struct usba_udc *udc)
1124 {
1125 struct usba_ep *ep;
1126 struct usba_request *req, *tmp_req;
1127
1128 usba_writel(udc, EPT_RST, ~0UL);
1129
1130 ep = to_usba_ep(udc->gadget.ep0);
1131 list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1132 list_del_init(&req->queue);
1133 request_complete(ep, req, -ECONNRESET);
1134 }
1135 }
1136
1137 static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1138 {
1139 struct usba_ep *ep;
1140
1141 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1142 return to_usba_ep(udc->gadget.ep0);
1143
1144 list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1145 u8 bEndpointAddress;
1146
1147 if (!ep->ep.desc)
1148 continue;
1149 bEndpointAddress = ep->ep.desc->bEndpointAddress;
1150 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1151 continue;
1152 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1153 == (wIndex & USB_ENDPOINT_NUMBER_MASK))
1154 return ep;
1155 }
1156
1157 return NULL;
1158 }
1159
1160 /* Called with interrupts disabled and udc->lock held */
1161 static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1162 {
1163 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1164 ep->state = WAIT_FOR_SETUP;
1165 }
1166
1167 static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1168 {
1169 if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1170 return 1;
1171 return 0;
1172 }
1173
1174 static inline void set_address(struct usba_udc *udc, unsigned int addr)
1175 {
1176 u32 regval;
1177
1178 DBG(DBG_BUS, "setting address %u...\n", addr);
1179 regval = usba_readl(udc, CTRL);
1180 regval = USBA_BFINS(DEV_ADDR, addr, regval);
1181 usba_writel(udc, CTRL, regval);
1182 }
1183
1184 static int do_test_mode(struct usba_udc *udc)
1185 {
1186 static const char test_packet_buffer[] = {
1187 /* JKJKJKJK * 9 */
1188 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1189 /* JJKKJJKK * 8 */
1190 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1191 /* JJKKJJKK * 8 */
1192 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1193 /* JJJJJJJKKKKKKK * 8 */
1194 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1195 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1196 /* JJJJJJJK * 8 */
1197 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1198 /* {JKKKKKKK * 10}, JK */
1199 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1200 };
1201 struct usba_ep *ep;
1202 struct device *dev = &udc->pdev->dev;
1203 int test_mode;
1204
1205 test_mode = udc->test_mode;
1206
1207 /* Start from a clean slate */
1208 reset_all_endpoints(udc);
1209
1210 switch (test_mode) {
1211 case 0x0100:
1212 /* Test_J */
1213 usba_writel(udc, TST, USBA_TST_J_MODE);
1214 dev_info(dev, "Entering Test_J mode...\n");
1215 break;
1216 case 0x0200:
1217 /* Test_K */
1218 usba_writel(udc, TST, USBA_TST_K_MODE);
1219 dev_info(dev, "Entering Test_K mode...\n");
1220 break;
1221 case 0x0300:
1222 /*
1223 * Test_SE0_NAK: Force high-speed mode and set up ep0
1224 * for Bulk IN transfers
1225 */
1226 ep = &udc->usba_ep[0];
1227 usba_writel(udc, TST,
1228 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1229 usba_ep_writel(ep, CFG,
1230 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1231 | USBA_EPT_DIR_IN
1232 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1233 | USBA_BF(BK_NUMBER, 1));
1234 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1235 set_protocol_stall(udc, ep);
1236 dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1237 } else {
1238 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1239 dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1240 }
1241 break;
1242 case 0x0400:
1243 /* Test_Packet */
1244 ep = &udc->usba_ep[0];
1245 usba_ep_writel(ep, CFG,
1246 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1247 | USBA_EPT_DIR_IN
1248 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1249 | USBA_BF(BK_NUMBER, 1));
1250 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1251 set_protocol_stall(udc, ep);
1252 dev_err(dev, "Test_Packet: ep0 not mapped\n");
1253 } else {
1254 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1255 usba_writel(udc, TST, USBA_TST_PKT_MODE);
1256 memcpy_toio(ep->fifo, test_packet_buffer,
1257 sizeof(test_packet_buffer));
1258 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1259 dev_info(dev, "Entering Test_Packet mode...\n");
1260 }
1261 break;
1262 default:
1263 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1264 return -EINVAL;
1265 }
1266
1267 return 0;
1268 }
1269
1270 /* Avoid overly long expressions */
1271 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1272 {
1273 if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
1274 return true;
1275 return false;
1276 }
1277
1278 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1279 {
1280 if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
1281 return true;
1282 return false;
1283 }
1284
1285 static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1286 {
1287 if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
1288 return true;
1289 return false;
1290 }
1291
1292 static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1293 struct usb_ctrlrequest *crq)
1294 {
1295 int retval = 0;
1296
1297 switch (crq->bRequest) {
1298 case USB_REQ_GET_STATUS: {
1299 u16 status;
1300
1301 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
1302 status = cpu_to_le16(udc->devstatus);
1303 } else if (crq->bRequestType
1304 == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
1305 status = cpu_to_le16(0);
1306 } else if (crq->bRequestType
1307 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1308 struct usba_ep *target;
1309
1310 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1311 if (!target)
1312 goto stall;
1313
1314 status = 0;
1315 if (is_stalled(udc, target))
1316 status |= cpu_to_le16(1);
1317 } else
1318 goto delegate;
1319
1320 /* Write directly to the FIFO. No queueing is done. */
1321 if (crq->wLength != cpu_to_le16(sizeof(status)))
1322 goto stall;
1323 ep->state = DATA_STAGE_IN;
1324 writew_relaxed(status, ep->fifo);
1325 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1326 break;
1327 }
1328
1329 case USB_REQ_CLEAR_FEATURE: {
1330 if (crq->bRequestType == USB_RECIP_DEVICE) {
1331 if (feature_is_dev_remote_wakeup(crq))
1332 udc->devstatus
1333 &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1334 else
1335 /* Can't CLEAR_FEATURE TEST_MODE */
1336 goto stall;
1337 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1338 struct usba_ep *target;
1339
1340 if (crq->wLength != cpu_to_le16(0)
1341 || !feature_is_ep_halt(crq))
1342 goto stall;
1343 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1344 if (!target)
1345 goto stall;
1346
1347 usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1348 if (target->index != 0)
1349 usba_ep_writel(target, CLR_STA,
1350 USBA_TOGGLE_CLR);
1351 } else {
1352 goto delegate;
1353 }
1354
1355 send_status(udc, ep);
1356 break;
1357 }
1358
1359 case USB_REQ_SET_FEATURE: {
1360 if (crq->bRequestType == USB_RECIP_DEVICE) {
1361 if (feature_is_dev_test_mode(crq)) {
1362 send_status(udc, ep);
1363 ep->state = STATUS_STAGE_TEST;
1364 udc->test_mode = le16_to_cpu(crq->wIndex);
1365 return 0;
1366 } else if (feature_is_dev_remote_wakeup(crq)) {
1367 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
1368 } else {
1369 goto stall;
1370 }
1371 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1372 struct usba_ep *target;
1373
1374 if (crq->wLength != cpu_to_le16(0)
1375 || !feature_is_ep_halt(crq))
1376 goto stall;
1377
1378 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1379 if (!target)
1380 goto stall;
1381
1382 usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1383 } else
1384 goto delegate;
1385
1386 send_status(udc, ep);
1387 break;
1388 }
1389
1390 case USB_REQ_SET_ADDRESS:
1391 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1392 goto delegate;
1393
1394 set_address(udc, le16_to_cpu(crq->wValue));
1395 send_status(udc, ep);
1396 ep->state = STATUS_STAGE_ADDR;
1397 break;
1398
1399 default:
1400 delegate:
1401 spin_unlock(&udc->lock);
1402 retval = udc->driver->setup(&udc->gadget, crq);
1403 spin_lock(&udc->lock);
1404 }
1405
1406 return retval;
1407
1408 stall:
1409 pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
1410 "halting endpoint...\n",
1411 ep->ep.name, crq->bRequestType, crq->bRequest,
1412 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1413 le16_to_cpu(crq->wLength));
1414 set_protocol_stall(udc, ep);
1415 return -1;
1416 }
1417
1418 static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1419 {
1420 struct usba_request *req;
1421 u32 epstatus;
1422 u32 epctrl;
1423
1424 restart:
1425 epstatus = usba_ep_readl(ep, STA);
1426 epctrl = usba_ep_readl(ep, CTL);
1427
1428 DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1429 ep->ep.name, ep->state, epstatus, epctrl);
1430
1431 req = NULL;
1432 if (!list_empty(&ep->queue))
1433 req = list_entry(ep->queue.next,
1434 struct usba_request, queue);
1435
1436 if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1437 if (req->submitted)
1438 next_fifo_transaction(ep, req);
1439 else
1440 submit_request(ep, req);
1441
1442 if (req->last_transaction) {
1443 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1444 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1445 }
1446 goto restart;
1447 }
1448 if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1449 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1450
1451 switch (ep->state) {
1452 case DATA_STAGE_IN:
1453 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1454 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1455 ep->state = STATUS_STAGE_OUT;
1456 break;
1457 case STATUS_STAGE_ADDR:
1458 /* Activate our new address */
1459 usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1460 | USBA_FADDR_EN));
1461 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1462 ep->state = WAIT_FOR_SETUP;
1463 break;
1464 case STATUS_STAGE_IN:
1465 if (req) {
1466 list_del_init(&req->queue);
1467 request_complete(ep, req, 0);
1468 submit_next_request(ep);
1469 }
1470 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1471 ep->state = WAIT_FOR_SETUP;
1472 break;
1473 case STATUS_STAGE_TEST:
1474 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1475 ep->state = WAIT_FOR_SETUP;
1476 if (do_test_mode(udc))
1477 set_protocol_stall(udc, ep);
1478 break;
1479 default:
1480 pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
1481 "halting endpoint...\n",
1482 ep->ep.name, ep->state);
1483 set_protocol_stall(udc, ep);
1484 break;
1485 }
1486
1487 goto restart;
1488 }
1489 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1490 switch (ep->state) {
1491 case STATUS_STAGE_OUT:
1492 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1493 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1494
1495 if (req) {
1496 list_del_init(&req->queue);
1497 request_complete(ep, req, 0);
1498 }
1499 ep->state = WAIT_FOR_SETUP;
1500 break;
1501
1502 case DATA_STAGE_OUT:
1503 receive_data(ep);
1504 break;
1505
1506 default:
1507 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1508 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1509 pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
1510 "halting endpoint...\n",
1511 ep->ep.name, ep->state);
1512 set_protocol_stall(udc, ep);
1513 break;
1514 }
1515
1516 goto restart;
1517 }
1518 if (epstatus & USBA_RX_SETUP) {
1519 union {
1520 struct usb_ctrlrequest crq;
1521 unsigned long data[2];
1522 } crq;
1523 unsigned int pkt_len;
1524 int ret;
1525
1526 if (ep->state != WAIT_FOR_SETUP) {
1527 /*
1528 * Didn't expect a SETUP packet at this
1529 * point. Clean up any pending requests (which
1530 * may be successful).
1531 */
1532 int status = -EPROTO;
1533
1534 /*
1535 * RXRDY and TXCOMP are dropped when SETUP
1536 * packets arrive. Just pretend we received
1537 * the status packet.
1538 */
1539 if (ep->state == STATUS_STAGE_OUT
1540 || ep->state == STATUS_STAGE_IN) {
1541 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1542 status = 0;
1543 }
1544
1545 if (req) {
1546 list_del_init(&req->queue);
1547 request_complete(ep, req, status);
1548 }
1549 }
1550
1551 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1552 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1553 if (pkt_len != sizeof(crq)) {
1554 pr_warn("udc: Invalid packet length %u (expected %zu)\n",
1555 pkt_len, sizeof(crq));
1556 set_protocol_stall(udc, ep);
1557 return;
1558 }
1559
1560 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
1561 memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
1562
1563 /* Free up one bank in the FIFO so that we can
1564 * generate or receive a reply right away. */
1565 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1566
1567 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1568 ep->state, crq.crq.bRequestType,
1569 crq.crq.bRequest); */
1570
1571 if (crq.crq.bRequestType & USB_DIR_IN) {
1572 /*
1573 * The USB 2.0 spec states that "if wLength is
1574 * zero, there is no data transfer phase."
1575 * However, testusb #14 seems to actually
1576 * expect a data phase even if wLength = 0...
1577 */
1578 ep->state = DATA_STAGE_IN;
1579 } else {
1580 if (crq.crq.wLength != cpu_to_le16(0))
1581 ep->state = DATA_STAGE_OUT;
1582 else
1583 ep->state = STATUS_STAGE_IN;
1584 }
1585
1586 ret = -1;
1587 if (ep->index == 0)
1588 ret = handle_ep0_setup(udc, ep, &crq.crq);
1589 else {
1590 spin_unlock(&udc->lock);
1591 ret = udc->driver->setup(&udc->gadget, &crq.crq);
1592 spin_lock(&udc->lock);
1593 }
1594
1595 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1596 crq.crq.bRequestType, crq.crq.bRequest,
1597 le16_to_cpu(crq.crq.wLength), ep->state, ret);
1598
1599 if (ret < 0) {
1600 /* Let the host know that we failed */
1601 set_protocol_stall(udc, ep);
1602 }
1603 }
1604 }
1605
1606 static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1607 {
1608 struct usba_request *req;
1609 u32 epstatus;
1610 u32 epctrl;
1611
1612 epstatus = usba_ep_readl(ep, STA);
1613 epctrl = usba_ep_readl(ep, CTL);
1614
1615 DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1616
1617 while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1618 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1619
1620 if (list_empty(&ep->queue)) {
1621 dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1622 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1623 return;
1624 }
1625
1626 req = list_entry(ep->queue.next, struct usba_request, queue);
1627
1628 if (req->using_dma) {
1629 /* Send a zero-length packet */
1630 usba_ep_writel(ep, SET_STA,
1631 USBA_TX_PK_RDY);
1632 usba_ep_writel(ep, CTL_DIS,
1633 USBA_TX_PK_RDY);
1634 list_del_init(&req->queue);
1635 submit_next_request(ep);
1636 request_complete(ep, req, 0);
1637 } else {
1638 if (req->submitted)
1639 next_fifo_transaction(ep, req);
1640 else
1641 submit_request(ep, req);
1642
1643 if (req->last_transaction) {
1644 list_del_init(&req->queue);
1645 submit_next_request(ep);
1646 request_complete(ep, req, 0);
1647 }
1648 }
1649
1650 epstatus = usba_ep_readl(ep, STA);
1651 epctrl = usba_ep_readl(ep, CTL);
1652 }
1653 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1654 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1655 receive_data(ep);
1656 }
1657 }
1658
1659 static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1660 {
1661 struct usba_request *req;
1662 u32 status, control, pending;
1663
1664 status = usba_dma_readl(ep, STATUS);
1665 control = usba_dma_readl(ep, CONTROL);
1666 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1667 ep->last_dma_status = status;
1668 #endif
1669 pending = status & control;
1670 DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1671
1672 if (status & USBA_DMA_CH_EN) {
1673 dev_err(&udc->pdev->dev,
1674 "DMA_CH_EN is set after transfer is finished!\n");
1675 dev_err(&udc->pdev->dev,
1676 "status=%#08x, pending=%#08x, control=%#08x\n",
1677 status, pending, control);
1678
1679 /*
1680 * try to pretend nothing happened. We might have to
1681 * do something here...
1682 */
1683 }
1684
1685 if (list_empty(&ep->queue))
1686 /* Might happen if a reset comes along at the right moment */
1687 return;
1688
1689 if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1690 req = list_entry(ep->queue.next, struct usba_request, queue);
1691 usba_update_req(ep, req, status);
1692
1693 list_del_init(&req->queue);
1694 submit_next_request(ep);
1695 request_complete(ep, req, 0);
1696 }
1697 }
1698
1699 static irqreturn_t usba_udc_irq(int irq, void *devid)
1700 {
1701 struct usba_udc *udc = devid;
1702 u32 status, int_enb;
1703 u32 dma_status;
1704 u32 ep_status;
1705
1706 spin_lock(&udc->lock);
1707
1708 int_enb = usba_int_enb_get(udc);
1709 status = usba_readl(udc, INT_STA) & (int_enb | USBA_HIGH_SPEED);
1710 DBG(DBG_INT, "irq, status=%#08x\n", status);
1711
1712 if (status & USBA_DET_SUSPEND) {
1713 toggle_bias(udc, 0);
1714 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
1715 usba_int_enb_set(udc, int_enb | USBA_WAKE_UP);
1716 udc->bias_pulse_needed = true;
1717 DBG(DBG_BUS, "Suspend detected\n");
1718 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1719 && udc->driver && udc->driver->suspend) {
1720 spin_unlock(&udc->lock);
1721 udc->driver->suspend(&udc->gadget);
1722 spin_lock(&udc->lock);
1723 }
1724 }
1725
1726 if (status & USBA_WAKE_UP) {
1727 toggle_bias(udc, 1);
1728 usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1729 usba_int_enb_set(udc, int_enb & ~USBA_WAKE_UP);
1730 DBG(DBG_BUS, "Wake Up CPU detected\n");
1731 }
1732
1733 if (status & USBA_END_OF_RESUME) {
1734 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1735 generate_bias_pulse(udc);
1736 DBG(DBG_BUS, "Resume detected\n");
1737 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1738 && udc->driver && udc->driver->resume) {
1739 spin_unlock(&udc->lock);
1740 udc->driver->resume(&udc->gadget);
1741 spin_lock(&udc->lock);
1742 }
1743 }
1744
1745 dma_status = USBA_BFEXT(DMA_INT, status);
1746 if (dma_status) {
1747 int i;
1748
1749 for (i = 1; i <= USBA_NR_DMAS; i++)
1750 if (dma_status & (1 << i))
1751 usba_dma_irq(udc, &udc->usba_ep[i]);
1752 }
1753
1754 ep_status = USBA_BFEXT(EPT_INT, status);
1755 if (ep_status) {
1756 int i;
1757
1758 for (i = 0; i < udc->num_ep; i++)
1759 if (ep_status & (1 << i)) {
1760 if (ep_is_control(&udc->usba_ep[i]))
1761 usba_control_irq(udc, &udc->usba_ep[i]);
1762 else
1763 usba_ep_irq(udc, &udc->usba_ep[i]);
1764 }
1765 }
1766
1767 if (status & USBA_END_OF_RESET) {
1768 struct usba_ep *ep0, *ep;
1769 int i, n;
1770
1771 usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
1772 generate_bias_pulse(udc);
1773 reset_all_endpoints(udc);
1774
1775 if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) {
1776 udc->gadget.speed = USB_SPEED_UNKNOWN;
1777 spin_unlock(&udc->lock);
1778 usb_gadget_udc_reset(&udc->gadget, udc->driver);
1779 spin_lock(&udc->lock);
1780 }
1781
1782 if (status & USBA_HIGH_SPEED)
1783 udc->gadget.speed = USB_SPEED_HIGH;
1784 else
1785 udc->gadget.speed = USB_SPEED_FULL;
1786 DBG(DBG_BUS, "%s bus reset detected\n",
1787 usb_speed_string(udc->gadget.speed));
1788
1789 ep0 = &udc->usba_ep[0];
1790 ep0->ep.desc = &usba_ep0_desc;
1791 ep0->state = WAIT_FOR_SETUP;
1792 usba_ep_writel(ep0, CFG,
1793 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1794 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1795 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1796 usba_ep_writel(ep0, CTL_ENB,
1797 USBA_EPT_ENABLE | USBA_RX_SETUP);
1798 usba_int_enb_set(udc, int_enb | USBA_BF(EPT_INT, 1) |
1799 USBA_DET_SUSPEND | USBA_END_OF_RESUME);
1800
1801 /*
1802 * Unclear why we hit this irregularly, e.g. in usbtest,
1803 * but it's clearly harmless...
1804 */
1805 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1806 dev_err(&udc->pdev->dev,
1807 "ODD: EP0 configuration is invalid!\n");
1808
1809 /* Preallocate other endpoints */
1810 n = fifo_mode ? udc->num_ep : udc->configured_ep;
1811 for (i = 1; i < n; i++) {
1812 ep = &udc->usba_ep[i];
1813 usba_ep_writel(ep, CFG, ep->ept_cfg);
1814 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED))
1815 dev_err(&udc->pdev->dev,
1816 "ODD: EP%d configuration is invalid!\n", i);
1817 }
1818 }
1819
1820 spin_unlock(&udc->lock);
1821
1822 return IRQ_HANDLED;
1823 }
1824
1825 static int start_clock(struct usba_udc *udc)
1826 {
1827 int ret;
1828
1829 if (udc->clocked)
1830 return 0;
1831
1832 ret = clk_prepare_enable(udc->pclk);
1833 if (ret)
1834 return ret;
1835 ret = clk_prepare_enable(udc->hclk);
1836 if (ret) {
1837 clk_disable_unprepare(udc->pclk);
1838 return ret;
1839 }
1840
1841 udc->clocked = true;
1842 return 0;
1843 }
1844
1845 static void stop_clock(struct usba_udc *udc)
1846 {
1847 if (!udc->clocked)
1848 return;
1849
1850 clk_disable_unprepare(udc->hclk);
1851 clk_disable_unprepare(udc->pclk);
1852
1853 udc->clocked = false;
1854 }
1855
1856 static int usba_start(struct usba_udc *udc)
1857 {
1858 unsigned long flags;
1859 int ret;
1860
1861 ret = start_clock(udc);
1862 if (ret)
1863 return ret;
1864
1865 spin_lock_irqsave(&udc->lock, flags);
1866 toggle_bias(udc, 1);
1867 usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1868 usba_int_enb_set(udc, USBA_END_OF_RESET);
1869 spin_unlock_irqrestore(&udc->lock, flags);
1870
1871 return 0;
1872 }
1873
1874 static void usba_stop(struct usba_udc *udc)
1875 {
1876 unsigned long flags;
1877
1878 spin_lock_irqsave(&udc->lock, flags);
1879 udc->gadget.speed = USB_SPEED_UNKNOWN;
1880 reset_all_endpoints(udc);
1881
1882 /* This will also disable the DP pullup */
1883 toggle_bias(udc, 0);
1884 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1885 spin_unlock_irqrestore(&udc->lock, flags);
1886
1887 stop_clock(udc);
1888 }
1889
1890 static irqreturn_t usba_vbus_irq_thread(int irq, void *devid)
1891 {
1892 struct usba_udc *udc = devid;
1893 int vbus;
1894
1895 /* debounce */
1896 udelay(10);
1897
1898 mutex_lock(&udc->vbus_mutex);
1899
1900 vbus = vbus_is_present(udc);
1901 if (vbus != udc->vbus_prev) {
1902 if (vbus) {
1903 usba_start(udc);
1904 } else {
1905 usba_stop(udc);
1906
1907 if (udc->driver->disconnect)
1908 udc->driver->disconnect(&udc->gadget);
1909 }
1910 udc->vbus_prev = vbus;
1911 }
1912
1913 mutex_unlock(&udc->vbus_mutex);
1914 return IRQ_HANDLED;
1915 }
1916
1917 static int atmel_usba_start(struct usb_gadget *gadget,
1918 struct usb_gadget_driver *driver)
1919 {
1920 int ret;
1921 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1922 unsigned long flags;
1923
1924 spin_lock_irqsave(&udc->lock, flags);
1925 udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
1926 udc->driver = driver;
1927 spin_unlock_irqrestore(&udc->lock, flags);
1928
1929 mutex_lock(&udc->vbus_mutex);
1930
1931 if (udc->vbus_pin)
1932 enable_irq(gpiod_to_irq(udc->vbus_pin));
1933
1934 /* If Vbus is present, enable the controller and wait for reset */
1935 udc->vbus_prev = vbus_is_present(udc);
1936 if (udc->vbus_prev) {
1937 ret = usba_start(udc);
1938 if (ret)
1939 goto err;
1940 }
1941
1942 mutex_unlock(&udc->vbus_mutex);
1943 return 0;
1944
1945 err:
1946 if (udc->vbus_pin)
1947 disable_irq(gpiod_to_irq(udc->vbus_pin));
1948
1949 mutex_unlock(&udc->vbus_mutex);
1950
1951 spin_lock_irqsave(&udc->lock, flags);
1952 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1953 udc->driver = NULL;
1954 spin_unlock_irqrestore(&udc->lock, flags);
1955 return ret;
1956 }
1957
1958 static int atmel_usba_stop(struct usb_gadget *gadget)
1959 {
1960 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1961
1962 if (udc->vbus_pin)
1963 disable_irq(gpiod_to_irq(udc->vbus_pin));
1964
1965 if (fifo_mode == 0)
1966 udc->configured_ep = 1;
1967
1968 usba_stop(udc);
1969
1970 udc->driver = NULL;
1971
1972 return 0;
1973 }
1974
1975 static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on)
1976 {
1977 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
1978 is_on ? AT91_PMC_BIASEN : 0);
1979 }
1980
1981 static void at91sam9g45_pulse_bias(struct usba_udc *udc)
1982 {
1983 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 0);
1984 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
1985 AT91_PMC_BIASEN);
1986 }
1987
1988 static const struct usba_udc_errata at91sam9rl_errata = {
1989 .toggle_bias = at91sam9rl_toggle_bias,
1990 };
1991
1992 static const struct usba_udc_errata at91sam9g45_errata = {
1993 .pulse_bias = at91sam9g45_pulse_bias,
1994 };
1995
1996 static const struct of_device_id atmel_udc_dt_ids[] = {
1997 { .compatible = "atmel,at91sam9rl-udc", .data = &at91sam9rl_errata },
1998 { .compatible = "atmel,at91sam9g45-udc", .data = &at91sam9g45_errata },
1999 { .compatible = "atmel,sama5d3-udc" },
2000 { /* sentinel */ }
2001 };
2002
2003 MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids);
2004
2005 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
2006 struct usba_udc *udc)
2007 {
2008 u32 val;
2009 const char *name;
2010 struct device_node *np = pdev->dev.of_node;
2011 const struct of_device_id *match;
2012 struct device_node *pp;
2013 int i, ret;
2014 struct usba_ep *eps, *ep;
2015
2016 match = of_match_node(atmel_udc_dt_ids, np);
2017 if (!match)
2018 return ERR_PTR(-EINVAL);
2019
2020 udc->errata = match->data;
2021 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9g45-pmc");
2022 if (IS_ERR(udc->pmc))
2023 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9rl-pmc");
2024 if (IS_ERR(udc->pmc))
2025 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9x5-pmc");
2026 if (udc->errata && IS_ERR(udc->pmc))
2027 return ERR_CAST(udc->pmc);
2028
2029 udc->num_ep = 0;
2030
2031 udc->vbus_pin = devm_gpiod_get_optional(&pdev->dev, "atmel,vbus",
2032 GPIOD_IN);
2033
2034 if (fifo_mode == 0) {
2035 pp = NULL;
2036 while ((pp = of_get_next_child(np, pp)))
2037 udc->num_ep++;
2038 udc->configured_ep = 1;
2039 } else {
2040 udc->num_ep = usba_config_fifo_table(udc);
2041 }
2042
2043 eps = devm_kcalloc(&pdev->dev, udc->num_ep, sizeof(struct usba_ep),
2044 GFP_KERNEL);
2045 if (!eps)
2046 return ERR_PTR(-ENOMEM);
2047
2048 udc->gadget.ep0 = &eps[0].ep;
2049
2050 INIT_LIST_HEAD(&eps[0].ep.ep_list);
2051
2052 pp = NULL;
2053 i = 0;
2054 while ((pp = of_get_next_child(np, pp)) && i < udc->num_ep) {
2055 ep = &eps[i];
2056
2057 ret = of_property_read_u32(pp, "reg", &val);
2058 if (ret) {
2059 dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret);
2060 goto err;
2061 }
2062 ep->index = fifo_mode ? udc->fifo_cfg[i].hw_ep_num : val;
2063
2064 ret = of_property_read_u32(pp, "atmel,fifo-size", &val);
2065 if (ret) {
2066 dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret);
2067 goto err;
2068 }
2069 if (fifo_mode) {
2070 if (val < udc->fifo_cfg[i].fifo_size) {
2071 dev_warn(&pdev->dev,
2072 "Using max fifo-size value from DT\n");
2073 ep->fifo_size = val;
2074 } else {
2075 ep->fifo_size = udc->fifo_cfg[i].fifo_size;
2076 }
2077 } else {
2078 ep->fifo_size = val;
2079 }
2080
2081 ret = of_property_read_u32(pp, "atmel,nb-banks", &val);
2082 if (ret) {
2083 dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret);
2084 goto err;
2085 }
2086 if (fifo_mode) {
2087 if (val < udc->fifo_cfg[i].nr_banks) {
2088 dev_warn(&pdev->dev,
2089 "Using max nb-banks value from DT\n");
2090 ep->nr_banks = val;
2091 } else {
2092 ep->nr_banks = udc->fifo_cfg[i].nr_banks;
2093 }
2094 } else {
2095 ep->nr_banks = val;
2096 }
2097
2098 ep->can_dma = of_property_read_bool(pp, "atmel,can-dma");
2099 ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc");
2100
2101 ret = of_property_read_string(pp, "name", &name);
2102 if (ret) {
2103 dev_err(&pdev->dev, "of_probe: name error(%d)\n", ret);
2104 goto err;
2105 }
2106 sprintf(ep->name, "ep%d", ep->index);
2107 ep->ep.name = ep->name;
2108
2109 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
2110 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
2111 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
2112 ep->ep.ops = &usba_ep_ops;
2113 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
2114 ep->udc = udc;
2115 INIT_LIST_HEAD(&ep->queue);
2116
2117 if (ep->index == 0) {
2118 ep->ep.caps.type_control = true;
2119 } else {
2120 ep->ep.caps.type_iso = ep->can_isoc;
2121 ep->ep.caps.type_bulk = true;
2122 ep->ep.caps.type_int = true;
2123 }
2124
2125 ep->ep.caps.dir_in = true;
2126 ep->ep.caps.dir_out = true;
2127
2128 if (fifo_mode != 0) {
2129 /*
2130 * Generate ept_cfg based on FIFO size and
2131 * banks number
2132 */
2133 if (ep->fifo_size <= 8)
2134 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
2135 else
2136 /* LSB is bit 1, not 0 */
2137 ep->ept_cfg =
2138 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
2139
2140 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
2141 }
2142
2143 if (i)
2144 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2145
2146 i++;
2147 }
2148
2149 if (i == 0) {
2150 dev_err(&pdev->dev, "of_probe: no endpoint specified\n");
2151 ret = -EINVAL;
2152 goto err;
2153 }
2154
2155 return eps;
2156 err:
2157 return ERR_PTR(ret);
2158 }
2159
2160 static int usba_udc_probe(struct platform_device *pdev)
2161 {
2162 struct resource *res;
2163 struct clk *pclk, *hclk;
2164 struct usba_udc *udc;
2165 int irq, ret, i;
2166
2167 udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
2168 if (!udc)
2169 return -ENOMEM;
2170
2171 udc->gadget = usba_gadget_template;
2172 INIT_LIST_HEAD(&udc->gadget.ep_list);
2173
2174 res = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
2175 udc->regs = devm_ioremap_resource(&pdev->dev, res);
2176 if (IS_ERR(udc->regs))
2177 return PTR_ERR(udc->regs);
2178 dev_info(&pdev->dev, "MMIO registers at %pR mapped at %p\n",
2179 res, udc->regs);
2180
2181 res = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
2182 udc->fifo = devm_ioremap_resource(&pdev->dev, res);
2183 if (IS_ERR(udc->fifo))
2184 return PTR_ERR(udc->fifo);
2185 dev_info(&pdev->dev, "FIFO at %pR mapped at %p\n", res, udc->fifo);
2186
2187 irq = platform_get_irq(pdev, 0);
2188 if (irq < 0)
2189 return irq;
2190
2191 pclk = devm_clk_get(&pdev->dev, "pclk");
2192 if (IS_ERR(pclk))
2193 return PTR_ERR(pclk);
2194 hclk = devm_clk_get(&pdev->dev, "hclk");
2195 if (IS_ERR(hclk))
2196 return PTR_ERR(hclk);
2197
2198 spin_lock_init(&udc->lock);
2199 mutex_init(&udc->vbus_mutex);
2200 udc->pdev = pdev;
2201 udc->pclk = pclk;
2202 udc->hclk = hclk;
2203
2204 platform_set_drvdata(pdev, udc);
2205
2206 /* Make sure we start from a clean slate */
2207 ret = clk_prepare_enable(pclk);
2208 if (ret) {
2209 dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n");
2210 return ret;
2211 }
2212
2213 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
2214 clk_disable_unprepare(pclk);
2215
2216 udc->usba_ep = atmel_udc_of_init(pdev, udc);
2217
2218 toggle_bias(udc, 0);
2219
2220 if (IS_ERR(udc->usba_ep))
2221 return PTR_ERR(udc->usba_ep);
2222
2223 ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0,
2224 "atmel_usba_udc", udc);
2225 if (ret) {
2226 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
2227 irq, ret);
2228 return ret;
2229 }
2230 udc->irq = irq;
2231
2232 if (udc->vbus_pin) {
2233 irq_set_status_flags(gpiod_to_irq(udc->vbus_pin), IRQ_NOAUTOEN);
2234 ret = devm_request_threaded_irq(&pdev->dev,
2235 gpiod_to_irq(udc->vbus_pin), NULL,
2236 usba_vbus_irq_thread, USBA_VBUS_IRQFLAGS,
2237 "atmel_usba_udc", udc);
2238 if (ret) {
2239 udc->vbus_pin = NULL;
2240 dev_warn(&udc->pdev->dev,
2241 "failed to request vbus irq; "
2242 "assuming always on\n");
2243 }
2244 }
2245
2246 ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2247 if (ret)
2248 return ret;
2249 device_init_wakeup(&pdev->dev, 1);
2250
2251 usba_init_debugfs(udc);
2252 for (i = 1; i < udc->num_ep; i++)
2253 usba_ep_init_debugfs(udc, &udc->usba_ep[i]);
2254
2255 return 0;
2256 }
2257
2258 static int usba_udc_remove(struct platform_device *pdev)
2259 {
2260 struct usba_udc *udc;
2261 int i;
2262
2263 udc = platform_get_drvdata(pdev);
2264
2265 device_init_wakeup(&pdev->dev, 0);
2266 usb_del_gadget_udc(&udc->gadget);
2267
2268 for (i = 1; i < udc->num_ep; i++)
2269 usba_ep_cleanup_debugfs(&udc->usba_ep[i]);
2270 usba_cleanup_debugfs(udc);
2271
2272 return 0;
2273 }
2274
2275 #ifdef CONFIG_PM_SLEEP
2276 static int usba_udc_suspend(struct device *dev)
2277 {
2278 struct usba_udc *udc = dev_get_drvdata(dev);
2279
2280 /* Not started */
2281 if (!udc->driver)
2282 return 0;
2283
2284 mutex_lock(&udc->vbus_mutex);
2285
2286 if (!device_may_wakeup(dev)) {
2287 usba_stop(udc);
2288 goto out;
2289 }
2290
2291 /*
2292 * Device may wake up. We stay clocked if we failed
2293 * to request vbus irq, assuming always on.
2294 */
2295 if (udc->vbus_pin) {
2296 usba_stop(udc);
2297 enable_irq_wake(gpiod_to_irq(udc->vbus_pin));
2298 }
2299
2300 out:
2301 mutex_unlock(&udc->vbus_mutex);
2302 return 0;
2303 }
2304
2305 static int usba_udc_resume(struct device *dev)
2306 {
2307 struct usba_udc *udc = dev_get_drvdata(dev);
2308
2309 /* Not started */
2310 if (!udc->driver)
2311 return 0;
2312
2313 if (device_may_wakeup(dev) && udc->vbus_pin)
2314 disable_irq_wake(gpiod_to_irq(udc->vbus_pin));
2315
2316 /* If Vbus is present, enable the controller and wait for reset */
2317 mutex_lock(&udc->vbus_mutex);
2318 udc->vbus_prev = vbus_is_present(udc);
2319 if (udc->vbus_prev)
2320 usba_start(udc);
2321 mutex_unlock(&udc->vbus_mutex);
2322
2323 return 0;
2324 }
2325 #endif
2326
2327 static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume);
2328
2329 static struct platform_driver udc_driver = {
2330 .remove = usba_udc_remove,
2331 .driver = {
2332 .name = "atmel_usba_udc",
2333 .pm = &usba_udc_pm_ops,
2334 .of_match_table = atmel_udc_dt_ids,
2335 },
2336 };
2337
2338 module_platform_driver_probe(udc_driver, usba_udc_probe);
2339
2340 MODULE_DESCRIPTION("Atmel USBA UDC driver");
2341 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2342 MODULE_LICENSE("GPL");
2343 MODULE_ALIAS("platform:atmel_usba_udc");
Linux with added FPC-III support