drivers/video/fbdev/wm8505fb_regs.h

   1 /*
   2  *  GOVR registers list for WM8505 chips
   3  *
   4  *  Copyright (C) 2010 Ed Spiridonov <edo.rus@gmail.com>
   5  *   Based on VIA/WonderMedia wm8510-govrh-reg.h
   6  *   http://github.com/projectgus/kernel_wm8505/blob/wm8505_2.6.29/
   7  *         drivers/video/wmt/register/wm8510/wm8510-govrh-reg.h
   8  *
   9  * This software is licensed under the terms of the GNU General Public
  10  * License version 2, as published by the Free Software Foundation, and
  11  * may be copied, distributed, and modified under those terms.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  */
  18
  19 #ifndef _WM8505FB_REGS_H
  20 #define _WM8505FB_REGS_H
  21
  22 /*
  23  * Color space select register, default value 0x1c
  24  *   BIT0 GOVRH_DVO_YUV2RGB_ENABLE
  25  *   BIT1 GOVRH_VGA_YUV2RGB_ENABLE
  26  *   BIT2 GOVRH_RGB_MODE
  27  *   BIT3 GOVRH_DAC_CLKINV
  28  *   BIT4 GOVRH_BLANK_ZERO
  29  */
  30 #define WMT_GOVR_COLORSPACE     0x1e4
  31 /*
  32  * Another colorspace select register, default value 1
  33  *   BIT0 GOVRH_DVO_RGB
  34  *   BIT1 GOVRH_DVO_YUV422
  35  */
  36 #define WMT_GOVR_COLORSPACE1     0x30
  37
  38 #define WMT_GOVR_CONTRAST       0x1b8
  39 #define WMT_GOVR_BRGHTNESS      0x1bc /* incompatible with RGB? */
  40
  41 /* Framubeffer address */
  42 #define WMT_GOVR_FBADDR          0x90
  43 #define WMT_GOVR_FBADDR1         0x94 /* UV offset in YUV mode */
  44
  45 /* Offset of visible window */
  46 #define WMT_GOVR_XPAN            0xa4
  47 #define WMT_GOVR_YPAN            0xa0
  48
  49 #define WMT_GOVR_XRES            0x98
  50 #define WMT_GOVR_XRES_VIRTUAL    0x9c
  51
  52 #define WMT_GOVR_MIF_ENABLE      0x80
  53 #define WMT_GOVR_FHI             0xa8
  54 #define WMT_GOVR_REG_UPDATE      0xe4
  55
  56 /*
  57  *   BIT0 GOVRH_DVO_OUTWIDTH
  58  *   BIT1 GOVRH_DVO_SYNC_POLAR
  59  *   BIT2 GOVRH_DVO_ENABLE
  60  */
  61 #define WMT_GOVR_DVO_SET        0x148
  62
  63 /* Timing generator? */
  64 #define WMT_GOVR_TG             0x100
  65
  66 /* Timings */
  67 #define WMT_GOVR_TIMING_H_ALL   0x108
  68 #define WMT_GOVR_TIMING_V_ALL   0x10c
  69 #define WMT_GOVR_TIMING_V_START 0x110
  70 #define WMT_GOVR_TIMING_V_END   0x114
  71 #define WMT_GOVR_TIMING_H_START 0x118
  72 #define WMT_GOVR_TIMING_H_END   0x11c
  73 #define WMT_GOVR_TIMING_V_SYNC  0x128
  74 #define WMT_GOVR_TIMING_H_SYNC  0x12c
  75
  76 #endif /* _WM8505FB_REGS_H */