Linux 4.19.133
[linux/fpc-iii.git] / drivers / watchdog / mt7621_wdt.c
blob81208cd3f4ecba3edc2dc6334b360cdd98a7f935
1 /*
2 * Ralink MT7621/MT7628 built-in hardware watchdog timer
4 * Copyright (C) 2014 John Crispin <john@phrozen.org>
6 * This driver was based on: drivers/watchdog/rt2880_wdt.c
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
13 #include <linux/clk.h>
14 #include <linux/reset.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/watchdog.h>
18 #include <linux/moduleparam.h>
19 #include <linux/platform_device.h>
20 #include <linux/mod_devicetable.h>
22 #include <asm/mach-ralink/ralink_regs.h>
24 #define SYSC_RSTSTAT 0x38
25 #define WDT_RST_CAUSE BIT(1)
27 #define RALINK_WDT_TIMEOUT 30
29 #define TIMER_REG_TMRSTAT 0x00
30 #define TIMER_REG_TMR1LOAD 0x24
31 #define TIMER_REG_TMR1CTL 0x20
33 #define TMR1CTL_ENABLE BIT(7)
34 #define TMR1CTL_RESTART BIT(9)
35 #define TMR1CTL_PRESCALE_SHIFT 16
37 static void __iomem *mt7621_wdt_base;
38 static struct reset_control *mt7621_wdt_reset;
40 static bool nowayout = WATCHDOG_NOWAYOUT;
41 module_param(nowayout, bool, 0);
42 MODULE_PARM_DESC(nowayout,
43 "Watchdog cannot be stopped once started (default="
44 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
46 static inline void rt_wdt_w32(unsigned reg, u32 val)
48 iowrite32(val, mt7621_wdt_base + reg);
51 static inline u32 rt_wdt_r32(unsigned reg)
53 return ioread32(mt7621_wdt_base + reg);
56 static int mt7621_wdt_ping(struct watchdog_device *w)
58 rt_wdt_w32(TIMER_REG_TMRSTAT, TMR1CTL_RESTART);
60 return 0;
63 static int mt7621_wdt_set_timeout(struct watchdog_device *w, unsigned int t)
65 w->timeout = t;
66 rt_wdt_w32(TIMER_REG_TMR1LOAD, t * 1000);
67 mt7621_wdt_ping(w);
69 return 0;
72 static int mt7621_wdt_start(struct watchdog_device *w)
74 u32 t;
76 /* set the prescaler to 1ms == 1000us */
77 rt_wdt_w32(TIMER_REG_TMR1CTL, 1000 << TMR1CTL_PRESCALE_SHIFT);
79 mt7621_wdt_set_timeout(w, w->timeout);
81 t = rt_wdt_r32(TIMER_REG_TMR1CTL);
82 t |= TMR1CTL_ENABLE;
83 rt_wdt_w32(TIMER_REG_TMR1CTL, t);
85 return 0;
88 static int mt7621_wdt_stop(struct watchdog_device *w)
90 u32 t;
92 mt7621_wdt_ping(w);
94 t = rt_wdt_r32(TIMER_REG_TMR1CTL);
95 t &= ~TMR1CTL_ENABLE;
96 rt_wdt_w32(TIMER_REG_TMR1CTL, t);
98 return 0;
101 static int mt7621_wdt_bootcause(void)
103 if (rt_sysc_r32(SYSC_RSTSTAT) & WDT_RST_CAUSE)
104 return WDIOF_CARDRESET;
106 return 0;
109 static int mt7621_wdt_is_running(struct watchdog_device *w)
111 return !!(rt_wdt_r32(TIMER_REG_TMR1CTL) & TMR1CTL_ENABLE);
114 static const struct watchdog_info mt7621_wdt_info = {
115 .identity = "Mediatek Watchdog",
116 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
119 static const struct watchdog_ops mt7621_wdt_ops = {
120 .owner = THIS_MODULE,
121 .start = mt7621_wdt_start,
122 .stop = mt7621_wdt_stop,
123 .ping = mt7621_wdt_ping,
124 .set_timeout = mt7621_wdt_set_timeout,
127 static struct watchdog_device mt7621_wdt_dev = {
128 .info = &mt7621_wdt_info,
129 .ops = &mt7621_wdt_ops,
130 .min_timeout = 1,
131 .max_timeout = 0xfffful / 1000,
134 static int mt7621_wdt_probe(struct platform_device *pdev)
136 struct resource *res;
138 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
139 mt7621_wdt_base = devm_ioremap_resource(&pdev->dev, res);
140 if (IS_ERR(mt7621_wdt_base))
141 return PTR_ERR(mt7621_wdt_base);
143 mt7621_wdt_reset = devm_reset_control_get_exclusive(&pdev->dev, NULL);
144 if (!IS_ERR(mt7621_wdt_reset))
145 reset_control_deassert(mt7621_wdt_reset);
147 mt7621_wdt_dev.bootstatus = mt7621_wdt_bootcause();
149 watchdog_init_timeout(&mt7621_wdt_dev, mt7621_wdt_dev.max_timeout,
150 &pdev->dev);
151 watchdog_set_nowayout(&mt7621_wdt_dev, nowayout);
152 if (mt7621_wdt_is_running(&mt7621_wdt_dev)) {
154 * Make sure to apply timeout from watchdog core, taking
155 * the prescaler of this driver here into account (the
156 * boot loader might be using a different prescaler).
158 * To avoid spurious resets because of different scaling,
159 * we first disable the watchdog, set the new prescaler
160 * and timeout, and then re-enable the watchdog.
162 mt7621_wdt_stop(&mt7621_wdt_dev);
163 mt7621_wdt_start(&mt7621_wdt_dev);
164 set_bit(WDOG_HW_RUNNING, &mt7621_wdt_dev.status);
167 return devm_watchdog_register_device(&pdev->dev, &mt7621_wdt_dev);
170 static void mt7621_wdt_shutdown(struct platform_device *pdev)
172 mt7621_wdt_stop(&mt7621_wdt_dev);
175 static const struct of_device_id mt7621_wdt_match[] = {
176 { .compatible = "mediatek,mt7621-wdt" },
179 MODULE_DEVICE_TABLE(of, mt7621_wdt_match);
181 static struct platform_driver mt7621_wdt_driver = {
182 .probe = mt7621_wdt_probe,
183 .shutdown = mt7621_wdt_shutdown,
184 .driver = {
185 .name = KBUILD_MODNAME,
186 .of_match_table = mt7621_wdt_match,
190 module_platform_driver(mt7621_wdt_driver);
192 MODULE_DESCRIPTION("MediaTek MT762x hardware watchdog driver");
193 MODULE_AUTHOR("John Crispin <john@phrozen.org");
194 MODULE_LICENSE("GPL v2");