Linux 4.19.133
[linux/fpc-iii.git] / drivers / watchdog / sp805_wdt.c
blobd8876fba686dcf8b9847f061a5273e88eb2d199b
1 /*
2 * drivers/char/watchdog/sp805-wdt.c
4 * Watchdog driver for ARM SP805 watchdog module
6 * Copyright (C) 2010 ST Microelectronics
7 * Viresh Kumar <vireshk@kernel.org>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2 or later. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #include <linux/acpi.h>
15 #include <linux/device.h>
16 #include <linux/resource.h>
17 #include <linux/amba/bus.h>
18 #include <linux/bitops.h>
19 #include <linux/clk.h>
20 #include <linux/io.h>
21 #include <linux/ioport.h>
22 #include <linux/kernel.h>
23 #include <linux/math64.h>
24 #include <linux/module.h>
25 #include <linux/moduleparam.h>
26 #include <linux/of.h>
27 #include <linux/pm.h>
28 #include <linux/slab.h>
29 #include <linux/spinlock.h>
30 #include <linux/types.h>
31 #include <linux/watchdog.h>
33 /* default timeout in seconds */
34 #define DEFAULT_TIMEOUT 60
36 #define MODULE_NAME "sp805-wdt"
38 /* watchdog register offsets and masks */
39 #define WDTLOAD 0x000
40 #define LOAD_MIN 0x00000001
41 #define LOAD_MAX 0xFFFFFFFF
42 #define WDTVALUE 0x004
43 #define WDTCONTROL 0x008
44 /* control register masks */
45 #define INT_ENABLE (1 << 0)
46 #define RESET_ENABLE (1 << 1)
47 #define ENABLE_MASK (INT_ENABLE | RESET_ENABLE)
48 #define WDTINTCLR 0x00C
49 #define WDTRIS 0x010
50 #define WDTMIS 0x014
51 #define INT_MASK (1 << 0)
52 #define WDTLOCK 0xC00
53 #define UNLOCK 0x1ACCE551
54 #define LOCK 0x00000001
56 /**
57 * struct sp805_wdt: sp805 wdt device structure
58 * @wdd: instance of struct watchdog_device
59 * @lock: spin lock protecting dev structure and io access
60 * @base: base address of wdt
61 * @clk: clock structure of wdt
62 * @adev: amba device structure of wdt
63 * @status: current status of wdt
64 * @load_val: load value to be set for current timeout
66 struct sp805_wdt {
67 struct watchdog_device wdd;
68 spinlock_t lock;
69 void __iomem *base;
70 struct clk *clk;
71 u64 rate;
72 struct amba_device *adev;
73 unsigned int load_val;
76 static bool nowayout = WATCHDOG_NOWAYOUT;
77 module_param(nowayout, bool, 0);
78 MODULE_PARM_DESC(nowayout,
79 "Set to 1 to keep watchdog running after device release");
81 /* returns true if wdt is running; otherwise returns false */
82 static bool wdt_is_running(struct watchdog_device *wdd)
84 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
85 u32 wdtcontrol = readl_relaxed(wdt->base + WDTCONTROL);
87 return (wdtcontrol & ENABLE_MASK) == ENABLE_MASK;
90 /* This routine finds load value that will reset system in required timout */
91 static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
93 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
94 u64 load, rate;
96 rate = wdt->rate;
99 * sp805 runs counter with given value twice, after the end of first
100 * counter it gives an interrupt and then starts counter again. If
101 * interrupt already occurred then it resets the system. This is why
102 * load is half of what should be required.
104 load = div_u64(rate, 2) * timeout - 1;
106 load = (load > LOAD_MAX) ? LOAD_MAX : load;
107 load = (load < LOAD_MIN) ? LOAD_MIN : load;
109 spin_lock(&wdt->lock);
110 wdt->load_val = load;
111 /* roundup timeout to closest positive integer value */
112 wdd->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
113 spin_unlock(&wdt->lock);
115 return 0;
118 /* returns number of seconds left for reset to occur */
119 static unsigned int wdt_timeleft(struct watchdog_device *wdd)
121 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
122 u64 load;
124 spin_lock(&wdt->lock);
125 load = readl_relaxed(wdt->base + WDTVALUE);
127 /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
128 if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
129 load += wdt->load_val + 1;
130 spin_unlock(&wdt->lock);
132 return div_u64(load, wdt->rate);
135 static int
136 wdt_restart(struct watchdog_device *wdd, unsigned long mode, void *cmd)
138 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
140 writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
141 writel_relaxed(0, wdt->base + WDTCONTROL);
142 writel_relaxed(0, wdt->base + WDTLOAD);
143 writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base + WDTCONTROL);
145 /* Flush posted writes. */
146 readl_relaxed(wdt->base + WDTLOCK);
148 return 0;
151 static int wdt_config(struct watchdog_device *wdd, bool ping)
153 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
154 int ret;
156 if (!ping) {
158 ret = clk_prepare_enable(wdt->clk);
159 if (ret) {
160 dev_err(&wdt->adev->dev, "clock enable fail");
161 return ret;
165 spin_lock(&wdt->lock);
167 writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
168 writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);
169 writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);
171 if (!ping)
172 writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base +
173 WDTCONTROL);
175 writel_relaxed(LOCK, wdt->base + WDTLOCK);
177 /* Flush posted writes. */
178 readl_relaxed(wdt->base + WDTLOCK);
179 spin_unlock(&wdt->lock);
181 return 0;
184 static int wdt_ping(struct watchdog_device *wdd)
186 return wdt_config(wdd, true);
189 /* enables watchdog timers reset */
190 static int wdt_enable(struct watchdog_device *wdd)
192 return wdt_config(wdd, false);
195 /* disables watchdog timers reset */
196 static int wdt_disable(struct watchdog_device *wdd)
198 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
200 spin_lock(&wdt->lock);
202 writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
203 writel_relaxed(0, wdt->base + WDTCONTROL);
204 writel_relaxed(LOCK, wdt->base + WDTLOCK);
206 /* Flush posted writes. */
207 readl_relaxed(wdt->base + WDTLOCK);
208 spin_unlock(&wdt->lock);
210 clk_disable_unprepare(wdt->clk);
212 return 0;
215 static const struct watchdog_info wdt_info = {
216 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
217 .identity = MODULE_NAME,
220 static const struct watchdog_ops wdt_ops = {
221 .owner = THIS_MODULE,
222 .start = wdt_enable,
223 .stop = wdt_disable,
224 .ping = wdt_ping,
225 .set_timeout = wdt_setload,
226 .get_timeleft = wdt_timeleft,
227 .restart = wdt_restart,
230 static int
231 sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
233 struct sp805_wdt *wdt;
234 int ret = 0;
236 wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
237 if (!wdt) {
238 ret = -ENOMEM;
239 goto err;
242 wdt->base = devm_ioremap_resource(&adev->dev, &adev->res);
243 if (IS_ERR(wdt->base))
244 return PTR_ERR(wdt->base);
246 if (adev->dev.of_node) {
247 wdt->clk = devm_clk_get(&adev->dev, NULL);
248 if (IS_ERR(wdt->clk)) {
249 dev_err(&adev->dev, "Clock not found\n");
250 return PTR_ERR(wdt->clk);
252 wdt->rate = clk_get_rate(wdt->clk);
253 } else if (has_acpi_companion(&adev->dev)) {
255 * When Driver probe with ACPI device, clock devices
256 * are not available, so watchdog rate get from
257 * clock-frequency property given in _DSD object.
259 device_property_read_u64(&adev->dev, "clock-frequency",
260 &wdt->rate);
261 if (!wdt->rate) {
262 dev_err(&adev->dev, "no clock-frequency property\n");
263 return -ENODEV;
267 wdt->adev = adev;
268 wdt->wdd.info = &wdt_info;
269 wdt->wdd.ops = &wdt_ops;
270 wdt->wdd.parent = &adev->dev;
272 spin_lock_init(&wdt->lock);
273 watchdog_set_nowayout(&wdt->wdd, nowayout);
274 watchdog_set_drvdata(&wdt->wdd, wdt);
275 watchdog_set_restart_priority(&wdt->wdd, 128);
278 * If 'timeout-sec' devicetree property is specified, use that.
279 * Otherwise, use DEFAULT_TIMEOUT
281 wdt->wdd.timeout = DEFAULT_TIMEOUT;
282 watchdog_init_timeout(&wdt->wdd, 0, &adev->dev);
283 wdt_setload(&wdt->wdd, wdt->wdd.timeout);
286 * If HW is already running, enable/reset the wdt and set the running
287 * bit to tell the wdt subsystem
289 if (wdt_is_running(&wdt->wdd)) {
290 wdt_enable(&wdt->wdd);
291 set_bit(WDOG_HW_RUNNING, &wdt->wdd.status);
294 ret = watchdog_register_device(&wdt->wdd);
295 if (ret) {
296 dev_err(&adev->dev, "watchdog_register_device() failed: %d\n",
297 ret);
298 goto err;
300 amba_set_drvdata(adev, wdt);
302 dev_info(&adev->dev, "registration successful\n");
303 return 0;
305 err:
306 dev_err(&adev->dev, "Probe Failed!!!\n");
307 return ret;
310 static int sp805_wdt_remove(struct amba_device *adev)
312 struct sp805_wdt *wdt = amba_get_drvdata(adev);
314 watchdog_unregister_device(&wdt->wdd);
315 watchdog_set_drvdata(&wdt->wdd, NULL);
317 return 0;
320 static int __maybe_unused sp805_wdt_suspend(struct device *dev)
322 struct sp805_wdt *wdt = dev_get_drvdata(dev);
324 if (watchdog_active(&wdt->wdd))
325 return wdt_disable(&wdt->wdd);
327 return 0;
330 static int __maybe_unused sp805_wdt_resume(struct device *dev)
332 struct sp805_wdt *wdt = dev_get_drvdata(dev);
334 if (watchdog_active(&wdt->wdd))
335 return wdt_enable(&wdt->wdd);
337 return 0;
340 static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
341 sp805_wdt_resume);
343 static const struct amba_id sp805_wdt_ids[] = {
345 .id = 0x00141805,
346 .mask = 0x00ffffff,
348 { 0, 0 },
351 MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);
353 static struct amba_driver sp805_wdt_driver = {
354 .drv = {
355 .name = MODULE_NAME,
356 .pm = &sp805_wdt_dev_pm_ops,
358 .id_table = sp805_wdt_ids,
359 .probe = sp805_wdt_probe,
360 .remove = sp805_wdt_remove,
363 module_amba_driver(sp805_wdt_driver);
365 MODULE_AUTHOR("Viresh Kumar <vireshk@kernel.org>");
366 MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
367 MODULE_LICENSE("GPL");