tools/testing/nvdimm/test/nfit_test.h

   1 /*
   2  * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of version 2 of the GNU General Public License as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  */
  13 #ifndef __NFIT_TEST_H__
  14 #define __NFIT_TEST_H__
  15 #include <linux/acpi.h>
  16 #include <linux/list.h>
  17 #include <linux/uuid.h>
  18 #include <linux/ioport.h>
  19 #include <linux/spinlock_types.h>
  20
  21 struct nfit_test_request {
  22         struct list_head list;
  23         struct resource res;
  24 };
  25
  26 struct nfit_test_resource {
  27         struct list_head requests;
  28         struct list_head list;
  29         struct resource res;
  30         struct device *dev;
  31         spinlock_t lock;
  32         int req_count;
  33         void *buf;
  34 };
  35
  36 #define ND_TRANSLATE_SPA_STATUS_INVALID_SPA  2
  37 #define NFIT_ARS_INJECT_INVALID 2
  38
  39 enum err_inj_options {
  40         ND_ARS_ERR_INJ_OPT_NOTIFY = 0,
  41 };
  42
  43 /* nfit commands */
  44 enum nfit_cmd_num {
  45         NFIT_CMD_TRANSLATE_SPA = 5,
  46         NFIT_CMD_ARS_INJECT_SET = 7,
  47         NFIT_CMD_ARS_INJECT_CLEAR = 8,
  48         NFIT_CMD_ARS_INJECT_GET = 9,
  49 };
  50
  51 struct nd_cmd_translate_spa {
  52         __u64 spa;
  53         __u32 status;
  54         __u8  flags;
  55         __u8  _reserved[3];
  56         __u64 translate_length;
  57         __u32 num_nvdimms;
  58         struct nd_nvdimm_device {
  59                 __u32 nfit_device_handle;
  60                 __u32 _reserved;
  61                 __u64 dpa;
  62         } __packed devices[0];
  63
  64 } __packed;
  65
  66 struct nd_cmd_ars_err_inj {
  67         __u64 err_inj_spa_range_base;
  68         __u64 err_inj_spa_range_length;
  69         __u8  err_inj_options;
  70         __u32 status;
  71 } __packed;
  72
  73 struct nd_cmd_ars_err_inj_clr {
  74         __u64 err_inj_clr_spa_range_base;
  75         __u64 err_inj_clr_spa_range_length;
  76         __u32 status;
  77 } __packed;
  78
  79 struct nd_cmd_ars_err_inj_stat {
  80         __u32 status;
  81         __u32 inj_err_rec_count;
  82         struct nd_error_stat_query_record {
  83                 __u64 err_inj_stat_spa_range_base;
  84                 __u64 err_inj_stat_spa_range_length;
  85         } __packed record[0];
  86 } __packed;
  87
  88 #define ND_INTEL_SMART                   1
  89 #define ND_INTEL_SMART_THRESHOLD         2
  90 #define ND_INTEL_ENABLE_LSS_STATUS      10
  91 #define ND_INTEL_FW_GET_INFO            12
  92 #define ND_INTEL_FW_START_UPDATE        13
  93 #define ND_INTEL_FW_SEND_DATA           14
  94 #define ND_INTEL_FW_FINISH_UPDATE       15
  95 #define ND_INTEL_FW_FINISH_QUERY        16
  96 #define ND_INTEL_SMART_SET_THRESHOLD    17
  97 #define ND_INTEL_SMART_INJECT           18
  98
  99 #define ND_INTEL_SMART_HEALTH_VALID             (1 << 0)
 100 #define ND_INTEL_SMART_SPARES_VALID             (1 << 1)
 101 #define ND_INTEL_SMART_USED_VALID               (1 << 2)
 102 #define ND_INTEL_SMART_MTEMP_VALID              (1 << 3)
 103 #define ND_INTEL_SMART_CTEMP_VALID              (1 << 4)
 104 #define ND_INTEL_SMART_SHUTDOWN_COUNT_VALID     (1 << 5)
 105 #define ND_INTEL_SMART_AIT_STATUS_VALID         (1 << 6)
 106 #define ND_INTEL_SMART_PTEMP_VALID              (1 << 7)
 107 #define ND_INTEL_SMART_ALARM_VALID              (1 << 9)
 108 #define ND_INTEL_SMART_SHUTDOWN_VALID           (1 << 10)
 109 #define ND_INTEL_SMART_VENDOR_VALID             (1 << 11)
 110 #define ND_INTEL_SMART_SPARE_TRIP               (1 << 0)
 111 #define ND_INTEL_SMART_TEMP_TRIP                (1 << 1)
 112 #define ND_INTEL_SMART_CTEMP_TRIP               (1 << 2)
 113 #define ND_INTEL_SMART_NON_CRITICAL_HEALTH      (1 << 0)
 114 #define ND_INTEL_SMART_CRITICAL_HEALTH          (1 << 1)
 115 #define ND_INTEL_SMART_FATAL_HEALTH             (1 << 2)
 116 #define ND_INTEL_SMART_INJECT_MTEMP             (1 << 0)
 117 #define ND_INTEL_SMART_INJECT_SPARE             (1 << 1)
 118 #define ND_INTEL_SMART_INJECT_FATAL             (1 << 2)
 119 #define ND_INTEL_SMART_INJECT_SHUTDOWN          (1 << 3)
 120
 121 struct nd_intel_smart {
 122         __u32 status;
 123         union {
 124                 struct {
 125                         __u32 flags;
 126                         __u8 reserved0[4];
 127                         __u8 health;
 128                         __u8 spares;
 129                         __u8 life_used;
 130                         __u8 alarm_flags;
 131                         __u16 media_temperature;
 132                         __u16 ctrl_temperature;
 133                         __u32 shutdown_count;
 134                         __u8 ait_status;
 135                         __u16 pmic_temperature;
 136                         __u8 reserved1[8];
 137                         __u8 shutdown_state;
 138                         __u32 vendor_size;
 139                         __u8 vendor_data[92];
 140                 } __packed;
 141                 __u8 data[128];
 142         };
 143 } __packed;
 144
 145 struct nd_intel_smart_threshold {
 146         __u32 status;
 147         union {
 148                 struct {
 149                         __u16 alarm_control;
 150                         __u8 spares;
 151                         __u16 media_temperature;
 152                         __u16 ctrl_temperature;
 153                         __u8 reserved[1];
 154                 } __packed;
 155                 __u8 data[8];
 156         };
 157 } __packed;
 158
 159 struct nd_intel_smart_set_threshold {
 160         __u16 alarm_control;
 161         __u8 spares;
 162         __u16 media_temperature;
 163         __u16 ctrl_temperature;
 164         __u32 status;
 165 } __packed;
 166
 167 struct nd_intel_smart_inject {
 168         __u64 flags;
 169         __u8 mtemp_enable;
 170         __u16 media_temperature;
 171         __u8 spare_enable;
 172         __u8 spares;
 173         __u8 fatal_enable;
 174         __u8 unsafe_shutdown_enable;
 175         __u32 status;
 176 } __packed;
 177
 178 #define INTEL_FW_STORAGE_SIZE           0x100000
 179 #define INTEL_FW_MAX_SEND_LEN           0xFFEC
 180 #define INTEL_FW_QUERY_INTERVAL         250000
 181 #define INTEL_FW_QUERY_MAX_TIME         3000000
 182 #define INTEL_FW_FIS_VERSION            0x0105
 183 #define INTEL_FW_FAKE_VERSION           0xffffffffabcd
 184
 185 enum intel_fw_update_state {
 186         FW_STATE_NEW = 0,
 187         FW_STATE_IN_PROGRESS,
 188         FW_STATE_VERIFY,
 189         FW_STATE_UPDATED,
 190 };
 191
 192 struct nd_intel_fw_info {
 193         __u32 status;
 194         __u32 storage_size;
 195         __u32 max_send_len;
 196         __u32 query_interval;
 197         __u32 max_query_time;
 198         __u8 update_cap;
 199         __u8 reserved[3];
 200         __u32 fis_version;
 201         __u64 run_version;
 202         __u64 updated_version;
 203 } __packed;
 204
 205 struct nd_intel_fw_start {
 206         __u32 status;
 207         __u32 context;
 208 } __packed;
 209
 210 /* this one has the output first because the variable input data size */
 211 struct nd_intel_fw_send_data {
 212         __u32 context;
 213         __u32 offset;
 214         __u32 length;
 215         __u8 data[0];
 216 /* this field is not declared due ot variable data from input */
 217 /*      __u32 status; */
 218 } __packed;
 219
 220 struct nd_intel_fw_finish_update {
 221         __u8 ctrl_flags;
 222         __u8 reserved[3];
 223         __u32 context;
 224         __u32 status;
 225 } __packed;
 226
 227 struct nd_intel_fw_finish_query {
 228         __u32 context;
 229         __u32 status;
 230         __u64 updated_fw_rev;
 231 } __packed;
 232
 233 struct nd_intel_lss {
 234         __u8 enable;
 235         __u32 status;
 236 } __packed;
 237
 238 typedef struct nfit_test_resource *(*nfit_test_lookup_fn)(resource_size_t);
 239 typedef union acpi_object *(*nfit_test_evaluate_dsm_fn)(acpi_handle handle,
 240                  const guid_t *guid, u64 rev, u64 func,
 241                  union acpi_object *argv4);
 242 void __iomem *__wrap_ioremap_nocache(resource_size_t offset,
 243                 unsigned long size);
 244 void __wrap_iounmap(volatile void __iomem *addr);
 245 void nfit_test_setup(nfit_test_lookup_fn lookup,
 246                 nfit_test_evaluate_dsm_fn evaluate);
 247 void nfit_test_teardown(void);
 248 struct nfit_test_resource *get_nfit_res(resource_size_t resource);
 249 #endif