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1 <?xml version="1.0" encoding="UTF-8"?>
2 <!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
3 "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
5 <book id="libataDevGuide">
6 <bookinfo>
7 <title>libATA Developer's Guide</title>
9 <authorgroup>
10 <author>
11 <firstname>Jeff</firstname>
12 <surname>Garzik</surname>
13 </author>
14 </authorgroup>
16 <copyright>
17 <year>2003-2006</year>
18 <holder>Jeff Garzik</holder>
19 </copyright>
21 <legalnotice>
22 <para>
23 The contents of this file are subject to the Open
24 Software License version 1.1 that can be found at
25 <ulink url="http://www.opensource.org/licenses/osl-1.1.txt">http://www.opensource.org/licenses/osl-1.1.txt</ulink> and is included herein
26 by reference.
27 </para>
29 <para>
30 Alternatively, the contents of this file may be used under the terms
31 of the GNU General Public License version 2 (the "GPL") as distributed
32 in the kernel source COPYING file, in which case the provisions of
33 the GPL are applicable instead of the above. If you wish to allow
34 the use of your version of this file only under the terms of the
35 GPL and not to allow others to use your version of this file under
36 the OSL, indicate your decision by deleting the provisions above and
37 replace them with the notice and other provisions required by the GPL.
38 If you do not delete the provisions above, a recipient may use your
39 version of this file under either the OSL or the GPL.
40 </para>
42 </legalnotice>
43 </bookinfo>
45 <toc></toc>
47 <chapter id="libataIntroduction">
48 <title>Introduction</title>
49 <para>
50 libATA is a library used inside the Linux kernel to support ATA host
51 controllers and devices. libATA provides an ATA driver API, class
52 transports for ATA and ATAPI devices, and SCSI&lt;-&gt;ATA translation
53 for ATA devices according to the T10 SAT specification.
54 </para>
55 <para>
56 This Guide documents the libATA driver API, library functions, library
57 internals, and a couple sample ATA low-level drivers.
58 </para>
59 </chapter>
61 <chapter id="libataDriverApi">
62 <title>libata Driver API</title>
63 <para>
64 struct ata_port_operations is defined for every low-level libata
65 hardware driver, and it controls how the low-level driver
66 interfaces with the ATA and SCSI layers.
67 </para>
68 <para>
69 FIS-based drivers will hook into the system with ->qc_prep() and
70 ->qc_issue() high-level hooks. Hardware which behaves in a manner
71 similar to PCI IDE hardware may utilize several generic helpers,
72 defining at a bare minimum the bus I/O addresses of the ATA shadow
73 register blocks.
74 </para>
75 <sect1>
76 <title>struct ata_port_operations</title>
78 <sect2><title>Disable ATA port</title>
79 <programlisting>
80 void (*port_disable) (struct ata_port *);
81 </programlisting>
83 <para>
84 Called from ata_bus_probe() and ata_bus_reset() error paths,
85 as well as when unregistering from the SCSI module (rmmod, hot
86 unplug).
87 This function should do whatever needs to be done to take the
88 port out of use. In most cases, ata_port_disable() can be used
89 as this hook.
90 </para>
91 <para>
92 Called from ata_bus_probe() on a failed probe.
93 Called from ata_bus_reset() on a failed bus reset.
94 Called from ata_scsi_release().
95 </para>
97 </sect2>
99 <sect2><title>Post-IDENTIFY device configuration</title>
100 <programlisting>
101 void (*dev_config) (struct ata_port *, struct ata_device *);
102 </programlisting>
104 <para>
105 Called after IDENTIFY [PACKET] DEVICE is issued to each device
106 found. Typically used to apply device-specific fixups prior to
107 issue of SET FEATURES - XFER MODE, and prior to operation.
108 </para>
109 <para>
110 Called by ata_device_add() after ata_dev_identify() determines
111 a device is present.
112 </para>
113 <para>
114 This entry may be specified as NULL in ata_port_operations.
115 </para>
117 </sect2>
119 <sect2><title>Set PIO/DMA mode</title>
120 <programlisting>
121 void (*set_piomode) (struct ata_port *, struct ata_device *);
122 void (*set_dmamode) (struct ata_port *, struct ata_device *);
123 void (*post_set_mode) (struct ata_port *);
124 unsigned int (*mode_filter) (struct ata_port *, struct ata_device *, unsigned int);
125 </programlisting>
127 <para>
128 Hooks called prior to the issue of SET FEATURES - XFER MODE
129 command. The optional ->mode_filter() hook is called when libata
130 has built a mask of the possible modes. This is passed to the
131 ->mode_filter() function which should return a mask of valid modes
132 after filtering those unsuitable due to hardware limits. It is not
133 valid to use this interface to add modes.
134 </para>
135 <para>
136 dev->pio_mode and dev->dma_mode are guaranteed to be valid when
137 ->set_piomode() and when ->set_dmamode() is called. The timings for
138 any other drive sharing the cable will also be valid at this point.
139 That is the library records the decisions for the modes of each
140 drive on a channel before it attempts to set any of them.
141 </para>
142 <para>
143 ->post_set_mode() is
144 called unconditionally, after the SET FEATURES - XFER MODE
145 command completes successfully.
146 </para>
148 <para>
149 ->set_piomode() is always called (if present), but
150 ->set_dma_mode() is only called if DMA is possible.
151 </para>
153 </sect2>
155 <sect2><title>Taskfile read/write</title>
156 <programlisting>
157 void (*tf_load) (struct ata_port *ap, struct ata_taskfile *tf);
158 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
159 </programlisting>
161 <para>
162 ->tf_load() is called to load the given taskfile into hardware
163 registers / DMA buffers. ->tf_read() is called to read the
164 hardware registers / DMA buffers, to obtain the current set of
165 taskfile register values.
166 Most drivers for taskfile-based hardware (PIO or MMIO) use
167 ata_tf_load() and ata_tf_read() for these hooks.
168 </para>
170 </sect2>
172 <sect2><title>PIO data read/write</title>
173 <programlisting>
174 void (*data_xfer) (struct ata_device *, unsigned char *, unsigned int, int);
175 </programlisting>
177 <para>
178 All bmdma-style drivers must implement this hook. This is the low-level
179 operation that actually copies the data bytes during a PIO data
180 transfer.
181 Typically the driver
182 will choose one of ata_pio_data_xfer_noirq(), ata_pio_data_xfer(), or
183 ata_mmio_data_xfer().
184 </para>
186 </sect2>
188 <sect2><title>ATA command execute</title>
189 <programlisting>
190 void (*exec_command)(struct ata_port *ap, struct ata_taskfile *tf);
191 </programlisting>
193 <para>
194 causes an ATA command, previously loaded with
195 ->tf_load(), to be initiated in hardware.
196 Most drivers for taskfile-based hardware use ata_exec_command()
197 for this hook.
198 </para>
200 </sect2>
202 <sect2><title>Per-cmd ATAPI DMA capabilities filter</title>
203 <programlisting>
204 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
205 </programlisting>
207 <para>
208 Allow low-level driver to filter ATA PACKET commands, returning a status
209 indicating whether or not it is OK to use DMA for the supplied PACKET
210 command.
211 </para>
212 <para>
213 This hook may be specified as NULL, in which case libata will
214 assume that atapi dma can be supported.
215 </para>
217 </sect2>
219 <sect2><title>Read specific ATA shadow registers</title>
220 <programlisting>
221 u8 (*check_status)(struct ata_port *ap);
222 u8 (*check_altstatus)(struct ata_port *ap);
223 </programlisting>
225 <para>
226 Reads the Status/AltStatus ATA shadow register from
227 hardware. On some hardware, reading the Status register has
228 the side effect of clearing the interrupt condition.
229 Most drivers for taskfile-based hardware use
230 ata_check_status() for this hook.
231 </para>
232 <para>
233 Note that because this is called from ata_device_add(), at
234 least a dummy function that clears device interrupts must be
235 provided for all drivers, even if the controller doesn't
236 actually have a taskfile status register.
237 </para>
239 </sect2>
241 <sect2><title>Select ATA device on bus</title>
242 <programlisting>
243 void (*dev_select)(struct ata_port *ap, unsigned int device);
244 </programlisting>
246 <para>
247 Issues the low-level hardware command(s) that causes one of N
248 hardware devices to be considered 'selected' (active and
249 available for use) on the ATA bus. This generally has no
250 meaning on FIS-based devices.
251 </para>
252 <para>
253 Most drivers for taskfile-based hardware use
254 ata_std_dev_select() for this hook. Controllers which do not
255 support second drives on a port (such as SATA contollers) will
256 use ata_noop_dev_select().
257 </para>
259 </sect2>
261 <sect2><title>Private tuning method</title>
262 <programlisting>
263 void (*set_mode) (struct ata_port *ap);
264 </programlisting>
266 <para>
267 By default libata performs drive and controller tuning in
268 accordance with the ATA timing rules and also applies blacklists
269 and cable limits. Some controllers need special handling and have
270 custom tuning rules, typically raid controllers that use ATA
271 commands but do not actually do drive timing.
272 </para>
274 <warning>
275 <para>
276 This hook should not be used to replace the standard controller
277 tuning logic when a controller has quirks. Replacing the default
278 tuning logic in that case would bypass handling for drive and
279 bridge quirks that may be important to data reliability. If a
280 controller needs to filter the mode selection it should use the
281 mode_filter hook instead.
282 </para>
283 </warning>
285 </sect2>
287 <sect2><title>Control PCI IDE BMDMA engine</title>
288 <programlisting>
289 void (*bmdma_setup) (struct ata_queued_cmd *qc);
290 void (*bmdma_start) (struct ata_queued_cmd *qc);
291 void (*bmdma_stop) (struct ata_port *ap);
292 u8 (*bmdma_status) (struct ata_port *ap);
293 </programlisting>
295 <para>
296 When setting up an IDE BMDMA transaction, these hooks arm
297 (->bmdma_setup), fire (->bmdma_start), and halt (->bmdma_stop)
298 the hardware's DMA engine. ->bmdma_status is used to read the standard
299 PCI IDE DMA Status register.
300 </para>
302 <para>
303 These hooks are typically either no-ops, or simply not implemented, in
304 FIS-based drivers.
305 </para>
306 <para>
307 Most legacy IDE drivers use ata_bmdma_setup() for the bmdma_setup()
308 hook. ata_bmdma_setup() will write the pointer to the PRD table to
309 the IDE PRD Table Address register, enable DMA in the DMA Command
310 register, and call exec_command() to begin the transfer.
311 </para>
312 <para>
313 Most legacy IDE drivers use ata_bmdma_start() for the bmdma_start()
314 hook. ata_bmdma_start() will write the ATA_DMA_START flag to the DMA
315 Command register.
316 </para>
317 <para>
318 Many legacy IDE drivers use ata_bmdma_stop() for the bmdma_stop()
319 hook. ata_bmdma_stop() clears the ATA_DMA_START flag in the DMA
320 command register.
321 </para>
322 <para>
323 Many legacy IDE drivers use ata_bmdma_status() as the bmdma_status() hook.
324 </para>
326 </sect2>
328 <sect2><title>High-level taskfile hooks</title>
329 <programlisting>
330 void (*qc_prep) (struct ata_queued_cmd *qc);
331 int (*qc_issue) (struct ata_queued_cmd *qc);
332 </programlisting>
334 <para>
335 Higher-level hooks, these two hooks can potentially supercede
336 several of the above taskfile/DMA engine hooks. ->qc_prep is
337 called after the buffers have been DMA-mapped, and is typically
338 used to populate the hardware's DMA scatter-gather table.
339 Most drivers use the standard ata_qc_prep() helper function, but
340 more advanced drivers roll their own.
341 </para>
342 <para>
343 ->qc_issue is used to make a command active, once the hardware
344 and S/G tables have been prepared. IDE BMDMA drivers use the
345 helper function ata_qc_issue_prot() for taskfile protocol-based
346 dispatch. More advanced drivers implement their own ->qc_issue.
347 </para>
348 <para>
349 ata_qc_issue_prot() calls ->tf_load(), ->bmdma_setup(), and
350 ->bmdma_start() as necessary to initiate a transfer.
351 </para>
353 </sect2>
355 <sect2><title>Exception and probe handling (EH)</title>
356 <programlisting>
357 void (*eng_timeout) (struct ata_port *ap);
358 void (*phy_reset) (struct ata_port *ap);
359 </programlisting>
361 <para>
362 Deprecated. Use ->error_handler() instead.
363 </para>
365 <programlisting>
366 void (*freeze) (struct ata_port *ap);
367 void (*thaw) (struct ata_port *ap);
368 </programlisting>
370 <para>
371 ata_port_freeze() is called when HSM violations or some other
372 condition disrupts normal operation of the port. A frozen port
373 is not allowed to perform any operation until the port is
374 thawed, which usually follows a successful reset.
375 </para>
377 <para>
378 The optional ->freeze() callback can be used for freezing the port
379 hardware-wise (e.g. mask interrupt and stop DMA engine). If a
380 port cannot be frozen hardware-wise, the interrupt handler
381 must ack and clear interrupts unconditionally while the port
382 is frozen.
383 </para>
384 <para>
385 The optional ->thaw() callback is called to perform the opposite of ->freeze():
386 prepare the port for normal operation once again. Unmask interrupts,
387 start DMA engine, etc.
388 </para>
390 <programlisting>
391 void (*error_handler) (struct ata_port *ap);
392 </programlisting>
394 <para>
395 ->error_handler() is a driver's hook into probe, hotplug, and recovery
396 and other exceptional conditions. The primary responsibility of an
397 implementation is to call ata_do_eh() or ata_bmdma_drive_eh() with a set
398 of EH hooks as arguments:
399 </para>
401 <para>
402 'prereset' hook (may be NULL) is called during an EH reset, before any other actions
403 are taken.
404 </para>
406 <para>
407 'postreset' hook (may be NULL) is called after the EH reset is performed. Based on
408 existing conditions, severity of the problem, and hardware capabilities,
409 </para>
411 <para>
412 Either 'softreset' (may be NULL) or 'hardreset' (may be NULL) will be
413 called to perform the low-level EH reset.
414 </para>
416 <programlisting>
417 void (*post_internal_cmd) (struct ata_queued_cmd *qc);
418 </programlisting>
420 <para>
421 Perform any hardware-specific actions necessary to finish processing
422 after executing a probe-time or EH-time command via ata_exec_internal().
423 </para>
425 </sect2>
427 <sect2><title>Hardware interrupt handling</title>
428 <programlisting>
429 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
430 void (*irq_clear) (struct ata_port *);
431 </programlisting>
433 <para>
434 ->irq_handler is the interrupt handling routine registered with
435 the system, by libata. ->irq_clear is called during probe just
436 before the interrupt handler is registered, to be sure hardware
437 is quiet.
438 </para>
439 <para>
440 The second argument, dev_instance, should be cast to a pointer
441 to struct ata_host_set.
442 </para>
443 <para>
444 Most legacy IDE drivers use ata_interrupt() for the
445 irq_handler hook, which scans all ports in the host_set,
446 determines which queued command was active (if any), and calls
447 ata_host_intr(ap,qc).
448 </para>
449 <para>
450 Most legacy IDE drivers use ata_bmdma_irq_clear() for the
451 irq_clear() hook, which simply clears the interrupt and error
452 flags in the DMA status register.
453 </para>
455 </sect2>
457 <sect2><title>SATA phy read/write</title>
458 <programlisting>
459 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
460 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
461 u32 val);
462 </programlisting>
464 <para>
465 Read and write standard SATA phy registers. Currently only used
466 if ->phy_reset hook called the sata_phy_reset() helper function.
467 sc_reg is one of SCR_STATUS, SCR_CONTROL, SCR_ERROR, or SCR_ACTIVE.
468 </para>
470 </sect2>
472 <sect2><title>Init and shutdown</title>
473 <programlisting>
474 int (*port_start) (struct ata_port *ap);
475 void (*port_stop) (struct ata_port *ap);
476 void (*host_stop) (struct ata_host_set *host_set);
477 </programlisting>
479 <para>
480 ->port_start() is called just after the data structures for each
481 port are initialized. Typically this is used to alloc per-port
482 DMA buffers / tables / rings, enable DMA engines, and similar
483 tasks. Some drivers also use this entry point as a chance to
484 allocate driver-private memory for ap->private_data.
485 </para>
486 <para>
487 Many drivers use ata_port_start() as this hook or call
488 it from their own port_start() hooks. ata_port_start()
489 allocates space for a legacy IDE PRD table and returns.
490 </para>
491 <para>
492 ->port_stop() is called after ->host_stop(). It's sole function
493 is to release DMA/memory resources, now that they are no longer
494 actively being used. Many drivers also free driver-private
495 data from port at this time.
496 </para>
497 <para>
498 Many drivers use ata_port_stop() as this hook, which frees the
499 PRD table.
500 </para>
501 <para>
502 ->host_stop() is called after all ->port_stop() calls
503 have completed. The hook must finalize hardware shutdown, release DMA
504 and other resources, etc.
505 This hook may be specified as NULL, in which case it is not called.
506 </para>
508 </sect2>
510 </sect1>
511 </chapter>
513 <chapter id="libataEH">
514 <title>Error handling</title>
516 <para>
517 This chapter describes how errors are handled under libata.
518 Readers are advised to read SCSI EH
519 (Documentation/scsi/scsi_eh.txt) and ATA exceptions doc first.
520 </para>
522 <sect1><title>Origins of commands</title>
523 <para>
524 In libata, a command is represented with struct ata_queued_cmd
525 or qc. qc's are preallocated during port initialization and
526 repetitively used for command executions. Currently only one
527 qc is allocated per port but yet-to-be-merged NCQ branch
528 allocates one for each tag and maps each qc to NCQ tag 1-to-1.
529 </para>
530 <para>
531 libata commands can originate from two sources - libata itself
532 and SCSI midlayer. libata internal commands are used for
533 initialization and error handling. All normal blk requests
534 and commands for SCSI emulation are passed as SCSI commands
535 through queuecommand callback of SCSI host template.
536 </para>
537 </sect1>
539 <sect1><title>How commands are issued</title>
541 <variablelist>
543 <varlistentry><term>Internal commands</term>
544 <listitem>
545 <para>
546 First, qc is allocated and initialized using
547 ata_qc_new_init(). Although ata_qc_new_init() doesn't
548 implement any wait or retry mechanism when qc is not
549 available, internal commands are currently issued only during
550 initialization and error recovery, so no other command is
551 active and allocation is guaranteed to succeed.
552 </para>
553 <para>
554 Once allocated qc's taskfile is initialized for the command to
555 be executed. qc currently has two mechanisms to notify
556 completion. One is via qc->complete_fn() callback and the
557 other is completion qc->waiting. qc->complete_fn() callback
558 is the asynchronous path used by normal SCSI translated
559 commands and qc->waiting is the synchronous (issuer sleeps in
560 process context) path used by internal commands.
561 </para>
562 <para>
563 Once initialization is complete, host_set lock is acquired
564 and the qc is issued.
565 </para>
566 </listitem>
567 </varlistentry>
569 <varlistentry><term>SCSI commands</term>
570 <listitem>
571 <para>
572 All libata drivers use ata_scsi_queuecmd() as
573 hostt->queuecommand callback. scmds can either be simulated
574 or translated. No qc is involved in processing a simulated
575 scmd. The result is computed right away and the scmd is
576 completed.
577 </para>
578 <para>
579 For a translated scmd, ata_qc_new_init() is invoked to
580 allocate a qc and the scmd is translated into the qc. SCSI
581 midlayer's completion notification function pointer is stored
582 into qc->scsidone.
583 </para>
584 <para>
585 qc->complete_fn() callback is used for completion
586 notification. ATA commands use ata_scsi_qc_complete() while
587 ATAPI commands use atapi_qc_complete(). Both functions end up
588 calling qc->scsidone to notify upper layer when the qc is
589 finished. After translation is completed, the qc is issued
590 with ata_qc_issue().
591 </para>
592 <para>
593 Note that SCSI midlayer invokes hostt->queuecommand while
594 holding host_set lock, so all above occur while holding
595 host_set lock.
596 </para>
597 </listitem>
598 </varlistentry>
600 </variablelist>
601 </sect1>
603 <sect1><title>How commands are processed</title>
604 <para>
605 Depending on which protocol and which controller are used,
606 commands are processed differently. For the purpose of
607 discussion, a controller which uses taskfile interface and all
608 standard callbacks is assumed.
609 </para>
610 <para>
611 Currently 6 ATA command protocols are used. They can be
612 sorted into the following four categories according to how
613 they are processed.
614 </para>
616 <variablelist>
617 <varlistentry><term>ATA NO DATA or DMA</term>
618 <listitem>
619 <para>
620 ATA_PROT_NODATA and ATA_PROT_DMA fall into this category.
621 These types of commands don't require any software
622 intervention once issued. Device will raise interrupt on
623 completion.
624 </para>
625 </listitem>
626 </varlistentry>
628 <varlistentry><term>ATA PIO</term>
629 <listitem>
630 <para>
631 ATA_PROT_PIO is in this category. libata currently
632 implements PIO with polling. ATA_NIEN bit is set to turn
633 off interrupt and pio_task on ata_wq performs polling and
635 </para>
636 </listitem>
637 </varlistentry>
639 <varlistentry><term>ATAPI NODATA or DMA</term>
640 <listitem>
641 <para>
642 ATA_PROT_ATAPI_NODATA and ATA_PROT_ATAPI_DMA are in this
643 category. packet_task is used to poll BSY bit after
644 issuing PACKET command. Once BSY is turned off by the
645 device, packet_task transfers CDB and hands off processing
646 to interrupt handler.
647 </para>
648 </listitem>
649 </varlistentry>
651 <varlistentry><term>ATAPI PIO</term>
652 <listitem>
653 <para>
654 ATA_PROT_ATAPI is in this category. ATA_NIEN bit is set
655 and, as in ATAPI NODATA or DMA, packet_task submits cdb.
656 However, after submitting cdb, further processing (data
657 transfer) is handed off to pio_task.
658 </para>
659 </listitem>
660 </varlistentry>
661 </variablelist>
662 </sect1>
664 <sect1><title>How commands are completed</title>
665 <para>
666 Once issued, all qc's are either completed with
667 ata_qc_complete() or time out. For commands which are handled
668 by interrupts, ata_host_intr() invokes ata_qc_complete(), and,
669 for PIO tasks, pio_task invokes ata_qc_complete(). In error
670 cases, packet_task may also complete commands.
671 </para>
672 <para>
673 ata_qc_complete() does the following.
674 </para>
676 <orderedlist>
678 <listitem>
679 <para>
680 DMA memory is unmapped.
681 </para>
682 </listitem>
684 <listitem>
685 <para>
686 ATA_QCFLAG_ACTIVE is clared from qc->flags.
687 </para>
688 </listitem>
690 <listitem>
691 <para>
692 qc->complete_fn() callback is invoked. If the return value of
693 the callback is not zero. Completion is short circuited and
694 ata_qc_complete() returns.
695 </para>
696 </listitem>
698 <listitem>
699 <para>
700 __ata_qc_complete() is called, which does
701 <orderedlist>
703 <listitem>
704 <para>
705 qc->flags is cleared to zero.
706 </para>
707 </listitem>
709 <listitem>
710 <para>
711 ap->active_tag and qc->tag are poisoned.
712 </para>
713 </listitem>
715 <listitem>
716 <para>
717 qc->waiting is claread &amp; completed (in that order).
718 </para>
719 </listitem>
721 <listitem>
722 <para>
723 qc is deallocated by clearing appropriate bit in ap->qactive.
724 </para>
725 </listitem>
727 </orderedlist>
728 </para>
729 </listitem>
731 </orderedlist>
733 <para>
734 So, it basically notifies upper layer and deallocates qc. One
735 exception is short-circuit path in #3 which is used by
736 atapi_qc_complete().
737 </para>
738 <para>
739 For all non-ATAPI commands, whether it fails or not, almost
740 the same code path is taken and very little error handling
741 takes place. A qc is completed with success status if it
742 succeeded, with failed status otherwise.
743 </para>
744 <para>
745 However, failed ATAPI commands require more handling as
746 REQUEST SENSE is needed to acquire sense data. If an ATAPI
747 command fails, ata_qc_complete() is invoked with error status,
748 which in turn invokes atapi_qc_complete() via
749 qc->complete_fn() callback.
750 </para>
751 <para>
752 This makes atapi_qc_complete() set scmd->result to
753 SAM_STAT_CHECK_CONDITION, complete the scmd and return 1. As
754 the sense data is empty but scmd->result is CHECK CONDITION,
755 SCSI midlayer will invoke EH for the scmd, and returning 1
756 makes ata_qc_complete() to return without deallocating the qc.
757 This leads us to ata_scsi_error() with partially completed qc.
758 </para>
760 </sect1>
762 <sect1><title>ata_scsi_error()</title>
763 <para>
764 ata_scsi_error() is the current transportt->eh_strategy_handler()
765 for libata. As discussed above, this will be entered in two
766 cases - timeout and ATAPI error completion. This function
767 calls low level libata driver's eng_timeout() callback, the
768 standard callback for which is ata_eng_timeout(). It checks
769 if a qc is active and calls ata_qc_timeout() on the qc if so.
770 Actual error handling occurs in ata_qc_timeout().
771 </para>
772 <para>
773 If EH is invoked for timeout, ata_qc_timeout() stops BMDMA and
774 completes the qc. Note that as we're currently in EH, we
775 cannot call scsi_done. As described in SCSI EH doc, a
776 recovered scmd should be either retried with
777 scsi_queue_insert() or finished with scsi_finish_command().
778 Here, we override qc->scsidone with scsi_finish_command() and
779 calls ata_qc_complete().
780 </para>
781 <para>
782 If EH is invoked due to a failed ATAPI qc, the qc here is
783 completed but not deallocated. The purpose of this
784 half-completion is to use the qc as place holder to make EH
785 code reach this place. This is a bit hackish, but it works.
786 </para>
787 <para>
788 Once control reaches here, the qc is deallocated by invoking
789 __ata_qc_complete() explicitly. Then, internal qc for REQUEST
790 SENSE is issued. Once sense data is acquired, scmd is
791 finished by directly invoking scsi_finish_command() on the
792 scmd. Note that as we already have completed and deallocated
793 the qc which was associated with the scmd, we don't need
794 to/cannot call ata_qc_complete() again.
795 </para>
797 </sect1>
799 <sect1><title>Problems with the current EH</title>
801 <itemizedlist>
803 <listitem>
804 <para>
805 Error representation is too crude. Currently any and all
806 error conditions are represented with ATA STATUS and ERROR
807 registers. Errors which aren't ATA device errors are treated
808 as ATA device errors by setting ATA_ERR bit. Better error
809 descriptor which can properly represent ATA and other
810 errors/exceptions is needed.
811 </para>
812 </listitem>
814 <listitem>
815 <para>
816 When handling timeouts, no action is taken to make device
817 forget about the timed out command and ready for new commands.
818 </para>
819 </listitem>
821 <listitem>
822 <para>
823 EH handling via ata_scsi_error() is not properly protected
824 from usual command processing. On EH entrance, the device is
825 not in quiescent state. Timed out commands may succeed or
826 fail any time. pio_task and atapi_task may still be running.
827 </para>
828 </listitem>
830 <listitem>
831 <para>
832 Too weak error recovery. Devices / controllers causing HSM
833 mismatch errors and other errors quite often require reset to
834 return to known state. Also, advanced error handling is
835 necessary to support features like NCQ and hotplug.
836 </para>
837 </listitem>
839 <listitem>
840 <para>
841 ATA errors are directly handled in the interrupt handler and
842 PIO errors in pio_task. This is problematic for advanced
843 error handling for the following reasons.
844 </para>
845 <para>
846 First, advanced error handling often requires context and
847 internal qc execution.
848 </para>
849 <para>
850 Second, even a simple failure (say, CRC error) needs
851 information gathering and could trigger complex error handling
852 (say, resetting &amp; reconfiguring). Having multiple code
853 paths to gather information, enter EH and trigger actions
854 makes life painful.
855 </para>
856 <para>
857 Third, scattered EH code makes implementing low level drivers
858 difficult. Low level drivers override libata callbacks. If
859 EH is scattered over several places, each affected callbacks
860 should perform its part of error handling. This can be error
861 prone and painful.
862 </para>
863 </listitem>
865 </itemizedlist>
866 </sect1>
867 </chapter>
869 <chapter id="libataExt">
870 <title>libata Library</title>
871 !Edrivers/ata/libata-core.c
872 </chapter>
874 <chapter id="libataInt">
875 <title>libata Core Internals</title>
876 !Idrivers/ata/libata-core.c
877 </chapter>
879 <chapter id="libataScsiInt">
880 <title>libata SCSI translation/emulation</title>
881 !Edrivers/ata/libata-scsi.c
882 !Idrivers/ata/libata-scsi.c
883 </chapter>
885 <chapter id="ataExceptions">
886 <title>ATA errors &amp; exceptions</title>
888 <para>
889 This chapter tries to identify what error/exception conditions exist
890 for ATA/ATAPI devices and describe how they should be handled in
891 implementation-neutral way.
892 </para>
894 <para>
895 The term 'error' is used to describe conditions where either an
896 explicit error condition is reported from device or a command has
897 timed out.
898 </para>
900 <para>
901 The term 'exception' is either used to describe exceptional
902 conditions which are not errors (say, power or hotplug events), or
903 to describe both errors and non-error exceptional conditions. Where
904 explicit distinction between error and exception is necessary, the
905 term 'non-error exception' is used.
906 </para>
908 <sect1 id="excat">
909 <title>Exception categories</title>
910 <para>
911 Exceptions are described primarily with respect to legacy
912 taskfile + bus master IDE interface. If a controller provides
913 other better mechanism for error reporting, mapping those into
914 categories described below shouldn't be difficult.
915 </para>
917 <para>
918 In the following sections, two recovery actions - reset and
919 reconfiguring transport - are mentioned. These are described
920 further in <xref linkend="exrec"/>.
921 </para>
923 <sect2 id="excatHSMviolation">
924 <title>HSM violation</title>
925 <para>
926 This error is indicated when STATUS value doesn't match HSM
927 requirement during issuing or excution any ATA/ATAPI command.
928 </para>
930 <itemizedlist>
931 <title>Examples</title>
933 <listitem>
934 <para>
935 ATA_STATUS doesn't contain !BSY &amp;&amp; DRDY &amp;&amp; !DRQ while trying
936 to issue a command.
937 </para>
938 </listitem>
940 <listitem>
941 <para>
942 !BSY &amp;&amp; !DRQ during PIO data transfer.
943 </para>
944 </listitem>
946 <listitem>
947 <para>
948 DRQ on command completion.
949 </para>
950 </listitem>
952 <listitem>
953 <para>
954 !BSY &amp;&amp; ERR after CDB tranfer starts but before the
955 last byte of CDB is transferred. ATA/ATAPI standard states
956 that &quot;The device shall not terminate the PACKET command
957 with an error before the last byte of the command packet has
958 been written&quot; in the error outputs description of PACKET
959 command and the state diagram doesn't include such
960 transitions.
961 </para>
962 </listitem>
964 </itemizedlist>
966 <para>
967 In these cases, HSM is violated and not much information
968 regarding the error can be acquired from STATUS or ERROR
969 register. IOW, this error can be anything - driver bug,
970 faulty device, controller and/or cable.
971 </para>
973 <para>
974 As HSM is violated, reset is necessary to restore known state.
975 Reconfiguring transport for lower speed might be helpful too
976 as transmission errors sometimes cause this kind of errors.
977 </para>
978 </sect2>
980 <sect2 id="excatDevErr">
981 <title>ATA/ATAPI device error (non-NCQ / non-CHECK CONDITION)</title>
983 <para>
984 These are errors detected and reported by ATA/ATAPI devices
985 indicating device problems. For this type of errors, STATUS
986 and ERROR register values are valid and describe error
987 condition. Note that some of ATA bus errors are detected by
988 ATA/ATAPI devices and reported using the same mechanism as
989 device errors. Those cases are described later in this
990 section.
991 </para>
993 <para>
994 For ATA commands, this type of errors are indicated by !BSY
995 &amp;&amp; ERR during command execution and on completion.
996 </para>
998 <para>For ATAPI commands,</para>
1000 <itemizedlist>
1002 <listitem>
1003 <para>
1004 !BSY &amp;&amp; ERR &amp;&amp; ABRT right after issuing PACKET
1005 indicates that PACKET command is not supported and falls in
1006 this category.
1007 </para>
1008 </listitem>
1010 <listitem>
1011 <para>
1012 !BSY &amp;&amp; ERR(==CHK) &amp;&amp; !ABRT after the last
1013 byte of CDB is transferred indicates CHECK CONDITION and
1014 doesn't fall in this category.
1015 </para>
1016 </listitem>
1018 <listitem>
1019 <para>
1020 !BSY &amp;&amp; ERR(==CHK) &amp;&amp; ABRT after the last byte
1021 of CDB is transferred *probably* indicates CHECK CONDITION and
1022 doesn't fall in this category.
1023 </para>
1024 </listitem>
1026 </itemizedlist>
1028 <para>
1029 Of errors detected as above, the followings are not ATA/ATAPI
1030 device errors but ATA bus errors and should be handled
1031 according to <xref linkend="excatATAbusErr"/>.
1032 </para>
1034 <variablelist>
1036 <varlistentry>
1037 <term>CRC error during data transfer</term>
1038 <listitem>
1039 <para>
1040 This is indicated by ICRC bit in the ERROR register and
1041 means that corruption occurred during data transfer. Upto
1042 ATA/ATAPI-7, the standard specifies that this bit is only
1043 applicable to UDMA transfers but ATA/ATAPI-8 draft revision
1044 1f says that the bit may be applicable to multiword DMA and
1045 PIO.
1046 </para>
1047 </listitem>
1048 </varlistentry>
1050 <varlistentry>
1051 <term>ABRT error during data transfer or on completion</term>
1052 <listitem>
1053 <para>
1054 Upto ATA/ATAPI-7, the standard specifies that ABRT could be
1055 set on ICRC errors and on cases where a device is not able
1056 to complete a command. Combined with the fact that MWDMA
1057 and PIO transfer errors aren't allowed to use ICRC bit upto
1058 ATA/ATAPI-7, it seems to imply that ABRT bit alone could
1059 indicate tranfer errors.
1060 </para>
1061 <para>
1062 However, ATA/ATAPI-8 draft revision 1f removes the part
1063 that ICRC errors can turn on ABRT. So, this is kind of
1064 gray area. Some heuristics are needed here.
1065 </para>
1066 </listitem>
1067 </varlistentry>
1069 </variablelist>
1071 <para>
1072 ATA/ATAPI device errors can be further categorized as follows.
1073 </para>
1075 <variablelist>
1077 <varlistentry>
1078 <term>Media errors</term>
1079 <listitem>
1080 <para>
1081 This is indicated by UNC bit in the ERROR register. ATA
1082 devices reports UNC error only after certain number of
1083 retries cannot recover the data, so there's nothing much
1084 else to do other than notifying upper layer.
1085 </para>
1086 <para>
1087 READ and WRITE commands report CHS or LBA of the first
1088 failed sector but ATA/ATAPI standard specifies that the
1089 amount of transferred data on error completion is
1090 indeterminate, so we cannot assume that sectors preceding
1091 the failed sector have been transferred and thus cannot
1092 complete those sectors successfully as SCSI does.
1093 </para>
1094 </listitem>
1095 </varlistentry>
1097 <varlistentry>
1098 <term>Media changed / media change requested error</term>
1099 <listitem>
1100 <para>
1101 &lt;&lt;TODO: fill here&gt;&gt;
1102 </para>
1103 </listitem>
1104 </varlistentry>
1106 <varlistentry><term>Address error</term>
1107 <listitem>
1108 <para>
1109 This is indicated by IDNF bit in the ERROR register.
1110 Report to upper layer.
1111 </para>
1112 </listitem>
1113 </varlistentry>
1115 <varlistentry><term>Other errors</term>
1116 <listitem>
1117 <para>
1118 This can be invalid command or parameter indicated by ABRT
1119 ERROR bit or some other error condition. Note that ABRT
1120 bit can indicate a lot of things including ICRC and Address
1121 errors. Heuristics needed.
1122 </para>
1123 </listitem>
1124 </varlistentry>
1126 </variablelist>
1128 <para>
1129 Depending on commands, not all STATUS/ERROR bits are
1130 applicable. These non-applicable bits are marked with
1131 &quot;na&quot; in the output descriptions but upto ATA/ATAPI-7
1132 no definition of &quot;na&quot; can be found. However,
1133 ATA/ATAPI-8 draft revision 1f describes &quot;N/A&quot; as
1134 follows.
1135 </para>
1137 <blockquote>
1138 <variablelist>
1139 <varlistentry><term>3.2.3.3a N/A</term>
1140 <listitem>
1141 <para>
1142 A keyword the indicates a field has no defined value in
1143 this standard and should not be checked by the host or
1144 device. N/A fields should be cleared to zero.
1145 </para>
1146 </listitem>
1147 </varlistentry>
1148 </variablelist>
1149 </blockquote>
1151 <para>
1152 So, it seems reasonable to assume that &quot;na&quot; bits are
1153 cleared to zero by devices and thus need no explicit masking.
1154 </para>
1156 </sect2>
1158 <sect2 id="excatATAPIcc">
1159 <title>ATAPI device CHECK CONDITION</title>
1161 <para>
1162 ATAPI device CHECK CONDITION error is indicated by set CHK bit
1163 (ERR bit) in the STATUS register after the last byte of CDB is
1164 transferred for a PACKET command. For this kind of errors,
1165 sense data should be acquired to gather information regarding
1166 the errors. REQUEST SENSE packet command should be used to
1167 acquire sense data.
1168 </para>
1170 <para>
1171 Once sense data is acquired, this type of errors can be
1172 handled similary to other SCSI errors. Note that sense data
1173 may indicate ATA bus error (e.g. Sense Key 04h HARDWARE ERROR
1174 &amp;&amp; ASC/ASCQ 47h/00h SCSI PARITY ERROR). In such
1175 cases, the error should be considered as an ATA bus error and
1176 handled according to <xref linkend="excatATAbusErr"/>.
1177 </para>
1179 </sect2>
1181 <sect2 id="excatNCQerr">
1182 <title>ATA device error (NCQ)</title>
1184 <para>
1185 NCQ command error is indicated by cleared BSY and set ERR bit
1186 during NCQ command phase (one or more NCQ commands
1187 outstanding). Although STATUS and ERROR registers will
1188 contain valid values describing the error, READ LOG EXT is
1189 required to clear the error condition, determine which command
1190 has failed and acquire more information.
1191 </para>
1193 <para>
1194 READ LOG EXT Log Page 10h reports which tag has failed and
1195 taskfile register values describing the error. With this
1196 information the failed command can be handled as a normal ATA
1197 command error as in <xref linkend="excatDevErr"/> and all
1198 other in-flight commands must be retried. Note that this
1199 retry should not be counted - it's likely that commands
1200 retried this way would have completed normally if it were not
1201 for the failed command.
1202 </para>
1204 <para>
1205 Note that ATA bus errors can be reported as ATA device NCQ
1206 errors. This should be handled as described in <xref
1207 linkend="excatATAbusErr"/>.
1208 </para>
1210 <para>
1211 If READ LOG EXT Log Page 10h fails or reports NQ, we're
1212 thoroughly screwed. This condition should be treated
1213 according to <xref linkend="excatHSMviolation"/>.
1214 </para>
1216 </sect2>
1218 <sect2 id="excatATAbusErr">
1219 <title>ATA bus error</title>
1221 <para>
1222 ATA bus error means that data corruption occurred during
1223 transmission over ATA bus (SATA or PATA). This type of errors
1224 can be indicated by
1225 </para>
1227 <itemizedlist>
1229 <listitem>
1230 <para>
1231 ICRC or ABRT error as described in <xref linkend="excatDevErr"/>.
1232 </para>
1233 </listitem>
1235 <listitem>
1236 <para>
1237 Controller-specific error completion with error information
1238 indicating transmission error.
1239 </para>
1240 </listitem>
1242 <listitem>
1243 <para>
1244 On some controllers, command timeout. In this case, there may
1245 be a mechanism to determine that the timeout is due to
1246 transmission error.
1247 </para>
1248 </listitem>
1250 <listitem>
1251 <para>
1252 Unknown/random errors, timeouts and all sorts of weirdities.
1253 </para>
1254 </listitem>
1256 </itemizedlist>
1258 <para>
1259 As described above, transmission errors can cause wide variety
1260 of symptoms ranging from device ICRC error to random device
1261 lockup, and, for many cases, there is no way to tell if an
1262 error condition is due to transmission error or not;
1263 therefore, it's necessary to employ some kind of heuristic
1264 when dealing with errors and timeouts. For example,
1265 encountering repetitive ABRT errors for known supported
1266 command is likely to indicate ATA bus error.
1267 </para>
1269 <para>
1270 Once it's determined that ATA bus errors have possibly
1271 occurred, lowering ATA bus transmission speed is one of
1272 actions which may alleviate the problem. See <xref
1273 linkend="exrecReconf"/> for more information.
1274 </para>
1276 </sect2>
1278 <sect2 id="excatPCIbusErr">
1279 <title>PCI bus error</title>
1281 <para>
1282 Data corruption or other failures during transmission over PCI
1283 (or other system bus). For standard BMDMA, this is indicated
1284 by Error bit in the BMDMA Status register. This type of
1285 errors must be logged as it indicates something is very wrong
1286 with the system. Resetting host controller is recommended.
1287 </para>
1289 </sect2>
1291 <sect2 id="excatLateCompletion">
1292 <title>Late completion</title>
1294 <para>
1295 This occurs when timeout occurs and the timeout handler finds
1296 out that the timed out command has completed successfully or
1297 with error. This is usually caused by lost interrupts. This
1298 type of errors must be logged. Resetting host controller is
1299 recommended.
1300 </para>
1302 </sect2>
1304 <sect2 id="excatUnknown">
1305 <title>Unknown error (timeout)</title>
1307 <para>
1308 This is when timeout occurs and the command is still
1309 processing or the host and device are in unknown state. When
1310 this occurs, HSM could be in any valid or invalid state. To
1311 bring the device to known state and make it forget about the
1312 timed out command, resetting is necessary. The timed out
1313 command may be retried.
1314 </para>
1316 <para>
1317 Timeouts can also be caused by transmission errors. Refer to
1318 <xref linkend="excatATAbusErr"/> for more details.
1319 </para>
1321 </sect2>
1323 <sect2 id="excatHoplugPM">
1324 <title>Hotplug and power management exceptions</title>
1326 <para>
1327 &lt;&lt;TODO: fill here&gt;&gt;
1328 </para>
1330 </sect2>
1332 </sect1>
1334 <sect1 id="exrec">
1335 <title>EH recovery actions</title>
1337 <para>
1338 This section discusses several important recovery actions.
1339 </para>
1341 <sect2 id="exrecClr">
1342 <title>Clearing error condition</title>
1344 <para>
1345 Many controllers require its error registers to be cleared by
1346 error handler. Different controllers may have different
1347 requirements.
1348 </para>
1350 <para>
1351 For SATA, it's strongly recommended to clear at least SError
1352 register during error handling.
1353 </para>
1354 </sect2>
1356 <sect2 id="exrecRst">
1357 <title>Reset</title>
1359 <para>
1360 During EH, resetting is necessary in the following cases.
1361 </para>
1363 <itemizedlist>
1365 <listitem>
1366 <para>
1367 HSM is in unknown or invalid state
1368 </para>
1369 </listitem>
1371 <listitem>
1372 <para>
1373 HBA is in unknown or invalid state
1374 </para>
1375 </listitem>
1377 <listitem>
1378 <para>
1379 EH needs to make HBA/device forget about in-flight commands
1380 </para>
1381 </listitem>
1383 <listitem>
1384 <para>
1385 HBA/device behaves weirdly
1386 </para>
1387 </listitem>
1389 </itemizedlist>
1391 <para>
1392 Resetting during EH might be a good idea regardless of error
1393 condition to improve EH robustness. Whether to reset both or
1394 either one of HBA and device depends on situation but the
1395 following scheme is recommended.
1396 </para>
1398 <itemizedlist>
1400 <listitem>
1401 <para>
1402 When it's known that HBA is in ready state but ATA/ATAPI
1403 device is in unknown state, reset only device.
1404 </para>
1405 </listitem>
1407 <listitem>
1408 <para>
1409 If HBA is in unknown state, reset both HBA and device.
1410 </para>
1411 </listitem>
1413 </itemizedlist>
1415 <para>
1416 HBA resetting is implementation specific. For a controller
1417 complying to taskfile/BMDMA PCI IDE, stopping active DMA
1418 transaction may be sufficient iff BMDMA state is the only HBA
1419 context. But even mostly taskfile/BMDMA PCI IDE complying
1420 controllers may have implementation specific requirements and
1421 mechanism to reset themselves. This must be addressed by
1422 specific drivers.
1423 </para>
1425 <para>
1426 OTOH, ATA/ATAPI standard describes in detail ways to reset
1427 ATA/ATAPI devices.
1428 </para>
1430 <variablelist>
1432 <varlistentry><term>PATA hardware reset</term>
1433 <listitem>
1434 <para>
1435 This is hardware initiated device reset signalled with
1436 asserted PATA RESET- signal. There is no standard way to
1437 initiate hardware reset from software although some
1438 hardware provides registers that allow driver to directly
1439 tweak the RESET- signal.
1440 </para>
1441 </listitem>
1442 </varlistentry>
1444 <varlistentry><term>Software reset</term>
1445 <listitem>
1446 <para>
1447 This is achieved by turning CONTROL SRST bit on for at
1448 least 5us. Both PATA and SATA support it but, in case of
1449 SATA, this may require controller-specific support as the
1450 second Register FIS to clear SRST should be transmitted
1451 while BSY bit is still set. Note that on PATA, this resets
1452 both master and slave devices on a channel.
1453 </para>
1454 </listitem>
1455 </varlistentry>
1457 <varlistentry><term>EXECUTE DEVICE DIAGNOSTIC command</term>
1458 <listitem>
1459 <para>
1460 Although ATA/ATAPI standard doesn't describe exactly, EDD
1461 implies some level of resetting, possibly similar level
1462 with software reset. Host-side EDD protocol can be handled
1463 with normal command processing and most SATA controllers
1464 should be able to handle EDD's just like other commands.
1465 As in software reset, EDD affects both devices on a PATA
1466 bus.
1467 </para>
1468 <para>
1469 Although EDD does reset devices, this doesn't suit error
1470 handling as EDD cannot be issued while BSY is set and it's
1471 unclear how it will act when device is in unknown/weird
1472 state.
1473 </para>
1474 </listitem>
1475 </varlistentry>
1477 <varlistentry><term>ATAPI DEVICE RESET command</term>
1478 <listitem>
1479 <para>
1480 This is very similar to software reset except that reset
1481 can be restricted to the selected device without affecting
1482 the other device sharing the cable.
1483 </para>
1484 </listitem>
1485 </varlistentry>
1487 <varlistentry><term>SATA phy reset</term>
1488 <listitem>
1489 <para>
1490 This is the preferred way of resetting a SATA device. In
1491 effect, it's identical to PATA hardware reset. Note that
1492 this can be done with the standard SCR Control register.
1493 As such, it's usually easier to implement than software
1494 reset.
1495 </para>
1496 </listitem>
1497 </varlistentry>
1499 </variablelist>
1501 <para>
1502 One more thing to consider when resetting devices is that
1503 resetting clears certain configuration parameters and they
1504 need to be set to their previous or newly adjusted values
1505 after reset.
1506 </para>
1508 <para>
1509 Parameters affected are.
1510 </para>
1512 <itemizedlist>
1514 <listitem>
1515 <para>
1516 CHS set up with INITIALIZE DEVICE PARAMETERS (seldomly used)
1517 </para>
1518 </listitem>
1520 <listitem>
1521 <para>
1522 Parameters set with SET FEATURES including transfer mode setting
1523 </para>
1524 </listitem>
1526 <listitem>
1527 <para>
1528 Block count set with SET MULTIPLE MODE
1529 </para>
1530 </listitem>
1532 <listitem>
1533 <para>
1534 Other parameters (SET MAX, MEDIA LOCK...)
1535 </para>
1536 </listitem>
1538 </itemizedlist>
1540 <para>
1541 ATA/ATAPI standard specifies that some parameters must be
1542 maintained across hardware or software reset, but doesn't
1543 strictly specify all of them. Always reconfiguring needed
1544 parameters after reset is required for robustness. Note that
1545 this also applies when resuming from deep sleep (power-off).
1546 </para>
1548 <para>
1549 Also, ATA/ATAPI standard requires that IDENTIFY DEVICE /
1550 IDENTIFY PACKET DEVICE is issued after any configuration
1551 parameter is updated or a hardware reset and the result used
1552 for further operation. OS driver is required to implement
1553 revalidation mechanism to support this.
1554 </para>
1556 </sect2>
1558 <sect2 id="exrecReconf">
1559 <title>Reconfigure transport</title>
1561 <para>
1562 For both PATA and SATA, a lot of corners are cut for cheap
1563 connectors, cables or controllers and it's quite common to see
1564 high transmission error rate. This can be mitigated by
1565 lowering transmission speed.
1566 </para>
1568 <para>
1569 The following is a possible scheme Jeff Garzik suggested.
1570 </para>
1572 <blockquote>
1573 <para>
1574 If more than $N (3?) transmission errors happen in 15 minutes,
1575 </para>
1576 <itemizedlist>
1577 <listitem>
1578 <para>
1579 if SATA, decrease SATA PHY speed. if speed cannot be decreased,
1580 </para>
1581 </listitem>
1582 <listitem>
1583 <para>
1584 decrease UDMA xfer speed. if at UDMA0, switch to PIO4,
1585 </para>
1586 </listitem>
1587 <listitem>
1588 <para>
1589 decrease PIO xfer speed. if at PIO3, complain, but continue
1590 </para>
1591 </listitem>
1592 </itemizedlist>
1593 </blockquote>
1595 </sect2>
1597 </sect1>
1599 </chapter>
1601 <chapter id="PiixInt">
1602 <title>ata_piix Internals</title>
1603 !Idrivers/ata/ata_piix.c
1604 </chapter>
1606 <chapter id="SILInt">
1607 <title>sata_sil Internals</title>
1608 !Idrivers/ata/sata_sil.c
1609 </chapter>
1611 <chapter id="libataThanks">
1612 <title>Thanks</title>
1613 <para>
1614 The bulk of the ATA knowledge comes thanks to long conversations with
1615 Andre Hedrick (www.linux-ide.org), and long hours pondering the ATA
1616 and SCSI specifications.
1617 </para>
1618 <para>
1619 Thanks to Alan Cox for pointing out similarities
1620 between SATA and SCSI, and in general for motivation to hack on
1621 libata.
1622 </para>
1623 <para>
1624 libata's device detection
1625 method, ata_pio_devchk, and in general all the early probing was
1626 based on extensive study of Hale Landis's probe/reset code in his
1627 ATADRVR driver (www.ata-atapi.com).
1628 </para>
1629 </chapter>
1631 </book>