1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #ifndef __ASM_UACCESS_ASM_H__
4 #define __ASM_UACCESS_ASM_H__
6 #include <asm/asm-offsets.h>
7 #include <asm/domain.h>
8 #include <asm/memory.h>
9 #include <asm/thread_info.h>
12 #ifdef CONFIG_THUMB2_KERNEL
19 .macro check_uaccess
, addr
:req
, size
:req
, limit
:req
, tmp
:req
, bad
:req
20 #ifndef CONFIG_CPU_USE_DOMAINS
21 adds
\tmp
, \addr
, #\size - 1
22 sbcscc
\tmp
, \tmp
, \limit
24 #ifdef CONFIG_CPU_SPECTRE
31 .macro uaccess_mask_range_ptr
, addr
:req
, size
:req
, limit
:req
, tmp
:req
32 #ifdef CONFIG_CPU_SPECTRE
34 subs
\tmp
, \tmp
, \addr @ tmp
= limit
- 1 - addr
35 addhs
\tmp
, \tmp
, #1 @ if (tmp >= 0) {
36 subshs
\tmp
, \tmp
, \size @ tmp
= limit
- (addr
+ size
) }
37 movlo
\addr
, #0 @ if (tmp < 0) addr = NULL
42 .macro uaccess_disable
, tmp
, isb
=1
43 #ifdef CONFIG_CPU_SW_DOMAIN_PAN
45 * Whenever we re-enter userspace, the domains should always be
48 mov
\tmp
, #DACR_UACCESS_DISABLE
49 mcr p15
, 0, \tmp
, c3
, c0
, 0 @ Set domain
register
56 .macro uaccess_enable
, tmp
, isb
=1
57 #ifdef CONFIG_CPU_SW_DOMAIN_PAN
59 * Whenever we re-enter userspace, the domains should always be
62 mov
\tmp
, #DACR_UACCESS_ENABLE
63 mcr p15
, 0, \tmp
, c3
, c0
, 0
70 #if defined(CONFIG_CPU_SW_DOMAIN_PAN) || defined(CONFIG_CPU_USE_DOMAINS)
77 * Save the address limit on entry to a privileged exception.
79 * If we are using the DACR for kernel access by the user accessors
80 * (CONFIG_CPU_USE_DOMAINS=y), always reset the DACR kernel domain
81 * back to client mode, whether or not \disable is set.
83 * If we are using SW PAN, set the DACR user domain to no access
86 .macro uaccess_entry
, tsk
, tmp0
, tmp1
, tmp2
, disable
87 ldr
\tmp
1, [\tsk
, #TI_ADDR_LIMIT]
89 str
\tmp
2, [\tsk
, #TI_ADDR_LIMIT]
90 DACR( mrc p15
, 0, \tmp
0, c3
, c0
, 0)
91 DACR( str
\tmp
0, [sp
, #SVC_DACR])
92 str
\tmp
1, [sp
, #SVC_ADDR_LIMIT]
93 .if \disable
&& IS_ENABLED(CONFIG_CPU_SW_DOMAIN_PAN
)
94 /* kernel=client, user=no access */
95 mov
\tmp
2, #DACR_UACCESS_DISABLE
96 mcr p15
, 0, \tmp
2, c3
, c0
, 0
98 .elseif
IS_ENABLED(CONFIG_CPU_USE_DOMAINS
)
100 bic
\tmp
2, \tmp
0, #domain_mask(DOMAIN_KERNEL)
101 orr
\tmp
2, \tmp
2, #domain_val(DOMAIN_KERNEL, DOMAIN_CLIENT)
102 mcr p15
, 0, \tmp
2, c3
, c0
, 0
107 /* Restore the user access state previously saved by uaccess_entry */
108 .macro uaccess_exit
, tsk
, tmp0
, tmp1
109 ldr
\tmp
1, [sp
, #SVC_ADDR_LIMIT]
110 DACR( ldr
\tmp
0, [sp
, #SVC_DACR])
111 str
\tmp
1, [\tsk
, #TI_ADDR_LIMIT]
112 DACR( mcr p15
, 0, \tmp
0, c3
, c0
, 0)
117 #endif /* __ASM_UACCESS_ASM_H__ */