1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/lib/csumpartialcopygeneric.S
5 * Copyright (C) 1995-2001 Russell King
7 #include <asm/assembler.h>
11 * csum_partial_copy_xxx(const char *src, char *dst, int len, int sum, )
12 * r0 = src, r1 = dst, r2 = len, r3 = sum
13 * Returns : r0 = checksum
15 * Note that 'tst' and 'teq' preserve the carry flag.
27 * Align an unaligned destination pointer. We know that
28 * we have >= 8 bytes here, so we don't need to check
29 * the length. Note that the source pointer hasn't been
38 adcs sum, sum, ip, put_byte_1 @ update checksum
41 reteq lr @ dst is now 32bit aligned
43 .Ldst_16bit: load2b r8, ip
45 adcs sum, sum, r8, put_byte_0
47 adcs sum, sum, ip, put_byte_1
49 ret lr @ dst is now 32bit aligned
52 * Handle 0 to 7 bytes, with any alignment of source and
53 * destination pointers. Note that when we get here, C = 0
55 .Lless8: teq len, #0 @ check for zero count
58 /* we must have at least one byte. */
59 tst dst, #1 @ dst 16-bit aligned
65 adcs sum, sum, ip, put_byte_1 @ update checksum
72 adcs sum, sum, r8, put_byte_0
74 adcs sum, sum, ip, put_byte_1
83 adcs sum, sum, r8, put_byte_0 @ update checksum
91 cmp len, #8 @ Ensure that we have at least
92 blo .Lless8 @ 8 bytes to copy.
94 adds sum, sum, #0 @ C = 0
95 tst dst, #3 @ Test destination alignment
96 blne .Ldst_unaligned @ align destination, return here
99 * Ok, the dst pointer is now 32bit aligned, and we know
100 * that we must have more than 4 bytes to copy. Note
101 * that C contains the carry from the dst alignment above.
104 tst src, #3 @ Test source alignment
105 bne .Lsrc_not_aligned
107 /* Routine for src & dst aligned */
112 1: load4l r4, r5, r6, r7
113 stmia dst!, {r4, r5, r6, r7}
141 mov r5, r4, get_byte_0
143 adcs sum, sum, r4, lspush #16
145 mov r5, r4, get_byte_1
147 mov r5, r4, get_byte_2
151 adcsne sum, sum, r5, put_byte_0
154 * If the dst pointer was not 16-bit aligned, we
155 * need to rotate the checksum here to get around
156 * the inefficient byte manipulations in the
157 * architecture independent code.
159 .Ldone: adc r0, sum, #0
160 ldr sum, [sp, #0] @ dst
166 adc sum, sum, #0 @ include C from dst alignment
173 mov r4, r5, lspull #8 @ C = 0
176 1: load4l r5, r6, r7, r8
177 orr r4, r4, r5, lspush #24
178 mov r5, r5, lspull #8
179 orr r5, r5, r6, lspush #24
180 mov r6, r6, lspull #8
181 orr r6, r6, r7, lspush #24
182 mov r7, r7, lspull #8
183 orr r7, r7, r8, lspush #24
184 stmia dst!, {r4, r5, r6, r7}
189 mov r4, r8, lspull #8
198 orr r4, r4, r5, lspush #24
199 mov r5, r5, lspull #8
200 orr r5, r5, r6, lspush #24
204 mov r4, r6, lspull #8
208 orr r4, r4, r5, lspush #24
211 mov r4, r5, lspull #8
214 mov r5, r4, get_byte_0
217 adcs sum, sum, r4, lspush #16
219 mov r5, r4, get_byte_1
221 mov r5, r4, get_byte_2
224 .Lsrc2_aligned: mov r4, r5, lspull #16
228 1: load4l r5, r6, r7, r8
229 orr r4, r4, r5, lspush #16
230 mov r5, r5, lspull #16
231 orr r5, r5, r6, lspush #16
232 mov r6, r6, lspull #16
233 orr r6, r6, r7, lspush #16
234 mov r7, r7, lspull #16
235 orr r7, r7, r8, lspush #16
236 stmia dst!, {r4, r5, r6, r7}
241 mov r4, r8, lspull #16
250 orr r4, r4, r5, lspush #16
251 mov r5, r5, lspull #16
252 orr r5, r5, r6, lspush #16
256 mov r4, r6, lspull #16
260 orr r4, r4, r5, lspush #16
263 mov r4, r5, lspull #16
266 mov r5, r4, get_byte_0
271 mov r5, r4, get_byte_1
278 .Lsrc3_aligned: mov r4, r5, lspull #24
282 1: load4l r5, r6, r7, r8
283 orr r4, r4, r5, lspush #8
284 mov r5, r5, lspull #24
285 orr r5, r5, r6, lspush #8
286 mov r6, r6, lspull #24
287 orr r6, r6, r7, lspush #8
288 mov r7, r7, lspull #24
289 orr r7, r7, r8, lspush #8
290 stmia dst!, {r4, r5, r6, r7}
295 mov r4, r8, lspull #24
304 orr r4, r4, r5, lspush #8
305 mov r5, r5, lspull #24
306 orr r5, r5, r6, lspush #8
310 mov r4, r6, lspull #24
314 orr r4, r4, r5, lspush #8
317 mov r4, r5, lspull #24
320 mov r5, r4, get_byte_0
326 mov r5, r4, get_byte_0
328 adcs sum, sum, r4, lspush #24
329 mov r5, r4, get_byte_1