Merge tag 'sched-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel...
[linux/fpc-iii.git] / arch / arm / mach-s3c / pm-gpio.c
blobcfdbc23379988d2e75d290b63899d65eb153a264
1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // Copyright 2008 Openmoko, Inc.
4 // Copyright 2008 Simtec Electronics
5 // Ben Dooks <ben@simtec.co.uk>
6 // http://armlinux.simtec.co.uk/
7 //
8 // S3C series GPIO PM code
10 #include <linux/kernel.h>
11 #include <linux/device.h>
12 #include <linux/init.h>
13 #include <linux/io.h>
14 #include <linux/gpio.h>
16 #include "gpio-samsung.h"
18 #include "gpio-core.h"
19 #include "pm.h"
21 /* PM GPIO helpers */
23 #define OFFS_CON (0x00)
24 #define OFFS_DAT (0x04)
25 #define OFFS_UP (0x08)
27 static void samsung_gpio_pm_1bit_save(struct samsung_gpio_chip *chip)
29 chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON);
30 chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT);
33 static void samsung_gpio_pm_1bit_resume(struct samsung_gpio_chip *chip)
35 void __iomem *base = chip->base;
36 u32 old_gpcon = __raw_readl(base + OFFS_CON);
37 u32 old_gpdat = __raw_readl(base + OFFS_DAT);
38 u32 gps_gpcon = chip->pm_save[0];
39 u32 gps_gpdat = chip->pm_save[1];
40 u32 gpcon;
42 /* GPACON only has one bit per control / data and no PULLUPs.
43 * GPACON[x] = 0 => Output, 1 => SFN */
45 /* first set all SFN bits to SFN */
47 gpcon = old_gpcon | gps_gpcon;
48 __raw_writel(gpcon, base + OFFS_CON);
50 /* now set all the other bits */
52 __raw_writel(gps_gpdat, base + OFFS_DAT);
53 __raw_writel(gps_gpcon, base + OFFS_CON);
55 S3C_PMDBG("%s: CON %08x => %08x, DAT %08x => %08x\n",
56 chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat);
59 struct samsung_gpio_pm samsung_gpio_pm_1bit = {
60 .save = samsung_gpio_pm_1bit_save,
61 .resume = samsung_gpio_pm_1bit_resume,
64 static void samsung_gpio_pm_2bit_save(struct samsung_gpio_chip *chip)
66 chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON);
67 chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT);
68 chip->pm_save[2] = __raw_readl(chip->base + OFFS_UP);
71 /* Test whether the given masked+shifted bits of an GPIO configuration
72 * are one of the SFN (special function) modes. */
74 static inline int is_sfn(unsigned long con)
76 return con >= 2;
79 /* Test if the given masked+shifted GPIO configuration is an input */
81 static inline int is_in(unsigned long con)
83 return con == 0;
86 /* Test if the given masked+shifted GPIO configuration is an output */
88 static inline int is_out(unsigned long con)
90 return con == 1;
93 /**
94 * samsung_gpio_pm_2bit_resume() - restore the given GPIO bank
95 * @chip: The chip information to resume.
97 * Restore one of the GPIO banks that was saved during suspend. This is
98 * not as simple as once thought, due to the possibility of glitches
99 * from the order that the CON and DAT registers are set in.
101 * The three states the pin can be are {IN,OUT,SFN} which gives us 9
102 * combinations of changes to check. Three of these, if the pin stays
103 * in the same configuration can be discounted. This leaves us with
104 * the following:
106 * { IN => OUT } Change DAT first
107 * { IN => SFN } Change CON first
108 * { OUT => SFN } Change CON first, so new data will not glitch
109 * { OUT => IN } Change CON first, so new data will not glitch
110 * { SFN => IN } Change CON first
111 * { SFN => OUT } Change DAT first, so new data will not glitch [1]
113 * We do not currently deal with the UP registers as these control
114 * weak resistors, so a small delay in change should not need to bring
115 * these into the calculations.
117 * [1] this assumes that writing to a pin DAT whilst in SFN will set the
118 * state for when it is next output.
120 static void samsung_gpio_pm_2bit_resume(struct samsung_gpio_chip *chip)
122 void __iomem *base = chip->base;
123 u32 old_gpcon = __raw_readl(base + OFFS_CON);
124 u32 old_gpdat = __raw_readl(base + OFFS_DAT);
125 u32 gps_gpcon = chip->pm_save[0];
126 u32 gps_gpdat = chip->pm_save[1];
127 u32 gpcon, old, new, mask;
128 u32 change_mask = 0x0;
129 int nr;
131 /* restore GPIO pull-up settings */
132 __raw_writel(chip->pm_save[2], base + OFFS_UP);
134 /* Create a change_mask of all the items that need to have
135 * their CON value changed before their DAT value, so that
136 * we minimise the work between the two settings.
139 for (nr = 0, mask = 0x03; nr < 32; nr += 2, mask <<= 2) {
140 old = (old_gpcon & mask) >> nr;
141 new = (gps_gpcon & mask) >> nr;
143 /* If there is no change, then skip */
145 if (old == new)
146 continue;
148 /* If both are special function, then skip */
150 if (is_sfn(old) && is_sfn(new))
151 continue;
153 /* Change is IN => OUT, do not change now */
155 if (is_in(old) && is_out(new))
156 continue;
158 /* Change is SFN => OUT, do not change now */
160 if (is_sfn(old) && is_out(new))
161 continue;
163 /* We should now be at the case of IN=>SFN,
164 * OUT=>SFN, OUT=>IN, SFN=>IN. */
166 change_mask |= mask;
170 /* Write the new CON settings */
172 gpcon = old_gpcon & ~change_mask;
173 gpcon |= gps_gpcon & change_mask;
175 __raw_writel(gpcon, base + OFFS_CON);
177 /* Now change any items that require DAT,CON */
179 __raw_writel(gps_gpdat, base + OFFS_DAT);
180 __raw_writel(gps_gpcon, base + OFFS_CON);
182 S3C_PMDBG("%s: CON %08x => %08x, DAT %08x => %08x\n",
183 chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat);
186 struct samsung_gpio_pm samsung_gpio_pm_2bit = {
187 .save = samsung_gpio_pm_2bit_save,
188 .resume = samsung_gpio_pm_2bit_resume,
191 #if defined(CONFIG_ARCH_S3C64XX)
192 static void samsung_gpio_pm_4bit_save(struct samsung_gpio_chip *chip)
194 chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON);
195 chip->pm_save[2] = __raw_readl(chip->base + OFFS_DAT);
196 chip->pm_save[3] = __raw_readl(chip->base + OFFS_UP);
198 if (chip->chip.ngpio > 8)
199 chip->pm_save[0] = __raw_readl(chip->base - 4);
202 static u32 samsung_gpio_pm_4bit_mask(u32 old_gpcon, u32 gps_gpcon)
204 u32 old, new, mask;
205 u32 change_mask = 0x0;
206 int nr;
208 for (nr = 0, mask = 0x0f; nr < 16; nr += 4, mask <<= 4) {
209 old = (old_gpcon & mask) >> nr;
210 new = (gps_gpcon & mask) >> nr;
212 /* If there is no change, then skip */
214 if (old == new)
215 continue;
217 /* If both are special function, then skip */
219 if (is_sfn(old) && is_sfn(new))
220 continue;
222 /* Change is IN => OUT, do not change now */
224 if (is_in(old) && is_out(new))
225 continue;
227 /* Change is SFN => OUT, do not change now */
229 if (is_sfn(old) && is_out(new))
230 continue;
232 /* We should now be at the case of IN=>SFN,
233 * OUT=>SFN, OUT=>IN, SFN=>IN. */
235 change_mask |= mask;
238 return change_mask;
241 static void samsung_gpio_pm_4bit_con(struct samsung_gpio_chip *chip, int index)
243 void __iomem *con = chip->base + (index * 4);
244 u32 old_gpcon = __raw_readl(con);
245 u32 gps_gpcon = chip->pm_save[index + 1];
246 u32 gpcon, mask;
248 mask = samsung_gpio_pm_4bit_mask(old_gpcon, gps_gpcon);
250 gpcon = old_gpcon & ~mask;
251 gpcon |= gps_gpcon & mask;
253 __raw_writel(gpcon, con);
256 static void samsung_gpio_pm_4bit_resume(struct samsung_gpio_chip *chip)
258 void __iomem *base = chip->base;
259 u32 old_gpcon[2];
260 u32 old_gpdat = __raw_readl(base + OFFS_DAT);
261 u32 gps_gpdat = chip->pm_save[2];
263 /* First, modify the CON settings */
265 old_gpcon[0] = 0;
266 old_gpcon[1] = __raw_readl(base + OFFS_CON);
268 samsung_gpio_pm_4bit_con(chip, 0);
269 if (chip->chip.ngpio > 8) {
270 old_gpcon[0] = __raw_readl(base - 4);
271 samsung_gpio_pm_4bit_con(chip, -1);
274 /* Now change the configurations that require DAT,CON */
276 __raw_writel(chip->pm_save[2], base + OFFS_DAT);
277 __raw_writel(chip->pm_save[1], base + OFFS_CON);
278 if (chip->chip.ngpio > 8)
279 __raw_writel(chip->pm_save[0], base - 4);
281 __raw_writel(chip->pm_save[2], base + OFFS_DAT);
282 __raw_writel(chip->pm_save[3], base + OFFS_UP);
284 if (chip->chip.ngpio > 8) {
285 S3C_PMDBG("%s: CON4 %08x,%08x => %08x,%08x, DAT %08x => %08x\n",
286 chip->chip.label, old_gpcon[0], old_gpcon[1],
287 __raw_readl(base - 4),
288 __raw_readl(base + OFFS_CON),
289 old_gpdat, gps_gpdat);
290 } else
291 S3C_PMDBG("%s: CON4 %08x => %08x, DAT %08x => %08x\n",
292 chip->chip.label, old_gpcon[1],
293 __raw_readl(base + OFFS_CON),
294 old_gpdat, gps_gpdat);
297 struct samsung_gpio_pm samsung_gpio_pm_4bit = {
298 .save = samsung_gpio_pm_4bit_save,
299 .resume = samsung_gpio_pm_4bit_resume,
301 #endif /* CONFIG_ARCH_S3C64XX */
304 * samsung_pm_save_gpio() - save gpio chip data for suspend
305 * @ourchip: The chip for suspend.
307 static void samsung_pm_save_gpio(struct samsung_gpio_chip *ourchip)
309 struct samsung_gpio_pm *pm = ourchip->pm;
311 if (pm == NULL || pm->save == NULL)
312 S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label);
313 else
314 pm->save(ourchip);
318 * samsung_pm_save_gpios() - Save the state of the GPIO banks.
320 * For all the GPIO banks, save the state of each one ready for going
321 * into a suspend mode.
323 void samsung_pm_save_gpios(void)
325 struct samsung_gpio_chip *ourchip;
326 unsigned int gpio_nr;
328 for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) {
329 ourchip = samsung_gpiolib_getchip(gpio_nr);
330 if (!ourchip) {
331 gpio_nr++;
332 continue;
335 samsung_pm_save_gpio(ourchip);
337 S3C_PMDBG("%s: save %08x,%08x,%08x,%08x\n",
338 ourchip->chip.label,
339 ourchip->pm_save[0],
340 ourchip->pm_save[1],
341 ourchip->pm_save[2],
342 ourchip->pm_save[3]);
344 gpio_nr += ourchip->chip.ngpio;
345 gpio_nr += CONFIG_S3C_GPIO_SPACE;
350 * samsung_pm_resume_gpio() - restore gpio chip data after suspend
351 * @ourchip: The suspended chip.
353 static void samsung_pm_resume_gpio(struct samsung_gpio_chip *ourchip)
355 struct samsung_gpio_pm *pm = ourchip->pm;
357 if (pm == NULL || pm->resume == NULL)
358 S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label);
359 else
360 pm->resume(ourchip);
363 void samsung_pm_restore_gpios(void)
365 struct samsung_gpio_chip *ourchip;
366 unsigned int gpio_nr;
368 for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) {
369 ourchip = samsung_gpiolib_getchip(gpio_nr);
370 if (!ourchip) {
371 gpio_nr++;
372 continue;
375 samsung_pm_resume_gpio(ourchip);
377 gpio_nr += ourchip->chip.ngpio;
378 gpio_nr += CONFIG_S3C_GPIO_SPACE;