1 // SPDX-License-Identifier: GPL-2.0
3 * Virtual DMA allocation
5 * (C) 1999 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
7 * 11/26/2000 -- disabled the existing code because it didn't work for
8 * me in 2.4. Replaced with a significantly more primitive version
9 * similar to the sun3 code. the old functionality was probably more
10 * desirable, but.... -- Sam Creasey (sammy@oh.verio.com)
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/bitops.h>
18 #include <linux/memblock.h>
19 #include <linux/vmalloc.h>
21 #include <asm/sun3x.h>
25 #include <asm/tlbflush.h>
29 #define IOMMU_ADDR_MASK 0x03ffe000
30 #define IOMMU_CACHE_INHIBIT 0x00000040
31 #define IOMMU_FULL_BLOCK 0x00000020
32 #define IOMMU_MODIFIED 0x00000010
33 #define IOMMU_USED 0x00000008
34 #define IOMMU_WRITE_PROTECT 0x00000004
35 #define IOMMU_DT_MASK 0x00000003
36 #define IOMMU_DT_INVALID 0x00000000
37 #define IOMMU_DT_VALID 0x00000001
38 #define IOMMU_DT_BAD 0x00000002
41 static volatile unsigned long *iommu_pte
= (unsigned long *)SUN3X_IOMMU
;
44 #define dvma_entry_paddr(index) (iommu_pte[index] & IOMMU_ADDR_MASK)
45 #define dvma_entry_vaddr(index,paddr) ((index << DVMA_PAGE_SHIFT) | \
46 (paddr & (DVMA_PAGE_SIZE-1)))
48 #define dvma_entry_set(index,addr) (iommu_pte[index] = \
49 (addr & IOMMU_ADDR_MASK) | \
50 IOMMU_DT_VALID | IOMMU_CACHE_INHIBIT)
52 #define dvma_entry_set(index,addr) (iommu_pte[index] = \
53 (addr & IOMMU_ADDR_MASK) | \
56 #define dvma_entry_clr(index) (iommu_pte[index] = IOMMU_DT_INVALID)
57 #define dvma_entry_hash(addr) ((addr >> DVMA_PAGE_SHIFT) ^ \
58 ((addr & 0x03c00000) >> \
62 /* code to print out a dvma mapping for debugging purposes */
63 void dvma_print (unsigned long dvma_addr
)
68 index
= dvma_addr
>> DVMA_PAGE_SHIFT
;
70 pr_info("idx %lx dvma_addr %08lx paddr %08lx\n", index
, dvma_addr
,
71 dvma_entry_paddr(index
));
76 /* create a virtual mapping for a page assigned within the IOMMU
77 so that the cpu can reach it easily */
78 inline int dvma_map_cpu(unsigned long kaddr
,
79 unsigned long vaddr
, int len
)
90 end
= PAGE_ALIGN(vaddr
+ len
);
92 pr_debug("dvma: mapping kern %08lx to virt %08lx\n", kaddr
, vaddr
);
93 pgd
= pgd_offset_k(vaddr
);
94 p4d
= p4d_offset(pgd
, vaddr
);
95 pud
= pud_offset(p4d
, vaddr
);
101 if((pmd
= pmd_alloc(&init_mm
, pud
, vaddr
)) == NULL
) {
106 if((end
& PGDIR_MASK
) > (vaddr
& PGDIR_MASK
))
107 end2
= (vaddr
+ (PGDIR_SIZE
-1)) & PGDIR_MASK
;
115 if((pte
= pte_alloc_kernel(pmd
, vaddr
)) == NULL
) {
120 if((end2
& PMD_MASK
) > (vaddr
& PMD_MASK
))
121 end3
= (vaddr
+ (PMD_SIZE
-1)) & PMD_MASK
;
126 pr_debug("mapping %08lx phys to %08lx\n",
128 set_pte(pte
, pfn_pte(virt_to_pfn(kaddr
),
133 } while(vaddr
< end3
);
135 } while(vaddr
< end2
);
137 } while(vaddr
< end
);
146 inline int dvma_map_iommu(unsigned long kaddr
, unsigned long baddr
,
149 unsigned long end
, index
;
151 index
= baddr
>> DVMA_PAGE_SHIFT
;
152 end
= ((baddr
+len
) >> DVMA_PAGE_SHIFT
);
154 if(len
& ~DVMA_PAGE_MASK
)
157 for(; index
< end
; index
++) {
158 // if(dvma_entry_use(index))
160 // pr_info("mapping pa %lx to ba %lx\n", __pa(kaddr),
161 // index << DVMA_PAGE_SHIFT);
163 dvma_entry_set(index
, __pa(kaddr
));
165 iommu_pte
[index
] |= IOMMU_FULL_BLOCK
;
166 // dvma_entry_inc(index);
168 kaddr
+= DVMA_PAGE_SIZE
;
172 for(index
= (baddr
>> DVMA_PAGE_SHIFT
); index
< end
; index
++)
173 dvma_print(index
<< DVMA_PAGE_SHIFT
);
179 void dvma_unmap_iommu(unsigned long baddr
, int len
)
185 index
= baddr
>> DVMA_PAGE_SHIFT
;
186 end
= (DVMA_PAGE_ALIGN(baddr
+len
) >> DVMA_PAGE_SHIFT
);
188 for(; index
< end
; index
++) {
189 pr_debug("freeing bus mapping %08x\n",
190 index
<< DVMA_PAGE_SHIFT
);
192 if(!dvma_entry_use(index
))
193 pr_info("dvma_unmap freeing unused entry %04x\n",
196 dvma_entry_dec(index
);
198 dvma_entry_clr(index
);