1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2020 Microsemi Corporation
9 compatible = "mscc,jr2";
22 compatible = "mips,mips24KEc";
29 cpuintc: interrupt-controller {
31 #interrupt-cells = <1>;
33 compatible = "mti,cpu-interrupt-controller";
37 compatible = "fixed-clock";
39 clock-frequency = <500000000>;
43 compatible = "fixed-factor-clock";
51 compatible = "simple-bus";
56 interrupt-parent = <&intc>;
58 cpu_ctrl: syscon@70000000 {
59 compatible = "mscc,ocelot-cpu-syscon", "syscon";
60 reg = <0x70000000 0x2c>;
63 intc: interrupt-controller@70000070 {
64 compatible = "mscc,jaguar2-icpu-intr";
65 reg = <0x70000070 0x94>;
66 #interrupt-cells = <1>;
68 interrupt-parent = <&cpuintc>;
72 uart0: serial@70100000 {
73 pinctrl-0 = <&uart_pins>;
74 pinctrl-names = "default";
75 compatible = "ns16550a";
76 reg = <0x70100000 0x20>;
85 uart2: serial@70100800 {
86 pinctrl-0 = <&uart2_pins>;
87 pinctrl-names = "default";
88 compatible = "ns16550a";
89 reg = <0x70100800 0x20>;
98 gpio: pinctrl@71010038 {
99 compatible = "mscc,jaguar2-pinctrl";
100 reg = <0x71010038 0x90>;
103 gpio-ranges = <&gpio 0 0 64>;
105 uart_pins: uart-pins {
106 pins = "GPIO_10", "GPIO_11";
110 uart2_pins: uart2-pins {
111 pins = "GPIO_24", "GPIO_25";
131 pins = "GPIO_14", "GPIO_15";
135 i2c2_pins: i2c2-pins {
136 pins = "GPIO_28", "GPIO_29";
142 compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
144 pinctrl-0 = <&i2c_pins>;
145 pinctrl-names = "default";
146 reg = <0x70100400 0x100>, <0x700001b8 0x8>;
147 #address-cells = <1>;
150 clock-frequency = <100000>;
155 compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
157 pinctrl-0 = <&i2c2_pins>;
158 pinctrl-names = "default";
159 reg = <0x70100c00 0x100>;
160 #address-cells = <1>;
163 clock-frequency = <100000>;