2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * A small micro-assembler. It is intentionally kept simple, does only
7 * support a subset of instructions, and does not try to hide pipeline
8 * effects like branch delay slots.
10 * Copyright (C) 2004, 2005, 2006, 2008 Thiemo Seufer
11 * Copyright (C) 2005, 2007 Maciej W. Rozycki
12 * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
13 * Copyright (C) 2012, 2013 MIPS Technologies, Inc. All rights reserved.
37 #define IMM_MASK 0xffff
39 #define JIMM_MASK 0x3ffffff
41 #define FUNC_MASK 0x3f
46 #define SIMM9_MASK 0x1ff
49 insn_addiu
, insn_addu
, insn_and
, insn_andi
, insn_bbit0
, insn_bbit1
,
50 insn_beq
, insn_beql
, insn_bgez
, insn_bgezl
, insn_bgtz
, insn_blez
,
51 insn_bltz
, insn_bltzl
, insn_bne
, insn_break
, insn_cache
, insn_cfc1
,
52 insn_cfcmsa
, insn_ctc1
, insn_ctcmsa
, insn_daddiu
, insn_daddu
, insn_ddivu
,
53 insn_ddivu_r6
, insn_di
, insn_dins
, insn_dinsm
, insn_dinsu
, insn_divu
,
54 insn_divu_r6
, insn_dmfc0
, insn_dmodu
, insn_dmtc0
, insn_dmultu
,
55 insn_dmulu
, insn_drotr
, insn_drotr32
, insn_dsbh
, insn_dshd
, insn_dsll
,
56 insn_dsll32
, insn_dsllv
, insn_dsra
, insn_dsra32
, insn_dsrav
, insn_dsrl
,
57 insn_dsrl32
, insn_dsrlv
, insn_dsubu
, insn_eret
, insn_ext
, insn_ins
,
58 insn_j
, insn_jal
, insn_jalr
, insn_jr
, insn_lb
, insn_lbu
, insn_ld
,
59 insn_lddir
, insn_ldpte
, insn_ldx
, insn_lh
, insn_lhu
, insn_ll
, insn_lld
,
60 insn_lui
, insn_lw
, insn_lwu
, insn_lwx
, insn_mfc0
, insn_mfhc0
, insn_mfhi
,
61 insn_mflo
, insn_modu
, insn_movn
, insn_movz
, insn_mtc0
, insn_mthc0
,
62 insn_mthi
, insn_mtlo
, insn_mul
, insn_multu
, insn_mulu
, insn_nor
,
63 insn_or
, insn_ori
, insn_pref
, insn_rfe
, insn_rotr
, insn_sb
, insn_sc
,
64 insn_scd
, insn_seleqz
, insn_selnez
, insn_sd
, insn_sh
, insn_sll
,
65 insn_sllv
, insn_slt
, insn_slti
, insn_sltiu
, insn_sltu
, insn_sra
,
66 insn_srav
, insn_srl
, insn_srlv
, insn_subu
, insn_sw
, insn_sync
,
67 insn_syscall
, insn_tlbp
, insn_tlbr
, insn_tlbwi
, insn_tlbwr
, insn_wait
,
68 insn_wsbh
, insn_xor
, insn_xori
, insn_yield
,
69 insn_invalid
/* insn_invalid must be last */
77 static inline u32
build_rs(u32 arg
)
79 WARN(arg
& ~RS_MASK
, KERN_WARNING
"Micro-assembler field overflow\n");
81 return (arg
& RS_MASK
) << RS_SH
;
84 static inline u32
build_rt(u32 arg
)
86 WARN(arg
& ~RT_MASK
, KERN_WARNING
"Micro-assembler field overflow\n");
88 return (arg
& RT_MASK
) << RT_SH
;
91 static inline u32
build_rd(u32 arg
)
93 WARN(arg
& ~RD_MASK
, KERN_WARNING
"Micro-assembler field overflow\n");
95 return (arg
& RD_MASK
) << RD_SH
;
98 static inline u32
build_re(u32 arg
)
100 WARN(arg
& ~RE_MASK
, KERN_WARNING
"Micro-assembler field overflow\n");
102 return (arg
& RE_MASK
) << RE_SH
;
105 static inline u32
build_simm(s32 arg
)
107 WARN(arg
> 0x7fff || arg
< -0x8000,
108 KERN_WARNING
"Micro-assembler field overflow\n");
113 static inline u32
build_uimm(u32 arg
)
115 WARN(arg
& ~IMM_MASK
, KERN_WARNING
"Micro-assembler field overflow\n");
117 return arg
& IMM_MASK
;
120 static inline u32
build_scimm(u32 arg
)
122 WARN(arg
& ~SCIMM_MASK
,
123 KERN_WARNING
"Micro-assembler field overflow\n");
125 return (arg
& SCIMM_MASK
) << SCIMM_SH
;
128 static inline u32
build_scimm9(s32 arg
)
130 WARN((arg
> 0xff || arg
< -0x100),
131 KERN_WARNING
"Micro-assembler field overflow\n");
133 return (arg
& SIMM9_MASK
) << SIMM9_SH
;
136 static inline u32
build_func(u32 arg
)
138 WARN(arg
& ~FUNC_MASK
, KERN_WARNING
"Micro-assembler field overflow\n");
140 return arg
& FUNC_MASK
;
143 static inline u32
build_set(u32 arg
)
145 WARN(arg
& ~SET_MASK
, KERN_WARNING
"Micro-assembler field overflow\n");
147 return arg
& SET_MASK
;
150 static void build_insn(u32
**buf
, enum opcode opc
, ...);
152 #define I_u1u2u3(op) \
155 build_insn(buf, insn##op, a, b, c); \
157 UASM_EXPORT_SYMBOL(uasm_i##op);
159 #define I_s3s1s2(op) \
162 build_insn(buf, insn##op, b, c, a); \
164 UASM_EXPORT_SYMBOL(uasm_i##op);
166 #define I_u2u1u3(op) \
169 build_insn(buf, insn##op, b, a, c); \
171 UASM_EXPORT_SYMBOL(uasm_i##op);
173 #define I_u3u2u1(op) \
176 build_insn(buf, insn##op, c, b, a); \
178 UASM_EXPORT_SYMBOL(uasm_i##op);
180 #define I_u3u1u2(op) \
183 build_insn(buf, insn##op, b, c, a); \
185 UASM_EXPORT_SYMBOL(uasm_i##op);
187 #define I_u1u2s3(op) \
190 build_insn(buf, insn##op, a, b, c); \
192 UASM_EXPORT_SYMBOL(uasm_i##op);
194 #define I_u2s3u1(op) \
197 build_insn(buf, insn##op, c, a, b); \
199 UASM_EXPORT_SYMBOL(uasm_i##op);
201 #define I_u2u1s3(op) \
204 build_insn(buf, insn##op, b, a, c); \
206 UASM_EXPORT_SYMBOL(uasm_i##op);
208 #define I_u2u1msbu3(op) \
211 build_insn(buf, insn##op, b, a, c+d-1, c); \
213 UASM_EXPORT_SYMBOL(uasm_i##op);
215 #define I_u2u1msb32u3(op) \
218 build_insn(buf, insn##op, b, a, c+d-33, c); \
220 UASM_EXPORT_SYMBOL(uasm_i##op);
222 #define I_u2u1msb32msb3(op) \
225 build_insn(buf, insn##op, b, a, c+d-33, c-32); \
227 UASM_EXPORT_SYMBOL(uasm_i##op);
229 #define I_u2u1msbdu3(op) \
232 build_insn(buf, insn##op, b, a, d-1, c); \
234 UASM_EXPORT_SYMBOL(uasm_i##op);
239 build_insn(buf, insn##op, a, b); \
241 UASM_EXPORT_SYMBOL(uasm_i##op);
246 build_insn(buf, insn##op, b, a); \
248 UASM_EXPORT_SYMBOL(uasm_i##op);
253 build_insn(buf, insn##op, a, b); \
255 UASM_EXPORT_SYMBOL(uasm_i##op);
260 build_insn(buf, insn##op, a); \
262 UASM_EXPORT_SYMBOL(uasm_i##op);
267 build_insn(buf, insn##op); \
269 UASM_EXPORT_SYMBOL(uasm_i##op);
382 I_u2u1msb32u3(_dinsm
);
383 I_u2u1msb32msb3(_dinsu
);
392 #ifdef CONFIG_CPU_CAVIUM_OCTEON
393 #include <asm/octeon/octeon.h>
394 void uasm_i_pref(u32
**buf
, unsigned int a
, signed int b
,
397 if (OCTEON_IS_MODEL(OCTEON_CN6XXX
) && a
<= 24 && a
!= 5)
399 * As per erratum Core-14449, replace prefetches 0-4,
400 * 6-24 with 'pref 28'.
402 build_insn(buf
, insn_pref
, c
, 28, b
);
404 build_insn(buf
, insn_pref
, c
, a
, b
);
406 UASM_EXPORT_SYMBOL(uasm_i_pref
);
412 void uasm_build_label(struct uasm_label
**lab
, u32
*addr
, int lid
)
418 UASM_EXPORT_SYMBOL(uasm_build_label
);
420 int uasm_in_compat_space_p(long addr
)
422 /* Is this address in 32bit compat space? */
423 return addr
== (int)addr
;
425 UASM_EXPORT_SYMBOL(uasm_in_compat_space_p
);
427 static int uasm_rel_highest(long val
)
430 return ((((val
+ 0x800080008000L
) >> 48) & 0xffff) ^ 0x8000) - 0x8000;
436 static int uasm_rel_higher(long val
)
439 return ((((val
+ 0x80008000L
) >> 32) & 0xffff) ^ 0x8000) - 0x8000;
445 int uasm_rel_hi(long val
)
447 return ((((val
+ 0x8000L
) >> 16) & 0xffff) ^ 0x8000) - 0x8000;
449 UASM_EXPORT_SYMBOL(uasm_rel_hi
);
451 int uasm_rel_lo(long val
)
453 return ((val
& 0xffff) ^ 0x8000) - 0x8000;
455 UASM_EXPORT_SYMBOL(uasm_rel_lo
);
457 void UASM_i_LA_mostly(u32
**buf
, unsigned int rs
, long addr
)
459 if (!uasm_in_compat_space_p(addr
)) {
460 uasm_i_lui(buf
, rs
, uasm_rel_highest(addr
));
461 if (uasm_rel_higher(addr
))
462 uasm_i_daddiu(buf
, rs
, rs
, uasm_rel_higher(addr
));
463 if (uasm_rel_hi(addr
)) {
464 uasm_i_dsll(buf
, rs
, rs
, 16);
465 uasm_i_daddiu(buf
, rs
, rs
,
467 uasm_i_dsll(buf
, rs
, rs
, 16);
469 uasm_i_dsll32(buf
, rs
, rs
, 0);
471 uasm_i_lui(buf
, rs
, uasm_rel_hi(addr
));
473 UASM_EXPORT_SYMBOL(UASM_i_LA_mostly
);
475 void UASM_i_LA(u32
**buf
, unsigned int rs
, long addr
)
477 UASM_i_LA_mostly(buf
, rs
, addr
);
478 if (uasm_rel_lo(addr
)) {
479 if (!uasm_in_compat_space_p(addr
))
480 uasm_i_daddiu(buf
, rs
, rs
,
483 uasm_i_addiu(buf
, rs
, rs
,
487 UASM_EXPORT_SYMBOL(UASM_i_LA
);
489 /* Handle relocations. */
490 void uasm_r_mips_pc16(struct uasm_reloc
**rel
, u32
*addr
, int lid
)
493 (*rel
)->type
= R_MIPS_PC16
;
497 UASM_EXPORT_SYMBOL(uasm_r_mips_pc16
);
499 static inline void __resolve_relocs(struct uasm_reloc
*rel
,
500 struct uasm_label
*lab
);
502 void uasm_resolve_relocs(struct uasm_reloc
*rel
,
503 struct uasm_label
*lab
)
505 struct uasm_label
*l
;
507 for (; rel
->lab
!= UASM_LABEL_INVALID
; rel
++)
508 for (l
= lab
; l
->lab
!= UASM_LABEL_INVALID
; l
++)
509 if (rel
->lab
== l
->lab
)
510 __resolve_relocs(rel
, l
);
512 UASM_EXPORT_SYMBOL(uasm_resolve_relocs
);
514 void uasm_move_relocs(struct uasm_reloc
*rel
, u32
*first
, u32
*end
,
517 for (; rel
->lab
!= UASM_LABEL_INVALID
; rel
++)
518 if (rel
->addr
>= first
&& rel
->addr
< end
)
521 UASM_EXPORT_SYMBOL(uasm_move_relocs
);
523 void uasm_move_labels(struct uasm_label
*lab
, u32
*first
, u32
*end
,
526 for (; lab
->lab
!= UASM_LABEL_INVALID
; lab
++)
527 if (lab
->addr
>= first
&& lab
->addr
< end
)
530 UASM_EXPORT_SYMBOL(uasm_move_labels
);
532 void uasm_copy_handler(struct uasm_reloc
*rel
, struct uasm_label
*lab
,
533 u32
*first
, u32
*end
, u32
*target
)
535 long off
= (long)(target
- first
);
537 memcpy(target
, first
, (end
- first
) * sizeof(u32
));
539 uasm_move_relocs(rel
, first
, end
, off
);
540 uasm_move_labels(lab
, first
, end
, off
);
542 UASM_EXPORT_SYMBOL(uasm_copy_handler
);
544 int uasm_insn_has_bdelay(struct uasm_reloc
*rel
, u32
*addr
)
546 for (; rel
->lab
!= UASM_LABEL_INVALID
; rel
++) {
547 if (rel
->addr
== addr
548 && (rel
->type
== R_MIPS_PC16
549 || rel
->type
== R_MIPS_26
))
555 UASM_EXPORT_SYMBOL(uasm_insn_has_bdelay
);
557 /* Convenience functions for labeled branches. */
558 void uasm_il_bltz(u32
**p
, struct uasm_reloc
**r
, unsigned int reg
,
561 uasm_r_mips_pc16(r
, *p
, lid
);
562 uasm_i_bltz(p
, reg
, 0);
564 UASM_EXPORT_SYMBOL(uasm_il_bltz
);
566 void uasm_il_b(u32
**p
, struct uasm_reloc
**r
, int lid
)
568 uasm_r_mips_pc16(r
, *p
, lid
);
571 UASM_EXPORT_SYMBOL(uasm_il_b
);
573 void uasm_il_beq(u32
**p
, struct uasm_reloc
**r
, unsigned int r1
,
574 unsigned int r2
, int lid
)
576 uasm_r_mips_pc16(r
, *p
, lid
);
577 uasm_i_beq(p
, r1
, r2
, 0);
579 UASM_EXPORT_SYMBOL(uasm_il_beq
);
581 void uasm_il_beqz(u32
**p
, struct uasm_reloc
**r
, unsigned int reg
,
584 uasm_r_mips_pc16(r
, *p
, lid
);
585 uasm_i_beqz(p
, reg
, 0);
587 UASM_EXPORT_SYMBOL(uasm_il_beqz
);
589 void uasm_il_beqzl(u32
**p
, struct uasm_reloc
**r
, unsigned int reg
,
592 uasm_r_mips_pc16(r
, *p
, lid
);
593 uasm_i_beqzl(p
, reg
, 0);
595 UASM_EXPORT_SYMBOL(uasm_il_beqzl
);
597 void uasm_il_bne(u32
**p
, struct uasm_reloc
**r
, unsigned int reg1
,
598 unsigned int reg2
, int lid
)
600 uasm_r_mips_pc16(r
, *p
, lid
);
601 uasm_i_bne(p
, reg1
, reg2
, 0);
603 UASM_EXPORT_SYMBOL(uasm_il_bne
);
605 void uasm_il_bnez(u32
**p
, struct uasm_reloc
**r
, unsigned int reg
,
608 uasm_r_mips_pc16(r
, *p
, lid
);
609 uasm_i_bnez(p
, reg
, 0);
611 UASM_EXPORT_SYMBOL(uasm_il_bnez
);
613 void uasm_il_bgezl(u32
**p
, struct uasm_reloc
**r
, unsigned int reg
,
616 uasm_r_mips_pc16(r
, *p
, lid
);
617 uasm_i_bgezl(p
, reg
, 0);
619 UASM_EXPORT_SYMBOL(uasm_il_bgezl
);
621 void uasm_il_bgez(u32
**p
, struct uasm_reloc
**r
, unsigned int reg
,
624 uasm_r_mips_pc16(r
, *p
, lid
);
625 uasm_i_bgez(p
, reg
, 0);
627 UASM_EXPORT_SYMBOL(uasm_il_bgez
);
629 void uasm_il_bbit0(u32
**p
, struct uasm_reloc
**r
, unsigned int reg
,
630 unsigned int bit
, int lid
)
632 uasm_r_mips_pc16(r
, *p
, lid
);
633 uasm_i_bbit0(p
, reg
, bit
, 0);
635 UASM_EXPORT_SYMBOL(uasm_il_bbit0
);
637 void uasm_il_bbit1(u32
**p
, struct uasm_reloc
**r
, unsigned int reg
,
638 unsigned int bit
, int lid
)
640 uasm_r_mips_pc16(r
, *p
, lid
);
641 uasm_i_bbit1(p
, reg
, bit
, 0);
643 UASM_EXPORT_SYMBOL(uasm_il_bbit1
);