arch/openrisc/kernel/setup.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * OpenRISC setup.c
   4  *
   5  * Linux architectural port borrowing liberally from similar works of
   6  * others.  All original copyrights apply as per the original source
   7  * declaration.
   8  *
   9  * Modifications for the OpenRISC architecture:
  10  * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
  11  * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
  12  *
  13  * This file handles the architecture-dependent parts of initialization
  14  */
  15
  16 #include <linux/errno.h>
  17 #include <linux/sched.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/stddef.h>
  21 #include <linux/unistd.h>
  22 #include <linux/ptrace.h>
  23 #include <linux/slab.h>
  24 #include <linux/tty.h>
  25 #include <linux/ioport.h>
  26 #include <linux/delay.h>
  27 #include <linux/console.h>
  28 #include <linux/init.h>
  29 #include <linux/memblock.h>
  30 #include <linux/seq_file.h>
  31 #include <linux/serial.h>
  32 #include <linux/initrd.h>
  33 #include <linux/of_fdt.h>
  34 #include <linux/of.h>
  35 #include <linux/device.h>
  36
  37 #include <asm/sections.h>
  38 #include <asm/types.h>
  39 #include <asm/setup.h>
  40 #include <asm/io.h>
  41 #include <asm/cpuinfo.h>
  42 #include <asm/delay.h>
  43
  44 #include "vmlinux.h"
  45
  46 static void __init setup_memory(void)
  47 {
  48         unsigned long ram_start_pfn;
  49         unsigned long ram_end_pfn;
  50         phys_addr_t memory_start, memory_end;
  51
  52         memory_end = memory_start = 0;
  53
  54         /* Find main memory where is the kernel, we assume its the only one */
  55         memory_start = memblock_start_of_DRAM();
  56         memory_end = memblock_end_of_DRAM();
  57
  58         if (!memory_end) {
  59                 panic("No memory!");
  60         }
  61
  62         ram_start_pfn = PFN_UP(memory_start);
  63         ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());
  64
  65         /* setup bootmem globals (we use no_bootmem, but mm still depends on this) */
  66         min_low_pfn = ram_start_pfn;
  67         max_low_pfn = ram_end_pfn;
  68         max_pfn = ram_end_pfn;
  69
  70         /*
  71          * initialize the boot-time allocator (with low memory only).
  72          *
  73          * This makes the memory from the end of the kernel to the end of
  74          * RAM usable.
  75          */
  76         memblock_reserve(__pa(_stext), _end - _stext);
  77
  78 #ifdef CONFIG_BLK_DEV_INITRD
  79         /* Then reserve the initrd, if any */
  80         if (initrd_start && (initrd_end > initrd_start)) {
  81                 unsigned long aligned_start = ALIGN_DOWN(initrd_start, PAGE_SIZE);
  82                 unsigned long aligned_end = ALIGN(initrd_end, PAGE_SIZE);
  83
  84                 memblock_reserve(__pa(aligned_start), aligned_end - aligned_start);
  85         }
  86 #endif /* CONFIG_BLK_DEV_INITRD */
  87
  88         early_init_fdt_reserve_self();
  89         early_init_fdt_scan_reserved_mem();
  90
  91         memblock_dump_all();
  92 }
  93
  94 struct cpuinfo_or1k cpuinfo_or1k[NR_CPUS];
  95
  96 static void print_cpuinfo(void)
  97 {
  98         unsigned long upr = mfspr(SPR_UPR);
  99         unsigned long vr = mfspr(SPR_VR);
 100         unsigned int version;
 101         unsigned int revision;
 102         struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()];
 103
 104         version = (vr & SPR_VR_VER) >> 24;
 105         revision = (vr & SPR_VR_REV);
 106
 107         printk(KERN_INFO "CPU: OpenRISC-%x (revision %d) @%d MHz\n",
 108                version, revision, cpuinfo->clock_frequency / 1000000);
 109
 110         if (!(upr & SPR_UPR_UP)) {
 111                 printk(KERN_INFO
 112                        "-- no UPR register... unable to detect configuration\n");
 113                 return;
 114         }
 115
 116         if (upr & SPR_UPR_DCP)
 117                 printk(KERN_INFO
 118                        "-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",
 119                        cpuinfo->dcache_size, cpuinfo->dcache_block_size,
 120                        cpuinfo->dcache_ways);
 121         else
 122                 printk(KERN_INFO "-- dcache disabled\n");
 123         if (upr & SPR_UPR_ICP)
 124                 printk(KERN_INFO
 125                        "-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",
 126                        cpuinfo->icache_size, cpuinfo->icache_block_size,
 127                        cpuinfo->icache_ways);
 128         else
 129                 printk(KERN_INFO "-- icache disabled\n");
 130
 131         if (upr & SPR_UPR_DMP)
 132                 printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n",
 133                        1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
 134                        1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
 135         if (upr & SPR_UPR_IMP)
 136                 printk(KERN_INFO "-- immu: %4d entries, %lu way(s)\n",
 137                        1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
 138                        1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));
 139
 140         printk(KERN_INFO "-- additional features:\n");
 141         if (upr & SPR_UPR_DUP)
 142                 printk(KERN_INFO "-- debug unit\n");
 143         if (upr & SPR_UPR_PCUP)
 144                 printk(KERN_INFO "-- performance counters\n");
 145         if (upr & SPR_UPR_PMP)
 146                 printk(KERN_INFO "-- power management\n");
 147         if (upr & SPR_UPR_PICP)
 148                 printk(KERN_INFO "-- PIC\n");
 149         if (upr & SPR_UPR_TTP)
 150                 printk(KERN_INFO "-- timer\n");
 151         if (upr & SPR_UPR_CUP)
 152                 printk(KERN_INFO "-- custom unit(s)\n");
 153 }
 154
 155 static struct device_node *setup_find_cpu_node(int cpu)
 156 {
 157         u32 hwid;
 158         struct device_node *cpun;
 159
 160         for_each_of_cpu_node(cpun) {
 161                 if (of_property_read_u32(cpun, "reg", &hwid))
 162                         continue;
 163                 if (hwid == cpu)
 164                         return cpun;
 165         }
 166
 167         return NULL;
 168 }
 169
 170 void __init setup_cpuinfo(void)
 171 {
 172         struct device_node *cpu;
 173         unsigned long iccfgr, dccfgr;
 174         unsigned long cache_set_size;
 175         int cpu_id = smp_processor_id();
 176         struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[cpu_id];
 177
 178         cpu = setup_find_cpu_node(cpu_id);
 179         if (!cpu)
 180                 panic("Couldn't find CPU%d in device tree...\n", cpu_id);
 181
 182         iccfgr = mfspr(SPR_ICCFGR);
 183         cpuinfo->icache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW);
 184         cache_set_size = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3);
 185         cpuinfo->icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7);
 186         cpuinfo->icache_size =
 187             cache_set_size * cpuinfo->icache_ways * cpuinfo->icache_block_size;
 188
 189         dccfgr = mfspr(SPR_DCCFGR);
 190         cpuinfo->dcache_ways = 1 << (dccfgr & SPR_DCCFGR_NCW);
 191         cache_set_size = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3);
 192         cpuinfo->dcache_block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7);
 193         cpuinfo->dcache_size =
 194             cache_set_size * cpuinfo->dcache_ways * cpuinfo->dcache_block_size;
 195
 196         if (of_property_read_u32(cpu, "clock-frequency",
 197                                  &cpuinfo->clock_frequency)) {
 198                 printk(KERN_WARNING
 199                        "Device tree missing CPU 'clock-frequency' parameter."
 200                        "Assuming frequency 25MHZ"
 201                        "This is probably not what you want.");
 202         }
 203
 204         cpuinfo->coreid = mfspr(SPR_COREID);
 205
 206         of_node_put(cpu);
 207
 208         print_cpuinfo();
 209 }
 210
 211 /**
 212  * or32_early_setup
 213  *
 214  * Handles the pointer to the device tree that this kernel is to use
 215  * for establishing the available platform devices.
 216  *
 217  * Falls back on built-in device tree in case null pointer is passed.
 218  */
 219
 220 void __init or32_early_setup(void *fdt)
 221 {
 222         if (fdt)
 223                 pr_info("FDT at %p\n", fdt);
 224         else {
 225                 fdt = __dtb_start;
 226                 pr_info("Compiled-in FDT at %p\n", fdt);
 227         }
 228         early_init_devtree(fdt);
 229 }
 230
 231 static inline unsigned long extract_value_bits(unsigned long reg,
 232                                                short bit_nr, short width)
 233 {
 234         return (reg >> bit_nr) & (0 << width);
 235 }
 236
 237 static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
 238 {
 239         while (!(mask & 0x1)) {
 240                 reg = reg >> 1;
 241                 mask = mask >> 1;
 242         }
 243         return mask & reg;
 244 }
 245
 246 void __init detect_unit_config(unsigned long upr, unsigned long mask,
 247                                char *text, void (*func) (void))
 248 {
 249         if (text != NULL)
 250                 printk("%s", text);
 251
 252         if (upr & mask) {
 253                 if (func != NULL)
 254                         func();
 255                 else
 256                         printk("present\n");
 257         } else
 258                 printk("not present\n");
 259 }
 260
 261 /*
 262  * calibrate_delay
 263  *
 264  * Lightweight calibrate_delay implementation that calculates loops_per_jiffy
 265  * from the clock frequency passed in via the device tree
 266  *
 267  */
 268
 269 void calibrate_delay(void)
 270 {
 271         const int *val;
 272         struct device_node *cpu = setup_find_cpu_node(smp_processor_id());
 273
 274         val = of_get_property(cpu, "clock-frequency", NULL);
 275         if (!val)
 276                 panic("no cpu 'clock-frequency' parameter in device tree");
 277         loops_per_jiffy = *val / HZ;
 278         pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",
 279                 loops_per_jiffy / (500000 / HZ),
 280                 (loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);
 281 }
 282
 283 void __init setup_arch(char **cmdline_p)
 284 {
 285         unflatten_and_copy_device_tree();
 286
 287         setup_cpuinfo();
 288
 289 #ifdef CONFIG_SMP
 290         smp_init_cpus();
 291 #endif
 292
 293         /* process 1's initial memory region is the kernel code/data */
 294         init_mm.start_code = (unsigned long)_stext;
 295         init_mm.end_code = (unsigned long)_etext;
 296         init_mm.end_data = (unsigned long)_edata;
 297         init_mm.brk = (unsigned long)_end;
 298
 299 #ifdef CONFIG_BLK_DEV_INITRD
 300         if (initrd_start == initrd_end) {
 301                 printk(KERN_INFO "Initial ramdisk not found\n");
 302                 initrd_start = 0;
 303                 initrd_end = 0;
 304         } else {
 305                 printk(KERN_INFO "Initial ramdisk at: 0x%p (%lu bytes)\n",
 306                        (void *)(initrd_start), initrd_end - initrd_start);
 307                 initrd_below_start_ok = 1;
 308         }
 309 #endif
 310
 311         /* setup memblock allocator */
 312         setup_memory();
 313
 314         /* paging_init() sets up the MMU and marks all pages as reserved */
 315         paging_init();
 316
 317         *cmdline_p = boot_command_line;
 318
 319         printk(KERN_INFO "OpenRISC Linux -- http://openrisc.io\n");
 320 }
 321
 322 static int show_cpuinfo(struct seq_file *m, void *v)
 323 {
 324         unsigned int vr, cpucfgr;
 325         unsigned int avr;
 326         unsigned int version;
 327         struct cpuinfo_or1k *cpuinfo = v;
 328
 329         vr = mfspr(SPR_VR);
 330         cpucfgr = mfspr(SPR_CPUCFGR);
 331
 332 #ifdef CONFIG_SMP
 333         seq_printf(m, "processor\t\t: %d\n", cpuinfo->coreid);
 334 #endif
 335         if (vr & SPR_VR_UVRP) {
 336                 vr = mfspr(SPR_VR2);
 337                 version = vr & SPR_VR2_VER;
 338                 avr = mfspr(SPR_AVR);
 339                 seq_printf(m, "cpu architecture\t: "
 340                            "OpenRISC 1000 (%d.%d-rev%d)\n",
 341                            (avr >> 24) & 0xff,
 342                            (avr >> 16) & 0xff,
 343                            (avr >> 8) & 0xff);
 344                 seq_printf(m, "cpu implementation id\t: 0x%x\n",
 345                            (vr & SPR_VR2_CPUID) >> 24);
 346                 seq_printf(m, "cpu version\t\t: 0x%x\n", version);
 347         } else {
 348                 version = (vr & SPR_VR_VER) >> 24;
 349                 seq_printf(m, "cpu\t\t\t: OpenRISC-%x\n", version);
 350                 seq_printf(m, "revision\t\t: %d\n", vr & SPR_VR_REV);
 351         }
 352         seq_printf(m, "frequency\t\t: %ld\n", loops_per_jiffy * HZ);
 353         seq_printf(m, "dcache size\t\t: %d bytes\n", cpuinfo->dcache_size);
 354         seq_printf(m, "dcache block size\t: %d bytes\n",
 355                    cpuinfo->dcache_block_size);
 356         seq_printf(m, "dcache ways\t\t: %d\n", cpuinfo->dcache_ways);
 357         seq_printf(m, "icache size\t\t: %d bytes\n", cpuinfo->icache_size);
 358         seq_printf(m, "icache block size\t: %d bytes\n",
 359                    cpuinfo->icache_block_size);
 360         seq_printf(m, "icache ways\t\t: %d\n", cpuinfo->icache_ways);
 361         seq_printf(m, "immu\t\t\t: %d entries, %lu ways\n",
 362                    1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
 363                    1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
 364         seq_printf(m, "dmmu\t\t\t: %d entries, %lu ways\n",
 365                    1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
 366                    1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));
 367         seq_printf(m, "bogomips\t\t: %lu.%02lu\n",
 368                    (loops_per_jiffy * HZ) / 500000,
 369                    ((loops_per_jiffy * HZ) / 5000) % 100);
 370
 371         seq_puts(m, "features\t\t: ");
 372         seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OB32S ? "orbis32" : "");
 373         seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OB64S ? "orbis64" : "");
 374         seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OF32S ? "orfpx32" : "");
 375         seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OF64S ? "orfpx64" : "");
 376         seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OV64S ? "orvdx64" : "");
 377         seq_puts(m, "\n");
 378
 379         seq_puts(m, "\n");
 380
 381         return 0;
 382 }
 383
 384 static void *c_start(struct seq_file *m, loff_t *pos)
 385 {
 386         *pos = cpumask_next(*pos - 1, cpu_online_mask);
 387         if ((*pos) < nr_cpu_ids)
 388                 return &cpuinfo_or1k[*pos];
 389         return NULL;
 390 }
 391
 392 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 393 {
 394         (*pos)++;
 395         return c_start(m, pos);
 396 }
 397
 398 static void c_stop(struct seq_file *m, void *v)
 399 {
 400 }
 401
 402 const struct seq_operations cpuinfo_op = {
 403         .start = c_start,
 404         .next = c_next,
 405         .stop = c_stop,
 406         .show = show_cpuinfo,
 407 };