arch/powerpc/boot/ppcboot.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * This interface is used for compatibility with old U-boots *ONLY*.
   4  * Please do not imitate or extend this.
   5  */
   6
   7 /*
   8  * (C) Copyright 2000, 2001
   9  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  10  */
  11
  12 #ifndef __PPCBOOT_H__
  13 #define __PPCBOOT_H__
  14
  15 /*
  16  * Board information passed to kernel from PPCBoot
  17  *
  18  * include/asm-ppc/ppcboot.h
  19  */
  20
  21 #include "types.h"
  22
  23 typedef struct bd_info {
  24         unsigned long   bi_memstart;    /* start of DRAM memory */
  25         unsigned long   bi_memsize;     /* size  of DRAM memory in bytes */
  26         unsigned long   bi_flashstart;  /* start of FLASH memory */
  27         unsigned long   bi_flashsize;   /* size  of FLASH memory */
  28         unsigned long   bi_flashoffset; /* reserved area for startup monitor */
  29         unsigned long   bi_sramstart;   /* start of SRAM memory */
  30         unsigned long   bi_sramsize;    /* size  of SRAM memory */
  31 #if defined(TARGET_8xx) || defined(TARGET_CPM2) || defined(TARGET_85xx) ||\
  32         defined(TARGET_83xx) || defined(TARGET_86xx)
  33         unsigned long   bi_immr_base;   /* base of IMMR register */
  34 #endif
  35 #if defined(TARGET_PPC_MPC52xx)
  36         unsigned long   bi_mbar_base;   /* base of internal registers */
  37 #endif
  38         unsigned long   bi_bootflags;   /* boot / reboot flag (for LynxOS) */
  39         unsigned long   bi_ip_addr;     /* IP Address */
  40         unsigned char   bi_enetaddr[6]; /* Ethernet address */
  41         unsigned short  bi_ethspeed;    /* Ethernet speed in Mbps */
  42         unsigned long   bi_intfreq;     /* Internal Freq, in MHz */
  43         unsigned long   bi_busfreq;     /* Bus Freq, in MHz */
  44 #if defined(TARGET_CPM2)
  45         unsigned long   bi_cpmfreq;     /* CPM_CLK Freq, in MHz */
  46         unsigned long   bi_brgfreq;     /* BRG_CLK Freq, in MHz */
  47         unsigned long   bi_sccfreq;     /* SCC_CLK Freq, in MHz */
  48         unsigned long   bi_vco;         /* VCO Out from PLL, in MHz */
  49 #endif
  50 #if defined(TARGET_PPC_MPC52xx)
  51         unsigned long   bi_ipbfreq;     /* IPB Bus Freq, in MHz */
  52         unsigned long   bi_pcifreq;     /* PCI Bus Freq, in MHz */
  53 #endif
  54         unsigned long   bi_baudrate;    /* Console Baudrate */
  55 #if defined(TARGET_4xx)
  56         unsigned char   bi_s_version[4];        /* Version of this structure */
  57         unsigned char   bi_r_version[32];       /* Version of the ROM (IBM) */
  58         unsigned int    bi_procfreq;    /* CPU (Internal) Freq, in Hz */
  59         unsigned int    bi_plb_busfreq; /* PLB Bus speed, in Hz */
  60         unsigned int    bi_pci_busfreq; /* PCI Bus speed, in Hz */
  61         unsigned char   bi_pci_enetaddr[6];     /* PCI Ethernet MAC address */
  62 #endif
  63 #if defined(TARGET_HYMOD)
  64         hymod_conf_t    bi_hymod_conf;  /* hymod configuration information */
  65 #endif
  66 #if defined(TARGET_EVB64260) || defined(TARGET_405EP) || defined(TARGET_44x) || \
  67         defined(TARGET_85xx) || defined(TARGET_83xx) || defined(TARGET_HAS_ETH1)
  68         /* second onboard ethernet port */
  69         unsigned char   bi_enet1addr[6];
  70 #define HAVE_ENET1ADDR
  71 #endif
  72 #if defined(TARGET_EVB64260) || defined(TARGET_440GX) || \
  73     defined(TARGET_85xx) || defined(TARGET_HAS_ETH2)
  74         /* third onboard ethernet ports */
  75         unsigned char   bi_enet2addr[6];
  76 #define HAVE_ENET2ADDR
  77 #endif
  78 #if defined(TARGET_440GX) || defined(TARGET_HAS_ETH3)
  79         /* fourth onboard ethernet ports */
  80         unsigned char   bi_enet3addr[6];
  81 #define HAVE_ENET3ADDR
  82 #endif
  83 #if defined(TARGET_4xx)
  84         unsigned int    bi_opbfreq;             /* OB clock in Hz */
  85         int             bi_iic_fast[2];         /* Use fast i2c mode */
  86 #endif
  87 #if defined(TARGET_440GX)
  88         int             bi_phynum[4];           /* phy mapping */
  89         int             bi_phymode[4];          /* phy mode */
  90 #endif
  91 } bd_t;
  92
  93 #define bi_tbfreq       bi_intfreq
  94
  95 #endif  /* __PPCBOOT_H__ */