arch/sh/boards/mach-sh7763rdp/setup.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * linux/arch/sh/boards/renesas/sh7763rdp/setup.c
   4  *
   5  * Renesas Solutions sh7763rdp board
   6  *
   7  * Copyright (C) 2008 Renesas Solutions Corp.
   8  * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
   9  */
  10 #include <linux/init.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/input.h>
  14 #include <linux/mtd/physmap.h>
  15 #include <linux/fb.h>
  16 #include <linux/io.h>
  17 #include <linux/sh_eth.h>
  18 #include <linux/sh_intc.h>
  19 #include <mach/sh7763rdp.h>
  20 #include <asm/sh7760fb.h>
  21
  22 /* NOR Flash */
  23 static struct mtd_partition sh7763rdp_nor_flash_partitions[] = {
  24         {
  25                 .name = "U-Boot",
  26                 .offset = 0,
  27                 .size = (2 * 128 * 1024),
  28                 .mask_flags = MTD_WRITEABLE,    /* Read-only */
  29         }, {
  30                 .name = "Linux-Kernel",
  31                 .offset = MTDPART_OFS_APPEND,
  32                 .size = (20 * 128 * 1024),
  33         }, {
  34                 .name = "Root Filesystem",
  35                 .offset = MTDPART_OFS_APPEND,
  36                 .size = MTDPART_SIZ_FULL,
  37         },
  38 };
  39
  40 static struct physmap_flash_data sh7763rdp_nor_flash_data = {
  41         .width = 2,
  42         .parts = sh7763rdp_nor_flash_partitions,
  43         .nr_parts = ARRAY_SIZE(sh7763rdp_nor_flash_partitions),
  44 };
  45
  46 static struct resource sh7763rdp_nor_flash_resources[] = {
  47         [0] = {
  48                 .name = "NOR Flash",
  49                 .start = 0,
  50                 .end = (64 * 1024 * 1024),
  51                 .flags = IORESOURCE_MEM,
  52         },
  53 };
  54
  55 static struct platform_device sh7763rdp_nor_flash_device = {
  56         .name = "physmap-flash",
  57         .resource = sh7763rdp_nor_flash_resources,
  58         .num_resources = ARRAY_SIZE(sh7763rdp_nor_flash_resources),
  59         .dev = {
  60                 .platform_data = &sh7763rdp_nor_flash_data,
  61         },
  62 };
  63
  64 /*
  65  * SH-Ether
  66  *
  67  * SH Ether of SH7763 has multi IRQ handling.
  68  * (0x920,0x940,0x960 -> 0x920)
  69  */
  70 static struct resource sh_eth_resources[] = {
  71         {
  72                 .start  = 0xFEE00800,   /* use eth1 */
  73                 .end    = 0xFEE00F7C - 1,
  74                 .flags  = IORESOURCE_MEM,
  75         }, {
  76                 .start  = 0xFEE01800,   /* TSU */
  77                 .end    = 0xFEE01FFF,
  78                 .flags  = IORESOURCE_MEM,
  79         }, {
  80                 .start  = evt2irq(0x920),   /* irq number */
  81                 .flags  = IORESOURCE_IRQ,
  82         },
  83 };
  84
  85 static struct sh_eth_plat_data sh7763_eth_pdata = {
  86         .phy = 1,
  87         .phy_interface = PHY_INTERFACE_MODE_MII,
  88 };
  89
  90 static struct platform_device sh7763rdp_eth_device = {
  91         .name       = "sh7763-gether",
  92         .resource   = sh_eth_resources,
  93         .num_resources  = ARRAY_SIZE(sh_eth_resources),
  94         .dev        = {
  95                 .platform_data = &sh7763_eth_pdata,
  96         },
  97 };
  98
  99 /* SH7763 LCDC */
 100 static struct resource sh7763rdp_fb_resources[] = {
 101         {
 102                 .start  = 0xFFE80000,
 103                 .end    = 0xFFE80442 - 1,
 104                 .flags  = IORESOURCE_MEM,
 105         },
 106 };
 107
 108 static struct fb_videomode sh7763fb_videomode = {
 109         .refresh = 60,
 110         .name = "VGA Monitor",
 111         .xres = 640,
 112         .yres = 480,
 113         .pixclock = 10000,
 114         .left_margin = 80,
 115         .right_margin = 24,
 116         .upper_margin = 30,
 117         .lower_margin = 1,
 118         .hsync_len = 96,
 119         .vsync_len = 1,
 120         .sync = 0,
 121         .vmode = FB_VMODE_NONINTERLACED,
 122         .flag = FBINFO_FLAG_DEFAULT,
 123 };
 124
 125 static struct sh7760fb_platdata sh7763fb_def_pdata = {
 126         .def_mode = &sh7763fb_videomode,
 127         .ldmtr = (LDMTR_TFT_COLOR_16|LDMTR_MCNT),
 128         .lddfr = LDDFR_16BPP_RGB565,
 129         .ldpmmr = 0x0000,
 130         .ldpspr = 0xFFFF,
 131         .ldaclnr = 0x0001,
 132         .ldickr = 0x1102,
 133         .rotate = 0,
 134         .novsync = 0,
 135         .blank = NULL,
 136 };
 137
 138 static struct platform_device sh7763rdp_fb_device = {
 139         .name           = "sh7760-lcdc",
 140         .resource       = sh7763rdp_fb_resources,
 141         .num_resources = ARRAY_SIZE(sh7763rdp_fb_resources),
 142         .dev = {
 143                 .platform_data = &sh7763fb_def_pdata,
 144         },
 145 };
 146
 147 static struct platform_device *sh7763rdp_devices[] __initdata = {
 148         &sh7763rdp_nor_flash_device,
 149         &sh7763rdp_eth_device,
 150         &sh7763rdp_fb_device,
 151 };
 152
 153 static int __init sh7763rdp_devices_setup(void)
 154 {
 155         return platform_add_devices(sh7763rdp_devices,
 156                                     ARRAY_SIZE(sh7763rdp_devices));
 157 }
 158 device_initcall(sh7763rdp_devices_setup);
 159
 160 static void __init sh7763rdp_setup(char **cmdline_p)
 161 {
 162         /* Board version check */
 163         if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
 164                 printk(KERN_INFO "RTE Standard Configuration\n");
 165         else
 166                 printk(KERN_INFO "RTA Standard Configuration\n");
 167
 168         /* USB pin select bits (clear bit 5-2 to 0) */
 169         __raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
 170         /* USBH setup port I controls to other (clear bits 4-9 to 0) */
 171         __raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR);
 172
 173         /* Select USB Host controller */
 174         __raw_writew(0x00, USB_USBHSC);
 175
 176         /* For LCD */
 177         /* set PTJ7-1, bits 15-2 of PJCR to 0 */
 178         __raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR);
 179         /* set PTI5, bits 11-10 of PICR to 0 */
 180         __raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR);
 181         __raw_writew(0, PORT_PKCR);
 182         __raw_writew(0, PORT_PLCR);
 183         /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */
 184         __raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
 185         /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */
 186         __raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
 187
 188         /* For HAC */
 189         /* bit3-0  0100:HAC & SSI1 enable */
 190         __raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
 191         /* bit14      1:SSI_HAC_CLK enable */
 192         __raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
 193
 194         /* SH-Ether */
 195         __raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
 196         __raw_writew(0x0, PORT_PFCR);
 197         __raw_writew(0x0, PORT_PFCR);
 198         __raw_writew(0x0, PORT_PFCR);
 199
 200         /* MMC */
 201         /*selects SCIF and MMC other functions */
 202         __raw_writew(0x0001, PORT_PSEL0);
 203         /* MMC clock operates */
 204         __raw_writel(__raw_readl(MSTPCR1) & ~0x8, MSTPCR1);
 205         __raw_writew(__raw_readw(PORT_PACR) & ~0x3000, PORT_PACR);
 206         __raw_writew(__raw_readw(PORT_PCCR) & ~0xCFC3, PORT_PCCR);
 207 }
 208
 209 static struct sh_machine_vector mv_sh7763rdp __initmv = {
 210         .mv_name = "sh7763drp",
 211         .mv_setup = sh7763rdp_setup,
 212         .mv_init_irq = init_sh7763rdp_IRQ,
 213 };