1 // SPDX-License-Identifier: GPL-2.0
4 * Discover the memory map and associated nodes.
6 * This version reads it directly from the AMD northbridge.
8 * Copyright 2002,2003 Andi Kleen, SuSE Labs.
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/string.h>
13 #include <linux/nodemask.h>
14 #include <linux/memblock.h>
17 #include <linux/pci_ids.h>
18 #include <linux/acpi.h>
19 #include <asm/types.h>
20 #include <asm/mmzone.h>
21 #include <asm/proto.h>
22 #include <asm/e820/api.h>
23 #include <asm/pci-direct.h>
25 #include <asm/mpspec.h>
27 #include <asm/amd_nb.h>
29 static unsigned char __initdata nodeids
[8];
31 static __init
int find_northbridge(void)
35 for (num
= 0; num
< 32; num
++) {
38 header
= read_pci_config(0, num
, 0, 0x00);
39 if (header
!= (PCI_VENDOR_ID_AMD
| (0x1100<<16)) &&
40 header
!= (PCI_VENDOR_ID_AMD
| (0x1200<<16)) &&
41 header
!= (PCI_VENDOR_ID_AMD
| (0x1300<<16)))
44 header
= read_pci_config(0, num
, 1, 0x00);
45 if (header
!= (PCI_VENDOR_ID_AMD
| (0x1101<<16)) &&
46 header
!= (PCI_VENDOR_ID_AMD
| (0x1201<<16)) &&
47 header
!= (PCI_VENDOR_ID_AMD
| (0x1301<<16)))
55 int __init
amd_numa_init(void)
57 u64 start
= PFN_PHYS(0);
58 u64 end
= PFN_PHYS(max_pfn
);
63 unsigned int bits
, cores
, apicid_base
;
65 if (!early_pci_allowed())
68 nb
= find_northbridge();
72 pr_info("Scanning NUMA topology in Northbridge %d\n", nb
);
74 reg
= read_pci_config(0, nb
, 0, 0x60);
75 numnodes
= ((reg
>> 4) & 0xF) + 1;
79 pr_info("Number of physical nodes %d\n", numnodes
);
82 for (i
= 0; i
< 8; i
++) {
85 base
= read_pci_config(0, nb
, 1, 0x40 + i
*8);
86 limit
= read_pci_config(0, nb
, 1, 0x44 + i
*8);
88 nodeids
[i
] = nodeid
= limit
& 7;
89 if ((base
& 3) == 0) {
91 pr_info("Skipping disabled node %d\n", i
);
94 if (nodeid
>= numnodes
) {
95 pr_info("Ignoring excess node %d (%Lx:%Lx)\n", nodeid
,
101 pr_info("Skipping node entry %d (base %Lx)\n",
105 if ((base
>> 8) & 3 || (limit
>> 8) & 3) {
106 pr_err("Node %d using interleaving mode %Lx/%Lx\n",
107 nodeid
, (base
>> 8) & 3, (limit
>> 8) & 3);
110 if (node_isset(nodeid
, numa_nodes_parsed
)) {
111 pr_info("Node %d already present, skipping\n",
133 pr_err("Empty node %d\n", nodeid
);
137 pr_err("Node %d bogus settings %Lx-%Lx.\n",
138 nodeid
, base
, limit
);
142 /* Could sort here, but pun for now. Should not happen anyroads. */
143 if (prevbase
> base
) {
144 pr_err("Node map not sorted %Lx,%Lx\n",
149 pr_info("Node %d MemBase %016Lx Limit %016Lx\n",
150 nodeid
, base
, limit
);
153 numa_add_memblk(nodeid
, base
, limit
);
154 node_set(nodeid
, numa_nodes_parsed
);
157 if (!nodes_weight(numa_nodes_parsed
))
161 * We seem to have valid NUMA configuration. Map apicids to nodes
162 * using the coreid bits from early_identify_cpu.
164 bits
= boot_cpu_data
.x86_coreid_bits
;
169 * get boot-time SMP configuration:
171 early_get_smp_config();
173 if (boot_cpu_physical_apicid
> 0) {
174 pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid
);
175 apicid_base
= boot_cpu_physical_apicid
;
178 for_each_node_mask(i
, numa_nodes_parsed
)
179 for (j
= apicid_base
; j
< cores
+ apicid_base
; j
++)
180 set_apicid_to_node((i
<< bits
) + j
, i
);