Merge tag 'sched-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel...
[linux/fpc-iii.git] / arch / x86 / xen / enlighten_pv.c
blob4409306364dc3cd5c774ee190efe83a6079a9cc2
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Core of Xen paravirt_ops implementation.
5 * This file contains the xen_paravirt_ops structure itself, and the
6 * implementations for:
7 * - privileged instructions
8 * - interrupt flags
9 * - segment operations
10 * - booting and setup
12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
15 #include <linux/cpu.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/smp.h>
19 #include <linux/preempt.h>
20 #include <linux/hardirq.h>
21 #include <linux/percpu.h>
22 #include <linux/delay.h>
23 #include <linux/start_kernel.h>
24 #include <linux/sched.h>
25 #include <linux/kprobes.h>
26 #include <linux/memblock.h>
27 #include <linux/export.h>
28 #include <linux/mm.h>
29 #include <linux/page-flags.h>
30 #include <linux/highmem.h>
31 #include <linux/console.h>
32 #include <linux/pci.h>
33 #include <linux/gfp.h>
34 #include <linux/edd.h>
35 #include <linux/objtool.h>
37 #include <xen/xen.h>
38 #include <xen/events.h>
39 #include <xen/interface/xen.h>
40 #include <xen/interface/version.h>
41 #include <xen/interface/physdev.h>
42 #include <xen/interface/vcpu.h>
43 #include <xen/interface/memory.h>
44 #include <xen/interface/nmi.h>
45 #include <xen/interface/xen-mca.h>
46 #include <xen/features.h>
47 #include <xen/page.h>
48 #include <xen/hvc-console.h>
49 #include <xen/acpi.h>
51 #include <asm/paravirt.h>
52 #include <asm/apic.h>
53 #include <asm/page.h>
54 #include <asm/xen/pci.h>
55 #include <asm/xen/hypercall.h>
56 #include <asm/xen/hypervisor.h>
57 #include <asm/xen/cpuid.h>
58 #include <asm/fixmap.h>
59 #include <asm/processor.h>
60 #include <asm/proto.h>
61 #include <asm/msr-index.h>
62 #include <asm/traps.h>
63 #include <asm/setup.h>
64 #include <asm/desc.h>
65 #include <asm/pgalloc.h>
66 #include <asm/tlbflush.h>
67 #include <asm/reboot.h>
68 #include <asm/stackprotector.h>
69 #include <asm/hypervisor.h>
70 #include <asm/mach_traps.h>
71 #include <asm/mwait.h>
72 #include <asm/pci_x86.h>
73 #include <asm/cpu.h>
74 #ifdef CONFIG_X86_IOPL_IOPERM
75 #include <asm/io_bitmap.h>
76 #endif
78 #ifdef CONFIG_ACPI
79 #include <linux/acpi.h>
80 #include <asm/acpi.h>
81 #include <acpi/pdc_intel.h>
82 #include <acpi/processor.h>
83 #include <xen/interface/platform.h>
84 #endif
86 #include "xen-ops.h"
87 #include "mmu.h"
88 #include "smp.h"
89 #include "multicalls.h"
90 #include "pmu.h"
92 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */
94 void *xen_initial_gdt;
96 static int xen_cpu_up_prepare_pv(unsigned int cpu);
97 static int xen_cpu_dead_pv(unsigned int cpu);
99 struct tls_descs {
100 struct desc_struct desc[3];
104 * Updating the 3 TLS descriptors in the GDT on every task switch is
105 * surprisingly expensive so we avoid updating them if they haven't
106 * changed. Since Xen writes different descriptors than the one
107 * passed in the update_descriptor hypercall we keep shadow copies to
108 * compare against.
110 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
112 static void __init xen_banner(void)
114 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
115 struct xen_extraversion extra;
116 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
118 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name);
119 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
120 version >> 16, version & 0xffff, extra.extraversion,
121 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
124 static void __init xen_pv_init_platform(void)
126 populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP));
128 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info);
129 HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
131 /* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */
132 xen_vcpu_info_reset(0);
134 /* pvclock is in shared info area */
135 xen_init_time_ops();
138 static void __init xen_pv_guest_late_init(void)
140 #ifndef CONFIG_SMP
141 /* Setup shared vcpu info for non-smp configurations */
142 xen_setup_vcpu_info_placement();
143 #endif
146 /* Check if running on Xen version (major, minor) or later */
147 bool
148 xen_running_on_version_or_later(unsigned int major, unsigned int minor)
150 unsigned int version;
152 if (!xen_domain())
153 return false;
155 version = HYPERVISOR_xen_version(XENVER_version, NULL);
156 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
157 ((version >> 16) > major))
158 return true;
159 return false;
162 static __read_mostly unsigned int cpuid_leaf5_ecx_val;
163 static __read_mostly unsigned int cpuid_leaf5_edx_val;
165 static void xen_cpuid(unsigned int *ax, unsigned int *bx,
166 unsigned int *cx, unsigned int *dx)
168 unsigned maskebx = ~0;
171 * Mask out inconvenient features, to try and disable as many
172 * unsupported kernel subsystems as possible.
174 switch (*ax) {
175 case CPUID_MWAIT_LEAF:
176 /* Synthesize the values.. */
177 *ax = 0;
178 *bx = 0;
179 *cx = cpuid_leaf5_ecx_val;
180 *dx = cpuid_leaf5_edx_val;
181 return;
183 case 0xb:
184 /* Suppress extended topology stuff */
185 maskebx = 0;
186 break;
189 asm(XEN_EMULATE_PREFIX "cpuid"
190 : "=a" (*ax),
191 "=b" (*bx),
192 "=c" (*cx),
193 "=d" (*dx)
194 : "0" (*ax), "2" (*cx));
196 *bx &= maskebx;
198 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */
200 static bool __init xen_check_mwait(void)
202 #ifdef CONFIG_ACPI
203 struct xen_platform_op op = {
204 .cmd = XENPF_set_processor_pminfo,
205 .u.set_pminfo.id = -1,
206 .u.set_pminfo.type = XEN_PM_PDC,
208 uint32_t buf[3];
209 unsigned int ax, bx, cx, dx;
210 unsigned int mwait_mask;
212 /* We need to determine whether it is OK to expose the MWAIT
213 * capability to the kernel to harvest deeper than C3 states from ACPI
214 * _CST using the processor_harvest_xen.c module. For this to work, we
215 * need to gather the MWAIT_LEAF values (which the cstate.c code
216 * checks against). The hypervisor won't expose the MWAIT flag because
217 * it would break backwards compatibility; so we will find out directly
218 * from the hardware and hypercall.
220 if (!xen_initial_domain())
221 return false;
224 * When running under platform earlier than Xen4.2, do not expose
225 * mwait, to avoid the risk of loading native acpi pad driver
227 if (!xen_running_on_version_or_later(4, 2))
228 return false;
230 ax = 1;
231 cx = 0;
233 native_cpuid(&ax, &bx, &cx, &dx);
235 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
236 (1 << (X86_FEATURE_MWAIT % 32));
238 if ((cx & mwait_mask) != mwait_mask)
239 return false;
241 /* We need to emulate the MWAIT_LEAF and for that we need both
242 * ecx and edx. The hypercall provides only partial information.
245 ax = CPUID_MWAIT_LEAF;
246 bx = 0;
247 cx = 0;
248 dx = 0;
250 native_cpuid(&ax, &bx, &cx, &dx);
252 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
253 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
255 buf[0] = ACPI_PDC_REVISION_ID;
256 buf[1] = 1;
257 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
259 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
261 if ((HYPERVISOR_platform_op(&op) == 0) &&
262 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
263 cpuid_leaf5_ecx_val = cx;
264 cpuid_leaf5_edx_val = dx;
266 return true;
267 #else
268 return false;
269 #endif
272 static bool __init xen_check_xsave(void)
274 unsigned int cx, xsave_mask;
276 cx = cpuid_ecx(1);
278 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) |
279 (1 << (X86_FEATURE_OSXSAVE % 32));
281 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
282 return (cx & xsave_mask) == xsave_mask;
285 static void __init xen_init_capabilities(void)
287 setup_force_cpu_cap(X86_FEATURE_XENPV);
288 setup_clear_cpu_cap(X86_FEATURE_DCA);
289 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF);
290 setup_clear_cpu_cap(X86_FEATURE_MTRR);
291 setup_clear_cpu_cap(X86_FEATURE_ACC);
292 setup_clear_cpu_cap(X86_FEATURE_X2APIC);
293 setup_clear_cpu_cap(X86_FEATURE_SME);
296 * Xen PV would need some work to support PCID: CR3 handling as well
297 * as xen_flush_tlb_others() would need updating.
299 setup_clear_cpu_cap(X86_FEATURE_PCID);
301 if (!xen_initial_domain())
302 setup_clear_cpu_cap(X86_FEATURE_ACPI);
304 if (xen_check_mwait())
305 setup_force_cpu_cap(X86_FEATURE_MWAIT);
306 else
307 setup_clear_cpu_cap(X86_FEATURE_MWAIT);
309 if (!xen_check_xsave()) {
310 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
311 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE);
315 static void xen_set_debugreg(int reg, unsigned long val)
317 HYPERVISOR_set_debugreg(reg, val);
320 static unsigned long xen_get_debugreg(int reg)
322 return HYPERVISOR_get_debugreg(reg);
325 static void xen_end_context_switch(struct task_struct *next)
327 xen_mc_flush();
328 paravirt_end_context_switch(next);
331 static unsigned long xen_store_tr(void)
333 return 0;
337 * Set the page permissions for a particular virtual address. If the
338 * address is a vmalloc mapping (or other non-linear mapping), then
339 * find the linear mapping of the page and also set its protections to
340 * match.
342 static void set_aliased_prot(void *v, pgprot_t prot)
344 int level;
345 pte_t *ptep;
346 pte_t pte;
347 unsigned long pfn;
348 unsigned char dummy;
349 void *va;
351 ptep = lookup_address((unsigned long)v, &level);
352 BUG_ON(ptep == NULL);
354 pfn = pte_pfn(*ptep);
355 pte = pfn_pte(pfn, prot);
358 * Careful: update_va_mapping() will fail if the virtual address
359 * we're poking isn't populated in the page tables. We don't
360 * need to worry about the direct map (that's always in the page
361 * tables), but we need to be careful about vmap space. In
362 * particular, the top level page table can lazily propagate
363 * entries between processes, so if we've switched mms since we
364 * vmapped the target in the first place, we might not have the
365 * top-level page table entry populated.
367 * We disable preemption because we want the same mm active when
368 * we probe the target and when we issue the hypercall. We'll
369 * have the same nominal mm, but if we're a kernel thread, lazy
370 * mm dropping could change our pgd.
372 * Out of an abundance of caution, this uses __get_user() to fault
373 * in the target address just in case there's some obscure case
374 * in which the target address isn't readable.
377 preempt_disable();
379 copy_from_kernel_nofault(&dummy, v, 1);
381 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
382 BUG();
384 va = __va(PFN_PHYS(pfn));
386 if (va != v && HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
387 BUG();
389 preempt_enable();
392 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
394 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
395 int i;
398 * We need to mark the all aliases of the LDT pages RO. We
399 * don't need to call vm_flush_aliases(), though, since that's
400 * only responsible for flushing aliases out the TLBs, not the
401 * page tables, and Xen will flush the TLB for us if needed.
403 * To avoid confusing future readers: none of this is necessary
404 * to load the LDT. The hypervisor only checks this when the
405 * LDT is faulted in due to subsequent descriptor access.
408 for (i = 0; i < entries; i += entries_per_page)
409 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
412 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
414 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
415 int i;
417 for (i = 0; i < entries; i += entries_per_page)
418 set_aliased_prot(ldt + i, PAGE_KERNEL);
421 static void xen_set_ldt(const void *addr, unsigned entries)
423 struct mmuext_op *op;
424 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
426 trace_xen_cpu_set_ldt(addr, entries);
428 op = mcs.args;
429 op->cmd = MMUEXT_SET_LDT;
430 op->arg1.linear_addr = (unsigned long)addr;
431 op->arg2.nr_ents = entries;
433 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
435 xen_mc_issue(PARAVIRT_LAZY_CPU);
438 static void xen_load_gdt(const struct desc_ptr *dtr)
440 unsigned long va = dtr->address;
441 unsigned int size = dtr->size + 1;
442 unsigned long pfn, mfn;
443 int level;
444 pte_t *ptep;
445 void *virt;
447 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
448 BUG_ON(size > PAGE_SIZE);
449 BUG_ON(va & ~PAGE_MASK);
452 * The GDT is per-cpu and is in the percpu data area.
453 * That can be virtually mapped, so we need to do a
454 * page-walk to get the underlying MFN for the
455 * hypercall. The page can also be in the kernel's
456 * linear range, so we need to RO that mapping too.
458 ptep = lookup_address(va, &level);
459 BUG_ON(ptep == NULL);
461 pfn = pte_pfn(*ptep);
462 mfn = pfn_to_mfn(pfn);
463 virt = __va(PFN_PHYS(pfn));
465 make_lowmem_page_readonly((void *)va);
466 make_lowmem_page_readonly(virt);
468 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
469 BUG();
473 * load_gdt for early boot, when the gdt is only mapped once
475 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
477 unsigned long va = dtr->address;
478 unsigned int size = dtr->size + 1;
479 unsigned long pfn, mfn;
480 pte_t pte;
482 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
483 BUG_ON(size > PAGE_SIZE);
484 BUG_ON(va & ~PAGE_MASK);
486 pfn = virt_to_pfn(va);
487 mfn = pfn_to_mfn(pfn);
489 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
491 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
492 BUG();
494 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
495 BUG();
498 static inline bool desc_equal(const struct desc_struct *d1,
499 const struct desc_struct *d2)
501 return !memcmp(d1, d2, sizeof(*d1));
504 static void load_TLS_descriptor(struct thread_struct *t,
505 unsigned int cpu, unsigned int i)
507 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
508 struct desc_struct *gdt;
509 xmaddr_t maddr;
510 struct multicall_space mc;
512 if (desc_equal(shadow, &t->tls_array[i]))
513 return;
515 *shadow = t->tls_array[i];
517 gdt = get_cpu_gdt_rw(cpu);
518 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
519 mc = __xen_mc_entry(0);
521 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
524 static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
527 * In lazy mode we need to zero %fs, otherwise we may get an
528 * exception between the new %fs descriptor being loaded and
529 * %fs being effectively cleared at __switch_to().
531 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)
532 loadsegment(fs, 0);
534 xen_mc_batch();
536 load_TLS_descriptor(t, cpu, 0);
537 load_TLS_descriptor(t, cpu, 1);
538 load_TLS_descriptor(t, cpu, 2);
540 xen_mc_issue(PARAVIRT_LAZY_CPU);
543 static void xen_load_gs_index(unsigned int idx)
545 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
546 BUG();
549 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
550 const void *ptr)
552 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
553 u64 entry = *(u64 *)ptr;
555 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
557 preempt_disable();
559 xen_mc_flush();
560 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
561 BUG();
563 preempt_enable();
566 void noist_exc_debug(struct pt_regs *regs);
568 DEFINE_IDTENTRY_RAW(xenpv_exc_nmi)
570 /* On Xen PV, NMI doesn't use IST. The C part is the sane as native. */
571 exc_nmi(regs);
574 DEFINE_IDTENTRY_RAW(xenpv_exc_debug)
577 * There's no IST on Xen PV, but we still need to dispatch
578 * to the correct handler.
580 if (user_mode(regs))
581 noist_exc_debug(regs);
582 else
583 exc_debug(regs);
586 struct trap_array_entry {
587 void (*orig)(void);
588 void (*xen)(void);
589 bool ist_okay;
592 #define TRAP_ENTRY(func, ist_ok) { \
593 .orig = asm_##func, \
594 .xen = xen_asm_##func, \
595 .ist_okay = ist_ok }
597 #define TRAP_ENTRY_REDIR(func, ist_ok) { \
598 .orig = asm_##func, \
599 .xen = xen_asm_xenpv_##func, \
600 .ist_okay = ist_ok }
602 static struct trap_array_entry trap_array[] = {
603 TRAP_ENTRY_REDIR(exc_debug, true ),
604 TRAP_ENTRY(exc_double_fault, true ),
605 #ifdef CONFIG_X86_MCE
606 TRAP_ENTRY(exc_machine_check, true ),
607 #endif
608 TRAP_ENTRY_REDIR(exc_nmi, true ),
609 TRAP_ENTRY(exc_int3, false ),
610 TRAP_ENTRY(exc_overflow, false ),
611 #ifdef CONFIG_IA32_EMULATION
612 { entry_INT80_compat, xen_entry_INT80_compat, false },
613 #endif
614 TRAP_ENTRY(exc_page_fault, false ),
615 TRAP_ENTRY(exc_divide_error, false ),
616 TRAP_ENTRY(exc_bounds, false ),
617 TRAP_ENTRY(exc_invalid_op, false ),
618 TRAP_ENTRY(exc_device_not_available, false ),
619 TRAP_ENTRY(exc_coproc_segment_overrun, false ),
620 TRAP_ENTRY(exc_invalid_tss, false ),
621 TRAP_ENTRY(exc_segment_not_present, false ),
622 TRAP_ENTRY(exc_stack_segment, false ),
623 TRAP_ENTRY(exc_general_protection, false ),
624 TRAP_ENTRY(exc_spurious_interrupt_bug, false ),
625 TRAP_ENTRY(exc_coprocessor_error, false ),
626 TRAP_ENTRY(exc_alignment_check, false ),
627 TRAP_ENTRY(exc_simd_coprocessor_error, false ),
630 static bool __ref get_trap_addr(void **addr, unsigned int ist)
632 unsigned int nr;
633 bool ist_okay = false;
636 * Replace trap handler addresses by Xen specific ones.
637 * Check for known traps using IST and whitelist them.
638 * The debugger ones are the only ones we care about.
639 * Xen will handle faults like double_fault, so we should never see
640 * them. Warn if there's an unexpected IST-using fault handler.
642 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) {
643 struct trap_array_entry *entry = trap_array + nr;
645 if (*addr == entry->orig) {
646 *addr = entry->xen;
647 ist_okay = entry->ist_okay;
648 break;
652 if (nr == ARRAY_SIZE(trap_array) &&
653 *addr >= (void *)early_idt_handler_array[0] &&
654 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) {
655 nr = (*addr - (void *)early_idt_handler_array[0]) /
656 EARLY_IDT_HANDLER_SIZE;
657 *addr = (void *)xen_early_idt_handler_array[nr];
660 if (WARN_ON(ist != 0 && !ist_okay))
661 return false;
663 return true;
666 static int cvt_gate_to_trap(int vector, const gate_desc *val,
667 struct trap_info *info)
669 unsigned long addr;
671 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT)
672 return 0;
674 info->vector = vector;
676 addr = gate_offset(val);
677 if (!get_trap_addr((void **)&addr, val->bits.ist))
678 return 0;
679 info->address = addr;
681 info->cs = gate_segment(val);
682 info->flags = val->bits.dpl;
683 /* interrupt gates clear IF */
684 if (val->bits.type == GATE_INTERRUPT)
685 info->flags |= 1 << 2;
687 return 1;
690 /* Locations of each CPU's IDT */
691 static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
693 /* Set an IDT entry. If the entry is part of the current IDT, then
694 also update Xen. */
695 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
697 unsigned long p = (unsigned long)&dt[entrynum];
698 unsigned long start, end;
700 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
702 preempt_disable();
704 start = __this_cpu_read(idt_desc.address);
705 end = start + __this_cpu_read(idt_desc.size) + 1;
707 xen_mc_flush();
709 native_write_idt_entry(dt, entrynum, g);
711 if (p >= start && (p + 8) <= end) {
712 struct trap_info info[2];
714 info[1].address = 0;
716 if (cvt_gate_to_trap(entrynum, g, &info[0]))
717 if (HYPERVISOR_set_trap_table(info))
718 BUG();
721 preempt_enable();
724 static void xen_convert_trap_info(const struct desc_ptr *desc,
725 struct trap_info *traps)
727 unsigned in, out, count;
729 count = (desc->size+1) / sizeof(gate_desc);
730 BUG_ON(count > 256);
732 for (in = out = 0; in < count; in++) {
733 gate_desc *entry = (gate_desc *)(desc->address) + in;
735 if (cvt_gate_to_trap(in, entry, &traps[out]))
736 out++;
738 traps[out].address = 0;
741 void xen_copy_trap_info(struct trap_info *traps)
743 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc);
745 xen_convert_trap_info(desc, traps);
748 /* Load a new IDT into Xen. In principle this can be per-CPU, so we
749 hold a spinlock to protect the static traps[] array (static because
750 it avoids allocation, and saves stack space). */
751 static void xen_load_idt(const struct desc_ptr *desc)
753 static DEFINE_SPINLOCK(lock);
754 static struct trap_info traps[257];
756 trace_xen_cpu_load_idt(desc);
758 spin_lock(&lock);
760 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc));
762 xen_convert_trap_info(desc, traps);
764 xen_mc_flush();
765 if (HYPERVISOR_set_trap_table(traps))
766 BUG();
768 spin_unlock(&lock);
771 /* Write a GDT descriptor entry. Ignore LDT descriptors, since
772 they're handled differently. */
773 static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
774 const void *desc, int type)
776 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
778 preempt_disable();
780 switch (type) {
781 case DESC_LDT:
782 case DESC_TSS:
783 /* ignore */
784 break;
786 default: {
787 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
789 xen_mc_flush();
790 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
791 BUG();
796 preempt_enable();
800 * Version of write_gdt_entry for use at early boot-time needed to
801 * update an entry as simply as possible.
803 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
804 const void *desc, int type)
806 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
808 switch (type) {
809 case DESC_LDT:
810 case DESC_TSS:
811 /* ignore */
812 break;
814 default: {
815 xmaddr_t maddr = virt_to_machine(&dt[entry]);
817 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
818 dt[entry] = *(struct desc_struct *)desc;
824 static void xen_load_sp0(unsigned long sp0)
826 struct multicall_space mcs;
828 mcs = xen_mc_entry(0);
829 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0);
830 xen_mc_issue(PARAVIRT_LAZY_CPU);
831 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0);
834 #ifdef CONFIG_X86_IOPL_IOPERM
835 static void xen_invalidate_io_bitmap(void)
837 struct physdev_set_iobitmap iobitmap = {
838 .bitmap = NULL,
839 .nr_ports = 0,
842 native_tss_invalidate_io_bitmap();
843 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap);
846 static void xen_update_io_bitmap(void)
848 struct physdev_set_iobitmap iobitmap;
849 struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw);
851 native_tss_update_io_bitmap();
853 iobitmap.bitmap = (uint8_t *)(&tss->x86_tss) +
854 tss->x86_tss.io_bitmap_base;
855 if (tss->x86_tss.io_bitmap_base == IO_BITMAP_OFFSET_INVALID)
856 iobitmap.nr_ports = 0;
857 else
858 iobitmap.nr_ports = IO_BITMAP_BITS;
860 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap);
862 #endif
864 static void xen_io_delay(void)
868 static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
870 static unsigned long xen_read_cr0(void)
872 unsigned long cr0 = this_cpu_read(xen_cr0_value);
874 if (unlikely(cr0 == 0)) {
875 cr0 = native_read_cr0();
876 this_cpu_write(xen_cr0_value, cr0);
879 return cr0;
882 static void xen_write_cr0(unsigned long cr0)
884 struct multicall_space mcs;
886 this_cpu_write(xen_cr0_value, cr0);
888 /* Only pay attention to cr0.TS; everything else is
889 ignored. */
890 mcs = xen_mc_entry(0);
892 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
894 xen_mc_issue(PARAVIRT_LAZY_CPU);
897 static void xen_write_cr4(unsigned long cr4)
899 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE);
901 native_write_cr4(cr4);
904 static u64 xen_read_msr_safe(unsigned int msr, int *err)
906 u64 val;
908 if (pmu_msr_read(msr, &val, err))
909 return val;
911 val = native_read_msr_safe(msr, err);
912 switch (msr) {
913 case MSR_IA32_APICBASE:
914 val &= ~X2APIC_ENABLE;
915 break;
917 return val;
920 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
922 int ret;
923 unsigned int which;
924 u64 base;
926 ret = 0;
928 switch (msr) {
929 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
930 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
931 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
933 set:
934 base = ((u64)high << 32) | low;
935 if (HYPERVISOR_set_segment_base(which, base) != 0)
936 ret = -EIO;
937 break;
939 case MSR_STAR:
940 case MSR_CSTAR:
941 case MSR_LSTAR:
942 case MSR_SYSCALL_MASK:
943 case MSR_IA32_SYSENTER_CS:
944 case MSR_IA32_SYSENTER_ESP:
945 case MSR_IA32_SYSENTER_EIP:
946 /* Fast syscall setup is all done in hypercalls, so
947 these are all ignored. Stub them out here to stop
948 Xen console noise. */
949 break;
951 default:
952 if (!pmu_msr_write(msr, low, high, &ret))
953 ret = native_write_msr_safe(msr, low, high);
956 return ret;
959 static u64 xen_read_msr(unsigned int msr)
962 * This will silently swallow a #GP from RDMSR. It may be worth
963 * changing that.
965 int err;
967 return xen_read_msr_safe(msr, &err);
970 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
973 * This will silently swallow a #GP from WRMSR. It may be worth
974 * changing that.
976 xen_write_msr_safe(msr, low, high);
979 /* This is called once we have the cpu_possible_mask */
980 void __init xen_setup_vcpu_info_placement(void)
982 int cpu;
984 for_each_possible_cpu(cpu) {
985 /* Set up direct vCPU id mapping for PV guests. */
986 per_cpu(xen_vcpu_id, cpu) = cpu;
989 * xen_vcpu_setup(cpu) can fail -- in which case it
990 * falls back to the shared_info version for cpus
991 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS.
993 * xen_cpu_up_prepare_pv() handles the rest by failing
994 * them in hotplug.
996 (void) xen_vcpu_setup(cpu);
1000 * xen_vcpu_setup managed to place the vcpu_info within the
1001 * percpu area for all cpus, so make use of it.
1003 if (xen_have_vcpu_info_placement) {
1004 pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1005 pv_ops.irq.restore_fl =
1006 __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1007 pv_ops.irq.irq_disable =
1008 __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1009 pv_ops.irq.irq_enable =
1010 __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
1011 pv_ops.mmu.read_cr2 =
1012 __PV_IS_CALLEE_SAVE(xen_read_cr2_direct);
1016 static const struct pv_info xen_info __initconst = {
1017 .extra_user_64bit_cs = FLAT_USER_CS64,
1018 .name = "Xen",
1021 static const struct pv_cpu_ops xen_cpu_ops __initconst = {
1022 .cpuid = xen_cpuid,
1024 .set_debugreg = xen_set_debugreg,
1025 .get_debugreg = xen_get_debugreg,
1027 .read_cr0 = xen_read_cr0,
1028 .write_cr0 = xen_write_cr0,
1030 .write_cr4 = xen_write_cr4,
1032 .wbinvd = native_wbinvd,
1034 .read_msr = xen_read_msr,
1035 .write_msr = xen_write_msr,
1037 .read_msr_safe = xen_read_msr_safe,
1038 .write_msr_safe = xen_write_msr_safe,
1040 .read_pmc = xen_read_pmc,
1042 .iret = xen_iret,
1043 .usergs_sysret64 = xen_sysret64,
1045 .load_tr_desc = paravirt_nop,
1046 .set_ldt = xen_set_ldt,
1047 .load_gdt = xen_load_gdt,
1048 .load_idt = xen_load_idt,
1049 .load_tls = xen_load_tls,
1050 .load_gs_index = xen_load_gs_index,
1052 .alloc_ldt = xen_alloc_ldt,
1053 .free_ldt = xen_free_ldt,
1055 .store_tr = xen_store_tr,
1057 .write_ldt_entry = xen_write_ldt_entry,
1058 .write_gdt_entry = xen_write_gdt_entry,
1059 .write_idt_entry = xen_write_idt_entry,
1060 .load_sp0 = xen_load_sp0,
1062 #ifdef CONFIG_X86_IOPL_IOPERM
1063 .invalidate_io_bitmap = xen_invalidate_io_bitmap,
1064 .update_io_bitmap = xen_update_io_bitmap,
1065 #endif
1066 .io_delay = xen_io_delay,
1068 /* Xen takes care of %gs when switching to usermode for us */
1069 .swapgs = paravirt_nop,
1071 .start_context_switch = paravirt_start_context_switch,
1072 .end_context_switch = xen_end_context_switch,
1075 static void xen_restart(char *msg)
1077 xen_reboot(SHUTDOWN_reboot);
1080 static void xen_machine_halt(void)
1082 xen_reboot(SHUTDOWN_poweroff);
1085 static void xen_machine_power_off(void)
1087 if (pm_power_off)
1088 pm_power_off();
1089 xen_reboot(SHUTDOWN_poweroff);
1092 static void xen_crash_shutdown(struct pt_regs *regs)
1094 xen_reboot(SHUTDOWN_crash);
1097 static const struct machine_ops xen_machine_ops __initconst = {
1098 .restart = xen_restart,
1099 .halt = xen_machine_halt,
1100 .power_off = xen_machine_power_off,
1101 .shutdown = xen_machine_halt,
1102 .crash_shutdown = xen_crash_shutdown,
1103 .emergency_restart = xen_emergency_restart,
1106 static unsigned char xen_get_nmi_reason(void)
1108 unsigned char reason = 0;
1110 /* Construct a value which looks like it came from port 0x61. */
1111 if (test_bit(_XEN_NMIREASON_io_error,
1112 &HYPERVISOR_shared_info->arch.nmi_reason))
1113 reason |= NMI_REASON_IOCHK;
1114 if (test_bit(_XEN_NMIREASON_pci_serr,
1115 &HYPERVISOR_shared_info->arch.nmi_reason))
1116 reason |= NMI_REASON_SERR;
1118 return reason;
1121 static void __init xen_boot_params_init_edd(void)
1123 #if IS_ENABLED(CONFIG_EDD)
1124 struct xen_platform_op op;
1125 struct edd_info *edd_info;
1126 u32 *mbr_signature;
1127 unsigned nr;
1128 int ret;
1130 edd_info = boot_params.eddbuf;
1131 mbr_signature = boot_params.edd_mbr_sig_buffer;
1133 op.cmd = XENPF_firmware_info;
1135 op.u.firmware_info.type = XEN_FW_DISK_INFO;
1136 for (nr = 0; nr < EDDMAXNR; nr++) {
1137 struct edd_info *info = edd_info + nr;
1139 op.u.firmware_info.index = nr;
1140 info->params.length = sizeof(info->params);
1141 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1142 &info->params);
1143 ret = HYPERVISOR_platform_op(&op);
1144 if (ret)
1145 break;
1147 #define C(x) info->x = op.u.firmware_info.u.disk_info.x
1148 C(device);
1149 C(version);
1150 C(interface_support);
1151 C(legacy_max_cylinder);
1152 C(legacy_max_head);
1153 C(legacy_sectors_per_track);
1154 #undef C
1156 boot_params.eddbuf_entries = nr;
1158 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1159 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1160 op.u.firmware_info.index = nr;
1161 ret = HYPERVISOR_platform_op(&op);
1162 if (ret)
1163 break;
1164 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1166 boot_params.edd_mbr_sig_buf_entries = nr;
1167 #endif
1171 * Set up the GDT and segment registers for -fstack-protector. Until
1172 * we do this, we have to be careful not to call any stack-protected
1173 * function, which is most of the kernel.
1175 static void __init xen_setup_gdt(int cpu)
1177 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot;
1178 pv_ops.cpu.load_gdt = xen_load_gdt_boot;
1180 setup_stack_canary_segment(cpu);
1181 switch_to_new_gdt(cpu);
1183 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry;
1184 pv_ops.cpu.load_gdt = xen_load_gdt;
1187 static void __init xen_dom0_set_legacy_features(void)
1189 x86_platform.legacy.rtc = 1;
1192 /* First C function to be called on Xen boot */
1193 asmlinkage __visible void __init xen_start_kernel(void)
1195 struct physdev_set_iopl set_iopl;
1196 unsigned long initrd_start = 0;
1197 int rc;
1199 if (!xen_start_info)
1200 return;
1202 xen_domain_type = XEN_PV_DOMAIN;
1203 xen_start_flags = xen_start_info->flags;
1205 xen_setup_features();
1207 /* Install Xen paravirt ops */
1208 pv_info = xen_info;
1209 pv_ops.init.patch = paravirt_patch_default;
1210 pv_ops.cpu = xen_cpu_ops;
1211 xen_init_irq_ops();
1214 * Setup xen_vcpu early because it is needed for
1215 * local_irq_disable(), irqs_disabled(), e.g. in printk().
1217 * Don't do the full vcpu_info placement stuff until we have
1218 * the cpu_possible_mask and a non-dummy shared_info.
1220 xen_vcpu_info_reset(0);
1222 x86_platform.get_nmi_reason = xen_get_nmi_reason;
1224 x86_init.resources.memory_setup = xen_memory_setup;
1225 x86_init.irqs.intr_mode_select = x86_init_noop;
1226 x86_init.irqs.intr_mode_init = x86_init_noop;
1227 x86_init.oem.arch_setup = xen_arch_setup;
1228 x86_init.oem.banner = xen_banner;
1229 x86_init.hyper.init_platform = xen_pv_init_platform;
1230 x86_init.hyper.guest_late_init = xen_pv_guest_late_init;
1233 * Set up some pagetable state before starting to set any ptes.
1236 xen_setup_machphys_mapping();
1237 xen_init_mmu_ops();
1239 /* Prevent unwanted bits from being set in PTEs. */
1240 __supported_pte_mask &= ~_PAGE_GLOBAL;
1241 __default_kernel_pte_mask &= ~_PAGE_GLOBAL;
1244 * Prevent page tables from being allocated in highmem, even
1245 * if CONFIG_HIGHPTE is enabled.
1247 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1249 /* Get mfn list */
1250 xen_build_dynamic_phys_to_machine();
1253 * Set up kernel GDT and segment registers, mainly so that
1254 * -fstack-protector code can be executed.
1256 xen_setup_gdt(0);
1258 /* Work out if we support NX */
1259 get_cpu_cap(&boot_cpu_data);
1260 x86_configure_nx();
1262 /* Determine virtual and physical address sizes */
1263 get_cpu_address_sizes(&boot_cpu_data);
1265 /* Let's presume PV guests always boot on vCPU with id 0. */
1266 per_cpu(xen_vcpu_id, 0) = 0;
1268 idt_setup_early_handler();
1270 xen_init_capabilities();
1272 #ifdef CONFIG_X86_LOCAL_APIC
1274 * set up the basic apic ops.
1276 xen_init_apic();
1277 #endif
1279 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1280 pv_ops.mmu.ptep_modify_prot_start =
1281 xen_ptep_modify_prot_start;
1282 pv_ops.mmu.ptep_modify_prot_commit =
1283 xen_ptep_modify_prot_commit;
1286 machine_ops = xen_machine_ops;
1289 * The only reliable way to retain the initial address of the
1290 * percpu gdt_page is to remember it here, so we can go and
1291 * mark it RW later, when the initial percpu area is freed.
1293 xen_initial_gdt = &per_cpu(gdt_page, 0);
1295 xen_smp_init();
1297 #ifdef CONFIG_ACPI_NUMA
1299 * The pages we from Xen are not related to machine pages, so
1300 * any NUMA information the kernel tries to get from ACPI will
1301 * be meaningless. Prevent it from trying.
1303 disable_srat();
1304 #endif
1305 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv));
1307 local_irq_disable();
1308 early_boot_irqs_disabled = true;
1310 xen_raw_console_write("mapping kernel into physical memory\n");
1311 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base,
1312 xen_start_info->nr_pages);
1313 xen_reserve_special_pages();
1316 * We used to do this in xen_arch_setup, but that is too late
1317 * on AMD were early_cpu_init (run before ->arch_setup()) calls
1318 * early_amd_init which pokes 0xcf8 port.
1320 set_iopl.iopl = 1;
1321 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1322 if (rc != 0)
1323 xen_raw_printk("physdev_op failed %d\n", rc);
1326 if (xen_start_info->mod_start) {
1327 if (xen_start_info->flags & SIF_MOD_START_PFN)
1328 initrd_start = PFN_PHYS(xen_start_info->mod_start);
1329 else
1330 initrd_start = __pa(xen_start_info->mod_start);
1333 /* Poke various useful things into boot_params */
1334 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1335 boot_params.hdr.ramdisk_image = initrd_start;
1336 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
1337 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
1338 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN;
1340 if (!xen_initial_domain()) {
1341 add_preferred_console("xenboot", 0, NULL);
1342 if (pci_xen)
1343 x86_init.pci.arch_init = pci_xen_init;
1344 } else {
1345 const struct dom0_vga_console_info *info =
1346 (void *)((char *)xen_start_info +
1347 xen_start_info->console.dom0.info_off);
1348 struct xen_platform_op op = {
1349 .cmd = XENPF_firmware_info,
1350 .interface_version = XENPF_INTERFACE_VERSION,
1351 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1354 x86_platform.set_legacy_features =
1355 xen_dom0_set_legacy_features;
1356 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1357 xen_start_info->console.domU.mfn = 0;
1358 xen_start_info->console.domU.evtchn = 0;
1360 if (HYPERVISOR_platform_op(&op) == 0)
1361 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1363 /* Make sure ACS will be enabled */
1364 pci_request_acs();
1366 xen_acpi_sleep_register();
1368 /* Avoid searching for BIOS MP tables */
1369 x86_init.mpparse.find_smp_config = x86_init_noop;
1370 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
1372 xen_boot_params_init_edd();
1374 #ifdef CONFIG_ACPI
1376 * Disable selecting "Firmware First mode" for correctable
1377 * memory errors, as this is the duty of the hypervisor to
1378 * decide.
1380 acpi_disable_cmcff = 1;
1381 #endif
1384 if (!boot_params.screen_info.orig_video_isVGA)
1385 add_preferred_console("tty", 0, NULL);
1386 add_preferred_console("hvc", 0, NULL);
1387 if (boot_params.screen_info.orig_video_isVGA)
1388 add_preferred_console("tty", 0, NULL);
1390 #ifdef CONFIG_PCI
1391 /* PCI BIOS service won't work from a PV guest. */
1392 pci_probe &= ~PCI_PROBE_BIOS;
1393 #endif
1394 xen_raw_console_write("about to get started...\n");
1396 /* We need this for printk timestamps */
1397 xen_setup_runstate_info(0);
1399 xen_efi_init(&boot_params);
1401 /* Start the world */
1402 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
1403 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1406 static int xen_cpu_up_prepare_pv(unsigned int cpu)
1408 int rc;
1410 if (per_cpu(xen_vcpu, cpu) == NULL)
1411 return -ENODEV;
1413 xen_setup_timer(cpu);
1415 rc = xen_smp_intr_init(cpu);
1416 if (rc) {
1417 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n",
1418 cpu, rc);
1419 return rc;
1422 rc = xen_smp_intr_init_pv(cpu);
1423 if (rc) {
1424 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n",
1425 cpu, rc);
1426 return rc;
1429 return 0;
1432 static int xen_cpu_dead_pv(unsigned int cpu)
1434 xen_smp_intr_free(cpu);
1435 xen_smp_intr_free_pv(cpu);
1437 xen_teardown_timer(cpu);
1439 return 0;
1442 static uint32_t __init xen_platform_pv(void)
1444 if (xen_pv_domain())
1445 return xen_cpuid_base();
1447 return 0;
1450 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = {
1451 .name = "Xen PV",
1452 .detect = xen_platform_pv,
1453 .type = X86_HYPER_XEN_PV,
1454 .runtime.pin_vcpu = xen_pin_vcpu,
1455 .ignore_nopv = true,