2 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 # This program is free software; you can redistribute it and/or modify
5 # it under the terms of the GNU General Public License version 2 as
6 # published by the Free Software Foundation.
11 select CLONE_BACKWARDS
12 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
13 select DEVTMPFS if !INITRAMFS_SOURCE=""
14 select GENERIC_ATOMIC64
15 select GENERIC_CLOCKEVENTS
16 select GENERIC_FIND_FIRST_BIT
17 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
18 select GENERIC_IRQ_SHOW
19 select GENERIC_PENDING_IRQ if SMP
20 select GENERIC_SMP_IDLE_THREAD
22 select HAVE_ARCH_TRACEHOOK
23 select HAVE_IOREMAP_PROT
25 select HAVE_KRETPROBES
27 select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
29 select HAVE_PERF_EVENTS
31 select MODULES_USE_ELF_RELA
34 select OF_EARLY_FLATTREE
35 select PERF_USE_VMALLOC
36 select HAVE_DEBUG_STACKOVERFLOW
38 config SCHED_OMIT_FRAME_POINTER
44 config RWSEM_GENERIC_SPINLOCK
47 config ARCH_FLATMEM_ENABLE
56 config GENERIC_CALIBRATE_DELAY
59 config GENERIC_HWEIGHT
62 config STACKTRACE_SUPPORT
66 config HAVE_LATENCYTOP_SUPPORT
73 source "kernel/Kconfig.freezer"
75 menu "ARC Architecture Configuration"
77 menu "ARC Platform/SoC/Board"
79 source "arch/arc/plat-arcfpga/Kconfig"
80 source "arch/arc/plat-tb10x/Kconfig"
81 #New platform adds here
85 menu "ARC CPU Configuration"
94 Support for ARC750 core
98 select ARC_CPU_REL_4_10
100 Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
101 This core has a bunch of cool new features:
102 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
103 Shared Address Spaces (for sharing TLB entires in MMU)
104 -Caches: New Prog Model, Region Flush
105 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
109 config CPU_BIG_ENDIAN
110 bool "Enable Big Endian Mode"
113 Build kernel for Big Endian Mode of ARC CPU
115 # If a platform can't work with 0x8000_0000 based dma_addr_t
116 config ARC_PLAT_NEEDS_CPU_TO_DMA
120 bool "Symmetric Multi-Processing (Incomplete)"
122 select USE_GENERIC_SMP_HELPERS
124 This enables support for systems with more than one CPU. If you have
125 a system with only one CPU, like most personal computers, say N. If
126 you have a system with more than one CPU, say Y.
130 config ARC_HAS_COH_CACHES
133 config ARC_HAS_COH_RTSC
136 config ARC_HAS_REENTRANT_IRQ_LV2
142 int "Maximum number of CPUs (2-32)"
148 bool "Enable Cache Support"
150 # if SMP, cache enabled ONLY if ARC implementation has cache coherency
151 depends on !SMP || ARC_HAS_COH_CACHES
155 config ARC_CACHE_LINE_SHIFT
156 int "Cache Line Length (as power of 2)"
160 Starting with ARC700 4.9, Cache line length is configurable,
161 This option specifies "N", with Line-len = 2 power N
162 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
163 Linux only supports same line lengths for I and D caches.
165 config ARC_HAS_ICACHE
166 bool "Use Instruction Cache"
169 config ARC_HAS_DCACHE
170 bool "Use Data Cache"
173 config ARC_CACHE_PAGES
174 bool "Per Page Cache Control"
176 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
178 This can be used to over-ride the global I/D Cache Enable on a
179 per-page basis (but only for pages accessed via MMU such as
180 Kernel Virtual address or User Virtual Address)
181 TLB entries have a per-page Cache Enable Bit.
182 Note that Global I/D ENABLE + Per Page DISABLE works but corollary
183 Global DISABLE + Per Page ENABLE won't work
185 config ARC_CACHE_VIPT_ALIASING
186 bool "Support VIPT Aliasing D$"
187 depends on ARC_HAS_DCACHE
195 Single Cycle RAMS to store Fast Path Code
199 int "ICCM Size in KB"
201 depends on ARC_HAS_ICCM
206 Single Cycle RAMS to store Fast Path Data
210 int "DCCM Size in KB"
212 depends on ARC_HAS_DCCM
215 hex "DCCM map address"
217 depends on ARC_HAS_DCCM
219 config ARC_HAS_HW_MPY
220 bool "Use Hardware Multiplier (Normal or Faster XMAC)"
223 Influences how gcc generates code for MPY operations.
224 If enabled, MPYxx insns are generated, provided by Standard/XMAC
225 Multipler. Otherwise software multipy lib is used
228 prompt "ARC700 MMU Version"
229 default ARC_MMU_V3 if ARC_CPU_770
230 default ARC_MMU_V2 if ARC_CPU_750D
240 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
241 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
245 depends on ARC_CPU_770
247 Introduced with ARC700 4.10: New Features
248 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
249 Shared Address Spaces (SASID)
255 prompt "MMU Page Size"
256 default ARC_PAGE_SIZE_8K
258 config ARC_PAGE_SIZE_8K
261 Choose between 8k vs 16k
263 config ARC_PAGE_SIZE_16K
265 depends on ARC_MMU_V3
267 config ARC_PAGE_SIZE_4K
269 depends on ARC_MMU_V3
273 config ARC_COMPACT_IRQ_LEVELS
274 bool "ARCompact IRQ Priorities: High(2)/Low(1)"
276 # Timer HAS to be high priority, for any other high priority config
278 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
279 depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
281 if ARC_COMPACT_IRQ_LEVELS
294 config ARC_FPU_SAVE_RESTORE
295 bool "Enable FPU state persistence across context switch"
298 Double Precision Floating Point unit had dedictaed regs which
299 need to be saved/restored across context-switch.
300 Note that ARC FPU is overly simplistic, unlike say x86, which has
301 hardware pieces to allow software to conditionally save/restore,
302 based on actual usage of FPU by a task. Thus our implemn does
303 this for all tasks in system.
308 menuconfig ARC_CPU_REL_4_10
309 bool "Enable support for Rel 4.10 features"
312 -ARC770 (and dependent features) enabled
313 -ARC750 also shares some of the new features with 770
316 bool "Insn: LLOCK/SCOND (efficient atomic ops)"
318 depends on ARC_CPU_770 && !ARC_CANT_LLSC
321 bool "Insn: SWAPE (endian-swap)"
323 depends on ARC_CPU_REL_4_10
326 bool "Insn: RTSC (64-bit r/o cycle counter)"
328 depends on ARC_CPU_REL_4_10
329 # if SMP, enable RTSC only if counter is coherent across cores
330 depends on !SMP || ARC_HAS_COH_RTSC
332 endmenu # "ARC CPU Configuration"
334 config LINUX_LINK_BASE
335 hex "Linux Link Address"
338 ARC700 divides the 32 bit phy address space into two equal halves
339 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
340 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
341 Typically Linux kernel is linked at the start of untransalted addr,
342 hence the default value of 0x8zs.
343 However some customers have peripherals mapped at this addr, so
344 Linux needs to be scooted a bit.
345 If you don't know what the above means, leave this setting alone.
347 config ARC_CURR_IN_REG
348 bool "Dedicate Register r25 for current_task pointer"
351 This reserved Register R25 to point to Current Task in
352 kernel mode. This saves memory access for each such access
355 config ARC_MISALIGN_ACCESS
356 bool "Emulate unaligned memory access (userspace only)"
358 select SYSCTL_ARCH_UNALIGN_NO_WARN
359 select SYSCTL_ARCH_UNALIGN_ALLOW
361 This enables misaligned 16 & 32 bit memory access from user space.
362 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
363 potential bugs in code
366 int "Timer Frequency"
369 config ARC_METAWARE_HLINK
370 bool "Support for Metaware debugger assisted Host access"
373 This options allows a Linux userland apps to directly access
374 host file system (open/creat/read/write etc) with help from
375 Metaware Debugger. This can come in handy for Linux-host communication
376 when there is no real usable peripheral such as EMAC.
382 config ARC_DW2_UNWIND
383 bool "Enable DWARF specific kernel stack unwind"
388 Compiles the kernel with DWARF unwind information and can be used
389 to get stack backtraces.
391 If you say Y here the resulting kernel image will be slightly larger
392 but not slower, and it will give very useful debugging information.
393 If you don't debug the kernel, you can say N, but we may not be able
394 to solve problems without frame unwind information
396 config ARC_DBG_TLB_PARANOIA
397 bool "Paranoia Checks in Low Level TLB Handlers"
401 config ARC_DBG_TLB_MISS_COUNT
402 bool "Profile TLB Misses"
407 Counts number of I and D TLB Misses and exports them via Debugfs
408 The counters can be cleared via Debugfs as well
411 bool "Support U-boot kernel command line passing"
414 If you are using U-boot (www.denx.de) and wish to pass the kernel
415 command line from the U-boot environment to the Linux kernel then
416 switch this option on.
417 ARC U-boot will setup the cmdline in RAM/flash and set r2 to point
418 to it. kernel startup code will append this to DeviceTree
419 /bootargs provided cmdline args.
421 config ARC_BUILTIN_DTB_NAME
422 string "Built in DTB"
424 Set the name of the DTB to embed in the vmlinux binary
425 Leaving it blank selects the minimal "skeleton" dtb
427 source "kernel/Kconfig.preempt"
429 menu "Executable file formats"
430 source "fs/Kconfig.binfmt"
433 endmenu # "ARC Architecture Configuration"
437 source "drivers/Kconfig"
439 source "arch/arc/Kconfig.debug"
440 source "security/Kconfig"
441 source "crypto/Kconfig"