Linux 3.12.28
[linux/fpc-iii.git] / include / asm-generic / gpio.h
blobbde646995d10ab7c214b69fd818ae8328aa6b319
1 #ifndef _ASM_GENERIC_GPIO_H
2 #define _ASM_GENERIC_GPIO_H
4 #include <linux/kernel.h>
5 #include <linux/types.h>
6 #include <linux/errno.h>
7 #include <linux/of.h>
8 #include <linux/pinctrl/pinctrl.h>
10 #ifdef CONFIG_GPIOLIB
12 #include <linux/compiler.h>
14 /* Platforms may implement their GPIO interface with library code,
15 * at a small performance cost for non-inlined operations and some
16 * extra memory (for code and for per-GPIO table entries).
18 * While the GPIO programming interface defines valid GPIO numbers
19 * to be in the range 0..MAX_INT, this library restricts them to the
20 * smaller range 0..ARCH_NR_GPIOS-1.
22 * ARCH_NR_GPIOS is somewhat arbitrary; it usually reflects the sum of
23 * builtin/SoC GPIOs plus a number of GPIOs on expanders; the latter is
24 * actually an estimate of a board-specific value.
27 #ifndef ARCH_NR_GPIOS
28 #define ARCH_NR_GPIOS 256
29 #endif
32 * "valid" GPIO numbers are nonnegative and may be passed to
33 * setup routines like gpio_request(). only some valid numbers
34 * can successfully be requested and used.
36 * Invalid GPIO numbers are useful for indicating no-such-GPIO in
37 * platform data and other tables.
40 static inline bool gpio_is_valid(int number)
42 return number >= 0 && number < ARCH_NR_GPIOS;
45 struct device;
46 struct gpio;
47 struct seq_file;
48 struct module;
49 struct device_node;
50 struct gpio_desc;
52 /**
53 * struct gpio_chip - abstract a GPIO controller
54 * @label: for diagnostics
55 * @dev: optional device providing the GPIOs
56 * @owner: helps prevent removal of modules exporting active GPIOs
57 * @list: links gpio_chips together for traversal
58 * @request: optional hook for chip-specific activation, such as
59 * enabling module power and clock; may sleep
60 * @free: optional hook for chip-specific deactivation, such as
61 * disabling module power and clock; may sleep
62 * @get_direction: returns direction for signal "offset", 0=out, 1=in,
63 * (same as GPIOF_DIR_XXX), or negative error
64 * @direction_input: configures signal "offset" as input, or returns error
65 * @get: returns value for signal "offset"; for output signals this
66 * returns either the value actually sensed, or zero
67 * @direction_output: configures signal "offset" as output, or returns error
68 * @set_debounce: optional hook for setting debounce time for specified gpio in
69 * interrupt triggered gpio chips
70 * @set: assigns output value for signal "offset"
71 * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
72 * implementation may not sleep
73 * @dbg_show: optional routine to show contents in debugfs; default code
74 * will be used when this is omitted, but custom code can show extra
75 * state (such as pullup/pulldown configuration).
76 * @base: identifies the first GPIO number handled by this chip; or, if
77 * negative during registration, requests dynamic ID allocation.
78 * @ngpio: the number of GPIOs handled by this controller; the last GPIO
79 * handled is (base + ngpio - 1).
80 * @desc: array of ngpio descriptors. Private.
81 * @can_sleep: flag must be set iff get()/set() methods sleep, as they
82 * must while accessing GPIO expander chips over I2C or SPI
83 * @names: if set, must be an array of strings to use as alternative
84 * names for the GPIOs in this chip. Any entry in the array
85 * may be NULL if there is no alias for the GPIO, however the
86 * array must be @ngpio entries long. A name can include a single printk
87 * format specifier for an unsigned int. It is substituted by the actual
88 * number of the gpio.
90 * A gpio_chip can help platforms abstract various sources of GPIOs so
91 * they can all be accessed through a common programing interface.
92 * Example sources would be SOC controllers, FPGAs, multifunction
93 * chips, dedicated GPIO expanders, and so on.
95 * Each chip controls a number of signals, identified in method calls
96 * by "offset" values in the range 0..(@ngpio - 1). When those signals
97 * are referenced through calls like gpio_get_value(gpio), the offset
98 * is calculated by subtracting @base from the gpio number.
100 struct gpio_chip {
101 const char *label;
102 struct device *dev;
103 struct module *owner;
104 struct list_head list;
106 int (*request)(struct gpio_chip *chip,
107 unsigned offset);
108 void (*free)(struct gpio_chip *chip,
109 unsigned offset);
110 int (*get_direction)(struct gpio_chip *chip,
111 unsigned offset);
112 int (*direction_input)(struct gpio_chip *chip,
113 unsigned offset);
114 int (*get)(struct gpio_chip *chip,
115 unsigned offset);
116 int (*direction_output)(struct gpio_chip *chip,
117 unsigned offset, int value);
118 int (*set_debounce)(struct gpio_chip *chip,
119 unsigned offset, unsigned debounce);
121 void (*set)(struct gpio_chip *chip,
122 unsigned offset, int value);
124 int (*to_irq)(struct gpio_chip *chip,
125 unsigned offset);
127 void (*dbg_show)(struct seq_file *s,
128 struct gpio_chip *chip);
129 int base;
130 u16 ngpio;
131 struct gpio_desc *desc;
132 const char *const *names;
133 unsigned can_sleep:1;
134 unsigned exported:1;
136 #if defined(CONFIG_OF_GPIO)
138 * If CONFIG_OF is enabled, then all GPIO controllers described in the
139 * device tree automatically may have an OF translation
141 struct device_node *of_node;
142 int of_gpio_n_cells;
143 int (*of_xlate)(struct gpio_chip *gc,
144 const struct of_phandle_args *gpiospec, u32 *flags);
145 #endif
146 #ifdef CONFIG_PINCTRL
148 * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
149 * describe the actual pin range which they serve in an SoC. This
150 * information would be used by pinctrl subsystem to configure
151 * corresponding pins for gpio usage.
153 struct list_head pin_ranges;
154 #endif
157 extern const char *gpiochip_is_requested(struct gpio_chip *chip,
158 unsigned offset);
159 extern struct gpio_chip *gpio_to_chip(unsigned gpio);
161 /* add/remove chips */
162 extern int gpiochip_add(struct gpio_chip *chip);
163 extern int __must_check gpiochip_remove(struct gpio_chip *chip);
164 extern struct gpio_chip *gpiochip_find(void *data,
165 int (*match)(struct gpio_chip *chip,
166 void *data));
169 /* Always use the library code for GPIO management calls,
170 * or when sleeping may be involved.
172 extern int gpio_request(unsigned gpio, const char *label);
173 extern void gpio_free(unsigned gpio);
175 extern int gpio_direction_input(unsigned gpio);
176 extern int gpio_direction_output(unsigned gpio, int value);
178 extern int gpio_set_debounce(unsigned gpio, unsigned debounce);
180 extern int gpio_get_value_cansleep(unsigned gpio);
181 extern void gpio_set_value_cansleep(unsigned gpio, int value);
184 /* A platform's <asm/gpio.h> code may want to inline the I/O calls when
185 * the GPIO is constant and refers to some always-present controller,
186 * giving direct access to chip registers and tight bitbanging loops.
188 extern int __gpio_get_value(unsigned gpio);
189 extern void __gpio_set_value(unsigned gpio, int value);
191 extern int __gpio_cansleep(unsigned gpio);
193 extern int __gpio_to_irq(unsigned gpio);
195 extern int gpio_request_one(unsigned gpio, unsigned long flags, const char *label);
196 extern int gpio_request_array(const struct gpio *array, size_t num);
197 extern void gpio_free_array(const struct gpio *array, size_t num);
199 #ifdef CONFIG_GPIO_SYSFS
202 * A sysfs interface can be exported by individual drivers if they want,
203 * but more typically is configured entirely from userspace.
205 extern int gpio_export(unsigned gpio, bool direction_may_change);
206 extern int gpio_export_link(struct device *dev, const char *name,
207 unsigned gpio);
208 extern int gpio_sysfs_set_active_low(unsigned gpio, int value);
209 extern void gpio_unexport(unsigned gpio);
211 #endif /* CONFIG_GPIO_SYSFS */
213 #ifdef CONFIG_PINCTRL
216 * struct gpio_pin_range - pin range controlled by a gpio chip
217 * @head: list for maintaining set of pin ranges, used internally
218 * @pctldev: pinctrl device which handles corresponding pins
219 * @range: actual range of pins controlled by a gpio controller
222 struct gpio_pin_range {
223 struct list_head node;
224 struct pinctrl_dev *pctldev;
225 struct pinctrl_gpio_range range;
228 int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
229 unsigned int gpio_offset, unsigned int pin_offset,
230 unsigned int npins);
231 void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
233 #else
235 static inline int
236 gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
237 unsigned int gpio_offset, unsigned int pin_offset,
238 unsigned int npins)
240 return 0;
243 static inline void
244 gpiochip_remove_pin_ranges(struct gpio_chip *chip)
248 #endif /* CONFIG_PINCTRL */
250 #else /* !CONFIG_GPIOLIB */
252 static inline bool gpio_is_valid(int number)
254 /* only non-negative numbers are valid */
255 return number >= 0;
258 /* platforms that don't directly support access to GPIOs through I2C, SPI,
259 * or other blocking infrastructure can use these wrappers.
262 static inline int gpio_cansleep(unsigned gpio)
264 return 0;
267 static inline int gpio_get_value_cansleep(unsigned gpio)
269 might_sleep();
270 return __gpio_get_value(gpio);
273 static inline void gpio_set_value_cansleep(unsigned gpio, int value)
275 might_sleep();
276 __gpio_set_value(gpio, value);
279 #endif /* !CONFIG_GPIOLIB */
281 #ifndef CONFIG_GPIO_SYSFS
283 struct device;
285 /* sysfs support is only available with gpiolib, where it's optional */
287 static inline int gpio_export(unsigned gpio, bool direction_may_change)
289 return -ENOSYS;
292 static inline int gpio_export_link(struct device *dev, const char *name,
293 unsigned gpio)
295 return -ENOSYS;
298 static inline int gpio_sysfs_set_active_low(unsigned gpio, int value)
300 return -ENOSYS;
303 static inline void gpio_unexport(unsigned gpio)
306 #endif /* CONFIG_GPIO_SYSFS */
308 #endif /* _ASM_GENERIC_GPIO_H */