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iwlwifi: introduce host commands callbacks
[linux/fpc-iii.git] / drivers / s390 / net / qeth_core_main.c
blob95c6fcf58953bc4880c5fc00692f8a8d18eccf56
1 /*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/string.h>
14 #include <linux/errno.h>
15 #include <linux/kernel.h>
16 #include <linux/ip.h>
17 #include <linux/ipv6.h>
18 #include <linux/tcp.h>
19 #include <linux/mii.h>
20 #include <linux/kthread.h>
21
22 #include <asm-s390/ebcdic.h>
23 #include <asm-s390/io.h>
24 #include <asm/s390_rdev.h>
25
26 #include "qeth_core.h"
27 #include "qeth_core_offl.h"
28
29 #define QETH_DBF_TEXT_(name, level, text...) \
30 do { \
31 if (qeth_dbf_passes(qeth_dbf_##name, level)) { \
32 char *dbf_txt_buf = \
33 get_cpu_var(qeth_core_dbf_txt_buf); \
34 sprintf(dbf_txt_buf, text); \
35 debug_text_event(qeth_dbf_##name, level, dbf_txt_buf); \
36 put_cpu_var(qeth_core_dbf_txt_buf); \
37 } \
38 } while (0)
39
40 struct qeth_card_list_struct qeth_core_card_list;
41 EXPORT_SYMBOL_GPL(qeth_core_card_list);
42 debug_info_t *qeth_dbf_setup;
43 EXPORT_SYMBOL_GPL(qeth_dbf_setup);
44 debug_info_t *qeth_dbf_data;
45 EXPORT_SYMBOL_GPL(qeth_dbf_data);
46 debug_info_t *qeth_dbf_misc;
47 EXPORT_SYMBOL_GPL(qeth_dbf_misc);
48 debug_info_t *qeth_dbf_control;
49 EXPORT_SYMBOL_GPL(qeth_dbf_control);
50 debug_info_t *qeth_dbf_trace;
51 EXPORT_SYMBOL_GPL(qeth_dbf_trace);
52 debug_info_t *qeth_dbf_sense;
53 EXPORT_SYMBOL_GPL(qeth_dbf_sense);
54 debug_info_t *qeth_dbf_qerr;
55 EXPORT_SYMBOL_GPL(qeth_dbf_qerr);
56
57 static struct device *qeth_core_root_dev;
58 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
59 static struct lock_class_key qdio_out_skb_queue_key;
60 static DEFINE_PER_CPU(char[256], qeth_core_dbf_txt_buf);
61
62 static void qeth_send_control_data_cb(struct qeth_channel *,
63 struct qeth_cmd_buffer *);
64 static int qeth_issue_next_read(struct qeth_card *);
65 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
66 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
67 static void qeth_free_buffer_pool(struct qeth_card *);
68 static int qeth_qdio_establish(struct qeth_card *);
69
70
71 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
72 struct qdio_buffer *buffer, int is_tso,
73 int *next_element_to_fill)
74 {
75 struct skb_frag_struct *frag;
76 int fragno;
77 unsigned long addr;
78 int element, cnt, dlen;
79
80 fragno = skb_shinfo(skb)->nr_frags;
81 element = *next_element_to_fill;
82 dlen = 0;
83
84 if (is_tso)
85 buffer->element[element].flags =
86 SBAL_FLAGS_MIDDLE_FRAG;
87 else
88 buffer->element[element].flags =
89 SBAL_FLAGS_FIRST_FRAG;
90 dlen = skb->len - skb->data_len;
91 if (dlen) {
92 buffer->element[element].addr = skb->data;
93 buffer->element[element].length = dlen;
94 element++;
95 }
96 for (cnt = 0; cnt < fragno; cnt++) {
97 frag = &skb_shinfo(skb)->frags[cnt];
98 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
99 frag->page_offset;
100 buffer->element[element].addr = (char *)addr;
101 buffer->element[element].length = frag->size;
102 if (cnt < (fragno - 1))
103 buffer->element[element].flags =
104 SBAL_FLAGS_MIDDLE_FRAG;
105 else
106 buffer->element[element].flags =
107 SBAL_FLAGS_LAST_FRAG;
108 element++;
109 }
110 *next_element_to_fill = element;
111 }
112
113 static inline const char *qeth_get_cardname(struct qeth_card *card)
114 {
115 if (card->info.guestlan) {
116 switch (card->info.type) {
117 case QETH_CARD_TYPE_OSAE:
118 return " Guest LAN QDIO";
119 case QETH_CARD_TYPE_IQD:
120 return " Guest LAN Hiper";
121 default:
122 return " unknown";
123 }
124 } else {
125 switch (card->info.type) {
126 case QETH_CARD_TYPE_OSAE:
127 return " OSD Express";
128 case QETH_CARD_TYPE_IQD:
129 return " HiperSockets";
130 case QETH_CARD_TYPE_OSN:
131 return " OSN QDIO";
132 default:
133 return " unknown";
134 }
135 }
136 return " n/a";
137 }
138
139 /* max length to be returned: 14 */
140 const char *qeth_get_cardname_short(struct qeth_card *card)
141 {
142 if (card->info.guestlan) {
143 switch (card->info.type) {
144 case QETH_CARD_TYPE_OSAE:
145 return "GuestLAN QDIO";
146 case QETH_CARD_TYPE_IQD:
147 return "GuestLAN Hiper";
148 default:
149 return "unknown";
150 }
151 } else {
152 switch (card->info.type) {
153 case QETH_CARD_TYPE_OSAE:
154 switch (card->info.link_type) {
155 case QETH_LINK_TYPE_FAST_ETH:
156 return "OSD_100";
157 case QETH_LINK_TYPE_HSTR:
158 return "HSTR";
159 case QETH_LINK_TYPE_GBIT_ETH:
160 return "OSD_1000";
161 case QETH_LINK_TYPE_10GBIT_ETH:
162 return "OSD_10GIG";
163 case QETH_LINK_TYPE_LANE_ETH100:
164 return "OSD_FE_LANE";
165 case QETH_LINK_TYPE_LANE_TR:
166 return "OSD_TR_LANE";
167 case QETH_LINK_TYPE_LANE_ETH1000:
168 return "OSD_GbE_LANE";
169 case QETH_LINK_TYPE_LANE:
170 return "OSD_ATM_LANE";
171 default:
172 return "OSD_Express";
173 }
174 case QETH_CARD_TYPE_IQD:
175 return "HiperSockets";
176 case QETH_CARD_TYPE_OSN:
177 return "OSN";
178 default:
179 return "unknown";
180 }
181 }
182 return "n/a";
183 }
184
185 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
186 int clear_start_mask)
187 {
188 unsigned long flags;
189
190 spin_lock_irqsave(&card->thread_mask_lock, flags);
191 card->thread_allowed_mask = threads;
192 if (clear_start_mask)
193 card->thread_start_mask &= threads;
194 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
195 wake_up(&card->wait_q);
196 }
197 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
198
199 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
200 {
201 unsigned long flags;
202 int rc = 0;
203
204 spin_lock_irqsave(&card->thread_mask_lock, flags);
205 rc = (card->thread_running_mask & threads);
206 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
207 return rc;
208 }
209 EXPORT_SYMBOL_GPL(qeth_threads_running);
210
211 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
212 {
213 return wait_event_interruptible(card->wait_q,
214 qeth_threads_running(card, threads) == 0);
215 }
216 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
217
218 void qeth_clear_working_pool_list(struct qeth_card *card)
219 {
220 struct qeth_buffer_pool_entry *pool_entry, *tmp;
221
222 QETH_DBF_TEXT(trace, 5, "clwrklst");
223 list_for_each_entry_safe(pool_entry, tmp,
224 &card->qdio.in_buf_pool.entry_list, list){
225 list_del(&pool_entry->list);
226 }
227 }
228 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
229
230 static int qeth_alloc_buffer_pool(struct qeth_card *card)
231 {
232 struct qeth_buffer_pool_entry *pool_entry;
233 void *ptr;
234 int i, j;
235
236 QETH_DBF_TEXT(trace, 5, "alocpool");
237 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
238 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
239 if (!pool_entry) {
240 qeth_free_buffer_pool(card);
241 return -ENOMEM;
242 }
243 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
244 ptr = (void *) __get_free_page(GFP_KERNEL|GFP_DMA);
245 if (!ptr) {
246 while (j > 0)
247 free_page((unsigned long)
248 pool_entry->elements[--j]);
249 kfree(pool_entry);
250 qeth_free_buffer_pool(card);
251 return -ENOMEM;
252 }
253 pool_entry->elements[j] = ptr;
254 }
255 list_add(&pool_entry->init_list,
256 &card->qdio.init_pool.entry_list);
257 }
258 return 0;
259 }
260
261 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
262 {
263 QETH_DBF_TEXT(trace, 2, "realcbp");
264
265 if ((card->state != CARD_STATE_DOWN) &&
266 (card->state != CARD_STATE_RECOVER))
267 return -EPERM;
268
269 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
270 qeth_clear_working_pool_list(card);
271 qeth_free_buffer_pool(card);
272 card->qdio.in_buf_pool.buf_count = bufcnt;
273 card->qdio.init_pool.buf_count = bufcnt;
274 return qeth_alloc_buffer_pool(card);
275 }
276
277 int qeth_set_large_send(struct qeth_card *card,
278 enum qeth_large_send_types type)
279 {
280 int rc = 0;
281
282 if (card->dev == NULL) {
283 card->options.large_send = type;
284 return 0;
285 }
286 if (card->state == CARD_STATE_UP)
287 netif_tx_disable(card->dev);
288 card->options.large_send = type;
289 switch (card->options.large_send) {
290 case QETH_LARGE_SEND_EDDP:
291 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
292 NETIF_F_HW_CSUM;
293 break;
294 case QETH_LARGE_SEND_TSO:
295 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
296 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
297 NETIF_F_HW_CSUM;
298 } else {
299 PRINT_WARN("TSO not supported on %s. "
300 "large_send set to 'no'.\n",
301 card->dev->name);
302 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
303 NETIF_F_HW_CSUM);
304 card->options.large_send = QETH_LARGE_SEND_NO;
305 rc = -EOPNOTSUPP;
306 }
307 break;
308 default: /* includes QETH_LARGE_SEND_NO */
309 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
310 NETIF_F_HW_CSUM);
311 break;
312 }
313 if (card->state == CARD_STATE_UP)
314 netif_wake_queue(card->dev);
315 return rc;
316 }
317 EXPORT_SYMBOL_GPL(qeth_set_large_send);
318
319 static int qeth_issue_next_read(struct qeth_card *card)
320 {
321 int rc;
322 struct qeth_cmd_buffer *iob;
323
324 QETH_DBF_TEXT(trace, 5, "issnxrd");
325 if (card->read.state != CH_STATE_UP)
326 return -EIO;
327 iob = qeth_get_buffer(&card->read);
328 if (!iob) {
329 PRINT_WARN("issue_next_read failed: no iob available!\n");
330 return -ENOMEM;
331 }
332 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
333 QETH_DBF_TEXT(trace, 6, "noirqpnd");
334 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
335 (addr_t) iob, 0, 0);
336 if (rc) {
337 PRINT_ERR("Error in starting next read ccw! rc=%i\n", rc);
338 atomic_set(&card->read.irq_pending, 0);
339 qeth_schedule_recovery(card);
340 wake_up(&card->wait_q);
341 }
342 return rc;
343 }
344
345 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
346 {
347 struct qeth_reply *reply;
348
349 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
350 if (reply) {
351 atomic_set(&reply->refcnt, 1);
352 atomic_set(&reply->received, 0);
353 reply->card = card;
354 };
355 return reply;
356 }
357
358 static void qeth_get_reply(struct qeth_reply *reply)
359 {
360 WARN_ON(atomic_read(&reply->refcnt) <= 0);
361 atomic_inc(&reply->refcnt);
362 }
363
364 static void qeth_put_reply(struct qeth_reply *reply)
365 {
366 WARN_ON(atomic_read(&reply->refcnt) <= 0);
367 if (atomic_dec_and_test(&reply->refcnt))
368 kfree(reply);
369 }
370
371 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd,
372 struct qeth_card *card)
373 {
374 int rc;
375 int com;
376 char *ipa_name;
377
378 com = cmd->hdr.command;
379 rc = cmd->hdr.return_code;
380 ipa_name = qeth_get_ipa_cmd_name(com);
381
382 PRINT_ERR("%s(x%X) for %s returned x%X \"%s\"\n", ipa_name, com,
383 QETH_CARD_IFNAME(card), rc, qeth_get_ipa_msg(rc));
384 }
385
386 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
387 struct qeth_cmd_buffer *iob)
388 {
389 struct qeth_ipa_cmd *cmd = NULL;
390
391 QETH_DBF_TEXT(trace, 5, "chkipad");
392 if (IS_IPA(iob->data)) {
393 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
394 if (IS_IPA_REPLY(cmd)) {
395 if (cmd->hdr.return_code &&
396 (cmd->hdr.command < IPA_CMD_SETCCID ||
397 cmd->hdr.command > IPA_CMD_MODCCID))
398 qeth_issue_ipa_msg(cmd, card);
399 return cmd;
400 } else {
401 switch (cmd->hdr.command) {
402 case IPA_CMD_STOPLAN:
403 PRINT_WARN("Link failure on %s (CHPID 0x%X) - "
404 "there is a network problem or "
405 "someone pulled the cable or "
406 "disabled the port.\n",
407 QETH_CARD_IFNAME(card),
408 card->info.chpid);
409 card->lan_online = 0;
410 if (card->dev && netif_carrier_ok(card->dev))
411 netif_carrier_off(card->dev);
412 return NULL;
413 case IPA_CMD_STARTLAN:
414 PRINT_INFO("Link reestablished on %s "
415 "(CHPID 0x%X). Scheduling "
416 "IP address reset.\n",
417 QETH_CARD_IFNAME(card),
418 card->info.chpid);
419 netif_carrier_on(card->dev);
420 qeth_schedule_recovery(card);
421 return NULL;
422 case IPA_CMD_MODCCID:
423 return cmd;
424 case IPA_CMD_REGISTER_LOCAL_ADDR:
425 QETH_DBF_TEXT(trace, 3, "irla");
426 break;
427 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
428 QETH_DBF_TEXT(trace, 3, "urla");
429 break;
430 default:
431 PRINT_WARN("Received data is IPA "
432 "but not a reply!\n");
433 break;
434 }
435 }
436 }
437 return cmd;
438 }
439
440 void qeth_clear_ipacmd_list(struct qeth_card *card)
441 {
442 struct qeth_reply *reply, *r;
443 unsigned long flags;
444
445 QETH_DBF_TEXT(trace, 4, "clipalst");
446
447 spin_lock_irqsave(&card->lock, flags);
448 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
449 qeth_get_reply(reply);
450 reply->rc = -EIO;
451 atomic_inc(&reply->received);
452 list_del_init(&reply->list);
453 wake_up(&reply->wait_q);
454 qeth_put_reply(reply);
455 }
456 spin_unlock_irqrestore(&card->lock, flags);
457 }
458 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
459
460 static int qeth_check_idx_response(unsigned char *buffer)
461 {
462 if (!buffer)
463 return 0;
464
465 QETH_DBF_HEX(control, 2, buffer, QETH_DBF_CONTROL_LEN);
466 if ((buffer[2] & 0xc0) == 0xc0) {
467 PRINT_WARN("received an IDX TERMINATE "
468 "with cause code 0x%02x%s\n",
469 buffer[4],
470 ((buffer[4] == 0x22) ?
471 " -- try another portname" : ""));
472 QETH_DBF_TEXT(trace, 2, "ckidxres");
473 QETH_DBF_TEXT(trace, 2, " idxterm");
474 QETH_DBF_TEXT_(trace, 2, " rc%d", -EIO);
475 return -EIO;
476 }
477 return 0;
478 }
479
480 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
481 __u32 len)
482 {
483 struct qeth_card *card;
484
485 QETH_DBF_TEXT(trace, 4, "setupccw");
486 card = CARD_FROM_CDEV(channel->ccwdev);
487 if (channel == &card->read)
488 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
489 else
490 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
491 channel->ccw.count = len;
492 channel->ccw.cda = (__u32) __pa(iob);
493 }
494
495 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
496 {
497 __u8 index;
498
499 QETH_DBF_TEXT(trace, 6, "getbuff");
500 index = channel->io_buf_no;
501 do {
502 if (channel->iob[index].state == BUF_STATE_FREE) {
503 channel->iob[index].state = BUF_STATE_LOCKED;
504 channel->io_buf_no = (channel->io_buf_no + 1) %
505 QETH_CMD_BUFFER_NO;
506 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
507 return channel->iob + index;
508 }
509 index = (index + 1) % QETH_CMD_BUFFER_NO;
510 } while (index != channel->io_buf_no);
511
512 return NULL;
513 }
514
515 void qeth_release_buffer(struct qeth_channel *channel,
516 struct qeth_cmd_buffer *iob)
517 {
518 unsigned long flags;
519
520 QETH_DBF_TEXT(trace, 6, "relbuff");
521 spin_lock_irqsave(&channel->iob_lock, flags);
522 memset(iob->data, 0, QETH_BUFSIZE);
523 iob->state = BUF_STATE_FREE;
524 iob->callback = qeth_send_control_data_cb;
525 iob->rc = 0;
526 spin_unlock_irqrestore(&channel->iob_lock, flags);
527 }
528 EXPORT_SYMBOL_GPL(qeth_release_buffer);
529
530 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
531 {
532 struct qeth_cmd_buffer *buffer = NULL;
533 unsigned long flags;
534
535 spin_lock_irqsave(&channel->iob_lock, flags);
536 buffer = __qeth_get_buffer(channel);
537 spin_unlock_irqrestore(&channel->iob_lock, flags);
538 return buffer;
539 }
540
541 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
542 {
543 struct qeth_cmd_buffer *buffer;
544 wait_event(channel->wait_q,
545 ((buffer = qeth_get_buffer(channel)) != NULL));
546 return buffer;
547 }
548 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
549
550 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
551 {
552 int cnt;
553
554 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
555 qeth_release_buffer(channel, &channel->iob[cnt]);
556 channel->buf_no = 0;
557 channel->io_buf_no = 0;
558 }
559 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
560
561 static void qeth_send_control_data_cb(struct qeth_channel *channel,
562 struct qeth_cmd_buffer *iob)
563 {
564 struct qeth_card *card;
565 struct qeth_reply *reply, *r;
566 struct qeth_ipa_cmd *cmd;
567 unsigned long flags;
568 int keep_reply;
569
570 QETH_DBF_TEXT(trace, 4, "sndctlcb");
571
572 card = CARD_FROM_CDEV(channel->ccwdev);
573 if (qeth_check_idx_response(iob->data)) {
574 qeth_clear_ipacmd_list(card);
575 qeth_schedule_recovery(card);
576 goto out;
577 }
578
579 cmd = qeth_check_ipa_data(card, iob);
580 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
581 goto out;
582 /*in case of OSN : check if cmd is set */
583 if (card->info.type == QETH_CARD_TYPE_OSN &&
584 cmd &&
585 cmd->hdr.command != IPA_CMD_STARTLAN &&
586 card->osn_info.assist_cb != NULL) {
587 card->osn_info.assist_cb(card->dev, cmd);
588 goto out;
589 }
590
591 spin_lock_irqsave(&card->lock, flags);
592 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
593 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
594 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
595 qeth_get_reply(reply);
596 list_del_init(&reply->list);
597 spin_unlock_irqrestore(&card->lock, flags);
598 keep_reply = 0;
599 if (reply->callback != NULL) {
600 if (cmd) {
601 reply->offset = (__u16)((char *)cmd -
602 (char *)iob->data);
603 keep_reply = reply->callback(card,
604 reply,
605 (unsigned long)cmd);
606 } else
607 keep_reply = reply->callback(card,
608 reply,
609 (unsigned long)iob);
610 }
611 if (cmd)
612 reply->rc = (u16) cmd->hdr.return_code;
613 else if (iob->rc)
614 reply->rc = iob->rc;
615 if (keep_reply) {
616 spin_lock_irqsave(&card->lock, flags);
617 list_add_tail(&reply->list,
618 &card->cmd_waiter_list);
619 spin_unlock_irqrestore(&card->lock, flags);
620 } else {
621 atomic_inc(&reply->received);
622 wake_up(&reply->wait_q);
623 }
624 qeth_put_reply(reply);
625 goto out;
626 }
627 }
628 spin_unlock_irqrestore(&card->lock, flags);
629 out:
630 memcpy(&card->seqno.pdu_hdr_ack,
631 QETH_PDU_HEADER_SEQ_NO(iob->data),
632 QETH_SEQ_NO_LENGTH);
633 qeth_release_buffer(channel, iob);
634 }
635
636 static int qeth_setup_channel(struct qeth_channel *channel)
637 {
638 int cnt;
639
640 QETH_DBF_TEXT(setup, 2, "setupch");
641 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
642 channel->iob[cnt].data = (char *)
643 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
644 if (channel->iob[cnt].data == NULL)
645 break;
646 channel->iob[cnt].state = BUF_STATE_FREE;
647 channel->iob[cnt].channel = channel;
648 channel->iob[cnt].callback = qeth_send_control_data_cb;
649 channel->iob[cnt].rc = 0;
650 }
651 if (cnt < QETH_CMD_BUFFER_NO) {
652 while (cnt-- > 0)
653 kfree(channel->iob[cnt].data);
654 return -ENOMEM;
655 }
656 channel->buf_no = 0;
657 channel->io_buf_no = 0;
658 atomic_set(&channel->irq_pending, 0);
659 spin_lock_init(&channel->iob_lock);
660
661 init_waitqueue_head(&channel->wait_q);
662 return 0;
663 }
664
665 static int qeth_set_thread_start_bit(struct qeth_card *card,
666 unsigned long thread)
667 {
668 unsigned long flags;
669
670 spin_lock_irqsave(&card->thread_mask_lock, flags);
671 if (!(card->thread_allowed_mask & thread) ||
672 (card->thread_start_mask & thread)) {
673 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
674 return -EPERM;
675 }
676 card->thread_start_mask |= thread;
677 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
678 return 0;
679 }
680
681 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
682 {
683 unsigned long flags;
684
685 spin_lock_irqsave(&card->thread_mask_lock, flags);
686 card->thread_start_mask &= ~thread;
687 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
688 wake_up(&card->wait_q);
689 }
690 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
691
692 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
693 {
694 unsigned long flags;
695
696 spin_lock_irqsave(&card->thread_mask_lock, flags);
697 card->thread_running_mask &= ~thread;
698 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
699 wake_up(&card->wait_q);
700 }
701 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
702
703 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
704 {
705 unsigned long flags;
706 int rc = 0;
707
708 spin_lock_irqsave(&card->thread_mask_lock, flags);
709 if (card->thread_start_mask & thread) {
710 if ((card->thread_allowed_mask & thread) &&
711 !(card->thread_running_mask & thread)) {
712 rc = 1;
713 card->thread_start_mask &= ~thread;
714 card->thread_running_mask |= thread;
715 } else
716 rc = -EPERM;
717 }
718 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
719 return rc;
720 }
721
722 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
723 {
724 int rc = 0;
725
726 wait_event(card->wait_q,
727 (rc = __qeth_do_run_thread(card, thread)) >= 0);
728 return rc;
729 }
730 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
731
732 void qeth_schedule_recovery(struct qeth_card *card)
733 {
734 QETH_DBF_TEXT(trace, 2, "startrec");
735 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
736 schedule_work(&card->kernel_thread_starter);
737 }
738 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
739
740 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
741 {
742 int dstat, cstat;
743 char *sense;
744
745 sense = (char *) irb->ecw;
746 cstat = irb->scsw.cstat;
747 dstat = irb->scsw.dstat;
748
749 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
750 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
751 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
752 QETH_DBF_TEXT(trace, 2, "CGENCHK");
753 PRINT_WARN("check on device %s, dstat=x%x, cstat=x%x ",
754 cdev->dev.bus_id, dstat, cstat);
755 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
756 16, 1, irb, 64, 1);
757 return 1;
758 }
759
760 if (dstat & DEV_STAT_UNIT_CHECK) {
761 if (sense[SENSE_RESETTING_EVENT_BYTE] &
762 SENSE_RESETTING_EVENT_FLAG) {
763 QETH_DBF_TEXT(trace, 2, "REVIND");
764 return 1;
765 }
766 if (sense[SENSE_COMMAND_REJECT_BYTE] &
767 SENSE_COMMAND_REJECT_FLAG) {
768 QETH_DBF_TEXT(trace, 2, "CMDREJi");
769 return 0;
770 }
771 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
772 QETH_DBF_TEXT(trace, 2, "AFFE");
773 return 1;
774 }
775 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
776 QETH_DBF_TEXT(trace, 2, "ZEROSEN");
777 return 0;
778 }
779 QETH_DBF_TEXT(trace, 2, "DGENCHK");
780 return 1;
781 }
782 return 0;
783 }
784
785 static long __qeth_check_irb_error(struct ccw_device *cdev,
786 unsigned long intparm, struct irb *irb)
787 {
788 if (!IS_ERR(irb))
789 return 0;
790
791 switch (PTR_ERR(irb)) {
792 case -EIO:
793 PRINT_WARN("i/o-error on device %s\n", cdev->dev.bus_id);
794 QETH_DBF_TEXT(trace, 2, "ckirberr");
795 QETH_DBF_TEXT_(trace, 2, " rc%d", -EIO);
796 break;
797 case -ETIMEDOUT:
798 PRINT_WARN("timeout on device %s\n", cdev->dev.bus_id);
799 QETH_DBF_TEXT(trace, 2, "ckirberr");
800 QETH_DBF_TEXT_(trace, 2, " rc%d", -ETIMEDOUT);
801 if (intparm == QETH_RCD_PARM) {
802 struct qeth_card *card = CARD_FROM_CDEV(cdev);
803
804 if (card && (card->data.ccwdev == cdev)) {
805 card->data.state = CH_STATE_DOWN;
806 wake_up(&card->wait_q);
807 }
808 }
809 break;
810 default:
811 PRINT_WARN("unknown error %ld on device %s\n", PTR_ERR(irb),
812 cdev->dev.bus_id);
813 QETH_DBF_TEXT(trace, 2, "ckirberr");
814 QETH_DBF_TEXT(trace, 2, " rc???");
815 }
816 return PTR_ERR(irb);
817 }
818
819 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
820 struct irb *irb)
821 {
822 int rc;
823 int cstat, dstat;
824 struct qeth_cmd_buffer *buffer;
825 struct qeth_channel *channel;
826 struct qeth_card *card;
827 struct qeth_cmd_buffer *iob;
828 __u8 index;
829
830 QETH_DBF_TEXT(trace, 5, "irq");
831
832 if (__qeth_check_irb_error(cdev, intparm, irb))
833 return;
834 cstat = irb->scsw.cstat;
835 dstat = irb->scsw.dstat;
836
837 card = CARD_FROM_CDEV(cdev);
838 if (!card)
839 return;
840
841 if (card->read.ccwdev == cdev) {
842 channel = &card->read;
843 QETH_DBF_TEXT(trace, 5, "read");
844 } else if (card->write.ccwdev == cdev) {
845 channel = &card->write;
846 QETH_DBF_TEXT(trace, 5, "write");
847 } else {
848 channel = &card->data;
849 QETH_DBF_TEXT(trace, 5, "data");
850 }
851 atomic_set(&channel->irq_pending, 0);
852
853 if (irb->scsw.fctl & (SCSW_FCTL_CLEAR_FUNC))
854 channel->state = CH_STATE_STOPPED;
855
856 if (irb->scsw.fctl & (SCSW_FCTL_HALT_FUNC))
857 channel->state = CH_STATE_HALTED;
858
859 /*let's wake up immediately on data channel*/
860 if ((channel == &card->data) && (intparm != 0) &&
861 (intparm != QETH_RCD_PARM))
862 goto out;
863
864 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
865 QETH_DBF_TEXT(trace, 6, "clrchpar");
866 /* we don't have to handle this further */
867 intparm = 0;
868 }
869 if (intparm == QETH_HALT_CHANNEL_PARM) {
870 QETH_DBF_TEXT(trace, 6, "hltchpar");
871 /* we don't have to handle this further */
872 intparm = 0;
873 }
874 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
875 (dstat & DEV_STAT_UNIT_CHECK) ||
876 (cstat)) {
877 if (irb->esw.esw0.erw.cons) {
878 /* TODO: we should make this s390dbf */
879 PRINT_WARN("sense data available on channel %s.\n",
880 CHANNEL_ID(channel));
881 PRINT_WARN(" cstat 0x%X\n dstat 0x%X\n", cstat, dstat);
882 print_hex_dump(KERN_WARNING, "qeth: irb ",
883 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
884 print_hex_dump(KERN_WARNING, "qeth: sense data ",
885 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
886 }
887 if (intparm == QETH_RCD_PARM) {
888 channel->state = CH_STATE_DOWN;
889 goto out;
890 }
891 rc = qeth_get_problem(cdev, irb);
892 if (rc) {
893 qeth_schedule_recovery(card);
894 goto out;
895 }
896 }
897
898 if (intparm == QETH_RCD_PARM) {
899 channel->state = CH_STATE_RCD_DONE;
900 goto out;
901 }
902 if (intparm) {
903 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
904 buffer->state = BUF_STATE_PROCESSED;
905 }
906 if (channel == &card->data)
907 return;
908 if (channel == &card->read &&
909 channel->state == CH_STATE_UP)
910 qeth_issue_next_read(card);
911
912 iob = channel->iob;
913 index = channel->buf_no;
914 while (iob[index].state == BUF_STATE_PROCESSED) {
915 if (iob[index].callback != NULL)
916 iob[index].callback(channel, iob + index);
917
918 index = (index + 1) % QETH_CMD_BUFFER_NO;
919 }
920 channel->buf_no = index;
921 out:
922 wake_up(&card->wait_q);
923 return;
924 }
925
926 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
927 struct qeth_qdio_out_buffer *buf)
928 {
929 int i;
930 struct sk_buff *skb;
931
932 /* is PCI flag set on buffer? */
933 if (buf->buffer->element[0].flags & 0x40)
934 atomic_dec(&queue->set_pci_flags_count);
935
936 skb = skb_dequeue(&buf->skb_list);
937 while (skb) {
938 atomic_dec(&skb->users);
939 dev_kfree_skb_any(skb);
940 skb = skb_dequeue(&buf->skb_list);
941 }
942 qeth_eddp_buf_release_contexts(buf);
943 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
944 buf->buffer->element[i].length = 0;
945 buf->buffer->element[i].addr = NULL;
946 buf->buffer->element[i].flags = 0;
947 }
948 buf->next_element_to_fill = 0;
949 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
950 }
951
952 void qeth_clear_qdio_buffers(struct qeth_card *card)
953 {
954 int i, j;
955
956 QETH_DBF_TEXT(trace, 2, "clearqdbf");
957 /* clear outbound buffers to free skbs */
958 for (i = 0; i < card->qdio.no_out_queues; ++i)
959 if (card->qdio.out_qs[i]) {
960 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
961 qeth_clear_output_buffer(card->qdio.out_qs[i],
962 &card->qdio.out_qs[i]->bufs[j]);
963 }
964 }
965 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
966
967 static void qeth_free_buffer_pool(struct qeth_card *card)
968 {
969 struct qeth_buffer_pool_entry *pool_entry, *tmp;
970 int i = 0;
971 QETH_DBF_TEXT(trace, 5, "freepool");
972 list_for_each_entry_safe(pool_entry, tmp,
973 &card->qdio.init_pool.entry_list, init_list){
974 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
975 free_page((unsigned long)pool_entry->elements[i]);
976 list_del(&pool_entry->init_list);
977 kfree(pool_entry);
978 }
979 }
980
981 static void qeth_free_qdio_buffers(struct qeth_card *card)
982 {
983 int i, j;
984
985 QETH_DBF_TEXT(trace, 2, "freeqdbf");
986 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
987 QETH_QDIO_UNINITIALIZED)
988 return;
989 kfree(card->qdio.in_q);
990 card->qdio.in_q = NULL;
991 /* inbound buffer pool */
992 qeth_free_buffer_pool(card);
993 /* free outbound qdio_qs */
994 if (card->qdio.out_qs) {
995 for (i = 0; i < card->qdio.no_out_queues; ++i) {
996 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
997 qeth_clear_output_buffer(card->qdio.out_qs[i],
998 &card->qdio.out_qs[i]->bufs[j]);
999 kfree(card->qdio.out_qs[i]);
1000 }
1001 kfree(card->qdio.out_qs);
1002 card->qdio.out_qs = NULL;
1003 }
1004 }
1005
1006 static void qeth_clean_channel(struct qeth_channel *channel)
1007 {
1008 int cnt;
1009
1010 QETH_DBF_TEXT(setup, 2, "freech");
1011 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1012 kfree(channel->iob[cnt].data);
1013 }
1014
1015 static int qeth_is_1920_device(struct qeth_card *card)
1016 {
1017 int single_queue = 0;
1018 struct ccw_device *ccwdev;
1019 struct channelPath_dsc {
1020 u8 flags;
1021 u8 lsn;
1022 u8 desc;
1023 u8 chpid;
1024 u8 swla;
1025 u8 zeroes;
1026 u8 chla;
1027 u8 chpp;
1028 } *chp_dsc;
1029
1030 QETH_DBF_TEXT(setup, 2, "chk_1920");
1031
1032 ccwdev = card->data.ccwdev;
1033 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1034 if (chp_dsc != NULL) {
1035 /* CHPP field bit 6 == 1 -> single queue */
1036 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1037 kfree(chp_dsc);
1038 }
1039 QETH_DBF_TEXT_(setup, 2, "rc:%x", single_queue);
1040 return single_queue;
1041 }
1042
1043 static void qeth_init_qdio_info(struct qeth_card *card)
1044 {
1045 QETH_DBF_TEXT(setup, 4, "intqdinf");
1046 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1047 /* inbound */
1048 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1049 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1050 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1051 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1052 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1053 }
1054
1055 static void qeth_set_intial_options(struct qeth_card *card)
1056 {
1057 card->options.route4.type = NO_ROUTER;
1058 card->options.route6.type = NO_ROUTER;
1059 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1060 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1061 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1062 card->options.fake_broadcast = 0;
1063 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1064 card->options.fake_ll = 0;
1065 card->options.performance_stats = 0;
1066 card->options.rx_sg_cb = QETH_RX_SG_CB;
1067 }
1068
1069 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1070 {
1071 unsigned long flags;
1072 int rc = 0;
1073
1074 spin_lock_irqsave(&card->thread_mask_lock, flags);
1075 QETH_DBF_TEXT_(trace, 4, " %02x%02x%02x",
1076 (u8) card->thread_start_mask,
1077 (u8) card->thread_allowed_mask,
1078 (u8) card->thread_running_mask);
1079 rc = (card->thread_start_mask & thread);
1080 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1081 return rc;
1082 }
1083
1084 static void qeth_start_kernel_thread(struct work_struct *work)
1085 {
1086 struct qeth_card *card = container_of(work, struct qeth_card,
1087 kernel_thread_starter);
1088 QETH_DBF_TEXT(trace , 2, "strthrd");
1089
1090 if (card->read.state != CH_STATE_UP &&
1091 card->write.state != CH_STATE_UP)
1092 return;
1093 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1094 kthread_run(card->discipline.recover, (void *) card,
1095 "qeth_recover");
1096 }
1097
1098 static int qeth_setup_card(struct qeth_card *card)
1099 {
1100
1101 QETH_DBF_TEXT(setup, 2, "setupcrd");
1102 QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
1103
1104 card->read.state = CH_STATE_DOWN;
1105 card->write.state = CH_STATE_DOWN;
1106 card->data.state = CH_STATE_DOWN;
1107 card->state = CARD_STATE_DOWN;
1108 card->lan_online = 0;
1109 card->use_hard_stop = 0;
1110 card->dev = NULL;
1111 spin_lock_init(&card->vlanlock);
1112 spin_lock_init(&card->mclock);
1113 card->vlangrp = NULL;
1114 spin_lock_init(&card->lock);
1115 spin_lock_init(&card->ip_lock);
1116 spin_lock_init(&card->thread_mask_lock);
1117 card->thread_start_mask = 0;
1118 card->thread_allowed_mask = 0;
1119 card->thread_running_mask = 0;
1120 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1121 INIT_LIST_HEAD(&card->ip_list);
1122 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1123 if (!card->ip_tbd_list) {
1124 QETH_DBF_TEXT(setup, 0, "iptbdnom");
1125 return -ENOMEM;
1126 }
1127 INIT_LIST_HEAD(card->ip_tbd_list);
1128 INIT_LIST_HEAD(&card->cmd_waiter_list);
1129 init_waitqueue_head(&card->wait_q);
1130 /* intial options */
1131 qeth_set_intial_options(card);
1132 /* IP address takeover */
1133 INIT_LIST_HEAD(&card->ipato.entries);
1134 card->ipato.enabled = 0;
1135 card->ipato.invert4 = 0;
1136 card->ipato.invert6 = 0;
1137 /* init QDIO stuff */
1138 qeth_init_qdio_info(card);
1139 return 0;
1140 }
1141
1142 static struct qeth_card *qeth_alloc_card(void)
1143 {
1144 struct qeth_card *card;
1145
1146 QETH_DBF_TEXT(setup, 2, "alloccrd");
1147 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1148 if (!card)
1149 return NULL;
1150 QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
1151 if (qeth_setup_channel(&card->read)) {
1152 kfree(card);
1153 return NULL;
1154 }
1155 if (qeth_setup_channel(&card->write)) {
1156 qeth_clean_channel(&card->read);
1157 kfree(card);
1158 return NULL;
1159 }
1160 card->options.layer2 = -1;
1161 return card;
1162 }
1163
1164 static int qeth_determine_card_type(struct qeth_card *card)
1165 {
1166 int i = 0;
1167
1168 QETH_DBF_TEXT(setup, 2, "detcdtyp");
1169
1170 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1171 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1172 while (known_devices[i][4]) {
1173 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1174 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1175 card->info.type = known_devices[i][4];
1176 card->qdio.no_out_queues = known_devices[i][8];
1177 card->info.is_multicast_different = known_devices[i][9];
1178 if (qeth_is_1920_device(card)) {
1179 PRINT_INFO("Priority Queueing not able "
1180 "due to hardware limitations!\n");
1181 card->qdio.no_out_queues = 1;
1182 card->qdio.default_out_queue = 0;
1183 }
1184 return 0;
1185 }
1186 i++;
1187 }
1188 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1189 PRINT_ERR("unknown card type on device %s\n", CARD_BUS_ID(card));
1190 return -ENOENT;
1191 }
1192
1193 static int qeth_clear_channel(struct qeth_channel *channel)
1194 {
1195 unsigned long flags;
1196 struct qeth_card *card;
1197 int rc;
1198
1199 QETH_DBF_TEXT(trace, 3, "clearch");
1200 card = CARD_FROM_CDEV(channel->ccwdev);
1201 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1202 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1203 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1204
1205 if (rc)
1206 return rc;
1207 rc = wait_event_interruptible_timeout(card->wait_q,
1208 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1209 if (rc == -ERESTARTSYS)
1210 return rc;
1211 if (channel->state != CH_STATE_STOPPED)
1212 return -ETIME;
1213 channel->state = CH_STATE_DOWN;
1214 return 0;
1215 }
1216
1217 static int qeth_halt_channel(struct qeth_channel *channel)
1218 {
1219 unsigned long flags;
1220 struct qeth_card *card;
1221 int rc;
1222
1223 QETH_DBF_TEXT(trace, 3, "haltch");
1224 card = CARD_FROM_CDEV(channel->ccwdev);
1225 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1226 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1227 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1228
1229 if (rc)
1230 return rc;
1231 rc = wait_event_interruptible_timeout(card->wait_q,
1232 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1233 if (rc == -ERESTARTSYS)
1234 return rc;
1235 if (channel->state != CH_STATE_HALTED)
1236 return -ETIME;
1237 return 0;
1238 }
1239
1240 static int qeth_halt_channels(struct qeth_card *card)
1241 {
1242 int rc1 = 0, rc2 = 0, rc3 = 0;
1243
1244 QETH_DBF_TEXT(trace, 3, "haltchs");
1245 rc1 = qeth_halt_channel(&card->read);
1246 rc2 = qeth_halt_channel(&card->write);
1247 rc3 = qeth_halt_channel(&card->data);
1248 if (rc1)
1249 return rc1;
1250 if (rc2)
1251 return rc2;
1252 return rc3;
1253 }
1254
1255 static int qeth_clear_channels(struct qeth_card *card)
1256 {
1257 int rc1 = 0, rc2 = 0, rc3 = 0;
1258
1259 QETH_DBF_TEXT(trace, 3, "clearchs");
1260 rc1 = qeth_clear_channel(&card->read);
1261 rc2 = qeth_clear_channel(&card->write);
1262 rc3 = qeth_clear_channel(&card->data);
1263 if (rc1)
1264 return rc1;
1265 if (rc2)
1266 return rc2;
1267 return rc3;
1268 }
1269
1270 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1271 {
1272 int rc = 0;
1273
1274 QETH_DBF_TEXT(trace, 3, "clhacrd");
1275 QETH_DBF_HEX(trace, 3, &card, sizeof(void *));
1276
1277 if (halt)
1278 rc = qeth_halt_channels(card);
1279 if (rc)
1280 return rc;
1281 return qeth_clear_channels(card);
1282 }
1283
1284 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1285 {
1286 int rc = 0;
1287
1288 QETH_DBF_TEXT(trace, 3, "qdioclr");
1289 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1290 QETH_QDIO_CLEANING)) {
1291 case QETH_QDIO_ESTABLISHED:
1292 if (card->info.type == QETH_CARD_TYPE_IQD)
1293 rc = qdio_cleanup(CARD_DDEV(card),
1294 QDIO_FLAG_CLEANUP_USING_HALT);
1295 else
1296 rc = qdio_cleanup(CARD_DDEV(card),
1297 QDIO_FLAG_CLEANUP_USING_CLEAR);
1298 if (rc)
1299 QETH_DBF_TEXT_(trace, 3, "1err%d", rc);
1300 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1301 break;
1302 case QETH_QDIO_CLEANING:
1303 return rc;
1304 default:
1305 break;
1306 }
1307 rc = qeth_clear_halt_card(card, use_halt);
1308 if (rc)
1309 QETH_DBF_TEXT_(trace, 3, "2err%d", rc);
1310 card->state = CARD_STATE_DOWN;
1311 return rc;
1312 }
1313 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1314
1315 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1316 int *length)
1317 {
1318 struct ciw *ciw;
1319 char *rcd_buf;
1320 int ret;
1321 struct qeth_channel *channel = &card->data;
1322 unsigned long flags;
1323
1324 /*
1325 * scan for RCD command in extended SenseID data
1326 */
1327 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1328 if (!ciw || ciw->cmd == 0)
1329 return -EOPNOTSUPP;
1330 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1331 if (!rcd_buf)
1332 return -ENOMEM;
1333
1334 channel->ccw.cmd_code = ciw->cmd;
1335 channel->ccw.cda = (__u32) __pa(rcd_buf);
1336 channel->ccw.count = ciw->count;
1337 channel->ccw.flags = CCW_FLAG_SLI;
1338 channel->state = CH_STATE_RCD;
1339 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1340 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1341 QETH_RCD_PARM, LPM_ANYPATH, 0,
1342 QETH_RCD_TIMEOUT);
1343 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1344 if (!ret)
1345 wait_event(card->wait_q,
1346 (channel->state == CH_STATE_RCD_DONE ||
1347 channel->state == CH_STATE_DOWN));
1348 if (channel->state == CH_STATE_DOWN)
1349 ret = -EIO;
1350 else
1351 channel->state = CH_STATE_DOWN;
1352 if (ret) {
1353 kfree(rcd_buf);
1354 *buffer = NULL;
1355 *length = 0;
1356 } else {
1357 *length = ciw->count;
1358 *buffer = rcd_buf;
1359 }
1360 return ret;
1361 }
1362
1363 static int qeth_get_unitaddr(struct qeth_card *card)
1364 {
1365 int length;
1366 char *prcd;
1367 int rc;
1368
1369 QETH_DBF_TEXT(setup, 2, "getunit");
1370 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1371 if (rc) {
1372 PRINT_ERR("qeth_read_conf_data for device %s returned %i\n",
1373 CARD_DDEV_ID(card), rc);
1374 return rc;
1375 }
1376 card->info.chpid = prcd[30];
1377 card->info.unit_addr2 = prcd[31];
1378 card->info.cula = prcd[63];
1379 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1380 (prcd[0x11] == _ascebc['M']));
1381 kfree(prcd);
1382 return 0;
1383 }
1384
1385 static void qeth_init_tokens(struct qeth_card *card)
1386 {
1387 card->token.issuer_rm_w = 0x00010103UL;
1388 card->token.cm_filter_w = 0x00010108UL;
1389 card->token.cm_connection_w = 0x0001010aUL;
1390 card->token.ulp_filter_w = 0x0001010bUL;
1391 card->token.ulp_connection_w = 0x0001010dUL;
1392 }
1393
1394 static void qeth_init_func_level(struct qeth_card *card)
1395 {
1396 if (card->ipato.enabled) {
1397 if (card->info.type == QETH_CARD_TYPE_IQD)
1398 card->info.func_level =
1399 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1400 else
1401 card->info.func_level =
1402 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1403 } else {
1404 if (card->info.type == QETH_CARD_TYPE_IQD)
1405 /*FIXME:why do we have same values for dis and ena for
1406 osae??? */
1407 card->info.func_level =
1408 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1409 else
1410 card->info.func_level =
1411 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1412 }
1413 }
1414
1415 static inline __u16 qeth_raw_devno_from_bus_id(char *id)
1416 {
1417 id += (strlen(id) - 4);
1418 return (__u16) simple_strtoul(id, &id, 16);
1419 }
1420
1421 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1422 void (*idx_reply_cb)(struct qeth_channel *,
1423 struct qeth_cmd_buffer *))
1424 {
1425 struct qeth_cmd_buffer *iob;
1426 unsigned long flags;
1427 int rc;
1428 struct qeth_card *card;
1429
1430 QETH_DBF_TEXT(setup, 2, "idxanswr");
1431 card = CARD_FROM_CDEV(channel->ccwdev);
1432 iob = qeth_get_buffer(channel);
1433 iob->callback = idx_reply_cb;
1434 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1435 channel->ccw.count = QETH_BUFSIZE;
1436 channel->ccw.cda = (__u32) __pa(iob->data);
1437
1438 wait_event(card->wait_q,
1439 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1440 QETH_DBF_TEXT(setup, 6, "noirqpnd");
1441 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1442 rc = ccw_device_start(channel->ccwdev,
1443 &channel->ccw, (addr_t) iob, 0, 0);
1444 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1445
1446 if (rc) {
1447 PRINT_ERR("Error2 in activating channel rc=%d\n", rc);
1448 QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
1449 atomic_set(&channel->irq_pending, 0);
1450 wake_up(&card->wait_q);
1451 return rc;
1452 }
1453 rc = wait_event_interruptible_timeout(card->wait_q,
1454 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1455 if (rc == -ERESTARTSYS)
1456 return rc;
1457 if (channel->state != CH_STATE_UP) {
1458 rc = -ETIME;
1459 QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
1460 qeth_clear_cmd_buffers(channel);
1461 } else
1462 rc = 0;
1463 return rc;
1464 }
1465
1466 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1467 void (*idx_reply_cb)(struct qeth_channel *,
1468 struct qeth_cmd_buffer *))
1469 {
1470 struct qeth_card *card;
1471 struct qeth_cmd_buffer *iob;
1472 unsigned long flags;
1473 __u16 temp;
1474 __u8 tmp;
1475 int rc;
1476
1477 card = CARD_FROM_CDEV(channel->ccwdev);
1478
1479 QETH_DBF_TEXT(setup, 2, "idxactch");
1480
1481 iob = qeth_get_buffer(channel);
1482 iob->callback = idx_reply_cb;
1483 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1484 channel->ccw.count = IDX_ACTIVATE_SIZE;
1485 channel->ccw.cda = (__u32) __pa(iob->data);
1486 if (channel == &card->write) {
1487 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1488 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1489 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1490 card->seqno.trans_hdr++;
1491 } else {
1492 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1493 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1494 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1495 }
1496 tmp = ((__u8)card->info.portno) | 0x80;
1497 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1498 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1499 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1500 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1501 &card->info.func_level, sizeof(__u16));
1502 temp = qeth_raw_devno_from_bus_id(CARD_DDEV_ID(card));
1503 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp, 2);
1504 temp = (card->info.cula << 8) + card->info.unit_addr2;
1505 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1506
1507 wait_event(card->wait_q,
1508 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1509 QETH_DBF_TEXT(setup, 6, "noirqpnd");
1510 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1511 rc = ccw_device_start(channel->ccwdev,
1512 &channel->ccw, (addr_t) iob, 0, 0);
1513 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1514
1515 if (rc) {
1516 PRINT_ERR("Error1 in activating channel. rc=%d\n", rc);
1517 QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
1518 atomic_set(&channel->irq_pending, 0);
1519 wake_up(&card->wait_q);
1520 return rc;
1521 }
1522 rc = wait_event_interruptible_timeout(card->wait_q,
1523 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1524 if (rc == -ERESTARTSYS)
1525 return rc;
1526 if (channel->state != CH_STATE_ACTIVATING) {
1527 PRINT_WARN("IDX activate timed out!\n");
1528 QETH_DBF_TEXT_(setup, 2, "2err%d", -ETIME);
1529 qeth_clear_cmd_buffers(channel);
1530 return -ETIME;
1531 }
1532 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1533 }
1534
1535 static int qeth_peer_func_level(int level)
1536 {
1537 if ((level & 0xff) == 8)
1538 return (level & 0xff) + 0x400;
1539 if (((level >> 8) & 3) == 1)
1540 return (level & 0xff) + 0x200;
1541 return level;
1542 }
1543
1544 static void qeth_idx_write_cb(struct qeth_channel *channel,
1545 struct qeth_cmd_buffer *iob)
1546 {
1547 struct qeth_card *card;
1548 __u16 temp;
1549
1550 QETH_DBF_TEXT(setup , 2, "idxwrcb");
1551
1552 if (channel->state == CH_STATE_DOWN) {
1553 channel->state = CH_STATE_ACTIVATING;
1554 goto out;
1555 }
1556 card = CARD_FROM_CDEV(channel->ccwdev);
1557
1558 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1559 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1560 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1561 "adapter exclusively used by another host\n",
1562 CARD_WDEV_ID(card));
1563 else
1564 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1565 "negative reply\n", CARD_WDEV_ID(card));
1566 goto out;
1567 }
1568 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1569 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1570 PRINT_WARN("IDX_ACTIVATE on write channel device %s: "
1571 "function level mismatch "
1572 "(sent: 0x%x, received: 0x%x)\n",
1573 CARD_WDEV_ID(card), card->info.func_level, temp);
1574 goto out;
1575 }
1576 channel->state = CH_STATE_UP;
1577 out:
1578 qeth_release_buffer(channel, iob);
1579 }
1580
1581 static void qeth_idx_read_cb(struct qeth_channel *channel,
1582 struct qeth_cmd_buffer *iob)
1583 {
1584 struct qeth_card *card;
1585 __u16 temp;
1586
1587 QETH_DBF_TEXT(setup , 2, "idxrdcb");
1588 if (channel->state == CH_STATE_DOWN) {
1589 channel->state = CH_STATE_ACTIVATING;
1590 goto out;
1591 }
1592
1593 card = CARD_FROM_CDEV(channel->ccwdev);
1594 if (qeth_check_idx_response(iob->data))
1595 goto out;
1596
1597 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1598 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1599 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1600 "adapter exclusively used by another host\n",
1601 CARD_RDEV_ID(card));
1602 else
1603 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1604 "negative reply\n", CARD_RDEV_ID(card));
1605 goto out;
1606 }
1607
1608 /**
1609 * temporary fix for microcode bug
1610 * to revert it,replace OR by AND
1611 */
1612 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1613 (card->info.type == QETH_CARD_TYPE_OSAE))
1614 card->info.portname_required = 1;
1615
1616 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1617 if (temp != qeth_peer_func_level(card->info.func_level)) {
1618 PRINT_WARN("IDX_ACTIVATE on read channel device %s: function "
1619 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1620 CARD_RDEV_ID(card), card->info.func_level, temp);
1621 goto out;
1622 }
1623 memcpy(&card->token.issuer_rm_r,
1624 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1625 QETH_MPC_TOKEN_LENGTH);
1626 memcpy(&card->info.mcl_level[0],
1627 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1628 channel->state = CH_STATE_UP;
1629 out:
1630 qeth_release_buffer(channel, iob);
1631 }
1632
1633 void qeth_prepare_control_data(struct qeth_card *card, int len,
1634 struct qeth_cmd_buffer *iob)
1635 {
1636 qeth_setup_ccw(&card->write, iob->data, len);
1637 iob->callback = qeth_release_buffer;
1638
1639 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1640 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1641 card->seqno.trans_hdr++;
1642 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1643 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1644 card->seqno.pdu_hdr++;
1645 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1646 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1647 QETH_DBF_HEX(control, 2, iob->data, QETH_DBF_CONTROL_LEN);
1648 }
1649 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1650
1651 int qeth_send_control_data(struct qeth_card *card, int len,
1652 struct qeth_cmd_buffer *iob,
1653 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1654 unsigned long),
1655 void *reply_param)
1656 {
1657 int rc;
1658 unsigned long flags;
1659 struct qeth_reply *reply = NULL;
1660 unsigned long timeout;
1661
1662 QETH_DBF_TEXT(trace, 2, "sendctl");
1663
1664 reply = qeth_alloc_reply(card);
1665 if (!reply) {
1666 PRINT_WARN("Could no alloc qeth_reply!\n");
1667 return -ENOMEM;
1668 }
1669 reply->callback = reply_cb;
1670 reply->param = reply_param;
1671 if (card->state == CARD_STATE_DOWN)
1672 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1673 else
1674 reply->seqno = card->seqno.ipa++;
1675 init_waitqueue_head(&reply->wait_q);
1676 spin_lock_irqsave(&card->lock, flags);
1677 list_add_tail(&reply->list, &card->cmd_waiter_list);
1678 spin_unlock_irqrestore(&card->lock, flags);
1679 QETH_DBF_HEX(control, 2, iob->data, QETH_DBF_CONTROL_LEN);
1680
1681 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1682 qeth_prepare_control_data(card, len, iob);
1683
1684 if (IS_IPA(iob->data))
1685 timeout = jiffies + QETH_IPA_TIMEOUT;
1686 else
1687 timeout = jiffies + QETH_TIMEOUT;
1688
1689 QETH_DBF_TEXT(trace, 6, "noirqpnd");
1690 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1691 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1692 (addr_t) iob, 0, 0);
1693 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1694 if (rc) {
1695 PRINT_WARN("qeth_send_control_data: "
1696 "ccw_device_start rc = %i\n", rc);
1697 QETH_DBF_TEXT_(trace, 2, " err%d", rc);
1698 spin_lock_irqsave(&card->lock, flags);
1699 list_del_init(&reply->list);
1700 qeth_put_reply(reply);
1701 spin_unlock_irqrestore(&card->lock, flags);
1702 qeth_release_buffer(iob->channel, iob);
1703 atomic_set(&card->write.irq_pending, 0);
1704 wake_up(&card->wait_q);
1705 return rc;
1706 }
1707 while (!atomic_read(&reply->received)) {
1708 if (time_after(jiffies, timeout)) {
1709 spin_lock_irqsave(&reply->card->lock, flags);
1710 list_del_init(&reply->list);
1711 spin_unlock_irqrestore(&reply->card->lock, flags);
1712 reply->rc = -ETIME;
1713 atomic_inc(&reply->received);
1714 wake_up(&reply->wait_q);
1715 }
1716 cpu_relax();
1717 };
1718 rc = reply->rc;
1719 qeth_put_reply(reply);
1720 return rc;
1721 }
1722 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1723
1724 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1725 unsigned long data)
1726 {
1727 struct qeth_cmd_buffer *iob;
1728
1729 QETH_DBF_TEXT(setup, 2, "cmenblcb");
1730
1731 iob = (struct qeth_cmd_buffer *) data;
1732 memcpy(&card->token.cm_filter_r,
1733 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1734 QETH_MPC_TOKEN_LENGTH);
1735 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
1736 return 0;
1737 }
1738
1739 static int qeth_cm_enable(struct qeth_card *card)
1740 {
1741 int rc;
1742 struct qeth_cmd_buffer *iob;
1743
1744 QETH_DBF_TEXT(setup, 2, "cmenable");
1745
1746 iob = qeth_wait_for_buffer(&card->write);
1747 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1748 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1749 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1750 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1751 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1752
1753 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1754 qeth_cm_enable_cb, NULL);
1755 return rc;
1756 }
1757
1758 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1759 unsigned long data)
1760 {
1761
1762 struct qeth_cmd_buffer *iob;
1763
1764 QETH_DBF_TEXT(setup, 2, "cmsetpcb");
1765
1766 iob = (struct qeth_cmd_buffer *) data;
1767 memcpy(&card->token.cm_connection_r,
1768 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1769 QETH_MPC_TOKEN_LENGTH);
1770 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
1771 return 0;
1772 }
1773
1774 static int qeth_cm_setup(struct qeth_card *card)
1775 {
1776 int rc;
1777 struct qeth_cmd_buffer *iob;
1778
1779 QETH_DBF_TEXT(setup, 2, "cmsetup");
1780
1781 iob = qeth_wait_for_buffer(&card->write);
1782 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1783 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1784 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1785 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1786 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1787 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1788 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1789 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1790 qeth_cm_setup_cb, NULL);
1791 return rc;
1792
1793 }
1794
1795 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1796 {
1797 switch (card->info.type) {
1798 case QETH_CARD_TYPE_UNKNOWN:
1799 return 1500;
1800 case QETH_CARD_TYPE_IQD:
1801 return card->info.max_mtu;
1802 case QETH_CARD_TYPE_OSAE:
1803 switch (card->info.link_type) {
1804 case QETH_LINK_TYPE_HSTR:
1805 case QETH_LINK_TYPE_LANE_TR:
1806 return 2000;
1807 default:
1808 return 1492;
1809 }
1810 default:
1811 return 1500;
1812 }
1813 }
1814
1815 static inline int qeth_get_max_mtu_for_card(int cardtype)
1816 {
1817 switch (cardtype) {
1818
1819 case QETH_CARD_TYPE_UNKNOWN:
1820 case QETH_CARD_TYPE_OSAE:
1821 case QETH_CARD_TYPE_OSN:
1822 return 61440;
1823 case QETH_CARD_TYPE_IQD:
1824 return 57344;
1825 default:
1826 return 1500;
1827 }
1828 }
1829
1830 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1831 {
1832 switch (cardtype) {
1833 case QETH_CARD_TYPE_IQD:
1834 return 1;
1835 default:
1836 return 0;
1837 }
1838 }
1839
1840 static inline int qeth_get_mtu_outof_framesize(int framesize)
1841 {
1842 switch (framesize) {
1843 case 0x4000:
1844 return 8192;
1845 case 0x6000:
1846 return 16384;
1847 case 0xa000:
1848 return 32768;
1849 case 0xffff:
1850 return 57344;
1851 default:
1852 return 0;
1853 }
1854 }
1855
1856 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1857 {
1858 switch (card->info.type) {
1859 case QETH_CARD_TYPE_OSAE:
1860 return ((mtu >= 576) && (mtu <= 61440));
1861 case QETH_CARD_TYPE_IQD:
1862 return ((mtu >= 576) &&
1863 (mtu <= card->info.max_mtu + 4096 - 32));
1864 case QETH_CARD_TYPE_OSN:
1865 case QETH_CARD_TYPE_UNKNOWN:
1866 default:
1867 return 1;
1868 }
1869 }
1870
1871 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1872 unsigned long data)
1873 {
1874
1875 __u16 mtu, framesize;
1876 __u16 len;
1877 __u8 link_type;
1878 struct qeth_cmd_buffer *iob;
1879
1880 QETH_DBF_TEXT(setup, 2, "ulpenacb");
1881
1882 iob = (struct qeth_cmd_buffer *) data;
1883 memcpy(&card->token.ulp_filter_r,
1884 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1885 QETH_MPC_TOKEN_LENGTH);
1886 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1887 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1888 mtu = qeth_get_mtu_outof_framesize(framesize);
1889 if (!mtu) {
1890 iob->rc = -EINVAL;
1891 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
1892 return 0;
1893 }
1894 card->info.max_mtu = mtu;
1895 card->info.initial_mtu = mtu;
1896 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1897 } else {
1898 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1899 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1900 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1901 }
1902
1903 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1904 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1905 memcpy(&link_type,
1906 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1907 card->info.link_type = link_type;
1908 } else
1909 card->info.link_type = 0;
1910 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
1911 return 0;
1912 }
1913
1914 static int qeth_ulp_enable(struct qeth_card *card)
1915 {
1916 int rc;
1917 char prot_type;
1918 struct qeth_cmd_buffer *iob;
1919
1920 /*FIXME: trace view callbacks*/
1921 QETH_DBF_TEXT(setup, 2, "ulpenabl");
1922
1923 iob = qeth_wait_for_buffer(&card->write);
1924 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1925
1926 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1927 (__u8) card->info.portno;
1928 if (card->options.layer2)
1929 if (card->info.type == QETH_CARD_TYPE_OSN)
1930 prot_type = QETH_PROT_OSN2;
1931 else
1932 prot_type = QETH_PROT_LAYER2;
1933 else
1934 prot_type = QETH_PROT_TCPIP;
1935
1936 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1937 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1938 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1939 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1940 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1941 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1942 card->info.portname, 9);
1943 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1944 qeth_ulp_enable_cb, NULL);
1945 return rc;
1946
1947 }
1948
1949 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1950 unsigned long data)
1951 {
1952 struct qeth_cmd_buffer *iob;
1953
1954 QETH_DBF_TEXT(setup, 2, "ulpstpcb");
1955
1956 iob = (struct qeth_cmd_buffer *) data;
1957 memcpy(&card->token.ulp_connection_r,
1958 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1959 QETH_MPC_TOKEN_LENGTH);
1960 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
1961 return 0;
1962 }
1963
1964 static int qeth_ulp_setup(struct qeth_card *card)
1965 {
1966 int rc;
1967 __u16 temp;
1968 struct qeth_cmd_buffer *iob;
1969 struct ccw_dev_id dev_id;
1970
1971 QETH_DBF_TEXT(setup, 2, "ulpsetup");
1972
1973 iob = qeth_wait_for_buffer(&card->write);
1974 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
1975
1976 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
1977 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1978 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
1979 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
1980 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
1981 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
1982
1983 ccw_device_get_id(CARD_DDEV(card), &dev_id);
1984 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
1985 temp = (card->info.cula << 8) + card->info.unit_addr2;
1986 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
1987 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
1988 qeth_ulp_setup_cb, NULL);
1989 return rc;
1990 }
1991
1992 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
1993 {
1994 int i, j;
1995
1996 QETH_DBF_TEXT(setup, 2, "allcqdbf");
1997
1998 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
1999 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2000 return 0;
2001
2002 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2003 GFP_KERNEL|GFP_DMA);
2004 if (!card->qdio.in_q)
2005 goto out_nomem;
2006 QETH_DBF_TEXT(setup, 2, "inq");
2007 QETH_DBF_HEX(setup, 2, &card->qdio.in_q, sizeof(void *));
2008 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2009 /* give inbound qeth_qdio_buffers their qdio_buffers */
2010 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2011 card->qdio.in_q->bufs[i].buffer =
2012 &card->qdio.in_q->qdio_bufs[i];
2013 /* inbound buffer pool */
2014 if (qeth_alloc_buffer_pool(card))
2015 goto out_freeinq;
2016 /* outbound */
2017 card->qdio.out_qs =
2018 kmalloc(card->qdio.no_out_queues *
2019 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2020 if (!card->qdio.out_qs)
2021 goto out_freepool;
2022 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2023 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2024 GFP_KERNEL|GFP_DMA);
2025 if (!card->qdio.out_qs[i])
2026 goto out_freeoutq;
2027 QETH_DBF_TEXT_(setup, 2, "outq %i", i);
2028 QETH_DBF_HEX(setup, 2, &card->qdio.out_qs[i], sizeof(void *));
2029 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2030 card->qdio.out_qs[i]->queue_no = i;
2031 /* give outbound qeth_qdio_buffers their qdio_buffers */
2032 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2033 card->qdio.out_qs[i]->bufs[j].buffer =
2034 &card->qdio.out_qs[i]->qdio_bufs[j];
2035 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2036 skb_list);
2037 lockdep_set_class(
2038 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2039 &qdio_out_skb_queue_key);
2040 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2041 }
2042 }
2043 return 0;
2044
2045 out_freeoutq:
2046 while (i > 0)
2047 kfree(card->qdio.out_qs[--i]);
2048 kfree(card->qdio.out_qs);
2049 card->qdio.out_qs = NULL;
2050 out_freepool:
2051 qeth_free_buffer_pool(card);
2052 out_freeinq:
2053 kfree(card->qdio.in_q);
2054 card->qdio.in_q = NULL;
2055 out_nomem:
2056 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2057 return -ENOMEM;
2058 }
2059
2060 static void qeth_create_qib_param_field(struct qeth_card *card,
2061 char *param_field)
2062 {
2063
2064 param_field[0] = _ascebc['P'];
2065 param_field[1] = _ascebc['C'];
2066 param_field[2] = _ascebc['I'];
2067 param_field[3] = _ascebc['T'];
2068 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2069 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2070 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2071 }
2072
2073 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2074 char *param_field)
2075 {
2076 param_field[16] = _ascebc['B'];
2077 param_field[17] = _ascebc['L'];
2078 param_field[18] = _ascebc['K'];
2079 param_field[19] = _ascebc['T'];
2080 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2081 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2082 *((unsigned int *) (&param_field[28])) =
2083 card->info.blkt.inter_packet_jumbo;
2084 }
2085
2086 static int qeth_qdio_activate(struct qeth_card *card)
2087 {
2088 QETH_DBF_TEXT(setup, 3, "qdioact");
2089 return qdio_activate(CARD_DDEV(card), 0);
2090 }
2091
2092 static int qeth_dm_act(struct qeth_card *card)
2093 {
2094 int rc;
2095 struct qeth_cmd_buffer *iob;
2096
2097 QETH_DBF_TEXT(setup, 2, "dmact");
2098
2099 iob = qeth_wait_for_buffer(&card->write);
2100 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2101
2102 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2103 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2104 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2105 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2106 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2107 return rc;
2108 }
2109
2110 static int qeth_mpc_initialize(struct qeth_card *card)
2111 {
2112 int rc;
2113
2114 QETH_DBF_TEXT(setup, 2, "mpcinit");
2115
2116 rc = qeth_issue_next_read(card);
2117 if (rc) {
2118 QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
2119 return rc;
2120 }
2121 rc = qeth_cm_enable(card);
2122 if (rc) {
2123 QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
2124 goto out_qdio;
2125 }
2126 rc = qeth_cm_setup(card);
2127 if (rc) {
2128 QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
2129 goto out_qdio;
2130 }
2131 rc = qeth_ulp_enable(card);
2132 if (rc) {
2133 QETH_DBF_TEXT_(setup, 2, "4err%d", rc);
2134 goto out_qdio;
2135 }
2136 rc = qeth_ulp_setup(card);
2137 if (rc) {
2138 QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
2139 goto out_qdio;
2140 }
2141 rc = qeth_alloc_qdio_buffers(card);
2142 if (rc) {
2143 QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
2144 goto out_qdio;
2145 }
2146 rc = qeth_qdio_establish(card);
2147 if (rc) {
2148 QETH_DBF_TEXT_(setup, 2, "6err%d", rc);
2149 qeth_free_qdio_buffers(card);
2150 goto out_qdio;
2151 }
2152 rc = qeth_qdio_activate(card);
2153 if (rc) {
2154 QETH_DBF_TEXT_(setup, 2, "7err%d", rc);
2155 goto out_qdio;
2156 }
2157 rc = qeth_dm_act(card);
2158 if (rc) {
2159 QETH_DBF_TEXT_(setup, 2, "8err%d", rc);
2160 goto out_qdio;
2161 }
2162
2163 return 0;
2164 out_qdio:
2165 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2166 return rc;
2167 }
2168
2169 static void qeth_print_status_with_portname(struct qeth_card *card)
2170 {
2171 char dbf_text[15];
2172 int i;
2173
2174 sprintf(dbf_text, "%s", card->info.portname + 1);
2175 for (i = 0; i < 8; i++)
2176 dbf_text[i] =
2177 (char) _ebcasc[(__u8) dbf_text[i]];
2178 dbf_text[8] = 0;
2179 PRINT_INFO("Device %s/%s/%s is a%s card%s%s%s\n"
2180 "with link type %s (portname: %s)\n",
2181 CARD_RDEV_ID(card),
2182 CARD_WDEV_ID(card),
2183 CARD_DDEV_ID(card),
2184 qeth_get_cardname(card),
2185 (card->info.mcl_level[0]) ? " (level: " : "",
2186 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2187 (card->info.mcl_level[0]) ? ")" : "",
2188 qeth_get_cardname_short(card),
2189 dbf_text);
2190
2191 }
2192
2193 static void qeth_print_status_no_portname(struct qeth_card *card)
2194 {
2195 if (card->info.portname[0])
2196 PRINT_INFO("Device %s/%s/%s is a%s "
2197 "card%s%s%s\nwith link type %s "
2198 "(no portname needed by interface).\n",
2199 CARD_RDEV_ID(card),
2200 CARD_WDEV_ID(card),
2201 CARD_DDEV_ID(card),
2202 qeth_get_cardname(card),
2203 (card->info.mcl_level[0]) ? " (level: " : "",
2204 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2205 (card->info.mcl_level[0]) ? ")" : "",
2206 qeth_get_cardname_short(card));
2207 else
2208 PRINT_INFO("Device %s/%s/%s is a%s "
2209 "card%s%s%s\nwith link type %s.\n",
2210 CARD_RDEV_ID(card),
2211 CARD_WDEV_ID(card),
2212 CARD_DDEV_ID(card),
2213 qeth_get_cardname(card),
2214 (card->info.mcl_level[0]) ? " (level: " : "",
2215 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2216 (card->info.mcl_level[0]) ? ")" : "",
2217 qeth_get_cardname_short(card));
2218 }
2219
2220 void qeth_print_status_message(struct qeth_card *card)
2221 {
2222 switch (card->info.type) {
2223 case QETH_CARD_TYPE_OSAE:
2224 /* VM will use a non-zero first character
2225 * to indicate a HiperSockets like reporting
2226 * of the level OSA sets the first character to zero
2227 * */
2228 if (!card->info.mcl_level[0]) {
2229 sprintf(card->info.mcl_level, "%02x%02x",
2230 card->info.mcl_level[2],
2231 card->info.mcl_level[3]);
2232
2233 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2234 break;
2235 }
2236 /* fallthrough */
2237 case QETH_CARD_TYPE_IQD:
2238 if (card->info.guestlan) {
2239 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2240 card->info.mcl_level[0]];
2241 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2242 card->info.mcl_level[1]];
2243 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2244 card->info.mcl_level[2]];
2245 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2246 card->info.mcl_level[3]];
2247 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2248 }
2249 break;
2250 default:
2251 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2252 }
2253 if (card->info.portname_required)
2254 qeth_print_status_with_portname(card);
2255 else
2256 qeth_print_status_no_portname(card);
2257 }
2258 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2259
2260 void qeth_put_buffer_pool_entry(struct qeth_card *card,
2261 struct qeth_buffer_pool_entry *entry)
2262 {
2263 QETH_DBF_TEXT(trace, 6, "ptbfplen");
2264 list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list);
2265 }
2266 EXPORT_SYMBOL_GPL(qeth_put_buffer_pool_entry);
2267
2268 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2269 {
2270 struct qeth_buffer_pool_entry *entry;
2271
2272 QETH_DBF_TEXT(trace, 5, "inwrklst");
2273
2274 list_for_each_entry(entry,
2275 &card->qdio.init_pool.entry_list, init_list) {
2276 qeth_put_buffer_pool_entry(card, entry);
2277 }
2278 }
2279
2280 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2281 struct qeth_card *card)
2282 {
2283 struct list_head *plh;
2284 struct qeth_buffer_pool_entry *entry;
2285 int i, free;
2286 struct page *page;
2287
2288 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2289 return NULL;
2290
2291 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2292 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2293 free = 1;
2294 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2295 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2296 free = 0;
2297 break;
2298 }
2299 }
2300 if (free) {
2301 list_del_init(&entry->list);
2302 return entry;
2303 }
2304 }
2305
2306 /* no free buffer in pool so take first one and swap pages */
2307 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2308 struct qeth_buffer_pool_entry, list);
2309 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2310 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2311 page = alloc_page(GFP_ATOMIC|GFP_DMA);
2312 if (!page) {
2313 return NULL;
2314 } else {
2315 free_page((unsigned long)entry->elements[i]);
2316 entry->elements[i] = page_address(page);
2317 if (card->options.performance_stats)
2318 card->perf_stats.sg_alloc_page_rx++;
2319 }
2320 }
2321 }
2322 list_del_init(&entry->list);
2323 return entry;
2324 }
2325
2326 static int qeth_init_input_buffer(struct qeth_card *card,
2327 struct qeth_qdio_buffer *buf)
2328 {
2329 struct qeth_buffer_pool_entry *pool_entry;
2330 int i;
2331
2332 pool_entry = qeth_find_free_buffer_pool_entry(card);
2333 if (!pool_entry)
2334 return 1;
2335
2336 /*
2337 * since the buffer is accessed only from the input_tasklet
2338 * there shouldn't be a need to synchronize; also, since we use
2339 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2340 * buffers
2341 */
2342 BUG_ON(!pool_entry);
2343
2344 buf->pool_entry = pool_entry;
2345 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2346 buf->buffer->element[i].length = PAGE_SIZE;
2347 buf->buffer->element[i].addr = pool_entry->elements[i];
2348 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2349 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2350 else
2351 buf->buffer->element[i].flags = 0;
2352 }
2353 return 0;
2354 }
2355
2356 int qeth_init_qdio_queues(struct qeth_card *card)
2357 {
2358 int i, j;
2359 int rc;
2360
2361 QETH_DBF_TEXT(setup, 2, "initqdqs");
2362
2363 /* inbound queue */
2364 memset(card->qdio.in_q->qdio_bufs, 0,
2365 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2366 qeth_initialize_working_pool_list(card);
2367 /*give only as many buffers to hardware as we have buffer pool entries*/
2368 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2369 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2370 card->qdio.in_q->next_buf_to_init =
2371 card->qdio.in_buf_pool.buf_count - 1;
2372 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2373 card->qdio.in_buf_pool.buf_count - 1, NULL);
2374 if (rc) {
2375 QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
2376 return rc;
2377 }
2378 rc = qdio_synchronize(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0);
2379 if (rc) {
2380 QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
2381 return rc;
2382 }
2383 /* outbound queue */
2384 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2385 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2386 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2387 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2388 qeth_clear_output_buffer(card->qdio.out_qs[i],
2389 &card->qdio.out_qs[i]->bufs[j]);
2390 }
2391 card->qdio.out_qs[i]->card = card;
2392 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2393 card->qdio.out_qs[i]->do_pack = 0;
2394 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2395 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2396 atomic_set(&card->qdio.out_qs[i]->state,
2397 QETH_OUT_Q_UNLOCKED);
2398 }
2399 return 0;
2400 }
2401 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2402
2403 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2404 {
2405 switch (link_type) {
2406 case QETH_LINK_TYPE_HSTR:
2407 return 2;
2408 default:
2409 return 1;
2410 }
2411 }
2412
2413 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2414 struct qeth_ipa_cmd *cmd, __u8 command,
2415 enum qeth_prot_versions prot)
2416 {
2417 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2418 cmd->hdr.command = command;
2419 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2420 cmd->hdr.seqno = card->seqno.ipa;
2421 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2422 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2423 if (card->options.layer2)
2424 cmd->hdr.prim_version_no = 2;
2425 else
2426 cmd->hdr.prim_version_no = 1;
2427 cmd->hdr.param_count = 1;
2428 cmd->hdr.prot_version = prot;
2429 cmd->hdr.ipa_supported = 0;
2430 cmd->hdr.ipa_enabled = 0;
2431 }
2432
2433 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2434 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2435 {
2436 struct qeth_cmd_buffer *iob;
2437 struct qeth_ipa_cmd *cmd;
2438
2439 iob = qeth_wait_for_buffer(&card->write);
2440 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2441 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2442
2443 return iob;
2444 }
2445 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2446
2447 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2448 char prot_type)
2449 {
2450 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2451 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2452 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2453 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2454 }
2455 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2456
2457 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2458 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2459 unsigned long),
2460 void *reply_param)
2461 {
2462 int rc;
2463 char prot_type;
2464 int cmd;
2465 cmd = ((struct qeth_ipa_cmd *)
2466 (iob->data+IPA_PDU_HEADER_SIZE))->hdr.command;
2467
2468 QETH_DBF_TEXT(trace, 4, "sendipa");
2469
2470 if (card->options.layer2)
2471 if (card->info.type == QETH_CARD_TYPE_OSN)
2472 prot_type = QETH_PROT_OSN2;
2473 else
2474 prot_type = QETH_PROT_LAYER2;
2475 else
2476 prot_type = QETH_PROT_TCPIP;
2477 qeth_prepare_ipa_cmd(card, iob, prot_type);
2478 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, iob,
2479 reply_cb, reply_param);
2480 if (rc != 0) {
2481 char *ipa_cmd_name;
2482 ipa_cmd_name = qeth_get_ipa_cmd_name(cmd);
2483 PRINT_ERR("%s %s(%x) returned %s(%x)\n", __FUNCTION__,
2484 ipa_cmd_name, cmd, qeth_get_ipa_msg(rc), rc);
2485 }
2486 return rc;
2487 }
2488 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2489
2490 static int qeth_send_startstoplan(struct qeth_card *card,
2491 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2492 {
2493 int rc;
2494 struct qeth_cmd_buffer *iob;
2495
2496 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2497 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2498
2499 return rc;
2500 }
2501
2502 int qeth_send_startlan(struct qeth_card *card)
2503 {
2504 int rc;
2505
2506 QETH_DBF_TEXT(setup, 2, "strtlan");
2507
2508 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2509 return rc;
2510 }
2511 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2512
2513 int qeth_send_stoplan(struct qeth_card *card)
2514 {
2515 int rc = 0;
2516
2517 /*
2518 * TODO: according to the IPA format document page 14,
2519 * TCP/IP (we!) never issue a STOPLAN
2520 * is this right ?!?
2521 */
2522 QETH_DBF_TEXT(setup, 2, "stoplan");
2523
2524 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2525 return rc;
2526 }
2527 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2528
2529 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2530 struct qeth_reply *reply, unsigned long data)
2531 {
2532 struct qeth_ipa_cmd *cmd;
2533
2534 QETH_DBF_TEXT(trace, 4, "defadpcb");
2535
2536 cmd = (struct qeth_ipa_cmd *) data;
2537 if (cmd->hdr.return_code == 0)
2538 cmd->hdr.return_code =
2539 cmd->data.setadapterparms.hdr.return_code;
2540 return 0;
2541 }
2542 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2543
2544 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2545 struct qeth_reply *reply, unsigned long data)
2546 {
2547 struct qeth_ipa_cmd *cmd;
2548
2549 QETH_DBF_TEXT(trace, 3, "quyadpcb");
2550
2551 cmd = (struct qeth_ipa_cmd *) data;
2552 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2553 card->info.link_type =
2554 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2555 card->options.adp.supported_funcs =
2556 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2557 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2558 }
2559
2560 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2561 __u32 command, __u32 cmdlen)
2562 {
2563 struct qeth_cmd_buffer *iob;
2564 struct qeth_ipa_cmd *cmd;
2565
2566 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2567 QETH_PROT_IPV4);
2568 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2569 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2570 cmd->data.setadapterparms.hdr.command_code = command;
2571 cmd->data.setadapterparms.hdr.used_total = 1;
2572 cmd->data.setadapterparms.hdr.seq_no = 1;
2573
2574 return iob;
2575 }
2576 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2577
2578 int qeth_query_setadapterparms(struct qeth_card *card)
2579 {
2580 int rc;
2581 struct qeth_cmd_buffer *iob;
2582
2583 QETH_DBF_TEXT(trace, 3, "queryadp");
2584 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2585 sizeof(struct qeth_ipacmd_setadpparms));
2586 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2587 return rc;
2588 }
2589 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2590
2591 int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
2592 unsigned int siga_error, const char *dbftext)
2593 {
2594 if (qdio_error || siga_error) {
2595 QETH_DBF_TEXT(trace, 2, dbftext);
2596 QETH_DBF_TEXT(qerr, 2, dbftext);
2597 QETH_DBF_TEXT_(qerr, 2, " F15=%02X",
2598 buf->element[15].flags & 0xff);
2599 QETH_DBF_TEXT_(qerr, 2, " F14=%02X",
2600 buf->element[14].flags & 0xff);
2601 QETH_DBF_TEXT_(qerr, 2, " qerr=%X", qdio_error);
2602 QETH_DBF_TEXT_(qerr, 2, " serr=%X", siga_error);
2603 return 1;
2604 }
2605 return 0;
2606 }
2607 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2608
2609 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2610 {
2611 struct qeth_qdio_q *queue = card->qdio.in_q;
2612 int count;
2613 int i;
2614 int rc;
2615 int newcount = 0;
2616
2617 QETH_DBF_TEXT(trace, 6, "queinbuf");
2618 count = (index < queue->next_buf_to_init)?
2619 card->qdio.in_buf_pool.buf_count -
2620 (queue->next_buf_to_init - index) :
2621 card->qdio.in_buf_pool.buf_count -
2622 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2623 /* only requeue at a certain threshold to avoid SIGAs */
2624 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2625 for (i = queue->next_buf_to_init;
2626 i < queue->next_buf_to_init + count; ++i) {
2627 if (qeth_init_input_buffer(card,
2628 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2629 break;
2630 } else {
2631 newcount++;
2632 }
2633 }
2634
2635 if (newcount < count) {
2636 /* we are in memory shortage so we switch back to
2637 traditional skb allocation and drop packages */
2638 if (!atomic_read(&card->force_alloc_skb) &&
2639 net_ratelimit())
2640 PRINT_WARN("Switch to alloc skb\n");
2641 atomic_set(&card->force_alloc_skb, 3);
2642 count = newcount;
2643 } else {
2644 if ((atomic_read(&card->force_alloc_skb) == 1) &&
2645 net_ratelimit())
2646 PRINT_WARN("Switch to sg\n");
2647 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2648 }
2649
2650 /*
2651 * according to old code it should be avoided to requeue all
2652 * 128 buffers in order to benefit from PCI avoidance.
2653 * this function keeps at least one buffer (the buffer at
2654 * 'index') un-requeued -> this buffer is the first buffer that
2655 * will be requeued the next time
2656 */
2657 if (card->options.performance_stats) {
2658 card->perf_stats.inbound_do_qdio_cnt++;
2659 card->perf_stats.inbound_do_qdio_start_time =
2660 qeth_get_micros();
2661 }
2662 rc = do_QDIO(CARD_DDEV(card),
2663 QDIO_FLAG_SYNC_INPUT | QDIO_FLAG_UNDER_INTERRUPT,
2664 0, queue->next_buf_to_init, count, NULL);
2665 if (card->options.performance_stats)
2666 card->perf_stats.inbound_do_qdio_time +=
2667 qeth_get_micros() -
2668 card->perf_stats.inbound_do_qdio_start_time;
2669 if (rc) {
2670 PRINT_WARN("qeth_queue_input_buffer's do_QDIO "
2671 "return %i (device %s).\n",
2672 rc, CARD_DDEV_ID(card));
2673 QETH_DBF_TEXT(trace, 2, "qinberr");
2674 QETH_DBF_TEXT_(trace, 2, "%s", CARD_BUS_ID(card));
2675 }
2676 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2677 QDIO_MAX_BUFFERS_PER_Q;
2678 }
2679 }
2680 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2681
2682 static int qeth_handle_send_error(struct qeth_card *card,
2683 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err,
2684 unsigned int siga_err)
2685 {
2686 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2687 int cc = siga_err & 3;
2688
2689 QETH_DBF_TEXT(trace, 6, "hdsnderr");
2690 qeth_check_qdio_errors(buffer->buffer, qdio_err, siga_err, "qouterr");
2691 switch (cc) {
2692 case 0:
2693 if (qdio_err) {
2694 QETH_DBF_TEXT(trace, 1, "lnkfail");
2695 QETH_DBF_TEXT_(trace, 1, "%s", CARD_BUS_ID(card));
2696 QETH_DBF_TEXT_(trace, 1, "%04x %02x",
2697 (u16)qdio_err, (u8)sbalf15);
2698 return QETH_SEND_ERROR_LINK_FAILURE;
2699 }
2700 return QETH_SEND_ERROR_NONE;
2701 case 2:
2702 if (siga_err & QDIO_SIGA_ERROR_B_BIT_SET) {
2703 QETH_DBF_TEXT(trace, 1, "SIGAcc2B");
2704 QETH_DBF_TEXT_(trace, 1, "%s", CARD_BUS_ID(card));
2705 return QETH_SEND_ERROR_KICK_IT;
2706 }
2707 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2708 return QETH_SEND_ERROR_RETRY;
2709 return QETH_SEND_ERROR_LINK_FAILURE;
2710 /* look at qdio_error and sbalf 15 */
2711 case 1:
2712 QETH_DBF_TEXT(trace, 1, "SIGAcc1");
2713 QETH_DBF_TEXT_(trace, 1, "%s", CARD_BUS_ID(card));
2714 return QETH_SEND_ERROR_LINK_FAILURE;
2715 case 3:
2716 default:
2717 QETH_DBF_TEXT(trace, 1, "SIGAcc3");
2718 QETH_DBF_TEXT_(trace, 1, "%s", CARD_BUS_ID(card));
2719 return QETH_SEND_ERROR_KICK_IT;
2720 }
2721 }
2722
2723 /*
2724 * Switched to packing state if the number of used buffers on a queue
2725 * reaches a certain limit.
2726 */
2727 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2728 {
2729 if (!queue->do_pack) {
2730 if (atomic_read(&queue->used_buffers)
2731 >= QETH_HIGH_WATERMARK_PACK){
2732 /* switch non-PACKING -> PACKING */
2733 QETH_DBF_TEXT(trace, 6, "np->pack");
2734 if (queue->card->options.performance_stats)
2735 queue->card->perf_stats.sc_dp_p++;
2736 queue->do_pack = 1;
2737 }
2738 }
2739 }
2740
2741 /*
2742 * Switches from packing to non-packing mode. If there is a packing
2743 * buffer on the queue this buffer will be prepared to be flushed.
2744 * In that case 1 is returned to inform the caller. If no buffer
2745 * has to be flushed, zero is returned.
2746 */
2747 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2748 {
2749 struct qeth_qdio_out_buffer *buffer;
2750 int flush_count = 0;
2751
2752 if (queue->do_pack) {
2753 if (atomic_read(&queue->used_buffers)
2754 <= QETH_LOW_WATERMARK_PACK) {
2755 /* switch PACKING -> non-PACKING */
2756 QETH_DBF_TEXT(trace, 6, "pack->np");
2757 if (queue->card->options.performance_stats)
2758 queue->card->perf_stats.sc_p_dp++;
2759 queue->do_pack = 0;
2760 /* flush packing buffers */
2761 buffer = &queue->bufs[queue->next_buf_to_fill];
2762 if ((atomic_read(&buffer->state) ==
2763 QETH_QDIO_BUF_EMPTY) &&
2764 (buffer->next_element_to_fill > 0)) {
2765 atomic_set(&buffer->state,
2766 QETH_QDIO_BUF_PRIMED);
2767 flush_count++;
2768 queue->next_buf_to_fill =
2769 (queue->next_buf_to_fill + 1) %
2770 QDIO_MAX_BUFFERS_PER_Q;
2771 }
2772 }
2773 }
2774 return flush_count;
2775 }
2776
2777 /*
2778 * Called to flush a packing buffer if no more pci flags are on the queue.
2779 * Checks if there is a packing buffer and prepares it to be flushed.
2780 * In that case returns 1, otherwise zero.
2781 */
2782 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2783 {
2784 struct qeth_qdio_out_buffer *buffer;
2785
2786 buffer = &queue->bufs[queue->next_buf_to_fill];
2787 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2788 (buffer->next_element_to_fill > 0)) {
2789 /* it's a packing buffer */
2790 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2791 queue->next_buf_to_fill =
2792 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2793 return 1;
2794 }
2795 return 0;
2796 }
2797
2798 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int under_int,
2799 int index, int count)
2800 {
2801 struct qeth_qdio_out_buffer *buf;
2802 int rc;
2803 int i;
2804 unsigned int qdio_flags;
2805
2806 QETH_DBF_TEXT(trace, 6, "flushbuf");
2807
2808 for (i = index; i < index + count; ++i) {
2809 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2810 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2811 SBAL_FLAGS_LAST_ENTRY;
2812
2813 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2814 continue;
2815
2816 if (!queue->do_pack) {
2817 if ((atomic_read(&queue->used_buffers) >=
2818 (QETH_HIGH_WATERMARK_PACK -
2819 QETH_WATERMARK_PACK_FUZZ)) &&
2820 !atomic_read(&queue->set_pci_flags_count)) {
2821 /* it's likely that we'll go to packing
2822 * mode soon */
2823 atomic_inc(&queue->set_pci_flags_count);
2824 buf->buffer->element[0].flags |= 0x40;
2825 }
2826 } else {
2827 if (!atomic_read(&queue->set_pci_flags_count)) {
2828 /*
2829 * there's no outstanding PCI any more, so we
2830 * have to request a PCI to be sure the the PCI
2831 * will wake at some time in the future then we
2832 * can flush packed buffers that might still be
2833 * hanging around, which can happen if no
2834 * further send was requested by the stack
2835 */
2836 atomic_inc(&queue->set_pci_flags_count);
2837 buf->buffer->element[0].flags |= 0x40;
2838 }
2839 }
2840 }
2841
2842 queue->card->dev->trans_start = jiffies;
2843 if (queue->card->options.performance_stats) {
2844 queue->card->perf_stats.outbound_do_qdio_cnt++;
2845 queue->card->perf_stats.outbound_do_qdio_start_time =
2846 qeth_get_micros();
2847 }
2848 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2849 if (under_int)
2850 qdio_flags |= QDIO_FLAG_UNDER_INTERRUPT;
2851 if (atomic_read(&queue->set_pci_flags_count))
2852 qdio_flags |= QDIO_FLAG_PCI_OUT;
2853 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2854 queue->queue_no, index, count, NULL);
2855 if (queue->card->options.performance_stats)
2856 queue->card->perf_stats.outbound_do_qdio_time +=
2857 qeth_get_micros() -
2858 queue->card->perf_stats.outbound_do_qdio_start_time;
2859 if (rc) {
2860 QETH_DBF_TEXT(trace, 2, "flushbuf");
2861 QETH_DBF_TEXT_(trace, 2, " err%d", rc);
2862 QETH_DBF_TEXT_(trace, 2, "%s", CARD_DDEV_ID(queue->card));
2863 queue->card->stats.tx_errors += count;
2864 /* this must not happen under normal circumstances. if it
2865 * happens something is really wrong -> recover */
2866 qeth_schedule_recovery(queue->card);
2867 return;
2868 }
2869 atomic_add(count, &queue->used_buffers);
2870 if (queue->card->options.performance_stats)
2871 queue->card->perf_stats.bufs_sent += count;
2872 }
2873
2874 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2875 {
2876 int index;
2877 int flush_cnt = 0;
2878 int q_was_packing = 0;
2879
2880 /*
2881 * check if weed have to switch to non-packing mode or if
2882 * we have to get a pci flag out on the queue
2883 */
2884 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2885 !atomic_read(&queue->set_pci_flags_count)) {
2886 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2887 QETH_OUT_Q_UNLOCKED) {
2888 /*
2889 * If we get in here, there was no action in
2890 * do_send_packet. So, we check if there is a
2891 * packing buffer to be flushed here.
2892 */
2893 netif_stop_queue(queue->card->dev);
2894 index = queue->next_buf_to_fill;
2895 q_was_packing = queue->do_pack;
2896 /* queue->do_pack may change */
2897 barrier();
2898 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2899 if (!flush_cnt &&
2900 !atomic_read(&queue->set_pci_flags_count))
2901 flush_cnt +=
2902 qeth_flush_buffers_on_no_pci(queue);
2903 if (queue->card->options.performance_stats &&
2904 q_was_packing)
2905 queue->card->perf_stats.bufs_sent_pack +=
2906 flush_cnt;
2907 if (flush_cnt)
2908 qeth_flush_buffers(queue, 1, index, flush_cnt);
2909 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2910 }
2911 }
2912 }
2913
2914 void qeth_qdio_output_handler(struct ccw_device *ccwdev, unsigned int status,
2915 unsigned int qdio_error, unsigned int siga_error,
2916 unsigned int __queue, int first_element, int count,
2917 unsigned long card_ptr)
2918 {
2919 struct qeth_card *card = (struct qeth_card *) card_ptr;
2920 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2921 struct qeth_qdio_out_buffer *buffer;
2922 int i;
2923
2924 QETH_DBF_TEXT(trace, 6, "qdouhdl");
2925 if (status & QDIO_STATUS_LOOK_FOR_ERROR) {
2926 if (status & QDIO_STATUS_ACTIVATE_CHECK_CONDITION) {
2927 QETH_DBF_TEXT(trace, 2, "achkcond");
2928 QETH_DBF_TEXT_(trace, 2, "%s", CARD_BUS_ID(card));
2929 QETH_DBF_TEXT_(trace, 2, "%08x", status);
2930 netif_stop_queue(card->dev);
2931 qeth_schedule_recovery(card);
2932 return;
2933 }
2934 }
2935 if (card->options.performance_stats) {
2936 card->perf_stats.outbound_handler_cnt++;
2937 card->perf_stats.outbound_handler_start_time =
2938 qeth_get_micros();
2939 }
2940 for (i = first_element; i < (first_element + count); ++i) {
2941 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2942 /*we only handle the KICK_IT error by doing a recovery */
2943 if (qeth_handle_send_error(card, buffer,
2944 qdio_error, siga_error)
2945 == QETH_SEND_ERROR_KICK_IT){
2946 netif_stop_queue(card->dev);
2947 qeth_schedule_recovery(card);
2948 return;
2949 }
2950 qeth_clear_output_buffer(queue, buffer);
2951 }
2952 atomic_sub(count, &queue->used_buffers);
2953 /* check if we need to do something on this outbound queue */
2954 if (card->info.type != QETH_CARD_TYPE_IQD)
2955 qeth_check_outbound_queue(queue);
2956
2957 netif_wake_queue(queue->card->dev);
2958 if (card->options.performance_stats)
2959 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2960 card->perf_stats.outbound_handler_start_time;
2961 }
2962 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2963
2964 int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
2965 {
2966 int cast_type = RTN_UNSPEC;
2967
2968 if (card->info.type == QETH_CARD_TYPE_OSN)
2969 return cast_type;
2970
2971 if (skb->dst && skb->dst->neighbour) {
2972 cast_type = skb->dst->neighbour->type;
2973 if ((cast_type == RTN_BROADCAST) ||
2974 (cast_type == RTN_MULTICAST) ||
2975 (cast_type == RTN_ANYCAST))
2976 return cast_type;
2977 else
2978 return RTN_UNSPEC;
2979 }
2980 /* try something else */
2981 if (skb->protocol == ETH_P_IPV6)
2982 return (skb_network_header(skb)[24] == 0xff) ?
2983 RTN_MULTICAST : 0;
2984 else if (skb->protocol == ETH_P_IP)
2985 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
2986 RTN_MULTICAST : 0;
2987 /* ... */
2988 if (!memcmp(skb->data, skb->dev->broadcast, 6))
2989 return RTN_BROADCAST;
2990 else {
2991 u16 hdr_mac;
2992
2993 hdr_mac = *((u16 *)skb->data);
2994 /* tr multicast? */
2995 switch (card->info.link_type) {
2996 case QETH_LINK_TYPE_HSTR:
2997 case QETH_LINK_TYPE_LANE_TR:
2998 if ((hdr_mac == QETH_TR_MAC_NC) ||
2999 (hdr_mac == QETH_TR_MAC_C))
3000 return RTN_MULTICAST;
3001 break;
3002 /* eth or so multicast? */
3003 default:
3004 if ((hdr_mac == QETH_ETH_MAC_V4) ||
3005 (hdr_mac == QETH_ETH_MAC_V6))
3006 return RTN_MULTICAST;
3007 }
3008 }
3009 return cast_type;
3010 }
3011 EXPORT_SYMBOL_GPL(qeth_get_cast_type);
3012
3013 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3014 int ipv, int cast_type)
3015 {
3016 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
3017 return card->qdio.default_out_queue;
3018 switch (card->qdio.no_out_queues) {
3019 case 4:
3020 if (cast_type && card->info.is_multicast_different)
3021 return card->info.is_multicast_different &
3022 (card->qdio.no_out_queues - 1);
3023 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3024 const u8 tos = ip_hdr(skb)->tos;
3025
3026 if (card->qdio.do_prio_queueing ==
3027 QETH_PRIO_Q_ING_TOS) {
3028 if (tos & IP_TOS_NOTIMPORTANT)
3029 return 3;
3030 if (tos & IP_TOS_HIGHRELIABILITY)
3031 return 2;
3032 if (tos & IP_TOS_HIGHTHROUGHPUT)
3033 return 1;
3034 if (tos & IP_TOS_LOWDELAY)
3035 return 0;
3036 }
3037 if (card->qdio.do_prio_queueing ==
3038 QETH_PRIO_Q_ING_PREC)
3039 return 3 - (tos >> 6);
3040 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3041 /* TODO: IPv6!!! */
3042 }
3043 return card->qdio.default_out_queue;
3044 case 1: /* fallthrough for single-out-queue 1920-device */
3045 default:
3046 return card->qdio.default_out_queue;
3047 }
3048 }
3049 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3050
3051 static void __qeth_free_new_skb(struct sk_buff *orig_skb,
3052 struct sk_buff *new_skb)
3053 {
3054 if (orig_skb != new_skb)
3055 dev_kfree_skb_any(new_skb);
3056 }
3057
3058 static inline struct sk_buff *qeth_realloc_headroom(struct qeth_card *card,
3059 struct sk_buff *skb, int size)
3060 {
3061 struct sk_buff *new_skb = skb;
3062
3063 if (skb_headroom(skb) >= size)
3064 return skb;
3065 new_skb = skb_realloc_headroom(skb, size);
3066 if (!new_skb)
3067 PRINT_ERR("Could not realloc headroom for qeth_hdr "
3068 "on interface %s", QETH_CARD_IFNAME(card));
3069 return new_skb;
3070 }
3071
3072 struct sk_buff *qeth_prepare_skb(struct qeth_card *card, struct sk_buff *skb,
3073 struct qeth_hdr **hdr)
3074 {
3075 struct sk_buff *new_skb;
3076
3077 QETH_DBF_TEXT(trace, 6, "prepskb");
3078
3079 new_skb = qeth_realloc_headroom(card, skb,
3080 sizeof(struct qeth_hdr));
3081 if (!new_skb)
3082 return NULL;
3083
3084 *hdr = ((struct qeth_hdr *)qeth_push_skb(card, new_skb,
3085 sizeof(struct qeth_hdr)));
3086 if (*hdr == NULL) {
3087 __qeth_free_new_skb(skb, new_skb);
3088 return NULL;
3089 }
3090 return new_skb;
3091 }
3092 EXPORT_SYMBOL_GPL(qeth_prepare_skb);
3093
3094 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3095 struct sk_buff *skb, int elems)
3096 {
3097 int elements_needed = 0;
3098
3099 if (skb_shinfo(skb)->nr_frags > 0)
3100 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3101 if (elements_needed == 0)
3102 elements_needed = 1 + (((((unsigned long) hdr) % PAGE_SIZE)
3103 + skb->len) >> PAGE_SHIFT);
3104 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3105 PRINT_ERR("Invalid size of IP packet "
3106 "(Number=%d / Length=%d). Discarded.\n",
3107 (elements_needed+elems), skb->len);
3108 return 0;
3109 }
3110 return elements_needed;
3111 }
3112 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3113
3114 static void __qeth_fill_buffer(struct sk_buff *skb, struct qdio_buffer *buffer,
3115 int is_tso, int *next_element_to_fill)
3116 {
3117 int length = skb->len;
3118 int length_here;
3119 int element;
3120 char *data;
3121 int first_lap ;
3122
3123 element = *next_element_to_fill;
3124 data = skb->data;
3125 first_lap = (is_tso == 0 ? 1 : 0);
3126
3127 while (length > 0) {
3128 /* length_here is the remaining amount of data in this page */
3129 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3130 if (length < length_here)
3131 length_here = length;
3132
3133 buffer->element[element].addr = data;
3134 buffer->element[element].length = length_here;
3135 length -= length_here;
3136 if (!length) {
3137 if (first_lap)
3138 buffer->element[element].flags = 0;
3139 else
3140 buffer->element[element].flags =
3141 SBAL_FLAGS_LAST_FRAG;
3142 } else {
3143 if (first_lap)
3144 buffer->element[element].flags =
3145 SBAL_FLAGS_FIRST_FRAG;
3146 else
3147 buffer->element[element].flags =
3148 SBAL_FLAGS_MIDDLE_FRAG;
3149 }
3150 data += length_here;
3151 element++;
3152 first_lap = 0;
3153 }
3154 *next_element_to_fill = element;
3155 }
3156
3157 static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3158 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb)
3159 {
3160 struct qdio_buffer *buffer;
3161 struct qeth_hdr_tso *hdr;
3162 int flush_cnt = 0, hdr_len, large_send = 0;
3163
3164 QETH_DBF_TEXT(trace, 6, "qdfillbf");
3165
3166 buffer = buf->buffer;
3167 atomic_inc(&skb->users);
3168 skb_queue_tail(&buf->skb_list, skb);
3169
3170 hdr = (struct qeth_hdr_tso *) skb->data;
3171 /*check first on TSO ....*/
3172 if (hdr->hdr.hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3173 int element = buf->next_element_to_fill;
3174
3175 hdr_len = sizeof(struct qeth_hdr_tso) + hdr->ext.dg_hdr_len;
3176 /*fill first buffer entry only with header information */
3177 buffer->element[element].addr = skb->data;
3178 buffer->element[element].length = hdr_len;
3179 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3180 buf->next_element_to_fill++;
3181 skb->data += hdr_len;
3182 skb->len -= hdr_len;
3183 large_send = 1;
3184 }
3185 if (skb_shinfo(skb)->nr_frags == 0)
3186 __qeth_fill_buffer(skb, buffer, large_send,
3187 (int *)&buf->next_element_to_fill);
3188 else
3189 __qeth_fill_buffer_frag(skb, buffer, large_send,
3190 (int *)&buf->next_element_to_fill);
3191
3192 if (!queue->do_pack) {
3193 QETH_DBF_TEXT(trace, 6, "fillbfnp");
3194 /* set state to PRIMED -> will be flushed */
3195 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3196 flush_cnt = 1;
3197 } else {
3198 QETH_DBF_TEXT(trace, 6, "fillbfpa");
3199 if (queue->card->options.performance_stats)
3200 queue->card->perf_stats.skbs_sent_pack++;
3201 if (buf->next_element_to_fill >=
3202 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3203 /*
3204 * packed buffer if full -> set state PRIMED
3205 * -> will be flushed
3206 */
3207 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3208 flush_cnt = 1;
3209 }
3210 }
3211 return flush_cnt;
3212 }
3213
3214 int qeth_do_send_packet_fast(struct qeth_card *card,
3215 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3216 struct qeth_hdr *hdr, int elements_needed,
3217 struct qeth_eddp_context *ctx)
3218 {
3219 struct qeth_qdio_out_buffer *buffer;
3220 int buffers_needed = 0;
3221 int flush_cnt = 0;
3222 int index;
3223
3224 QETH_DBF_TEXT(trace, 6, "dosndpfa");
3225
3226 /* spin until we get the queue ... */
3227 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3228 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3229 /* ... now we've got the queue */
3230 index = queue->next_buf_to_fill;
3231 buffer = &queue->bufs[queue->next_buf_to_fill];
3232 /*
3233 * check if buffer is empty to make sure that we do not 'overtake'
3234 * ourselves and try to fill a buffer that is already primed
3235 */
3236 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3237 goto out;
3238 if (ctx == NULL)
3239 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3240 QDIO_MAX_BUFFERS_PER_Q;
3241 else {
3242 buffers_needed = qeth_eddp_check_buffers_for_context(queue,
3243 ctx);
3244 if (buffers_needed < 0)
3245 goto out;
3246 queue->next_buf_to_fill =
3247 (queue->next_buf_to_fill + buffers_needed) %
3248 QDIO_MAX_BUFFERS_PER_Q;
3249 }
3250 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3251 if (ctx == NULL) {
3252 qeth_fill_buffer(queue, buffer, skb);
3253 qeth_flush_buffers(queue, 0, index, 1);
3254 } else {
3255 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
3256 WARN_ON(buffers_needed != flush_cnt);
3257 qeth_flush_buffers(queue, 0, index, flush_cnt);
3258 }
3259 return 0;
3260 out:
3261 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3262 return -EBUSY;
3263 }
3264 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3265
3266 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3267 struct sk_buff *skb, struct qeth_hdr *hdr,
3268 int elements_needed, struct qeth_eddp_context *ctx)
3269 {
3270 struct qeth_qdio_out_buffer *buffer;
3271 int start_index;
3272 int flush_count = 0;
3273 int do_pack = 0;
3274 int tmp;
3275 int rc = 0;
3276
3277 QETH_DBF_TEXT(trace, 6, "dosndpkt");
3278
3279 /* spin until we get the queue ... */
3280 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3281 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3282 start_index = queue->next_buf_to_fill;
3283 buffer = &queue->bufs[queue->next_buf_to_fill];
3284 /*
3285 * check if buffer is empty to make sure that we do not 'overtake'
3286 * ourselves and try to fill a buffer that is already primed
3287 */
3288 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3289 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3290 return -EBUSY;
3291 }
3292 /* check if we need to switch packing state of this queue */
3293 qeth_switch_to_packing_if_needed(queue);
3294 if (queue->do_pack) {
3295 do_pack = 1;
3296 if (ctx == NULL) {
3297 /* does packet fit in current buffer? */
3298 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3299 buffer->next_element_to_fill) < elements_needed) {
3300 /* ... no -> set state PRIMED */
3301 atomic_set(&buffer->state,
3302 QETH_QDIO_BUF_PRIMED);
3303 flush_count++;
3304 queue->next_buf_to_fill =
3305 (queue->next_buf_to_fill + 1) %
3306 QDIO_MAX_BUFFERS_PER_Q;
3307 buffer = &queue->bufs[queue->next_buf_to_fill];
3308 /* we did a step forward, so check buffer state
3309 * again */
3310 if (atomic_read(&buffer->state) !=
3311 QETH_QDIO_BUF_EMPTY){
3312 qeth_flush_buffers(queue, 0,
3313 start_index, flush_count);
3314 atomic_set(&queue->state,
3315 QETH_OUT_Q_UNLOCKED);
3316 return -EBUSY;
3317 }
3318 }
3319 } else {
3320 /* check if we have enough elements (including following
3321 * free buffers) to handle eddp context */
3322 if (qeth_eddp_check_buffers_for_context(queue, ctx)
3323 < 0) {
3324 if (net_ratelimit())
3325 PRINT_WARN("eddp tx_dropped 1\n");
3326 rc = -EBUSY;
3327 goto out;
3328 }
3329 }
3330 }
3331 if (ctx == NULL)
3332 tmp = qeth_fill_buffer(queue, buffer, skb);
3333 else {
3334 tmp = qeth_eddp_fill_buffer(queue, ctx,
3335 queue->next_buf_to_fill);
3336 if (tmp < 0) {
3337 PRINT_ERR("eddp tx_dropped 2\n");
3338 rc = -EBUSY;
3339 goto out;
3340 }
3341 }
3342 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3343 QDIO_MAX_BUFFERS_PER_Q;
3344 flush_count += tmp;
3345 out:
3346 if (flush_count)
3347 qeth_flush_buffers(queue, 0, start_index, flush_count);
3348 else if (!atomic_read(&queue->set_pci_flags_count))
3349 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3350 /*
3351 * queue->state will go from LOCKED -> UNLOCKED or from
3352 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3353 * (switch packing state or flush buffer to get another pci flag out).
3354 * In that case we will enter this loop
3355 */
3356 while (atomic_dec_return(&queue->state)) {
3357 flush_count = 0;
3358 start_index = queue->next_buf_to_fill;
3359 /* check if we can go back to non-packing state */
3360 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3361 /*
3362 * check if we need to flush a packing buffer to get a pci
3363 * flag out on the queue
3364 */
3365 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3366 flush_count += qeth_flush_buffers_on_no_pci(queue);
3367 if (flush_count)
3368 qeth_flush_buffers(queue, 0, start_index, flush_count);
3369 }
3370 /* at this point the queue is UNLOCKED again */
3371 if (queue->card->options.performance_stats && do_pack)
3372 queue->card->perf_stats.bufs_sent_pack += flush_count;
3373
3374 return rc;
3375 }
3376 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3377
3378 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3379 struct qeth_reply *reply, unsigned long data)
3380 {
3381 struct qeth_ipa_cmd *cmd;
3382 struct qeth_ipacmd_setadpparms *setparms;
3383
3384 QETH_DBF_TEXT(trace, 4, "prmadpcb");
3385
3386 cmd = (struct qeth_ipa_cmd *) data;
3387 setparms = &(cmd->data.setadapterparms);
3388
3389 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3390 if (cmd->hdr.return_code) {
3391 QETH_DBF_TEXT_(trace, 4, "prmrc%2.2x", cmd->hdr.return_code);
3392 setparms->data.mode = SET_PROMISC_MODE_OFF;
3393 }
3394 card->info.promisc_mode = setparms->data.mode;
3395 return 0;
3396 }
3397
3398 void qeth_setadp_promisc_mode(struct qeth_card *card)
3399 {
3400 enum qeth_ipa_promisc_modes mode;
3401 struct net_device *dev = card->dev;
3402 struct qeth_cmd_buffer *iob;
3403 struct qeth_ipa_cmd *cmd;
3404
3405 QETH_DBF_TEXT(trace, 4, "setprom");
3406
3407 if (((dev->flags & IFF_PROMISC) &&
3408 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3409 (!(dev->flags & IFF_PROMISC) &&
3410 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3411 return;
3412 mode = SET_PROMISC_MODE_OFF;
3413 if (dev->flags & IFF_PROMISC)
3414 mode = SET_PROMISC_MODE_ON;
3415 QETH_DBF_TEXT_(trace, 4, "mode:%x", mode);
3416
3417 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3418 sizeof(struct qeth_ipacmd_setadpparms));
3419 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3420 cmd->data.setadapterparms.data.mode = mode;
3421 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3422 }
3423 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3424
3425 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3426 {
3427 struct qeth_card *card;
3428 char dbf_text[15];
3429
3430 card = netdev_priv(dev);
3431
3432 QETH_DBF_TEXT(trace, 4, "chgmtu");
3433 sprintf(dbf_text, "%8x", new_mtu);
3434 QETH_DBF_TEXT(trace, 4, dbf_text);
3435
3436 if (new_mtu < 64)
3437 return -EINVAL;
3438 if (new_mtu > 65535)
3439 return -EINVAL;
3440 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3441 (!qeth_mtu_is_valid(card, new_mtu)))
3442 return -EINVAL;
3443 dev->mtu = new_mtu;
3444 return 0;
3445 }
3446 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3447
3448 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3449 {
3450 struct qeth_card *card;
3451
3452 card = netdev_priv(dev);
3453
3454 QETH_DBF_TEXT(trace, 5, "getstat");
3455
3456 return &card->stats;
3457 }
3458 EXPORT_SYMBOL_GPL(qeth_get_stats);
3459
3460 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3461 struct qeth_reply *reply, unsigned long data)
3462 {
3463 struct qeth_ipa_cmd *cmd;
3464
3465 QETH_DBF_TEXT(trace, 4, "chgmaccb");
3466
3467 cmd = (struct qeth_ipa_cmd *) data;
3468 if (!card->options.layer2 ||
3469 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3470 memcpy(card->dev->dev_addr,
3471 &cmd->data.setadapterparms.data.change_addr.addr,
3472 OSA_ADDR_LEN);
3473 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3474 }
3475 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3476 return 0;
3477 }
3478
3479 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3480 {
3481 int rc;
3482 struct qeth_cmd_buffer *iob;
3483 struct qeth_ipa_cmd *cmd;
3484
3485 QETH_DBF_TEXT(trace, 4, "chgmac");
3486
3487 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3488 sizeof(struct qeth_ipacmd_setadpparms));
3489 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3490 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3491 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3492 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3493 card->dev->dev_addr, OSA_ADDR_LEN);
3494 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3495 NULL);
3496 return rc;
3497 }
3498 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3499
3500 void qeth_tx_timeout(struct net_device *dev)
3501 {
3502 struct qeth_card *card;
3503
3504 card = netdev_priv(dev);
3505 card->stats.tx_errors++;
3506 qeth_schedule_recovery(card);
3507 }
3508 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3509
3510 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3511 {
3512 struct qeth_card *card = netdev_priv(dev);
3513 int rc = 0;
3514
3515 switch (regnum) {
3516 case MII_BMCR: /* Basic mode control register */
3517 rc = BMCR_FULLDPLX;
3518 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3519 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3520 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3521 rc |= BMCR_SPEED100;
3522 break;
3523 case MII_BMSR: /* Basic mode status register */
3524 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3525 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3526 BMSR_100BASE4;
3527 break;
3528 case MII_PHYSID1: /* PHYS ID 1 */
3529 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3530 dev->dev_addr[2];
3531 rc = (rc >> 5) & 0xFFFF;
3532 break;
3533 case MII_PHYSID2: /* PHYS ID 2 */
3534 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3535 break;
3536 case MII_ADVERTISE: /* Advertisement control reg */
3537 rc = ADVERTISE_ALL;
3538 break;
3539 case MII_LPA: /* Link partner ability reg */
3540 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3541 LPA_100BASE4 | LPA_LPACK;
3542 break;
3543 case MII_EXPANSION: /* Expansion register */
3544 break;
3545 case MII_DCOUNTER: /* disconnect counter */
3546 break;
3547 case MII_FCSCOUNTER: /* false carrier counter */
3548 break;
3549 case MII_NWAYTEST: /* N-way auto-neg test register */
3550 break;
3551 case MII_RERRCOUNTER: /* rx error counter */
3552 rc = card->stats.rx_errors;
3553 break;
3554 case MII_SREVISION: /* silicon revision */
3555 break;
3556 case MII_RESV1: /* reserved 1 */
3557 break;
3558 case MII_LBRERROR: /* loopback, rx, bypass error */
3559 break;
3560 case MII_PHYADDR: /* physical address */
3561 break;
3562 case MII_RESV2: /* reserved 2 */
3563 break;
3564 case MII_TPISTATUS: /* TPI status for 10mbps */
3565 break;
3566 case MII_NCONFIG: /* network interface config */
3567 break;
3568 default:
3569 break;
3570 }
3571 return rc;
3572 }
3573 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3574
3575 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3576 struct qeth_cmd_buffer *iob, int len,
3577 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3578 unsigned long),
3579 void *reply_param)
3580 {
3581 u16 s1, s2;
3582
3583 QETH_DBF_TEXT(trace, 4, "sendsnmp");
3584
3585 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3586 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3587 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3588 /* adjust PDU length fields in IPA_PDU_HEADER */
3589 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3590 s2 = (u32) len;
3591 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3592 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3593 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3594 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3595 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3596 reply_cb, reply_param);
3597 }
3598
3599 static int qeth_snmp_command_cb(struct qeth_card *card,
3600 struct qeth_reply *reply, unsigned long sdata)
3601 {
3602 struct qeth_ipa_cmd *cmd;
3603 struct qeth_arp_query_info *qinfo;
3604 struct qeth_snmp_cmd *snmp;
3605 unsigned char *data;
3606 __u16 data_len;
3607
3608 QETH_DBF_TEXT(trace, 3, "snpcmdcb");
3609
3610 cmd = (struct qeth_ipa_cmd *) sdata;
3611 data = (unsigned char *)((char *)cmd - reply->offset);
3612 qinfo = (struct qeth_arp_query_info *) reply->param;
3613 snmp = &cmd->data.setadapterparms.data.snmp;
3614
3615 if (cmd->hdr.return_code) {
3616 QETH_DBF_TEXT_(trace, 4, "scer1%i", cmd->hdr.return_code);
3617 return 0;
3618 }
3619 if (cmd->data.setadapterparms.hdr.return_code) {
3620 cmd->hdr.return_code =
3621 cmd->data.setadapterparms.hdr.return_code;
3622 QETH_DBF_TEXT_(trace, 4, "scer2%i", cmd->hdr.return_code);
3623 return 0;
3624 }
3625 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3626 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3627 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3628 else
3629 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3630
3631 /* check if there is enough room in userspace */
3632 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3633 QETH_DBF_TEXT_(trace, 4, "scer3%i", -ENOMEM);
3634 cmd->hdr.return_code = -ENOMEM;
3635 return 0;
3636 }
3637 QETH_DBF_TEXT_(trace, 4, "snore%i",
3638 cmd->data.setadapterparms.hdr.used_total);
3639 QETH_DBF_TEXT_(trace, 4, "sseqn%i",
3640 cmd->data.setadapterparms.hdr.seq_no);
3641 /*copy entries to user buffer*/
3642 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3643 memcpy(qinfo->udata + qinfo->udata_offset,
3644 (char *)snmp,
3645 data_len + offsetof(struct qeth_snmp_cmd, data));
3646 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3647 } else {
3648 memcpy(qinfo->udata + qinfo->udata_offset,
3649 (char *)&snmp->request, data_len);
3650 }
3651 qinfo->udata_offset += data_len;
3652 /* check if all replies received ... */
3653 QETH_DBF_TEXT_(trace, 4, "srtot%i",
3654 cmd->data.setadapterparms.hdr.used_total);
3655 QETH_DBF_TEXT_(trace, 4, "srseq%i",
3656 cmd->data.setadapterparms.hdr.seq_no);
3657 if (cmd->data.setadapterparms.hdr.seq_no <
3658 cmd->data.setadapterparms.hdr.used_total)
3659 return 1;
3660 return 0;
3661 }
3662
3663 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3664 {
3665 struct qeth_cmd_buffer *iob;
3666 struct qeth_ipa_cmd *cmd;
3667 struct qeth_snmp_ureq *ureq;
3668 int req_len;
3669 struct qeth_arp_query_info qinfo = {0, };
3670 int rc = 0;
3671
3672 QETH_DBF_TEXT(trace, 3, "snmpcmd");
3673
3674 if (card->info.guestlan)
3675 return -EOPNOTSUPP;
3676
3677 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3678 (!card->options.layer2)) {
3679 PRINT_WARN("SNMP Query MIBS not supported "
3680 "on %s!\n", QETH_CARD_IFNAME(card));
3681 return -EOPNOTSUPP;
3682 }
3683 /* skip 4 bytes (data_len struct member) to get req_len */
3684 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3685 return -EFAULT;
3686 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3687 if (!ureq) {
3688 QETH_DBF_TEXT(trace, 2, "snmpnome");
3689 return -ENOMEM;
3690 }
3691 if (copy_from_user(ureq, udata,
3692 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3693 kfree(ureq);
3694 return -EFAULT;
3695 }
3696 qinfo.udata_len = ureq->hdr.data_len;
3697 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3698 if (!qinfo.udata) {
3699 kfree(ureq);
3700 return -ENOMEM;
3701 }
3702 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3703
3704 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3705 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3706 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3707 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3708 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3709 qeth_snmp_command_cb, (void *)&qinfo);
3710 if (rc)
3711 PRINT_WARN("SNMP command failed on %s: (0x%x)\n",
3712 QETH_CARD_IFNAME(card), rc);
3713 else {
3714 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3715 rc = -EFAULT;
3716 }
3717
3718 kfree(ureq);
3719 kfree(qinfo.udata);
3720 return rc;
3721 }
3722 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3723
3724 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3725 {
3726 switch (card->info.type) {
3727 case QETH_CARD_TYPE_IQD:
3728 return 2;
3729 default:
3730 return 0;
3731 }
3732 }
3733
3734 static int qeth_qdio_establish(struct qeth_card *card)
3735 {
3736 struct qdio_initialize init_data;
3737 char *qib_param_field;
3738 struct qdio_buffer **in_sbal_ptrs;
3739 struct qdio_buffer **out_sbal_ptrs;
3740 int i, j, k;
3741 int rc = 0;
3742
3743 QETH_DBF_TEXT(setup, 2, "qdioest");
3744
3745 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3746 GFP_KERNEL);
3747 if (!qib_param_field)
3748 return -ENOMEM;
3749
3750 qeth_create_qib_param_field(card, qib_param_field);
3751 qeth_create_qib_param_field_blkt(card, qib_param_field);
3752
3753 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3754 GFP_KERNEL);
3755 if (!in_sbal_ptrs) {
3756 kfree(qib_param_field);
3757 return -ENOMEM;
3758 }
3759 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3760 in_sbal_ptrs[i] = (struct qdio_buffer *)
3761 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3762
3763 out_sbal_ptrs =
3764 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3765 sizeof(void *), GFP_KERNEL);
3766 if (!out_sbal_ptrs) {
3767 kfree(in_sbal_ptrs);
3768 kfree(qib_param_field);
3769 return -ENOMEM;
3770 }
3771 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3772 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3773 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3774 card->qdio.out_qs[i]->bufs[j].buffer);
3775 }
3776
3777 memset(&init_data, 0, sizeof(struct qdio_initialize));
3778 init_data.cdev = CARD_DDEV(card);
3779 init_data.q_format = qeth_get_qdio_q_format(card);
3780 init_data.qib_param_field_format = 0;
3781 init_data.qib_param_field = qib_param_field;
3782 init_data.min_input_threshold = QETH_MIN_INPUT_THRESHOLD;
3783 init_data.max_input_threshold = QETH_MAX_INPUT_THRESHOLD;
3784 init_data.min_output_threshold = QETH_MIN_OUTPUT_THRESHOLD;
3785 init_data.max_output_threshold = QETH_MAX_OUTPUT_THRESHOLD;
3786 init_data.no_input_qs = 1;
3787 init_data.no_output_qs = card->qdio.no_out_queues;
3788 init_data.input_handler = card->discipline.input_handler;
3789 init_data.output_handler = card->discipline.output_handler;
3790 init_data.int_parm = (unsigned long) card;
3791 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3792 QDIO_OUTBOUND_0COPY_SBALS |
3793 QDIO_USE_OUTBOUND_PCIS;
3794 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3795 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3796
3797 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3798 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3799 rc = qdio_initialize(&init_data);
3800 if (rc)
3801 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3802 }
3803 kfree(out_sbal_ptrs);
3804 kfree(in_sbal_ptrs);
3805 kfree(qib_param_field);
3806 return rc;
3807 }
3808
3809 static void qeth_core_free_card(struct qeth_card *card)
3810 {
3811
3812 QETH_DBF_TEXT(setup, 2, "freecrd");
3813 QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
3814 qeth_clean_channel(&card->read);
3815 qeth_clean_channel(&card->write);
3816 if (card->dev)
3817 free_netdev(card->dev);
3818 kfree(card->ip_tbd_list);
3819 qeth_free_qdio_buffers(card);
3820 kfree(card);
3821 }
3822
3823 static struct ccw_device_id qeth_ids[] = {
3824 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3825 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3826 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3827 {},
3828 };
3829 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3830
3831 static struct ccw_driver qeth_ccw_driver = {
3832 .name = "qeth",
3833 .ids = qeth_ids,
3834 .probe = ccwgroup_probe_ccwdev,
3835 .remove = ccwgroup_remove_ccwdev,
3836 };
3837
3838 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3839 unsigned long driver_id)
3840 {
3841 const char *start, *end;
3842 char bus_ids[3][BUS_ID_SIZE], *argv[3];
3843 int i;
3844
3845 start = buf;
3846 for (i = 0; i < 3; i++) {
3847 static const char delim[] = { ',', ',', '\n' };
3848 int len;
3849
3850 end = strchr(start, delim[i]);
3851 if (!end)
3852 return -EINVAL;
3853 len = min_t(ptrdiff_t, BUS_ID_SIZE, end - start);
3854 strncpy(bus_ids[i], start, len);
3855 bus_ids[i][len] = '\0';
3856 start = end + 1;
3857 argv[i] = bus_ids[i];
3858 }
3859
3860 return (ccwgroup_create(root_dev, driver_id,
3861 &qeth_ccw_driver, 3, argv));
3862 }
3863
3864 int qeth_core_hardsetup_card(struct qeth_card *card)
3865 {
3866 int retries = 3;
3867 int mpno;
3868 int rc;
3869
3870 QETH_DBF_TEXT(setup, 2, "hrdsetup");
3871 atomic_set(&card->force_alloc_skb, 0);
3872 retry:
3873 if (retries < 3) {
3874 PRINT_WARN("Retrying to do IDX activates.\n");
3875 ccw_device_set_offline(CARD_DDEV(card));
3876 ccw_device_set_offline(CARD_WDEV(card));
3877 ccw_device_set_offline(CARD_RDEV(card));
3878 ccw_device_set_online(CARD_RDEV(card));
3879 ccw_device_set_online(CARD_WDEV(card));
3880 ccw_device_set_online(CARD_DDEV(card));
3881 }
3882 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3883 if (rc == -ERESTARTSYS) {
3884 QETH_DBF_TEXT(setup, 2, "break1");
3885 return rc;
3886 } else if (rc) {
3887 QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
3888 if (--retries < 0)
3889 goto out;
3890 else
3891 goto retry;
3892 }
3893
3894 rc = qeth_get_unitaddr(card);
3895 if (rc) {
3896 QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
3897 return rc;
3898 }
3899
3900 mpno = QETH_MAX_PORTNO;
3901 if (card->info.portno > mpno) {
3902 PRINT_ERR("Device %s does not offer port number %d \n.",
3903 CARD_BUS_ID(card), card->info.portno);
3904 rc = -ENODEV;
3905 goto out;
3906 }
3907 qeth_init_tokens(card);
3908 qeth_init_func_level(card);
3909 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3910 if (rc == -ERESTARTSYS) {
3911 QETH_DBF_TEXT(setup, 2, "break2");
3912 return rc;
3913 } else if (rc) {
3914 QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
3915 if (--retries < 0)
3916 goto out;
3917 else
3918 goto retry;
3919 }
3920 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3921 if (rc == -ERESTARTSYS) {
3922 QETH_DBF_TEXT(setup, 2, "break3");
3923 return rc;
3924 } else if (rc) {
3925 QETH_DBF_TEXT_(setup, 2, "4err%d", rc);
3926 if (--retries < 0)
3927 goto out;
3928 else
3929 goto retry;
3930 }
3931 rc = qeth_mpc_initialize(card);
3932 if (rc) {
3933 QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
3934 goto out;
3935 }
3936 return 0;
3937 out:
3938 PRINT_ERR("Initialization in hardsetup failed! rc=%d\n", rc);
3939 return rc;
3940 }
3941 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3942
3943 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3944 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3945 {
3946 struct page *page = virt_to_page(element->addr);
3947 if (*pskb == NULL) {
3948 /* the upper protocol layers assume that there is data in the
3949 * skb itself. Copy a small amount (64 bytes) to make them
3950 * happy. */
3951 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3952 if (!(*pskb))
3953 return -ENOMEM;
3954 skb_reserve(*pskb, ETH_HLEN);
3955 if (data_len <= 64) {
3956 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3957 data_len);
3958 } else {
3959 get_page(page);
3960 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3961 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3962 data_len - 64);
3963 (*pskb)->data_len += data_len - 64;
3964 (*pskb)->len += data_len - 64;
3965 (*pskb)->truesize += data_len - 64;
3966 (*pfrag)++;
3967 }
3968 } else {
3969 get_page(page);
3970 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3971 (*pskb)->data_len += data_len;
3972 (*pskb)->len += data_len;
3973 (*pskb)->truesize += data_len;
3974 (*pfrag)++;
3975 }
3976 return 0;
3977 }
3978
3979 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3980 struct qdio_buffer *buffer,
3981 struct qdio_buffer_element **__element, int *__offset,
3982 struct qeth_hdr **hdr)
3983 {
3984 struct qdio_buffer_element *element = *__element;
3985 int offset = *__offset;
3986 struct sk_buff *skb = NULL;
3987 int skb_len;
3988 void *data_ptr;
3989 int data_len;
3990 int headroom = 0;
3991 int use_rx_sg = 0;
3992 int frag = 0;
3993
3994 QETH_DBF_TEXT(trace, 6, "nextskb");
3995 /* qeth_hdr must not cross element boundaries */
3996 if (element->length < offset + sizeof(struct qeth_hdr)) {
3997 if (qeth_is_last_sbale(element))
3998 return NULL;
3999 element++;
4000 offset = 0;
4001 if (element->length < sizeof(struct qeth_hdr))
4002 return NULL;
4003 }
4004 *hdr = element->addr + offset;
4005
4006 offset += sizeof(struct qeth_hdr);
4007 if (card->options.layer2) {
4008 if (card->info.type == QETH_CARD_TYPE_OSN) {
4009 skb_len = (*hdr)->hdr.osn.pdu_length;
4010 headroom = sizeof(struct qeth_hdr);
4011 } else {
4012 skb_len = (*hdr)->hdr.l2.pkt_length;
4013 }
4014 } else {
4015 skb_len = (*hdr)->hdr.l3.length;
4016 headroom = max((int)ETH_HLEN, (int)TR_HLEN);
4017 }
4018
4019 if (!skb_len)
4020 return NULL;
4021
4022 if ((skb_len >= card->options.rx_sg_cb) &&
4023 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4024 (!atomic_read(&card->force_alloc_skb))) {
4025 use_rx_sg = 1;
4026 } else {
4027 skb = dev_alloc_skb(skb_len + headroom);
4028 if (!skb)
4029 goto no_mem;
4030 if (headroom)
4031 skb_reserve(skb, headroom);
4032 }
4033
4034 data_ptr = element->addr + offset;
4035 while (skb_len) {
4036 data_len = min(skb_len, (int)(element->length - offset));
4037 if (data_len) {
4038 if (use_rx_sg) {
4039 if (qeth_create_skb_frag(element, &skb, offset,
4040 &frag, data_len))
4041 goto no_mem;
4042 } else {
4043 memcpy(skb_put(skb, data_len), data_ptr,
4044 data_len);
4045 }
4046 }
4047 skb_len -= data_len;
4048 if (skb_len) {
4049 if (qeth_is_last_sbale(element)) {
4050 QETH_DBF_TEXT(trace, 4, "unexeob");
4051 QETH_DBF_TEXT_(trace, 4, "%s",
4052 CARD_BUS_ID(card));
4053 QETH_DBF_TEXT(qerr, 2, "unexeob");
4054 QETH_DBF_TEXT_(qerr, 2, "%s",
4055 CARD_BUS_ID(card));
4056 QETH_DBF_HEX(misc, 4, buffer, sizeof(*buffer));
4057 dev_kfree_skb_any(skb);
4058 card->stats.rx_errors++;
4059 return NULL;
4060 }
4061 element++;
4062 offset = 0;
4063 data_ptr = element->addr;
4064 } else {
4065 offset += data_len;
4066 }
4067 }
4068 *__element = element;
4069 *__offset = offset;
4070 if (use_rx_sg && card->options.performance_stats) {
4071 card->perf_stats.sg_skbs_rx++;
4072 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4073 }
4074 return skb;
4075 no_mem:
4076 if (net_ratelimit()) {
4077 PRINT_WARN("No memory for packet received on %s.\n",
4078 QETH_CARD_IFNAME(card));
4079 QETH_DBF_TEXT(trace, 2, "noskbmem");
4080 QETH_DBF_TEXT_(trace, 2, "%s", CARD_BUS_ID(card));
4081 }
4082 card->stats.rx_dropped++;
4083 return NULL;
4084 }
4085 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4086
4087 static void qeth_unregister_dbf_views(void)
4088 {
4089 if (qeth_dbf_setup)
4090 debug_unregister(qeth_dbf_setup);
4091 if (qeth_dbf_qerr)
4092 debug_unregister(qeth_dbf_qerr);
4093 if (qeth_dbf_sense)
4094 debug_unregister(qeth_dbf_sense);
4095 if (qeth_dbf_misc)
4096 debug_unregister(qeth_dbf_misc);
4097 if (qeth_dbf_data)
4098 debug_unregister(qeth_dbf_data);
4099 if (qeth_dbf_control)
4100 debug_unregister(qeth_dbf_control);
4101 if (qeth_dbf_trace)
4102 debug_unregister(qeth_dbf_trace);
4103 }
4104
4105 static int qeth_register_dbf_views(void)
4106 {
4107 qeth_dbf_setup = debug_register(QETH_DBF_SETUP_NAME,
4108 QETH_DBF_SETUP_PAGES,
4109 QETH_DBF_SETUP_NR_AREAS,
4110 QETH_DBF_SETUP_LEN);
4111 qeth_dbf_misc = debug_register(QETH_DBF_MISC_NAME,
4112 QETH_DBF_MISC_PAGES,
4113 QETH_DBF_MISC_NR_AREAS,
4114 QETH_DBF_MISC_LEN);
4115 qeth_dbf_data = debug_register(QETH_DBF_DATA_NAME,
4116 QETH_DBF_DATA_PAGES,
4117 QETH_DBF_DATA_NR_AREAS,
4118 QETH_DBF_DATA_LEN);
4119 qeth_dbf_control = debug_register(QETH_DBF_CONTROL_NAME,
4120 QETH_DBF_CONTROL_PAGES,
4121 QETH_DBF_CONTROL_NR_AREAS,
4122 QETH_DBF_CONTROL_LEN);
4123 qeth_dbf_sense = debug_register(QETH_DBF_SENSE_NAME,
4124 QETH_DBF_SENSE_PAGES,
4125 QETH_DBF_SENSE_NR_AREAS,
4126 QETH_DBF_SENSE_LEN);
4127 qeth_dbf_qerr = debug_register(QETH_DBF_QERR_NAME,
4128 QETH_DBF_QERR_PAGES,
4129 QETH_DBF_QERR_NR_AREAS,
4130 QETH_DBF_QERR_LEN);
4131 qeth_dbf_trace = debug_register(QETH_DBF_TRACE_NAME,
4132 QETH_DBF_TRACE_PAGES,
4133 QETH_DBF_TRACE_NR_AREAS,
4134 QETH_DBF_TRACE_LEN);
4135
4136 if ((qeth_dbf_setup == NULL) || (qeth_dbf_misc == NULL) ||
4137 (qeth_dbf_data == NULL) || (qeth_dbf_control == NULL) ||
4138 (qeth_dbf_sense == NULL) || (qeth_dbf_qerr == NULL) ||
4139 (qeth_dbf_trace == NULL)) {
4140 qeth_unregister_dbf_views();
4141 return -ENOMEM;
4142 }
4143 debug_register_view(qeth_dbf_setup, &debug_hex_ascii_view);
4144 debug_set_level(qeth_dbf_setup, QETH_DBF_SETUP_LEVEL);
4145
4146 debug_register_view(qeth_dbf_misc, &debug_hex_ascii_view);
4147 debug_set_level(qeth_dbf_misc, QETH_DBF_MISC_LEVEL);
4148
4149 debug_register_view(qeth_dbf_data, &debug_hex_ascii_view);
4150 debug_set_level(qeth_dbf_data, QETH_DBF_DATA_LEVEL);
4151
4152 debug_register_view(qeth_dbf_control, &debug_hex_ascii_view);
4153 debug_set_level(qeth_dbf_control, QETH_DBF_CONTROL_LEVEL);
4154
4155 debug_register_view(qeth_dbf_sense, &debug_hex_ascii_view);
4156 debug_set_level(qeth_dbf_sense, QETH_DBF_SENSE_LEVEL);
4157
4158 debug_register_view(qeth_dbf_qerr, &debug_hex_ascii_view);
4159 debug_set_level(qeth_dbf_qerr, QETH_DBF_QERR_LEVEL);
4160
4161 debug_register_view(qeth_dbf_trace, &debug_hex_ascii_view);
4162 debug_set_level(qeth_dbf_trace, QETH_DBF_TRACE_LEVEL);
4163
4164 return 0;
4165 }
4166
4167 int qeth_core_load_discipline(struct qeth_card *card,
4168 enum qeth_discipline_id discipline)
4169 {
4170 int rc = 0;
4171 switch (discipline) {
4172 case QETH_DISCIPLINE_LAYER3:
4173 card->discipline.ccwgdriver = try_then_request_module(
4174 symbol_get(qeth_l3_ccwgroup_driver),
4175 "qeth_l3");
4176 break;
4177 case QETH_DISCIPLINE_LAYER2:
4178 card->discipline.ccwgdriver = try_then_request_module(
4179 symbol_get(qeth_l2_ccwgroup_driver),
4180 "qeth_l2");
4181 break;
4182 }
4183 if (!card->discipline.ccwgdriver) {
4184 PRINT_ERR("Support for discipline %d not present\n",
4185 discipline);
4186 rc = -EINVAL;
4187 }
4188 return rc;
4189 }
4190
4191 void qeth_core_free_discipline(struct qeth_card *card)
4192 {
4193 if (card->options.layer2)
4194 symbol_put(qeth_l2_ccwgroup_driver);
4195 else
4196 symbol_put(qeth_l3_ccwgroup_driver);
4197 card->discipline.ccwgdriver = NULL;
4198 }
4199
4200 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4201 {
4202 struct qeth_card *card;
4203 struct device *dev;
4204 int rc;
4205 unsigned long flags;
4206
4207 QETH_DBF_TEXT(setup, 2, "probedev");
4208
4209 dev = &gdev->dev;
4210 if (!get_device(dev))
4211 return -ENODEV;
4212
4213 QETH_DBF_TEXT_(setup, 2, "%s", gdev->dev.bus_id);
4214
4215 card = qeth_alloc_card();
4216 if (!card) {
4217 QETH_DBF_TEXT_(setup, 2, "1err%d", -ENOMEM);
4218 rc = -ENOMEM;
4219 goto err_dev;
4220 }
4221 card->read.ccwdev = gdev->cdev[0];
4222 card->write.ccwdev = gdev->cdev[1];
4223 card->data.ccwdev = gdev->cdev[2];
4224 dev_set_drvdata(&gdev->dev, card);
4225 card->gdev = gdev;
4226 gdev->cdev[0]->handler = qeth_irq;
4227 gdev->cdev[1]->handler = qeth_irq;
4228 gdev->cdev[2]->handler = qeth_irq;
4229
4230 rc = qeth_determine_card_type(card);
4231 if (rc) {
4232 PRINT_WARN("%s: not a valid card type\n", __func__);
4233 QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
4234 goto err_card;
4235 }
4236 rc = qeth_setup_card(card);
4237 if (rc) {
4238 QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
4239 goto err_card;
4240 }
4241
4242 if (card->info.type == QETH_CARD_TYPE_OSN) {
4243 rc = qeth_core_create_osn_attributes(dev);
4244 if (rc)
4245 goto err_card;
4246 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4247 if (rc) {
4248 qeth_core_remove_osn_attributes(dev);
4249 goto err_card;
4250 }
4251 rc = card->discipline.ccwgdriver->probe(card->gdev);
4252 if (rc) {
4253 qeth_core_free_discipline(card);
4254 qeth_core_remove_osn_attributes(dev);
4255 goto err_card;
4256 }
4257 } else {
4258 rc = qeth_core_create_device_attributes(dev);
4259 if (rc)
4260 goto err_card;
4261 }
4262
4263 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4264 list_add_tail(&card->list, &qeth_core_card_list.list);
4265 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4266 return 0;
4267
4268 err_card:
4269 qeth_core_free_card(card);
4270 err_dev:
4271 put_device(dev);
4272 return rc;
4273 }
4274
4275 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4276 {
4277 unsigned long flags;
4278 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4279
4280 if (card->discipline.ccwgdriver) {
4281 card->discipline.ccwgdriver->remove(gdev);
4282 qeth_core_free_discipline(card);
4283 }
4284
4285 if (card->info.type == QETH_CARD_TYPE_OSN) {
4286 qeth_core_remove_osn_attributes(&gdev->dev);
4287 } else {
4288 qeth_core_remove_device_attributes(&gdev->dev);
4289 }
4290 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4291 list_del(&card->list);
4292 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4293 qeth_core_free_card(card);
4294 dev_set_drvdata(&gdev->dev, NULL);
4295 put_device(&gdev->dev);
4296 return;
4297 }
4298
4299 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4300 {
4301 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4302 int rc = 0;
4303 int def_discipline;
4304
4305 if (!card->discipline.ccwgdriver) {
4306 if (card->info.type == QETH_CARD_TYPE_IQD)
4307 def_discipline = QETH_DISCIPLINE_LAYER3;
4308 else
4309 def_discipline = QETH_DISCIPLINE_LAYER2;
4310 rc = qeth_core_load_discipline(card, def_discipline);
4311 if (rc)
4312 goto err;
4313 rc = card->discipline.ccwgdriver->probe(card->gdev);
4314 if (rc)
4315 goto err;
4316 }
4317 rc = card->discipline.ccwgdriver->set_online(gdev);
4318 err:
4319 return rc;
4320 }
4321
4322 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4323 {
4324 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4325 return card->discipline.ccwgdriver->set_offline(gdev);
4326 }
4327
4328 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4329 {
4330 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4331 if (card->discipline.ccwgdriver &&
4332 card->discipline.ccwgdriver->shutdown)
4333 card->discipline.ccwgdriver->shutdown(gdev);
4334 }
4335
4336 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4337 .owner = THIS_MODULE,
4338 .name = "qeth",
4339 .driver_id = 0xD8C5E3C8,
4340 .probe = qeth_core_probe_device,
4341 .remove = qeth_core_remove_device,
4342 .set_online = qeth_core_set_online,
4343 .set_offline = qeth_core_set_offline,
4344 .shutdown = qeth_core_shutdown,
4345 };
4346
4347 static ssize_t
4348 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4349 size_t count)
4350 {
4351 int err;
4352 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4353 qeth_core_ccwgroup_driver.driver_id);
4354 if (err)
4355 return err;
4356 else
4357 return count;
4358 }
4359
4360 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4361
4362 static struct {
4363 const char str[ETH_GSTRING_LEN];
4364 } qeth_ethtool_stats_keys[] = {
4365 /* 0 */{"rx skbs"},
4366 {"rx buffers"},
4367 {"tx skbs"},
4368 {"tx buffers"},
4369 {"tx skbs no packing"},
4370 {"tx buffers no packing"},
4371 {"tx skbs packing"},
4372 {"tx buffers packing"},
4373 {"tx sg skbs"},
4374 {"tx sg frags"},
4375 /* 10 */{"rx sg skbs"},
4376 {"rx sg frags"},
4377 {"rx sg page allocs"},
4378 {"tx large kbytes"},
4379 {"tx large count"},
4380 {"tx pk state ch n->p"},
4381 {"tx pk state ch p->n"},
4382 {"tx pk watermark low"},
4383 {"tx pk watermark high"},
4384 {"queue 0 buffer usage"},
4385 /* 20 */{"queue 1 buffer usage"},
4386 {"queue 2 buffer usage"},
4387 {"queue 3 buffer usage"},
4388 {"rx handler time"},
4389 {"rx handler count"},
4390 {"rx do_QDIO time"},
4391 {"rx do_QDIO count"},
4392 {"tx handler time"},
4393 {"tx handler count"},
4394 {"tx time"},
4395 /* 30 */{"tx count"},
4396 {"tx do_QDIO time"},
4397 {"tx do_QDIO count"},
4398 };
4399
4400 int qeth_core_get_stats_count(struct net_device *dev)
4401 {
4402 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4403 }
4404 EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4405
4406 void qeth_core_get_ethtool_stats(struct net_device *dev,
4407 struct ethtool_stats *stats, u64 *data)
4408 {
4409 struct qeth_card *card = netdev_priv(dev);
4410 data[0] = card->stats.rx_packets -
4411 card->perf_stats.initial_rx_packets;
4412 data[1] = card->perf_stats.bufs_rec;
4413 data[2] = card->stats.tx_packets -
4414 card->perf_stats.initial_tx_packets;
4415 data[3] = card->perf_stats.bufs_sent;
4416 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4417 - card->perf_stats.skbs_sent_pack;
4418 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4419 data[6] = card->perf_stats.skbs_sent_pack;
4420 data[7] = card->perf_stats.bufs_sent_pack;
4421 data[8] = card->perf_stats.sg_skbs_sent;
4422 data[9] = card->perf_stats.sg_frags_sent;
4423 data[10] = card->perf_stats.sg_skbs_rx;
4424 data[11] = card->perf_stats.sg_frags_rx;
4425 data[12] = card->perf_stats.sg_alloc_page_rx;
4426 data[13] = (card->perf_stats.large_send_bytes >> 10);
4427 data[14] = card->perf_stats.large_send_cnt;
4428 data[15] = card->perf_stats.sc_dp_p;
4429 data[16] = card->perf_stats.sc_p_dp;
4430 data[17] = QETH_LOW_WATERMARK_PACK;
4431 data[18] = QETH_HIGH_WATERMARK_PACK;
4432 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4433 data[20] = (card->qdio.no_out_queues > 1) ?
4434 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4435 data[21] = (card->qdio.no_out_queues > 2) ?
4436 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4437 data[22] = (card->qdio.no_out_queues > 3) ?
4438 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4439 data[23] = card->perf_stats.inbound_time;
4440 data[24] = card->perf_stats.inbound_cnt;
4441 data[25] = card->perf_stats.inbound_do_qdio_time;
4442 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4443 data[27] = card->perf_stats.outbound_handler_time;
4444 data[28] = card->perf_stats.outbound_handler_cnt;
4445 data[29] = card->perf_stats.outbound_time;
4446 data[30] = card->perf_stats.outbound_cnt;
4447 data[31] = card->perf_stats.outbound_do_qdio_time;
4448 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4449 }
4450 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4451
4452 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4453 {
4454 switch (stringset) {
4455 case ETH_SS_STATS:
4456 memcpy(data, &qeth_ethtool_stats_keys,
4457 sizeof(qeth_ethtool_stats_keys));
4458 break;
4459 default:
4460 WARN_ON(1);
4461 break;
4462 }
4463 }
4464 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4465
4466 void qeth_core_get_drvinfo(struct net_device *dev,
4467 struct ethtool_drvinfo *info)
4468 {
4469 struct qeth_card *card = netdev_priv(dev);
4470 if (card->options.layer2)
4471 strcpy(info->driver, "qeth_l2");
4472 else
4473 strcpy(info->driver, "qeth_l3");
4474
4475 strcpy(info->version, "1.0");
4476 strcpy(info->fw_version, card->info.mcl_level);
4477 sprintf(info->bus_info, "%s/%s/%s",
4478 CARD_RDEV_ID(card),
4479 CARD_WDEV_ID(card),
4480 CARD_DDEV_ID(card));
4481 }
4482 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4483
4484 static int __init qeth_core_init(void)
4485 {
4486 int rc;
4487
4488 PRINT_INFO("loading core functions\n");
4489 INIT_LIST_HEAD(&qeth_core_card_list.list);
4490 rwlock_init(&qeth_core_card_list.rwlock);
4491
4492 rc = qeth_register_dbf_views();
4493 if (rc)
4494 goto out_err;
4495 rc = ccw_driver_register(&qeth_ccw_driver);
4496 if (rc)
4497 goto ccw_err;
4498 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4499 if (rc)
4500 goto ccwgroup_err;
4501 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4502 &driver_attr_group);
4503 if (rc)
4504 goto driver_err;
4505 qeth_core_root_dev = s390_root_dev_register("qeth");
4506 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4507 if (rc)
4508 goto register_err;
4509 return 0;
4510
4511 register_err:
4512 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4513 &driver_attr_group);
4514 driver_err:
4515 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4516 ccwgroup_err:
4517 ccw_driver_unregister(&qeth_ccw_driver);
4518 ccw_err:
4519 qeth_unregister_dbf_views();
4520 out_err:
4521 PRINT_ERR("Initialization failed with code %d\n", rc);
4522 return rc;
4523 }
4524
4525 static void __exit qeth_core_exit(void)
4526 {
4527 s390_root_dev_unregister(qeth_core_root_dev);
4528 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4529 &driver_attr_group);
4530 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4531 ccw_driver_unregister(&qeth_ccw_driver);
4532 qeth_unregister_dbf_views();
4533 PRINT_INFO("core functions removed\n");
4534 }
4535
4536 module_init(qeth_core_init);
4537 module_exit(qeth_core_exit);
4538 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4539 MODULE_DESCRIPTION("qeth core functions");
4540 MODULE_LICENSE("GPL");
Linux with added FPC-III support