Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux/fpc-iii.git] / drivers / gpu / drm / msm / mdp / mdp5 / mdp5_ctl.h
blob96148c6f863c8fe9e45d862eaa068fac0bb0dd0a
1 /*
2 * Copyright (c) 2014 The Linux Foundation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #ifndef __MDP5_CTL_H__
15 #define __MDP5_CTL_H__
17 #include "msm_drv.h"
20 * CTL Manager prototypes:
21 * mdp5_ctlm_init() returns a ctlm (CTL Manager) handler,
22 * which is then used to call the other mdp5_ctlm_*(ctlm, ...) functions.
24 struct mdp5_ctl_manager;
25 struct mdp5_ctl_manager *mdp5_ctlm_init(struct drm_device *dev,
26 void __iomem *mmio_base, struct mdp5_cfg_handler *cfg_hnd);
27 void mdp5_ctlm_hw_reset(struct mdp5_ctl_manager *ctlm);
28 void mdp5_ctlm_destroy(struct mdp5_ctl_manager *ctlm);
31 * CTL prototypes:
32 * mdp5_ctl_request(ctlm, ...) returns a ctl (CTL resource) handler,
33 * which is then used to call the other mdp5_ctl_*(ctl, ...) functions.
35 struct mdp5_ctl *mdp5_ctlm_request(struct mdp5_ctl_manager *ctlm, int intf_num);
37 int mdp5_ctl_get_ctl_id(struct mdp5_ctl *ctl);
39 struct mdp5_interface;
40 int mdp5_ctl_set_pipeline(struct mdp5_ctl *ctl, struct mdp5_interface *intf,
41 int lm);
42 int mdp5_ctl_set_encoder_state(struct mdp5_ctl *ctl, bool enabled);
44 int mdp5_ctl_set_cursor(struct mdp5_ctl *ctl, int cursor_id, bool enable);
45 int mdp5_ctl_pair(struct mdp5_ctl *ctlx, struct mdp5_ctl *ctly, bool enable);
48 * mdp5_ctl_blend() - Blend multiple layers on a Layer Mixer (LM)
50 * @stage: array to contain the pipe num for each stage
51 * @stage_cnt: valid stage number in stage array
52 * @ctl_blend_op_flags: blender operation mode flags
54 * Note:
55 * CTL registers need to be flushed after calling this function
56 * (call mdp5_ctl_commit() with mdp_ctl_flush_mask_ctl() mask)
58 #define MDP5_CTL_BLEND_OP_FLAG_BORDER_OUT BIT(0)
59 int mdp5_ctl_blend(struct mdp5_ctl *ctl, u8 *stage, u32 stage_cnt,
60 u32 ctl_blend_op_flags);
62 /**
63 * mdp_ctl_flush_mask...() - Register FLUSH masks
65 * These masks are used to specify which block(s) need to be flushed
66 * through @flush_mask parameter in mdp5_ctl_commit(.., flush_mask).
68 u32 mdp_ctl_flush_mask_lm(int lm);
69 u32 mdp_ctl_flush_mask_pipe(enum mdp5_pipe pipe);
70 u32 mdp_ctl_flush_mask_cursor(int cursor_id);
71 u32 mdp_ctl_flush_mask_encoder(struct mdp5_interface *intf);
73 /* @flush_mask: see CTL flush masks definitions below */
74 u32 mdp5_ctl_commit(struct mdp5_ctl *ctl, u32 flush_mask);
75 u32 mdp5_ctl_get_commit_status(struct mdp5_ctl *ctl);
79 #endif /* __MDP5_CTL_H__ */