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Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux/fpc-iii.git] / drivers / net / ethernet / intel / fm10k / fm10k_pci.c
blob74be792f3f1b7e0d31e729980b27c6602aeac263
1 /* Intel Ethernet Switch Host Interface Driver
2 * Copyright(c) 2013 - 2015 Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
19 */
20
21 #include <linux/module.h>
22 #include <linux/aer.h>
23
24 #include "fm10k.h"
25
26 static const struct fm10k_info *fm10k_info_tbl[] = {
27 [fm10k_device_pf] = &fm10k_pf_info,
28 [fm10k_device_vf] = &fm10k_vf_info,
29 };
30
31 /**
32 * fm10k_pci_tbl - PCI Device ID Table
33 *
34 * Wildcard entries (PCI_ANY_ID) should come last
35 * Last entry must be all 0s
36 *
37 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
38 * Class, Class Mask, private data (not used) }
39 */
40 static const struct pci_device_id fm10k_pci_tbl[] = {
41 { PCI_VDEVICE(INTEL, FM10K_DEV_ID_PF), fm10k_device_pf },
42 { PCI_VDEVICE(INTEL, FM10K_DEV_ID_VF), fm10k_device_vf },
43 /* required last entry */
44 { 0, }
45 };
46 MODULE_DEVICE_TABLE(pci, fm10k_pci_tbl);
47
48 u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg)
49 {
50 struct fm10k_intfc *interface = hw->back;
51 u16 value = 0;
52
53 if (FM10K_REMOVED(hw->hw_addr))
54 return ~value;
55
56 pci_read_config_word(interface->pdev, reg, &value);
57 if (value == 0xFFFF)
58 fm10k_write_flush(hw);
59
60 return value;
61 }
62
63 u32 fm10k_read_reg(struct fm10k_hw *hw, int reg)
64 {
65 u32 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
66 u32 value = 0;
67
68 if (FM10K_REMOVED(hw_addr))
69 return ~value;
70
71 value = readl(&hw_addr[reg]);
72 if (!(~value) && (!reg || !(~readl(hw_addr)))) {
73 struct fm10k_intfc *interface = hw->back;
74 struct net_device *netdev = interface->netdev;
75
76 hw->hw_addr = NULL;
77 netif_device_detach(netdev);
78 netdev_err(netdev, "PCIe link lost, device now detached\n");
79 }
80
81 return value;
82 }
83
84 static int fm10k_hw_ready(struct fm10k_intfc *interface)
85 {
86 struct fm10k_hw *hw = &interface->hw;
87
88 fm10k_write_flush(hw);
89
90 return FM10K_REMOVED(hw->hw_addr) ? -ENODEV : 0;
91 }
92
93 void fm10k_service_event_schedule(struct fm10k_intfc *interface)
94 {
95 if (!test_bit(__FM10K_SERVICE_DISABLE, &interface->state) &&
96 !test_and_set_bit(__FM10K_SERVICE_SCHED, &interface->state))
97 queue_work(fm10k_workqueue, &interface->service_task);
98 }
99
100 static void fm10k_service_event_complete(struct fm10k_intfc *interface)
101 {
102 BUG_ON(!test_bit(__FM10K_SERVICE_SCHED, &interface->state));
103
104 /* flush memory to make sure state is correct before next watchog */
105 smp_mb__before_atomic();
106 clear_bit(__FM10K_SERVICE_SCHED, &interface->state);
107 }
108
109 /**
110 * fm10k_service_timer - Timer Call-back
111 * @data: pointer to interface cast into an unsigned long
112 **/
113 static void fm10k_service_timer(unsigned long data)
114 {
115 struct fm10k_intfc *interface = (struct fm10k_intfc *)data;
116
117 /* Reset the timer */
118 mod_timer(&interface->service_timer, (HZ * 2) + jiffies);
119
120 fm10k_service_event_schedule(interface);
121 }
122
123 static void fm10k_detach_subtask(struct fm10k_intfc *interface)
124 {
125 struct net_device *netdev = interface->netdev;
126
127 /* do nothing if device is still present or hw_addr is set */
128 if (netif_device_present(netdev) || interface->hw.hw_addr)
129 return;
130
131 rtnl_lock();
132
133 if (netif_running(netdev))
134 dev_close(netdev);
135
136 rtnl_unlock();
137 }
138
139 static void fm10k_reinit(struct fm10k_intfc *interface)
140 {
141 struct net_device *netdev = interface->netdev;
142 struct fm10k_hw *hw = &interface->hw;
143 int err;
144
145 WARN_ON(in_interrupt());
146
147 /* put off any impending NetWatchDogTimeout */
148 netdev->trans_start = jiffies;
149
150 while (test_and_set_bit(__FM10K_RESETTING, &interface->state))
151 usleep_range(1000, 2000);
152
153 rtnl_lock();
154
155 fm10k_iov_suspend(interface->pdev);
156
157 if (netif_running(netdev))
158 fm10k_close(netdev);
159
160 fm10k_mbx_free_irq(interface);
161
162 /* delay any future reset requests */
163 interface->last_reset = jiffies + (10 * HZ);
164
165 /* reset and initialize the hardware so it is in a known state */
166 err = hw->mac.ops.reset_hw(hw) ? : hw->mac.ops.init_hw(hw);
167 if (err)
168 dev_err(&interface->pdev->dev, "init_hw failed: %d\n", err);
169
170 /* reassociate interrupts */
171 fm10k_mbx_request_irq(interface);
172
173 /* update hardware address for VFs if perm_addr has changed */
174 if (hw->mac.type == fm10k_mac_vf) {
175 if (is_valid_ether_addr(hw->mac.perm_addr)) {
176 ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
177 ether_addr_copy(netdev->perm_addr, hw->mac.perm_addr);
178 ether_addr_copy(netdev->dev_addr, hw->mac.perm_addr);
179 netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
180 }
181
182 if (hw->mac.vlan_override)
183 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
184 else
185 netdev->features |= NETIF_F_HW_VLAN_CTAG_RX;
186 }
187
188 /* reset clock */
189 fm10k_ts_reset(interface);
190
191 if (netif_running(netdev))
192 fm10k_open(netdev);
193
194 fm10k_iov_resume(interface->pdev);
195
196 rtnl_unlock();
197
198 clear_bit(__FM10K_RESETTING, &interface->state);
199 }
200
201 static void fm10k_reset_subtask(struct fm10k_intfc *interface)
202 {
203 if (!(interface->flags & FM10K_FLAG_RESET_REQUESTED))
204 return;
205
206 interface->flags &= ~FM10K_FLAG_RESET_REQUESTED;
207
208 netdev_err(interface->netdev, "Reset interface\n");
209
210 fm10k_reinit(interface);
211 }
212
213 /**
214 * fm10k_configure_swpri_map - Configure Receive SWPRI to PC mapping
215 * @interface: board private structure
216 *
217 * Configure the SWPRI to PC mapping for the port.
218 **/
219 static void fm10k_configure_swpri_map(struct fm10k_intfc *interface)
220 {
221 struct net_device *netdev = interface->netdev;
222 struct fm10k_hw *hw = &interface->hw;
223 int i;
224
225 /* clear flag indicating update is needed */
226 interface->flags &= ~FM10K_FLAG_SWPRI_CONFIG;
227
228 /* these registers are only available on the PF */
229 if (hw->mac.type != fm10k_mac_pf)
230 return;
231
232 /* configure SWPRI to PC map */
233 for (i = 0; i < FM10K_SWPRI_MAX; i++)
234 fm10k_write_reg(hw, FM10K_SWPRI_MAP(i),
235 netdev_get_prio_tc_map(netdev, i));
236 }
237
238 /**
239 * fm10k_watchdog_update_host_state - Update the link status based on host.
240 * @interface: board private structure
241 **/
242 static void fm10k_watchdog_update_host_state(struct fm10k_intfc *interface)
243 {
244 struct fm10k_hw *hw = &interface->hw;
245 s32 err;
246
247 if (test_bit(__FM10K_LINK_DOWN, &interface->state)) {
248 interface->host_ready = false;
249 if (time_is_after_jiffies(interface->link_down_event))
250 return;
251 clear_bit(__FM10K_LINK_DOWN, &interface->state);
252 }
253
254 if (interface->flags & FM10K_FLAG_SWPRI_CONFIG) {
255 if (rtnl_trylock()) {
256 fm10k_configure_swpri_map(interface);
257 rtnl_unlock();
258 }
259 }
260
261 /* lock the mailbox for transmit and receive */
262 fm10k_mbx_lock(interface);
263
264 err = hw->mac.ops.get_host_state(hw, &interface->host_ready);
265 if (err && time_is_before_jiffies(interface->last_reset))
266 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
267
268 /* free the lock */
269 fm10k_mbx_unlock(interface);
270 }
271
272 /**
273 * fm10k_mbx_subtask - Process upstream and downstream mailboxes
274 * @interface: board private structure
275 *
276 * This function will process both the upstream and downstream mailboxes.
277 **/
278 static void fm10k_mbx_subtask(struct fm10k_intfc *interface)
279 {
280 /* process upstream mailbox and update device state */
281 fm10k_watchdog_update_host_state(interface);
282
283 /* process downstream mailboxes */
284 fm10k_iov_mbx(interface);
285 }
286
287 /**
288 * fm10k_watchdog_host_is_ready - Update netdev status based on host ready
289 * @interface: board private structure
290 **/
291 static void fm10k_watchdog_host_is_ready(struct fm10k_intfc *interface)
292 {
293 struct net_device *netdev = interface->netdev;
294
295 /* only continue if link state is currently down */
296 if (netif_carrier_ok(netdev))
297 return;
298
299 netif_info(interface, drv, netdev, "NIC Link is up\n");
300
301 netif_carrier_on(netdev);
302 netif_tx_wake_all_queues(netdev);
303 }
304
305 /**
306 * fm10k_watchdog_host_not_ready - Update netdev status based on host not ready
307 * @interface: board private structure
308 **/
309 static void fm10k_watchdog_host_not_ready(struct fm10k_intfc *interface)
310 {
311 struct net_device *netdev = interface->netdev;
312
313 /* only continue if link state is currently up */
314 if (!netif_carrier_ok(netdev))
315 return;
316
317 netif_info(interface, drv, netdev, "NIC Link is down\n");
318
319 netif_carrier_off(netdev);
320 netif_tx_stop_all_queues(netdev);
321 }
322
323 /**
324 * fm10k_update_stats - Update the board statistics counters.
325 * @interface: board private structure
326 **/
327 void fm10k_update_stats(struct fm10k_intfc *interface)
328 {
329 struct net_device_stats *net_stats = &interface->netdev->stats;
330 struct fm10k_hw *hw = &interface->hw;
331 u64 hw_csum_tx_good = 0, hw_csum_rx_good = 0, rx_length_errors = 0;
332 u64 rx_switch_errors = 0, rx_drops = 0, rx_pp_errors = 0;
333 u64 rx_link_errors = 0;
334 u64 rx_errors = 0, rx_csum_errors = 0, tx_csum_errors = 0;
335 u64 restart_queue = 0, tx_busy = 0, alloc_failed = 0;
336 u64 rx_bytes_nic = 0, rx_pkts_nic = 0, rx_drops_nic = 0;
337 u64 tx_bytes_nic = 0, tx_pkts_nic = 0;
338 u64 bytes, pkts;
339 int i;
340
341 /* do not allow stats update via service task for next second */
342 interface->next_stats_update = jiffies + HZ;
343
344 /* gather some stats to the interface struct that are per queue */
345 for (bytes = 0, pkts = 0, i = 0; i < interface->num_tx_queues; i++) {
346 struct fm10k_ring *tx_ring = interface->tx_ring[i];
347
348 restart_queue += tx_ring->tx_stats.restart_queue;
349 tx_busy += tx_ring->tx_stats.tx_busy;
350 tx_csum_errors += tx_ring->tx_stats.csum_err;
351 bytes += tx_ring->stats.bytes;
352 pkts += tx_ring->stats.packets;
353 hw_csum_tx_good += tx_ring->tx_stats.csum_good;
354 }
355
356 interface->restart_queue = restart_queue;
357 interface->tx_busy = tx_busy;
358 net_stats->tx_bytes = bytes;
359 net_stats->tx_packets = pkts;
360 interface->tx_csum_errors = tx_csum_errors;
361 interface->hw_csum_tx_good = hw_csum_tx_good;
362
363 /* gather some stats to the interface struct that are per queue */
364 for (bytes = 0, pkts = 0, i = 0; i < interface->num_rx_queues; i++) {
365 struct fm10k_ring *rx_ring = interface->rx_ring[i];
366
367 bytes += rx_ring->stats.bytes;
368 pkts += rx_ring->stats.packets;
369 alloc_failed += rx_ring->rx_stats.alloc_failed;
370 rx_csum_errors += rx_ring->rx_stats.csum_err;
371 rx_errors += rx_ring->rx_stats.errors;
372 hw_csum_rx_good += rx_ring->rx_stats.csum_good;
373 rx_switch_errors += rx_ring->rx_stats.switch_errors;
374 rx_drops += rx_ring->rx_stats.drops;
375 rx_pp_errors += rx_ring->rx_stats.pp_errors;
376 rx_link_errors += rx_ring->rx_stats.link_errors;
377 rx_length_errors += rx_ring->rx_stats.length_errors;
378 }
379
380 net_stats->rx_bytes = bytes;
381 net_stats->rx_packets = pkts;
382 interface->alloc_failed = alloc_failed;
383 interface->rx_csum_errors = rx_csum_errors;
384 interface->hw_csum_rx_good = hw_csum_rx_good;
385 interface->rx_switch_errors = rx_switch_errors;
386 interface->rx_drops = rx_drops;
387 interface->rx_pp_errors = rx_pp_errors;
388 interface->rx_link_errors = rx_link_errors;
389 interface->rx_length_errors = rx_length_errors;
390
391 hw->mac.ops.update_hw_stats(hw, &interface->stats);
392
393 for (i = 0; i < hw->mac.max_queues; i++) {
394 struct fm10k_hw_stats_q *q = &interface->stats.q[i];
395
396 tx_bytes_nic += q->tx_bytes.count;
397 tx_pkts_nic += q->tx_packets.count;
398 rx_bytes_nic += q->rx_bytes.count;
399 rx_pkts_nic += q->rx_packets.count;
400 rx_drops_nic += q->rx_drops.count;
401 }
402
403 interface->tx_bytes_nic = tx_bytes_nic;
404 interface->tx_packets_nic = tx_pkts_nic;
405 interface->rx_bytes_nic = rx_bytes_nic;
406 interface->rx_packets_nic = rx_pkts_nic;
407 interface->rx_drops_nic = rx_drops_nic;
408
409 /* Fill out the OS statistics structure */
410 net_stats->rx_errors = rx_errors;
411 net_stats->rx_dropped = interface->stats.nodesc_drop.count;
412 }
413
414 /**
415 * fm10k_watchdog_flush_tx - flush queues on host not ready
416 * @interface - pointer to the device interface structure
417 **/
418 static void fm10k_watchdog_flush_tx(struct fm10k_intfc *interface)
419 {
420 int some_tx_pending = 0;
421 int i;
422
423 /* nothing to do if carrier is up */
424 if (netif_carrier_ok(interface->netdev))
425 return;
426
427 for (i = 0; i < interface->num_tx_queues; i++) {
428 struct fm10k_ring *tx_ring = interface->tx_ring[i];
429
430 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
431 some_tx_pending = 1;
432 break;
433 }
434 }
435
436 /* We've lost link, so the controller stops DMA, but we've got
437 * queued Tx work that's never going to get done, so reset
438 * controller to flush Tx.
439 */
440 if (some_tx_pending)
441 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
442 }
443
444 /**
445 * fm10k_watchdog_subtask - check and bring link up
446 * @interface - pointer to the device interface structure
447 **/
448 static void fm10k_watchdog_subtask(struct fm10k_intfc *interface)
449 {
450 /* if interface is down do nothing */
451 if (test_bit(__FM10K_DOWN, &interface->state) ||
452 test_bit(__FM10K_RESETTING, &interface->state))
453 return;
454
455 if (interface->host_ready)
456 fm10k_watchdog_host_is_ready(interface);
457 else
458 fm10k_watchdog_host_not_ready(interface);
459
460 /* update stats only once every second */
461 if (time_is_before_jiffies(interface->next_stats_update))
462 fm10k_update_stats(interface);
463
464 /* flush any uncompleted work */
465 fm10k_watchdog_flush_tx(interface);
466 }
467
468 /**
469 * fm10k_check_hang_subtask - check for hung queues and dropped interrupts
470 * @interface - pointer to the device interface structure
471 *
472 * This function serves two purposes. First it strobes the interrupt lines
473 * in order to make certain interrupts are occurring. Secondly it sets the
474 * bits needed to check for TX hangs. As a result we should immediately
475 * determine if a hang has occurred.
476 */
477 static void fm10k_check_hang_subtask(struct fm10k_intfc *interface)
478 {
479 int i;
480
481 /* If we're down or resetting, just bail */
482 if (test_bit(__FM10K_DOWN, &interface->state) ||
483 test_bit(__FM10K_RESETTING, &interface->state))
484 return;
485
486 /* rate limit tx hang checks to only once every 2 seconds */
487 if (time_is_after_eq_jiffies(interface->next_tx_hang_check))
488 return;
489 interface->next_tx_hang_check = jiffies + (2 * HZ);
490
491 if (netif_carrier_ok(interface->netdev)) {
492 /* Force detection of hung controller */
493 for (i = 0; i < interface->num_tx_queues; i++)
494 set_check_for_tx_hang(interface->tx_ring[i]);
495
496 /* Rearm all in-use q_vectors for immediate firing */
497 for (i = 0; i < interface->num_q_vectors; i++) {
498 struct fm10k_q_vector *qv = interface->q_vector[i];
499
500 if (!qv->tx.count && !qv->rx.count)
501 continue;
502 writel(FM10K_ITR_ENABLE | FM10K_ITR_PENDING2, qv->itr);
503 }
504 }
505 }
506
507 /**
508 * fm10k_service_task - manages and runs subtasks
509 * @work: pointer to work_struct containing our data
510 **/
511 static void fm10k_service_task(struct work_struct *work)
512 {
513 struct fm10k_intfc *interface;
514
515 interface = container_of(work, struct fm10k_intfc, service_task);
516
517 /* tasks run even when interface is down */
518 fm10k_mbx_subtask(interface);
519 fm10k_detach_subtask(interface);
520 fm10k_reset_subtask(interface);
521
522 /* tasks only run when interface is up */
523 fm10k_watchdog_subtask(interface);
524 fm10k_check_hang_subtask(interface);
525 fm10k_ts_tx_subtask(interface);
526
527 /* release lock on service events to allow scheduling next event */
528 fm10k_service_event_complete(interface);
529 }
530
531 /**
532 * fm10k_configure_tx_ring - Configure Tx ring after Reset
533 * @interface: board private structure
534 * @ring: structure containing ring specific data
535 *
536 * Configure the Tx descriptor ring after a reset.
537 **/
538 static void fm10k_configure_tx_ring(struct fm10k_intfc *interface,
539 struct fm10k_ring *ring)
540 {
541 struct fm10k_hw *hw = &interface->hw;
542 u64 tdba = ring->dma;
543 u32 size = ring->count * sizeof(struct fm10k_tx_desc);
544 u32 txint = FM10K_INT_MAP_DISABLE;
545 u32 txdctl = FM10K_TXDCTL_ENABLE | (1 << FM10K_TXDCTL_MAX_TIME_SHIFT);
546 u8 reg_idx = ring->reg_idx;
547
548 /* disable queue to avoid issues while updating state */
549 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), 0);
550 fm10k_write_flush(hw);
551
552 /* possible poll here to verify ring resources have been cleaned */
553
554 /* set location and size for descriptor ring */
555 fm10k_write_reg(hw, FM10K_TDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
556 fm10k_write_reg(hw, FM10K_TDBAH(reg_idx), tdba >> 32);
557 fm10k_write_reg(hw, FM10K_TDLEN(reg_idx), size);
558
559 /* reset head and tail pointers */
560 fm10k_write_reg(hw, FM10K_TDH(reg_idx), 0);
561 fm10k_write_reg(hw, FM10K_TDT(reg_idx), 0);
562
563 /* store tail pointer */
564 ring->tail = &interface->uc_addr[FM10K_TDT(reg_idx)];
565
566 /* reset ntu and ntc to place SW in sync with hardwdare */
567 ring->next_to_clean = 0;
568 ring->next_to_use = 0;
569
570 /* Map interrupt */
571 if (ring->q_vector) {
572 txint = ring->q_vector->v_idx + NON_Q_VECTORS(hw);
573 txint |= FM10K_INT_MAP_TIMER0;
574 }
575
576 fm10k_write_reg(hw, FM10K_TXINT(reg_idx), txint);
577
578 /* enable use of FTAG bit in Tx descriptor, register is RO for VF */
579 fm10k_write_reg(hw, FM10K_PFVTCTL(reg_idx),
580 FM10K_PFVTCTL_FTAG_DESC_ENABLE);
581
582 /* enable queue */
583 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), txdctl);
584 }
585
586 /**
587 * fm10k_enable_tx_ring - Verify Tx ring is enabled after configuration
588 * @interface: board private structure
589 * @ring: structure containing ring specific data
590 *
591 * Verify the Tx descriptor ring is ready for transmit.
592 **/
593 static void fm10k_enable_tx_ring(struct fm10k_intfc *interface,
594 struct fm10k_ring *ring)
595 {
596 struct fm10k_hw *hw = &interface->hw;
597 int wait_loop = 10;
598 u32 txdctl;
599 u8 reg_idx = ring->reg_idx;
600
601 /* if we are already enabled just exit */
602 if (fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)) & FM10K_TXDCTL_ENABLE)
603 return;
604
605 /* poll to verify queue is enabled */
606 do {
607 usleep_range(1000, 2000);
608 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx));
609 } while (!(txdctl & FM10K_TXDCTL_ENABLE) && --wait_loop);
610 if (!wait_loop)
611 netif_err(interface, drv, interface->netdev,
612 "Could not enable Tx Queue %d\n", reg_idx);
613 }
614
615 /**
616 * fm10k_configure_tx - Configure Transmit Unit after Reset
617 * @interface: board private structure
618 *
619 * Configure the Tx unit of the MAC after a reset.
620 **/
621 static void fm10k_configure_tx(struct fm10k_intfc *interface)
622 {
623 int i;
624
625 /* Setup the HW Tx Head and Tail descriptor pointers */
626 for (i = 0; i < interface->num_tx_queues; i++)
627 fm10k_configure_tx_ring(interface, interface->tx_ring[i]);
628
629 /* poll here to verify that Tx rings are now enabled */
630 for (i = 0; i < interface->num_tx_queues; i++)
631 fm10k_enable_tx_ring(interface, interface->tx_ring[i]);
632 }
633
634 /**
635 * fm10k_configure_rx_ring - Configure Rx ring after Reset
636 * @interface: board private structure
637 * @ring: structure containing ring specific data
638 *
639 * Configure the Rx descriptor ring after a reset.
640 **/
641 static void fm10k_configure_rx_ring(struct fm10k_intfc *interface,
642 struct fm10k_ring *ring)
643 {
644 u64 rdba = ring->dma;
645 struct fm10k_hw *hw = &interface->hw;
646 u32 size = ring->count * sizeof(union fm10k_rx_desc);
647 u32 rxqctl = FM10K_RXQCTL_ENABLE | FM10K_RXQCTL_PF;
648 u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
649 u32 srrctl = FM10K_SRRCTL_BUFFER_CHAINING_EN;
650 u32 rxint = FM10K_INT_MAP_DISABLE;
651 u8 rx_pause = interface->rx_pause;
652 u8 reg_idx = ring->reg_idx;
653
654 /* disable queue to avoid issues while updating state */
655 fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), 0);
656 fm10k_write_flush(hw);
657
658 /* possible poll here to verify ring resources have been cleaned */
659
660 /* set location and size for descriptor ring */
661 fm10k_write_reg(hw, FM10K_RDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
662 fm10k_write_reg(hw, FM10K_RDBAH(reg_idx), rdba >> 32);
663 fm10k_write_reg(hw, FM10K_RDLEN(reg_idx), size);
664
665 /* reset head and tail pointers */
666 fm10k_write_reg(hw, FM10K_RDH(reg_idx), 0);
667 fm10k_write_reg(hw, FM10K_RDT(reg_idx), 0);
668
669 /* store tail pointer */
670 ring->tail = &interface->uc_addr[FM10K_RDT(reg_idx)];
671
672 /* reset ntu and ntc to place SW in sync with hardwdare */
673 ring->next_to_clean = 0;
674 ring->next_to_use = 0;
675 ring->next_to_alloc = 0;
676
677 /* Configure the Rx buffer size for one buff without split */
678 srrctl |= FM10K_RX_BUFSZ >> FM10K_SRRCTL_BSIZEPKT_SHIFT;
679
680 /* Configure the Rx ring to suppress loopback packets */
681 srrctl |= FM10K_SRRCTL_LOOPBACK_SUPPRESS;
682 fm10k_write_reg(hw, FM10K_SRRCTL(reg_idx), srrctl);
683
684 /* Enable drop on empty */
685 #ifdef CONFIG_DCB
686 if (interface->pfc_en)
687 rx_pause = interface->pfc_en;
688 #endif
689 if (!(rx_pause & (1 << ring->qos_pc)))
690 rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY;
691
692 fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl);
693
694 /* assign default VLAN to queue */
695 ring->vid = hw->mac.default_vid;
696
697 /* if we have an active VLAN, disable default VID */
698 if (test_bit(hw->mac.default_vid, interface->active_vlans))
699 ring->vid |= FM10K_VLAN_CLEAR;
700
701 /* Map interrupt */
702 if (ring->q_vector) {
703 rxint = ring->q_vector->v_idx + NON_Q_VECTORS(hw);
704 rxint |= FM10K_INT_MAP_TIMER1;
705 }
706
707 fm10k_write_reg(hw, FM10K_RXINT(reg_idx), rxint);
708
709 /* enable queue */
710 fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), rxqctl);
711
712 /* place buffers on ring for receive data */
713 fm10k_alloc_rx_buffers(ring, fm10k_desc_unused(ring));
714 }
715
716 /**
717 * fm10k_update_rx_drop_en - Configures the drop enable bits for Rx rings
718 * @interface: board private structure
719 *
720 * Configure the drop enable bits for the Rx rings.
721 **/
722 void fm10k_update_rx_drop_en(struct fm10k_intfc *interface)
723 {
724 struct fm10k_hw *hw = &interface->hw;
725 u8 rx_pause = interface->rx_pause;
726 int i;
727
728 #ifdef CONFIG_DCB
729 if (interface->pfc_en)
730 rx_pause = interface->pfc_en;
731
732 #endif
733 for (i = 0; i < interface->num_rx_queues; i++) {
734 struct fm10k_ring *ring = interface->rx_ring[i];
735 u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
736 u8 reg_idx = ring->reg_idx;
737
738 if (!(rx_pause & (1 << ring->qos_pc)))
739 rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY;
740
741 fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl);
742 }
743 }
744
745 /**
746 * fm10k_configure_dglort - Configure Receive DGLORT after reset
747 * @interface: board private structure
748 *
749 * Configure the DGLORT description and RSS tables.
750 **/
751 static void fm10k_configure_dglort(struct fm10k_intfc *interface)
752 {
753 struct fm10k_dglort_cfg dglort = { 0 };
754 struct fm10k_hw *hw = &interface->hw;
755 int i;
756 u32 mrqc;
757
758 /* Fill out hash function seeds */
759 for (i = 0; i < FM10K_RSSRK_SIZE; i++)
760 fm10k_write_reg(hw, FM10K_RSSRK(0, i), interface->rssrk[i]);
761
762 /* Write RETA table to hardware */
763 for (i = 0; i < FM10K_RETA_SIZE; i++)
764 fm10k_write_reg(hw, FM10K_RETA(0, i), interface->reta[i]);
765
766 /* Generate RSS hash based on packet types, TCP/UDP
767 * port numbers and/or IPv4/v6 src and dst addresses
768 */
769 mrqc = FM10K_MRQC_IPV4 |
770 FM10K_MRQC_TCP_IPV4 |
771 FM10K_MRQC_IPV6 |
772 FM10K_MRQC_TCP_IPV6;
773
774 if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV4_UDP)
775 mrqc |= FM10K_MRQC_UDP_IPV4;
776 if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV6_UDP)
777 mrqc |= FM10K_MRQC_UDP_IPV6;
778
779 fm10k_write_reg(hw, FM10K_MRQC(0), mrqc);
780
781 /* configure default DGLORT mapping for RSS/DCB */
782 dglort.inner_rss = 1;
783 dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask);
784 dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask);
785 hw->mac.ops.configure_dglort_map(hw, &dglort);
786
787 /* assign GLORT per queue for queue mapped testing */
788 if (interface->glort_count > 64) {
789 memset(&dglort, 0, sizeof(dglort));
790 dglort.inner_rss = 1;
791 dglort.glort = interface->glort + 64;
792 dglort.idx = fm10k_dglort_pf_queue;
793 dglort.queue_l = fls(interface->num_rx_queues - 1);
794 hw->mac.ops.configure_dglort_map(hw, &dglort);
795 }
796
797 /* assign glort value for RSS/DCB specific to this interface */
798 memset(&dglort, 0, sizeof(dglort));
799 dglort.inner_rss = 1;
800 dglort.glort = interface->glort;
801 dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask);
802 dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask);
803 /* configure DGLORT mapping for RSS/DCB */
804 dglort.idx = fm10k_dglort_pf_rss;
805 if (interface->l2_accel)
806 dglort.shared_l = fls(interface->l2_accel->size);
807 hw->mac.ops.configure_dglort_map(hw, &dglort);
808 }
809
810 /**
811 * fm10k_configure_rx - Configure Receive Unit after Reset
812 * @interface: board private structure
813 *
814 * Configure the Rx unit of the MAC after a reset.
815 **/
816 static void fm10k_configure_rx(struct fm10k_intfc *interface)
817 {
818 int i;
819
820 /* Configure SWPRI to PC map */
821 fm10k_configure_swpri_map(interface);
822
823 /* Configure RSS and DGLORT map */
824 fm10k_configure_dglort(interface);
825
826 /* Setup the HW Rx Head and Tail descriptor pointers */
827 for (i = 0; i < interface->num_rx_queues; i++)
828 fm10k_configure_rx_ring(interface, interface->rx_ring[i]);
829
830 /* possible poll here to verify that Rx rings are now enabled */
831 }
832
833 static void fm10k_napi_enable_all(struct fm10k_intfc *interface)
834 {
835 struct fm10k_q_vector *q_vector;
836 int q_idx;
837
838 for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
839 q_vector = interface->q_vector[q_idx];
840 napi_enable(&q_vector->napi);
841 }
842 }
843
844 static irqreturn_t fm10k_msix_clean_rings(int __always_unused irq, void *data)
845 {
846 struct fm10k_q_vector *q_vector = data;
847
848 if (q_vector->rx.count || q_vector->tx.count)
849 napi_schedule(&q_vector->napi);
850
851 return IRQ_HANDLED;
852 }
853
854 static irqreturn_t fm10k_msix_mbx_vf(int __always_unused irq, void *data)
855 {
856 struct fm10k_intfc *interface = data;
857 struct fm10k_hw *hw = &interface->hw;
858 struct fm10k_mbx_info *mbx = &hw->mbx;
859
860 /* re-enable mailbox interrupt and indicate 20us delay */
861 fm10k_write_reg(hw, FM10K_VFITR(FM10K_MBX_VECTOR),
862 FM10K_ITR_ENABLE | FM10K_MBX_INT_DELAY);
863
864 /* service upstream mailbox */
865 if (fm10k_mbx_trylock(interface)) {
866 mbx->ops.process(hw, mbx);
867 fm10k_mbx_unlock(interface);
868 }
869
870 hw->mac.get_host_state = 1;
871 fm10k_service_event_schedule(interface);
872
873 return IRQ_HANDLED;
874 }
875
876 #ifdef CONFIG_NET_POLL_CONTROLLER
877 /**
878 * fm10k_netpoll - A Polling 'interrupt' handler
879 * @netdev: network interface device structure
880 *
881 * This is used by netconsole to send skbs without having to re-enable
882 * interrupts. It's not called while the normal interrupt routine is executing.
883 **/
884 void fm10k_netpoll(struct net_device *netdev)
885 {
886 struct fm10k_intfc *interface = netdev_priv(netdev);
887 int i;
888
889 /* if interface is down do nothing */
890 if (test_bit(__FM10K_DOWN, &interface->state))
891 return;
892
893 for (i = 0; i < interface->num_q_vectors; i++)
894 fm10k_msix_clean_rings(0, interface->q_vector[i]);
895 }
896
897 #endif
898 #define FM10K_ERR_MSG(type) case (type): error = #type; break
899 static void fm10k_handle_fault(struct fm10k_intfc *interface, int type,
900 struct fm10k_fault *fault)
901 {
902 struct pci_dev *pdev = interface->pdev;
903 struct fm10k_hw *hw = &interface->hw;
904 struct fm10k_iov_data *iov_data = interface->iov_data;
905 char *error;
906
907 switch (type) {
908 case FM10K_PCA_FAULT:
909 switch (fault->type) {
910 default:
911 error = "Unknown PCA error";
912 break;
913 FM10K_ERR_MSG(PCA_NO_FAULT);
914 FM10K_ERR_MSG(PCA_UNMAPPED_ADDR);
915 FM10K_ERR_MSG(PCA_BAD_QACCESS_PF);
916 FM10K_ERR_MSG(PCA_BAD_QACCESS_VF);
917 FM10K_ERR_MSG(PCA_MALICIOUS_REQ);
918 FM10K_ERR_MSG(PCA_POISONED_TLP);
919 FM10K_ERR_MSG(PCA_TLP_ABORT);
920 }
921 break;
922 case FM10K_THI_FAULT:
923 switch (fault->type) {
924 default:
925 error = "Unknown THI error";
926 break;
927 FM10K_ERR_MSG(THI_NO_FAULT);
928 FM10K_ERR_MSG(THI_MAL_DIS_Q_FAULT);
929 }
930 break;
931 case FM10K_FUM_FAULT:
932 switch (fault->type) {
933 default:
934 error = "Unknown FUM error";
935 break;
936 FM10K_ERR_MSG(FUM_NO_FAULT);
937 FM10K_ERR_MSG(FUM_UNMAPPED_ADDR);
938 FM10K_ERR_MSG(FUM_BAD_VF_QACCESS);
939 FM10K_ERR_MSG(FUM_ADD_DECODE_ERR);
940 FM10K_ERR_MSG(FUM_RO_ERROR);
941 FM10K_ERR_MSG(FUM_QPRC_CRC_ERROR);
942 FM10K_ERR_MSG(FUM_CSR_TIMEOUT);
943 FM10K_ERR_MSG(FUM_INVALID_TYPE);
944 FM10K_ERR_MSG(FUM_INVALID_LENGTH);
945 FM10K_ERR_MSG(FUM_INVALID_BE);
946 FM10K_ERR_MSG(FUM_INVALID_ALIGN);
947 }
948 break;
949 default:
950 error = "Undocumented fault";
951 break;
952 }
953
954 dev_warn(&pdev->dev,
955 "%s Address: 0x%llx SpecInfo: 0x%x Func: %02x.%0x\n",
956 error, fault->address, fault->specinfo,
957 PCI_SLOT(fault->func), PCI_FUNC(fault->func));
958
959 /* For VF faults, clear out the respective LPORT, reset the queue
960 * resources, and then reconnect to the mailbox. This allows the
961 * VF in question to resume behavior. For transient faults that are
962 * the result of non-malicious behavior this will log the fault and
963 * allow the VF to resume functionality. Obviously for malicious VFs
964 * they will be able to attempt malicious behavior again. In this
965 * case, the system administrator will need to step in and manually
966 * remove or disable the VF in question.
967 */
968 if (fault->func && iov_data) {
969 int vf = fault->func - 1;
970 struct fm10k_vf_info *vf_info = &iov_data->vf_info[vf];
971
972 hw->iov.ops.reset_lport(hw, vf_info);
973 hw->iov.ops.reset_resources(hw, vf_info);
974
975 /* reset_lport disables the VF, so re-enable it */
976 hw->iov.ops.set_lport(hw, vf_info, vf,
977 FM10K_VF_FLAG_MULTI_CAPABLE);
978
979 /* reset_resources will disconnect from the mbx */
980 vf_info->mbx.ops.connect(hw, &vf_info->mbx);
981 }
982 }
983
984 static void fm10k_report_fault(struct fm10k_intfc *interface, u32 eicr)
985 {
986 struct fm10k_hw *hw = &interface->hw;
987 struct fm10k_fault fault = { 0 };
988 int type, err;
989
990 for (eicr &= FM10K_EICR_FAULT_MASK, type = FM10K_PCA_FAULT;
991 eicr;
992 eicr >>= 1, type += FM10K_FAULT_SIZE) {
993 /* only check if there is an error reported */
994 if (!(eicr & 0x1))
995 continue;
996
997 /* retrieve fault info */
998 err = hw->mac.ops.get_fault(hw, type, &fault);
999 if (err) {
1000 dev_err(&interface->pdev->dev,
1001 "error reading fault\n");
1002 continue;
1003 }
1004
1005 fm10k_handle_fault(interface, type, &fault);
1006 }
1007 }
1008
1009 static void fm10k_reset_drop_on_empty(struct fm10k_intfc *interface, u32 eicr)
1010 {
1011 struct fm10k_hw *hw = &interface->hw;
1012 const u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
1013 u32 maxholdq;
1014 int q;
1015
1016 if (!(eicr & FM10K_EICR_MAXHOLDTIME))
1017 return;
1018
1019 maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(7));
1020 if (maxholdq)
1021 fm10k_write_reg(hw, FM10K_MAXHOLDQ(7), maxholdq);
1022 for (q = 255;;) {
1023 if (maxholdq & (1 << 31)) {
1024 if (q < FM10K_MAX_QUEUES_PF) {
1025 interface->rx_overrun_pf++;
1026 fm10k_write_reg(hw, FM10K_RXDCTL(q), rxdctl);
1027 } else {
1028 interface->rx_overrun_vf++;
1029 }
1030 }
1031
1032 maxholdq *= 2;
1033 if (!maxholdq)
1034 q &= ~(32 - 1);
1035
1036 if (!q)
1037 break;
1038
1039 if (q-- % 32)
1040 continue;
1041
1042 maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(q / 32));
1043 if (maxholdq)
1044 fm10k_write_reg(hw, FM10K_MAXHOLDQ(q / 32), maxholdq);
1045 }
1046 }
1047
1048 static irqreturn_t fm10k_msix_mbx_pf(int __always_unused irq, void *data)
1049 {
1050 struct fm10k_intfc *interface = data;
1051 struct fm10k_hw *hw = &interface->hw;
1052 struct fm10k_mbx_info *mbx = &hw->mbx;
1053 u32 eicr;
1054
1055 /* unmask any set bits related to this interrupt */
1056 eicr = fm10k_read_reg(hw, FM10K_EICR);
1057 fm10k_write_reg(hw, FM10K_EICR, eicr & (FM10K_EICR_MAILBOX |
1058 FM10K_EICR_SWITCHREADY |
1059 FM10K_EICR_SWITCHNOTREADY));
1060
1061 /* report any faults found to the message log */
1062 fm10k_report_fault(interface, eicr);
1063
1064 /* reset any queues disabled due to receiver overrun */
1065 fm10k_reset_drop_on_empty(interface, eicr);
1066
1067 /* service mailboxes */
1068 if (fm10k_mbx_trylock(interface)) {
1069 mbx->ops.process(hw, mbx);
1070 /* handle VFLRE events */
1071 fm10k_iov_event(interface);
1072 fm10k_mbx_unlock(interface);
1073 }
1074
1075 /* if switch toggled state we should reset GLORTs */
1076 if (eicr & FM10K_EICR_SWITCHNOTREADY) {
1077 /* force link down for at least 4 seconds */
1078 interface->link_down_event = jiffies + (4 * HZ);
1079 set_bit(__FM10K_LINK_DOWN, &interface->state);
1080
1081 /* reset dglort_map back to no config */
1082 hw->mac.dglort_map = FM10K_DGLORTMAP_NONE;
1083 }
1084
1085 /* we should validate host state after interrupt event */
1086 hw->mac.get_host_state = 1;
1087
1088 /* validate host state, and handle VF mailboxes in the service task */
1089 fm10k_service_event_schedule(interface);
1090
1091 /* re-enable mailbox interrupt and indicate 20us delay */
1092 fm10k_write_reg(hw, FM10K_ITR(FM10K_MBX_VECTOR),
1093 FM10K_ITR_ENABLE | FM10K_MBX_INT_DELAY);
1094
1095 return IRQ_HANDLED;
1096 }
1097
1098 void fm10k_mbx_free_irq(struct fm10k_intfc *interface)
1099 {
1100 struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1101 struct fm10k_hw *hw = &interface->hw;
1102 int itr_reg;
1103
1104 /* disconnect the mailbox */
1105 hw->mbx.ops.disconnect(hw, &hw->mbx);
1106
1107 /* disable Mailbox cause */
1108 if (hw->mac.type == fm10k_mac_pf) {
1109 fm10k_write_reg(hw, FM10K_EIMR,
1110 FM10K_EIMR_DISABLE(PCA_FAULT) |
1111 FM10K_EIMR_DISABLE(FUM_FAULT) |
1112 FM10K_EIMR_DISABLE(MAILBOX) |
1113 FM10K_EIMR_DISABLE(SWITCHREADY) |
1114 FM10K_EIMR_DISABLE(SWITCHNOTREADY) |
1115 FM10K_EIMR_DISABLE(SRAMERROR) |
1116 FM10K_EIMR_DISABLE(VFLR) |
1117 FM10K_EIMR_DISABLE(MAXHOLDTIME));
1118 itr_reg = FM10K_ITR(FM10K_MBX_VECTOR);
1119 } else {
1120 itr_reg = FM10K_VFITR(FM10K_MBX_VECTOR);
1121 }
1122
1123 fm10k_write_reg(hw, itr_reg, FM10K_ITR_MASK_SET);
1124
1125 free_irq(entry->vector, interface);
1126 }
1127
1128 static s32 fm10k_mbx_mac_addr(struct fm10k_hw *hw, u32 **results,
1129 struct fm10k_mbx_info *mbx)
1130 {
1131 bool vlan_override = hw->mac.vlan_override;
1132 u16 default_vid = hw->mac.default_vid;
1133 struct fm10k_intfc *interface;
1134 s32 err;
1135
1136 err = fm10k_msg_mac_vlan_vf(hw, results, mbx);
1137 if (err)
1138 return err;
1139
1140 interface = container_of(hw, struct fm10k_intfc, hw);
1141
1142 /* MAC was changed so we need reset */
1143 if (is_valid_ether_addr(hw->mac.perm_addr) &&
1144 memcmp(hw->mac.perm_addr, hw->mac.addr, ETH_ALEN))
1145 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1146
1147 /* VLAN override was changed, or default VLAN changed */
1148 if ((vlan_override != hw->mac.vlan_override) ||
1149 (default_vid != hw->mac.default_vid))
1150 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1151
1152 return 0;
1153 }
1154
1155 static s32 fm10k_1588_msg_vf(struct fm10k_hw *hw, u32 **results,
1156 struct fm10k_mbx_info __always_unused *mbx)
1157 {
1158 struct fm10k_intfc *interface;
1159 u64 timestamp;
1160 s32 err;
1161
1162 err = fm10k_tlv_attr_get_u64(results[FM10K_1588_MSG_TIMESTAMP],
1163 &timestamp);
1164 if (err)
1165 return err;
1166
1167 interface = container_of(hw, struct fm10k_intfc, hw);
1168
1169 fm10k_ts_tx_hwtstamp(interface, 0, timestamp);
1170
1171 return 0;
1172 }
1173
1174 /* generic error handler for mailbox issues */
1175 static s32 fm10k_mbx_error(struct fm10k_hw *hw, u32 **results,
1176 struct fm10k_mbx_info __always_unused *mbx)
1177 {
1178 struct fm10k_intfc *interface;
1179 struct pci_dev *pdev;
1180
1181 interface = container_of(hw, struct fm10k_intfc, hw);
1182 pdev = interface->pdev;
1183
1184 dev_err(&pdev->dev, "Unknown message ID %u\n",
1185 **results & FM10K_TLV_ID_MASK);
1186
1187 return 0;
1188 }
1189
1190 static const struct fm10k_msg_data vf_mbx_data[] = {
1191 FM10K_TLV_MSG_TEST_HANDLER(fm10k_tlv_msg_test),
1192 FM10K_VF_MSG_MAC_VLAN_HANDLER(fm10k_mbx_mac_addr),
1193 FM10K_VF_MSG_LPORT_STATE_HANDLER(fm10k_msg_lport_state_vf),
1194 FM10K_VF_MSG_1588_HANDLER(fm10k_1588_msg_vf),
1195 FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
1196 };
1197
1198 static int fm10k_mbx_request_irq_vf(struct fm10k_intfc *interface)
1199 {
1200 struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1201 struct net_device *dev = interface->netdev;
1202 struct fm10k_hw *hw = &interface->hw;
1203 int err;
1204
1205 /* Use timer0 for interrupt moderation on the mailbox */
1206 u32 itr = FM10K_INT_MAP_TIMER0 | entry->entry;
1207
1208 /* register mailbox handlers */
1209 err = hw->mbx.ops.register_handlers(&hw->mbx, vf_mbx_data);
1210 if (err)
1211 return err;
1212
1213 /* request the IRQ */
1214 err = request_irq(entry->vector, fm10k_msix_mbx_vf, 0,
1215 dev->name, interface);
1216 if (err) {
1217 netif_err(interface, probe, dev,
1218 "request_irq for msix_mbx failed: %d\n", err);
1219 return err;
1220 }
1221
1222 /* map all of the interrupt sources */
1223 fm10k_write_reg(hw, FM10K_VFINT_MAP, itr);
1224
1225 /* enable interrupt */
1226 fm10k_write_reg(hw, FM10K_VFITR(entry->entry), FM10K_ITR_ENABLE);
1227
1228 return 0;
1229 }
1230
1231 static s32 fm10k_lport_map(struct fm10k_hw *hw, u32 **results,
1232 struct fm10k_mbx_info *mbx)
1233 {
1234 struct fm10k_intfc *interface;
1235 u32 dglort_map = hw->mac.dglort_map;
1236 s32 err;
1237
1238 err = fm10k_msg_lport_map_pf(hw, results, mbx);
1239 if (err)
1240 return err;
1241
1242 interface = container_of(hw, struct fm10k_intfc, hw);
1243
1244 /* we need to reset if port count was just updated */
1245 if (dglort_map != hw->mac.dglort_map)
1246 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1247
1248 return 0;
1249 }
1250
1251 static s32 fm10k_update_pvid(struct fm10k_hw *hw, u32 **results,
1252 struct fm10k_mbx_info __always_unused *mbx)
1253 {
1254 struct fm10k_intfc *interface;
1255 u16 glort, pvid;
1256 u32 pvid_update;
1257 s32 err;
1258
1259 err = fm10k_tlv_attr_get_u32(results[FM10K_PF_ATTR_ID_UPDATE_PVID],
1260 &pvid_update);
1261 if (err)
1262 return err;
1263
1264 /* extract values from the pvid update */
1265 glort = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_GLORT);
1266 pvid = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_PVID);
1267
1268 /* if glort is not valid return error */
1269 if (!fm10k_glort_valid_pf(hw, glort))
1270 return FM10K_ERR_PARAM;
1271
1272 /* verify VID is valid */
1273 if (pvid >= FM10K_VLAN_TABLE_VID_MAX)
1274 return FM10K_ERR_PARAM;
1275
1276 interface = container_of(hw, struct fm10k_intfc, hw);
1277
1278 /* check to see if this belongs to one of the VFs */
1279 err = fm10k_iov_update_pvid(interface, glort, pvid);
1280 if (!err)
1281 return 0;
1282
1283 /* we need to reset if default VLAN was just updated */
1284 if (pvid != hw->mac.default_vid)
1285 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1286
1287 hw->mac.default_vid = pvid;
1288
1289 return 0;
1290 }
1291
1292 static s32 fm10k_1588_msg_pf(struct fm10k_hw *hw, u32 **results,
1293 struct fm10k_mbx_info __always_unused *mbx)
1294 {
1295 struct fm10k_swapi_1588_timestamp timestamp;
1296 struct fm10k_iov_data *iov_data;
1297 struct fm10k_intfc *interface;
1298 u16 sglort, vf_idx;
1299 s32 err;
1300
1301 err = fm10k_tlv_attr_get_le_struct(
1302 results[FM10K_PF_ATTR_ID_1588_TIMESTAMP],
1303 &timestamp, sizeof(timestamp));
1304 if (err)
1305 return err;
1306
1307 interface = container_of(hw, struct fm10k_intfc, hw);
1308
1309 if (timestamp.dglort) {
1310 fm10k_ts_tx_hwtstamp(interface, timestamp.dglort,
1311 le64_to_cpu(timestamp.egress));
1312 return 0;
1313 }
1314
1315 /* either dglort or sglort must be set */
1316 if (!timestamp.sglort)
1317 return FM10K_ERR_PARAM;
1318
1319 /* verify GLORT is at least one of the ones we own */
1320 sglort = le16_to_cpu(timestamp.sglort);
1321 if (!fm10k_glort_valid_pf(hw, sglort))
1322 return FM10K_ERR_PARAM;
1323
1324 if (sglort == interface->glort) {
1325 fm10k_ts_tx_hwtstamp(interface, 0,
1326 le64_to_cpu(timestamp.ingress));
1327 return 0;
1328 }
1329
1330 /* if there is no iov_data then there is no mailboxes to process */
1331 if (!ACCESS_ONCE(interface->iov_data))
1332 return FM10K_ERR_PARAM;
1333
1334 rcu_read_lock();
1335
1336 /* notify VF if this timestamp belongs to it */
1337 iov_data = interface->iov_data;
1338 vf_idx = (hw->mac.dglort_map & FM10K_DGLORTMAP_NONE) - sglort;
1339
1340 if (!iov_data || vf_idx >= iov_data->num_vfs) {
1341 err = FM10K_ERR_PARAM;
1342 goto err_unlock;
1343 }
1344
1345 err = hw->iov.ops.report_timestamp(hw, &iov_data->vf_info[vf_idx],
1346 le64_to_cpu(timestamp.ingress));
1347
1348 err_unlock:
1349 rcu_read_unlock();
1350
1351 return err;
1352 }
1353
1354 static const struct fm10k_msg_data pf_mbx_data[] = {
1355 FM10K_PF_MSG_ERR_HANDLER(XCAST_MODES, fm10k_msg_err_pf),
1356 FM10K_PF_MSG_ERR_HANDLER(UPDATE_MAC_FWD_RULE, fm10k_msg_err_pf),
1357 FM10K_PF_MSG_LPORT_MAP_HANDLER(fm10k_lport_map),
1358 FM10K_PF_MSG_ERR_HANDLER(LPORT_CREATE, fm10k_msg_err_pf),
1359 FM10K_PF_MSG_ERR_HANDLER(LPORT_DELETE, fm10k_msg_err_pf),
1360 FM10K_PF_MSG_UPDATE_PVID_HANDLER(fm10k_update_pvid),
1361 FM10K_PF_MSG_1588_TIMESTAMP_HANDLER(fm10k_1588_msg_pf),
1362 FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
1363 };
1364
1365 static int fm10k_mbx_request_irq_pf(struct fm10k_intfc *interface)
1366 {
1367 struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1368 struct net_device *dev = interface->netdev;
1369 struct fm10k_hw *hw = &interface->hw;
1370 int err;
1371
1372 /* Use timer0 for interrupt moderation on the mailbox */
1373 u32 mbx_itr = FM10K_INT_MAP_TIMER0 | entry->entry;
1374 u32 other_itr = FM10K_INT_MAP_IMMEDIATE | entry->entry;
1375
1376 /* register mailbox handlers */
1377 err = hw->mbx.ops.register_handlers(&hw->mbx, pf_mbx_data);
1378 if (err)
1379 return err;
1380
1381 /* request the IRQ */
1382 err = request_irq(entry->vector, fm10k_msix_mbx_pf, 0,
1383 dev->name, interface);
1384 if (err) {
1385 netif_err(interface, probe, dev,
1386 "request_irq for msix_mbx failed: %d\n", err);
1387 return err;
1388 }
1389
1390 /* Enable interrupts w/ no moderation for "other" interrupts */
1391 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_PCIeFault), other_itr);
1392 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_SwitchUpDown), other_itr);
1393 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_SRAM), other_itr);
1394 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_MaxHoldTime), other_itr);
1395 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_VFLR), other_itr);
1396
1397 /* Enable interrupts w/ moderation for mailbox */
1398 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_Mailbox), mbx_itr);
1399
1400 /* Enable individual interrupt causes */
1401 fm10k_write_reg(hw, FM10K_EIMR, FM10K_EIMR_ENABLE(PCA_FAULT) |
1402 FM10K_EIMR_ENABLE(FUM_FAULT) |
1403 FM10K_EIMR_ENABLE(MAILBOX) |
1404 FM10K_EIMR_ENABLE(SWITCHREADY) |
1405 FM10K_EIMR_ENABLE(SWITCHNOTREADY) |
1406 FM10K_EIMR_ENABLE(SRAMERROR) |
1407 FM10K_EIMR_ENABLE(VFLR) |
1408 FM10K_EIMR_ENABLE(MAXHOLDTIME));
1409
1410 /* enable interrupt */
1411 fm10k_write_reg(hw, FM10K_ITR(entry->entry), FM10K_ITR_ENABLE);
1412
1413 return 0;
1414 }
1415
1416 int fm10k_mbx_request_irq(struct fm10k_intfc *interface)
1417 {
1418 struct fm10k_hw *hw = &interface->hw;
1419 int err;
1420
1421 /* enable Mailbox cause */
1422 if (hw->mac.type == fm10k_mac_pf)
1423 err = fm10k_mbx_request_irq_pf(interface);
1424 else
1425 err = fm10k_mbx_request_irq_vf(interface);
1426
1427 /* connect mailbox */
1428 if (!err)
1429 err = hw->mbx.ops.connect(hw, &hw->mbx);
1430
1431 return err;
1432 }
1433
1434 /**
1435 * fm10k_qv_free_irq - release interrupts associated with queue vectors
1436 * @interface: board private structure
1437 *
1438 * Release all interrupts associated with this interface
1439 **/
1440 void fm10k_qv_free_irq(struct fm10k_intfc *interface)
1441 {
1442 int vector = interface->num_q_vectors;
1443 struct fm10k_hw *hw = &interface->hw;
1444 struct msix_entry *entry;
1445
1446 entry = &interface->msix_entries[NON_Q_VECTORS(hw) + vector];
1447
1448 while (vector) {
1449 struct fm10k_q_vector *q_vector;
1450
1451 vector--;
1452 entry--;
1453 q_vector = interface->q_vector[vector];
1454
1455 if (!q_vector->tx.count && !q_vector->rx.count)
1456 continue;
1457
1458 /* disable interrupts */
1459
1460 writel(FM10K_ITR_MASK_SET, q_vector->itr);
1461
1462 free_irq(entry->vector, q_vector);
1463 }
1464 }
1465
1466 /**
1467 * fm10k_qv_request_irq - initialize interrupts for queue vectors
1468 * @interface: board private structure
1469 *
1470 * Attempts to configure interrupts using the best available
1471 * capabilities of the hardware and kernel.
1472 **/
1473 int fm10k_qv_request_irq(struct fm10k_intfc *interface)
1474 {
1475 struct net_device *dev = interface->netdev;
1476 struct fm10k_hw *hw = &interface->hw;
1477 struct msix_entry *entry;
1478 int ri = 0, ti = 0;
1479 int vector, err;
1480
1481 entry = &interface->msix_entries[NON_Q_VECTORS(hw)];
1482
1483 for (vector = 0; vector < interface->num_q_vectors; vector++) {
1484 struct fm10k_q_vector *q_vector = interface->q_vector[vector];
1485
1486 /* name the vector */
1487 if (q_vector->tx.count && q_vector->rx.count) {
1488 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1489 "%s-TxRx-%d", dev->name, ri++);
1490 ti++;
1491 } else if (q_vector->rx.count) {
1492 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1493 "%s-rx-%d", dev->name, ri++);
1494 } else if (q_vector->tx.count) {
1495 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1496 "%s-tx-%d", dev->name, ti++);
1497 } else {
1498 /* skip this unused q_vector */
1499 continue;
1500 }
1501
1502 /* Assign ITR register to q_vector */
1503 q_vector->itr = (hw->mac.type == fm10k_mac_pf) ?
1504 &interface->uc_addr[FM10K_ITR(entry->entry)] :
1505 &interface->uc_addr[FM10K_VFITR(entry->entry)];
1506
1507 /* request the IRQ */
1508 err = request_irq(entry->vector, &fm10k_msix_clean_rings, 0,
1509 q_vector->name, q_vector);
1510 if (err) {
1511 netif_err(interface, probe, dev,
1512 "request_irq failed for MSIX interrupt Error: %d\n",
1513 err);
1514 goto err_out;
1515 }
1516
1517 /* Enable q_vector */
1518 writel(FM10K_ITR_ENABLE, q_vector->itr);
1519
1520 entry++;
1521 }
1522
1523 return 0;
1524
1525 err_out:
1526 /* wind through the ring freeing all entries and vectors */
1527 while (vector) {
1528 struct fm10k_q_vector *q_vector;
1529
1530 entry--;
1531 vector--;
1532 q_vector = interface->q_vector[vector];
1533
1534 if (!q_vector->tx.count && !q_vector->rx.count)
1535 continue;
1536
1537 /* disable interrupts */
1538
1539 writel(FM10K_ITR_MASK_SET, q_vector->itr);
1540
1541 free_irq(entry->vector, q_vector);
1542 }
1543
1544 return err;
1545 }
1546
1547 void fm10k_up(struct fm10k_intfc *interface)
1548 {
1549 struct fm10k_hw *hw = &interface->hw;
1550
1551 /* Enable Tx/Rx DMA */
1552 hw->mac.ops.start_hw(hw);
1553
1554 /* configure Tx descriptor rings */
1555 fm10k_configure_tx(interface);
1556
1557 /* configure Rx descriptor rings */
1558 fm10k_configure_rx(interface);
1559
1560 /* configure interrupts */
1561 hw->mac.ops.update_int_moderator(hw);
1562
1563 /* clear down bit to indicate we are ready to go */
1564 clear_bit(__FM10K_DOWN, &interface->state);
1565
1566 /* enable polling cleanups */
1567 fm10k_napi_enable_all(interface);
1568
1569 /* re-establish Rx filters */
1570 fm10k_restore_rx_state(interface);
1571
1572 /* enable transmits */
1573 netif_tx_start_all_queues(interface->netdev);
1574
1575 /* kick off the service timer now */
1576 hw->mac.get_host_state = 1;
1577 mod_timer(&interface->service_timer, jiffies);
1578 }
1579
1580 static void fm10k_napi_disable_all(struct fm10k_intfc *interface)
1581 {
1582 struct fm10k_q_vector *q_vector;
1583 int q_idx;
1584
1585 for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
1586 q_vector = interface->q_vector[q_idx];
1587 napi_disable(&q_vector->napi);
1588 }
1589 }
1590
1591 void fm10k_down(struct fm10k_intfc *interface)
1592 {
1593 struct net_device *netdev = interface->netdev;
1594 struct fm10k_hw *hw = &interface->hw;
1595
1596 /* signal that we are down to the interrupt handler and service task */
1597 set_bit(__FM10K_DOWN, &interface->state);
1598
1599 /* call carrier off first to avoid false dev_watchdog timeouts */
1600 netif_carrier_off(netdev);
1601
1602 /* disable transmits */
1603 netif_tx_stop_all_queues(netdev);
1604 netif_tx_disable(netdev);
1605
1606 /* reset Rx filters */
1607 fm10k_reset_rx_state(interface);
1608
1609 /* allow 10ms for device to quiesce */
1610 usleep_range(10000, 20000);
1611
1612 /* disable polling routines */
1613 fm10k_napi_disable_all(interface);
1614
1615 /* capture stats one last time before stopping interface */
1616 fm10k_update_stats(interface);
1617
1618 /* Disable DMA engine for Tx/Rx */
1619 hw->mac.ops.stop_hw(hw);
1620
1621 /* free any buffers still on the rings */
1622 fm10k_clean_all_tx_rings(interface);
1623 fm10k_clean_all_rx_rings(interface);
1624 }
1625
1626 /**
1627 * fm10k_sw_init - Initialize general software structures
1628 * @interface: host interface private structure to initialize
1629 *
1630 * fm10k_sw_init initializes the interface private data structure.
1631 * Fields are initialized based on PCI device information and
1632 * OS network device settings (MTU size).
1633 **/
1634 static int fm10k_sw_init(struct fm10k_intfc *interface,
1635 const struct pci_device_id *ent)
1636 {
1637 const struct fm10k_info *fi = fm10k_info_tbl[ent->driver_data];
1638 struct fm10k_hw *hw = &interface->hw;
1639 struct pci_dev *pdev = interface->pdev;
1640 struct net_device *netdev = interface->netdev;
1641 u32 rss_key[FM10K_RSSRK_SIZE];
1642 unsigned int rss;
1643 int err;
1644
1645 /* initialize back pointer */
1646 hw->back = interface;
1647 hw->hw_addr = interface->uc_addr;
1648
1649 /* PCI config space info */
1650 hw->vendor_id = pdev->vendor;
1651 hw->device_id = pdev->device;
1652 hw->revision_id = pdev->revision;
1653 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1654 hw->subsystem_device_id = pdev->subsystem_device;
1655
1656 /* Setup hw api */
1657 memcpy(&hw->mac.ops, fi->mac_ops, sizeof(hw->mac.ops));
1658 hw->mac.type = fi->mac;
1659
1660 /* Setup IOV handlers */
1661 if (fi->iov_ops)
1662 memcpy(&hw->iov.ops, fi->iov_ops, sizeof(hw->iov.ops));
1663
1664 /* Set common capability flags and settings */
1665 rss = min_t(int, FM10K_MAX_RSS_INDICES, num_online_cpus());
1666 interface->ring_feature[RING_F_RSS].limit = rss;
1667 fi->get_invariants(hw);
1668
1669 /* pick up the PCIe bus settings for reporting later */
1670 if (hw->mac.ops.get_bus_info)
1671 hw->mac.ops.get_bus_info(hw);
1672
1673 /* limit the usable DMA range */
1674 if (hw->mac.ops.set_dma_mask)
1675 hw->mac.ops.set_dma_mask(hw, dma_get_mask(&pdev->dev));
1676
1677 /* update netdev with DMA restrictions */
1678 if (dma_get_mask(&pdev->dev) > DMA_BIT_MASK(32)) {
1679 netdev->features |= NETIF_F_HIGHDMA;
1680 netdev->vlan_features |= NETIF_F_HIGHDMA;
1681 }
1682
1683 /* delay any future reset requests */
1684 interface->last_reset = jiffies + (10 * HZ);
1685
1686 /* reset and initialize the hardware so it is in a known state */
1687 err = hw->mac.ops.reset_hw(hw) ? : hw->mac.ops.init_hw(hw);
1688 if (err) {
1689 dev_err(&pdev->dev, "init_hw failed: %d\n", err);
1690 return err;
1691 }
1692
1693 /* initialize hardware statistics */
1694 hw->mac.ops.update_hw_stats(hw, &interface->stats);
1695
1696 /* Set upper limit on IOV VFs that can be allocated */
1697 pci_sriov_set_totalvfs(pdev, hw->iov.total_vfs);
1698
1699 /* Start with random Ethernet address */
1700 eth_random_addr(hw->mac.addr);
1701
1702 /* Initialize MAC address from hardware */
1703 err = hw->mac.ops.read_mac_addr(hw);
1704 if (err) {
1705 dev_warn(&pdev->dev,
1706 "Failed to obtain MAC address defaulting to random\n");
1707 /* tag address assignment as random */
1708 netdev->addr_assign_type |= NET_ADDR_RANDOM;
1709 }
1710
1711 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1712 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1713
1714 if (!is_valid_ether_addr(netdev->perm_addr)) {
1715 dev_err(&pdev->dev, "Invalid MAC Address\n");
1716 return -EIO;
1717 }
1718
1719 /* assign BAR 4 resources for use with PTP */
1720 if (fm10k_read_reg(hw, FM10K_CTRL) & FM10K_CTRL_BAR4_ALLOWED)
1721 interface->sw_addr = ioremap(pci_resource_start(pdev, 4),
1722 pci_resource_len(pdev, 4));
1723 hw->sw_addr = interface->sw_addr;
1724
1725 /* Only the PF can support VXLAN and NVGRE offloads */
1726 if (hw->mac.type != fm10k_mac_pf) {
1727 netdev->hw_enc_features = 0;
1728 netdev->features &= ~NETIF_F_GSO_UDP_TUNNEL;
1729 netdev->hw_features &= ~NETIF_F_GSO_UDP_TUNNEL;
1730 }
1731
1732 /* initialize DCBNL interface */
1733 fm10k_dcbnl_set_ops(netdev);
1734
1735 /* Initialize service timer and service task */
1736 set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
1737 setup_timer(&interface->service_timer, &fm10k_service_timer,
1738 (unsigned long)interface);
1739 INIT_WORK(&interface->service_task, fm10k_service_task);
1740
1741 /* kick off service timer now, even when interface is down */
1742 mod_timer(&interface->service_timer, (HZ * 2) + jiffies);
1743
1744 /* Intitialize timestamp data */
1745 fm10k_ts_init(interface);
1746
1747 /* set default ring sizes */
1748 interface->tx_ring_count = FM10K_DEFAULT_TXD;
1749 interface->rx_ring_count = FM10K_DEFAULT_RXD;
1750
1751 /* set default interrupt moderation */
1752 interface->tx_itr = FM10K_ITR_10K;
1753 interface->rx_itr = FM10K_ITR_ADAPTIVE | FM10K_ITR_20K;
1754
1755 /* initialize vxlan_port list */
1756 INIT_LIST_HEAD(&interface->vxlan_port);
1757
1758 netdev_rss_key_fill(rss_key, sizeof(rss_key));
1759 memcpy(interface->rssrk, rss_key, sizeof(rss_key));
1760
1761 /* Start off interface as being down */
1762 set_bit(__FM10K_DOWN, &interface->state);
1763
1764 return 0;
1765 }
1766
1767 static void fm10k_slot_warn(struct fm10k_intfc *interface)
1768 {
1769 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
1770 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
1771 struct fm10k_hw *hw = &interface->hw;
1772 int max_gts = 0, expected_gts = 0;
1773
1774 if (pcie_get_minimum_link(interface->pdev, &speed, &width) ||
1775 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
1776 dev_warn(&interface->pdev->dev,
1777 "Unable to determine PCI Express bandwidth.\n");
1778 return;
1779 }
1780
1781 switch (speed) {
1782 case PCIE_SPEED_2_5GT:
1783 /* 8b/10b encoding reduces max throughput by 20% */
1784 max_gts = 2 * width;
1785 break;
1786 case PCIE_SPEED_5_0GT:
1787 /* 8b/10b encoding reduces max throughput by 20% */
1788 max_gts = 4 * width;
1789 break;
1790 case PCIE_SPEED_8_0GT:
1791 /* 128b/130b encoding has less than 2% impact on throughput */
1792 max_gts = 8 * width;
1793 break;
1794 default:
1795 dev_warn(&interface->pdev->dev,
1796 "Unable to determine PCI Express bandwidth.\n");
1797 return;
1798 }
1799
1800 dev_info(&interface->pdev->dev,
1801 "PCI Express bandwidth of %dGT/s available\n",
1802 max_gts);
1803 dev_info(&interface->pdev->dev,
1804 "(Speed:%s, Width: x%d, Encoding Loss:%s, Payload:%s)\n",
1805 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
1806 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
1807 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
1808 "Unknown"),
1809 hw->bus.width,
1810 (speed == PCIE_SPEED_2_5GT ? "20%" :
1811 speed == PCIE_SPEED_5_0GT ? "20%" :
1812 speed == PCIE_SPEED_8_0GT ? "<2%" :
1813 "Unknown"),
1814 (hw->bus.payload == fm10k_bus_payload_128 ? "128B" :
1815 hw->bus.payload == fm10k_bus_payload_256 ? "256B" :
1816 hw->bus.payload == fm10k_bus_payload_512 ? "512B" :
1817 "Unknown"));
1818
1819 switch (hw->bus_caps.speed) {
1820 case fm10k_bus_speed_2500:
1821 /* 8b/10b encoding reduces max throughput by 20% */
1822 expected_gts = 2 * hw->bus_caps.width;
1823 break;
1824 case fm10k_bus_speed_5000:
1825 /* 8b/10b encoding reduces max throughput by 20% */
1826 expected_gts = 4 * hw->bus_caps.width;
1827 break;
1828 case fm10k_bus_speed_8000:
1829 /* 128b/130b encoding has less than 2% impact on throughput */
1830 expected_gts = 8 * hw->bus_caps.width;
1831 break;
1832 default:
1833 dev_warn(&interface->pdev->dev,
1834 "Unable to determine expected PCI Express bandwidth.\n");
1835 return;
1836 }
1837
1838 if (max_gts < expected_gts) {
1839 dev_warn(&interface->pdev->dev,
1840 "This device requires %dGT/s of bandwidth for optimal performance.\n",
1841 expected_gts);
1842 dev_warn(&interface->pdev->dev,
1843 "A %sslot with x%d lanes is suggested.\n",
1844 (hw->bus_caps.speed == fm10k_bus_speed_2500 ? "2.5GT/s " :
1845 hw->bus_caps.speed == fm10k_bus_speed_5000 ? "5.0GT/s " :
1846 hw->bus_caps.speed == fm10k_bus_speed_8000 ? "8.0GT/s " : ""),
1847 hw->bus_caps.width);
1848 }
1849 }
1850
1851 /**
1852 * fm10k_probe - Device Initialization Routine
1853 * @pdev: PCI device information struct
1854 * @ent: entry in fm10k_pci_tbl
1855 *
1856 * Returns 0 on success, negative on failure
1857 *
1858 * fm10k_probe initializes an interface identified by a pci_dev structure.
1859 * The OS initialization, configuring of the interface private structure,
1860 * and a hardware reset occur.
1861 **/
1862 static int fm10k_probe(struct pci_dev *pdev,
1863 const struct pci_device_id *ent)
1864 {
1865 struct net_device *netdev;
1866 struct fm10k_intfc *interface;
1867 int err;
1868
1869 err = pci_enable_device_mem(pdev);
1870 if (err)
1871 return err;
1872
1873 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48));
1874 if (err)
1875 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
1876 if (err) {
1877 dev_err(&pdev->dev,
1878 "DMA configuration failed: %d\n", err);
1879 goto err_dma;
1880 }
1881
1882 err = pci_request_selected_regions(pdev,
1883 pci_select_bars(pdev,
1884 IORESOURCE_MEM),
1885 fm10k_driver_name);
1886 if (err) {
1887 dev_err(&pdev->dev,
1888 "pci_request_selected_regions failed: %d\n", err);
1889 goto err_pci_reg;
1890 }
1891
1892 pci_enable_pcie_error_reporting(pdev);
1893
1894 pci_set_master(pdev);
1895 pci_save_state(pdev);
1896
1897 netdev = fm10k_alloc_netdev();
1898 if (!netdev) {
1899 err = -ENOMEM;
1900 goto err_alloc_netdev;
1901 }
1902
1903 SET_NETDEV_DEV(netdev, &pdev->dev);
1904
1905 interface = netdev_priv(netdev);
1906 pci_set_drvdata(pdev, interface);
1907
1908 interface->netdev = netdev;
1909 interface->pdev = pdev;
1910
1911 interface->uc_addr = ioremap(pci_resource_start(pdev, 0),
1912 FM10K_UC_ADDR_SIZE);
1913 if (!interface->uc_addr) {
1914 err = -EIO;
1915 goto err_ioremap;
1916 }
1917
1918 err = fm10k_sw_init(interface, ent);
1919 if (err)
1920 goto err_sw_init;
1921
1922 /* enable debugfs support */
1923 fm10k_dbg_intfc_init(interface);
1924
1925 err = fm10k_init_queueing_scheme(interface);
1926 if (err)
1927 goto err_sw_init;
1928
1929 err = fm10k_mbx_request_irq(interface);
1930 if (err)
1931 goto err_mbx_interrupt;
1932
1933 /* final check of hardware state before registering the interface */
1934 err = fm10k_hw_ready(interface);
1935 if (err)
1936 goto err_register;
1937
1938 err = register_netdev(netdev);
1939 if (err)
1940 goto err_register;
1941
1942 /* carrier off reporting is important to ethtool even BEFORE open */
1943 netif_carrier_off(netdev);
1944
1945 /* stop all the transmit queues from transmitting until link is up */
1946 netif_tx_stop_all_queues(netdev);
1947
1948 /* Register PTP interface */
1949 fm10k_ptp_register(interface);
1950
1951 /* print warning for non-optimal configurations */
1952 fm10k_slot_warn(interface);
1953
1954 /* report MAC address for logging */
1955 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
1956
1957 /* enable SR-IOV after registering netdev to enforce PF/VF ordering */
1958 fm10k_iov_configure(pdev, 0);
1959
1960 /* clear the service task disable bit to allow service task to start */
1961 clear_bit(__FM10K_SERVICE_DISABLE, &interface->state);
1962
1963 return 0;
1964
1965 err_register:
1966 fm10k_mbx_free_irq(interface);
1967 err_mbx_interrupt:
1968 fm10k_clear_queueing_scheme(interface);
1969 err_sw_init:
1970 if (interface->sw_addr)
1971 iounmap(interface->sw_addr);
1972 iounmap(interface->uc_addr);
1973 err_ioremap:
1974 free_netdev(netdev);
1975 err_alloc_netdev:
1976 pci_release_selected_regions(pdev,
1977 pci_select_bars(pdev, IORESOURCE_MEM));
1978 err_pci_reg:
1979 err_dma:
1980 pci_disable_device(pdev);
1981 return err;
1982 }
1983
1984 /**
1985 * fm10k_remove - Device Removal Routine
1986 * @pdev: PCI device information struct
1987 *
1988 * fm10k_remove is called by the PCI subsystem to alert the driver
1989 * that it should release a PCI device. The could be caused by a
1990 * Hot-Plug event, or because the driver is going to be removed from
1991 * memory.
1992 **/
1993 static void fm10k_remove(struct pci_dev *pdev)
1994 {
1995 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
1996 struct net_device *netdev = interface->netdev;
1997
1998 del_timer_sync(&interface->service_timer);
1999
2000 set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2001 cancel_work_sync(&interface->service_task);
2002
2003 /* free netdev, this may bounce the interrupts due to setup_tc */
2004 if (netdev->reg_state == NETREG_REGISTERED)
2005 unregister_netdev(netdev);
2006
2007 /* cleanup timestamp handling */
2008 fm10k_ptp_unregister(interface);
2009
2010 /* release VFs */
2011 fm10k_iov_disable(pdev);
2012
2013 /* disable mailbox interrupt */
2014 fm10k_mbx_free_irq(interface);
2015
2016 /* free interrupts */
2017 fm10k_clear_queueing_scheme(interface);
2018
2019 /* remove any debugfs interfaces */
2020 fm10k_dbg_intfc_exit(interface);
2021
2022 if (interface->sw_addr)
2023 iounmap(interface->sw_addr);
2024 iounmap(interface->uc_addr);
2025
2026 free_netdev(netdev);
2027
2028 pci_release_selected_regions(pdev,
2029 pci_select_bars(pdev, IORESOURCE_MEM));
2030
2031 pci_disable_pcie_error_reporting(pdev);
2032
2033 pci_disable_device(pdev);
2034 }
2035
2036 #ifdef CONFIG_PM
2037 /**
2038 * fm10k_resume - Restore device to pre-sleep state
2039 * @pdev: PCI device information struct
2040 *
2041 * fm10k_resume is called after the system has powered back up from a sleep
2042 * state and is ready to resume operation. This function is meant to restore
2043 * the device back to its pre-sleep state.
2044 **/
2045 static int fm10k_resume(struct pci_dev *pdev)
2046 {
2047 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2048 struct net_device *netdev = interface->netdev;
2049 struct fm10k_hw *hw = &interface->hw;
2050 u32 err;
2051
2052 pci_set_power_state(pdev, PCI_D0);
2053 pci_restore_state(pdev);
2054
2055 /* pci_restore_state clears dev->state_saved so call
2056 * pci_save_state to restore it.
2057 */
2058 pci_save_state(pdev);
2059
2060 err = pci_enable_device_mem(pdev);
2061 if (err) {
2062 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
2063 return err;
2064 }
2065 pci_set_master(pdev);
2066
2067 pci_wake_from_d3(pdev, false);
2068
2069 /* refresh hw_addr in case it was dropped */
2070 hw->hw_addr = interface->uc_addr;
2071
2072 /* reset hardware to known state */
2073 err = hw->mac.ops.init_hw(&interface->hw);
2074 if (err)
2075 return err;
2076
2077 /* reset statistics starting values */
2078 hw->mac.ops.rebind_hw_stats(hw, &interface->stats);
2079
2080 /* reset clock */
2081 fm10k_ts_reset(interface);
2082
2083 rtnl_lock();
2084
2085 err = fm10k_init_queueing_scheme(interface);
2086 if (!err) {
2087 fm10k_mbx_request_irq(interface);
2088 if (netif_running(netdev))
2089 err = fm10k_open(netdev);
2090 }
2091
2092 rtnl_unlock();
2093
2094 if (err)
2095 return err;
2096
2097 /* assume host is not ready, to prevent race with watchdog in case we
2098 * actually don't have connection to the switch
2099 */
2100 interface->host_ready = false;
2101 fm10k_watchdog_host_not_ready(interface);
2102
2103 /* clear the service task disable bit to allow service task to start */
2104 clear_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2105 fm10k_service_event_schedule(interface);
2106
2107 /* restore SR-IOV interface */
2108 fm10k_iov_resume(pdev);
2109
2110 netif_device_attach(netdev);
2111
2112 return 0;
2113 }
2114
2115 /**
2116 * fm10k_suspend - Prepare the device for a system sleep state
2117 * @pdev: PCI device information struct
2118 *
2119 * fm10k_suspend is meant to shutdown the device prior to the system entering
2120 * a sleep state. The fm10k hardware does not support wake on lan so the
2121 * driver simply needs to shut down the device so it is in a low power state.
2122 **/
2123 static int fm10k_suspend(struct pci_dev *pdev,
2124 pm_message_t __always_unused state)
2125 {
2126 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2127 struct net_device *netdev = interface->netdev;
2128 int err = 0;
2129
2130 netif_device_detach(netdev);
2131
2132 fm10k_iov_suspend(pdev);
2133
2134 /* the watchdog tasks may read registers, which will appear like a
2135 * surprise-remove event once the PCI device is disabled. This will
2136 * cause us to close the netdevice, so we don't retain the open/closed
2137 * state post-resume. Prevent this by disabling the service task while
2138 * suspended, until we actually resume.
2139 */
2140 set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2141 cancel_work_sync(&interface->service_task);
2142
2143 rtnl_lock();
2144
2145 if (netif_running(netdev))
2146 fm10k_close(netdev);
2147
2148 fm10k_mbx_free_irq(interface);
2149
2150 fm10k_clear_queueing_scheme(interface);
2151
2152 rtnl_unlock();
2153
2154 err = pci_save_state(pdev);
2155 if (err)
2156 return err;
2157
2158 pci_disable_device(pdev);
2159 pci_wake_from_d3(pdev, false);
2160 pci_set_power_state(pdev, PCI_D3hot);
2161
2162 return 0;
2163 }
2164
2165 #endif /* CONFIG_PM */
2166 /**
2167 * fm10k_io_error_detected - called when PCI error is detected
2168 * @pdev: Pointer to PCI device
2169 * @state: The current pci connection state
2170 *
2171 * This function is called after a PCI bus error affecting
2172 * this device has been detected.
2173 */
2174 static pci_ers_result_t fm10k_io_error_detected(struct pci_dev *pdev,
2175 pci_channel_state_t state)
2176 {
2177 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2178 struct net_device *netdev = interface->netdev;
2179
2180 netif_device_detach(netdev);
2181
2182 if (state == pci_channel_io_perm_failure)
2183 return PCI_ERS_RESULT_DISCONNECT;
2184
2185 if (netif_running(netdev))
2186 fm10k_close(netdev);
2187
2188 fm10k_mbx_free_irq(interface);
2189
2190 pci_disable_device(pdev);
2191
2192 /* Request a slot reset. */
2193 return PCI_ERS_RESULT_NEED_RESET;
2194 }
2195
2196 /**
2197 * fm10k_io_slot_reset - called after the pci bus has been reset.
2198 * @pdev: Pointer to PCI device
2199 *
2200 * Restart the card from scratch, as if from a cold-boot.
2201 */
2202 static pci_ers_result_t fm10k_io_slot_reset(struct pci_dev *pdev)
2203 {
2204 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2205 pci_ers_result_t result;
2206
2207 if (pci_enable_device_mem(pdev)) {
2208 dev_err(&pdev->dev,
2209 "Cannot re-enable PCI device after reset.\n");
2210 result = PCI_ERS_RESULT_DISCONNECT;
2211 } else {
2212 pci_set_master(pdev);
2213 pci_restore_state(pdev);
2214
2215 /* After second error pci->state_saved is false, this
2216 * resets it so EEH doesn't break.
2217 */
2218 pci_save_state(pdev);
2219
2220 pci_wake_from_d3(pdev, false);
2221
2222 /* refresh hw_addr in case it was dropped */
2223 interface->hw.hw_addr = interface->uc_addr;
2224
2225 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
2226 fm10k_service_event_schedule(interface);
2227
2228 result = PCI_ERS_RESULT_RECOVERED;
2229 }
2230
2231 pci_cleanup_aer_uncorrect_error_status(pdev);
2232
2233 return result;
2234 }
2235
2236 /**
2237 * fm10k_io_resume - called when traffic can start flowing again.
2238 * @pdev: Pointer to PCI device
2239 *
2240 * This callback is called when the error recovery driver tells us that
2241 * its OK to resume normal operation.
2242 */
2243 static void fm10k_io_resume(struct pci_dev *pdev)
2244 {
2245 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2246 struct net_device *netdev = interface->netdev;
2247 struct fm10k_hw *hw = &interface->hw;
2248 int err = 0;
2249
2250 /* reset hardware to known state */
2251 hw->mac.ops.init_hw(&interface->hw);
2252
2253 /* reset statistics starting values */
2254 hw->mac.ops.rebind_hw_stats(hw, &interface->stats);
2255
2256 /* reassociate interrupts */
2257 fm10k_mbx_request_irq(interface);
2258
2259 /* reset clock */
2260 fm10k_ts_reset(interface);
2261
2262 if (netif_running(netdev))
2263 err = fm10k_open(netdev);
2264
2265 /* final check of hardware state before registering the interface */
2266 err = err ? : fm10k_hw_ready(interface);
2267
2268 if (!err)
2269 netif_device_attach(netdev);
2270 }
2271
2272 static const struct pci_error_handlers fm10k_err_handler = {
2273 .error_detected = fm10k_io_error_detected,
2274 .slot_reset = fm10k_io_slot_reset,
2275 .resume = fm10k_io_resume,
2276 };
2277
2278 static struct pci_driver fm10k_driver = {
2279 .name = fm10k_driver_name,
2280 .id_table = fm10k_pci_tbl,
2281 .probe = fm10k_probe,
2282 .remove = fm10k_remove,
2283 #ifdef CONFIG_PM
2284 .suspend = fm10k_suspend,
2285 .resume = fm10k_resume,
2286 #endif
2287 .sriov_configure = fm10k_iov_configure,
2288 .err_handler = &fm10k_err_handler
2289 };
2290
2291 /**
2292 * fm10k_register_pci_driver - register driver interface
2293 *
2294 * This funciton is called on module load in order to register the driver.
2295 **/
2296 int fm10k_register_pci_driver(void)
2297 {
2298 return pci_register_driver(&fm10k_driver);
2299 }
2300
2301 /**
2302 * fm10k_unregister_pci_driver - unregister driver interface
2303 *
2304 * This funciton is called on module unload in order to remove the driver.
2305 **/
2306 void fm10k_unregister_pci_driver(void)
2307 {
2308 pci_unregister_driver(&fm10k_driver);
2309 }
Linux with added FPC-III support