Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux/fpc-iii.git] / drivers / net / ethernet / mellanox / mlx5 / core / transobj.c
blobd7068f54e80066acdcaf6bf081082d50feeebc57
1 /*
2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
33 #include <linux/mlx5/driver.h>
34 #include "mlx5_core.h"
35 #include "transobj.h"
37 int mlx5_alloc_transport_domain(struct mlx5_core_dev *dev, u32 *tdn)
39 u32 in[MLX5_ST_SZ_DW(alloc_transport_domain_in)];
40 u32 out[MLX5_ST_SZ_DW(alloc_transport_domain_out)];
41 int err;
43 memset(in, 0, sizeof(in));
44 memset(out, 0, sizeof(out));
46 MLX5_SET(alloc_transport_domain_in, in, opcode,
47 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN);
49 err = mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out));
50 if (!err)
51 *tdn = MLX5_GET(alloc_transport_domain_out, out,
52 transport_domain);
54 return err;
57 void mlx5_dealloc_transport_domain(struct mlx5_core_dev *dev, u32 tdn)
59 u32 in[MLX5_ST_SZ_DW(dealloc_transport_domain_in)];
60 u32 out[MLX5_ST_SZ_DW(dealloc_transport_domain_out)];
62 memset(in, 0, sizeof(in));
63 memset(out, 0, sizeof(out));
65 MLX5_SET(dealloc_transport_domain_in, in, opcode,
66 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN);
67 MLX5_SET(dealloc_transport_domain_in, in, transport_domain, tdn);
69 mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out));
72 int mlx5_core_create_rq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *rqn)
74 u32 out[MLX5_ST_SZ_DW(create_rq_out)];
75 int err;
77 MLX5_SET(create_rq_in, in, opcode, MLX5_CMD_OP_CREATE_RQ);
79 memset(out, 0, sizeof(out));
80 err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
81 if (!err)
82 *rqn = MLX5_GET(create_rq_out, out, rqn);
84 return err;
87 int mlx5_core_modify_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *in, int inlen)
89 u32 out[MLX5_ST_SZ_DW(modify_rq_out)];
91 MLX5_SET(modify_rq_in, in, rqn, rqn);
92 MLX5_SET(modify_rq_in, in, opcode, MLX5_CMD_OP_MODIFY_RQ);
94 memset(out, 0, sizeof(out));
95 return mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
98 void mlx5_core_destroy_rq(struct mlx5_core_dev *dev, u32 rqn)
100 u32 in[MLX5_ST_SZ_DW(destroy_rq_in)];
101 u32 out[MLX5_ST_SZ_DW(destroy_rq_out)];
103 memset(in, 0, sizeof(in));
105 MLX5_SET(destroy_rq_in, in, opcode, MLX5_CMD_OP_DESTROY_RQ);
106 MLX5_SET(destroy_rq_in, in, rqn, rqn);
108 mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out));
111 int mlx5_core_create_sq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *sqn)
113 u32 out[MLX5_ST_SZ_DW(create_sq_out)];
114 int err;
116 MLX5_SET(create_sq_in, in, opcode, MLX5_CMD_OP_CREATE_SQ);
118 memset(out, 0, sizeof(out));
119 err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
120 if (!err)
121 *sqn = MLX5_GET(create_sq_out, out, sqn);
123 return err;
126 int mlx5_core_modify_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *in, int inlen)
128 u32 out[MLX5_ST_SZ_DW(modify_sq_out)];
130 MLX5_SET(modify_sq_in, in, sqn, sqn);
131 MLX5_SET(modify_sq_in, in, opcode, MLX5_CMD_OP_MODIFY_SQ);
133 memset(out, 0, sizeof(out));
134 return mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
137 void mlx5_core_destroy_sq(struct mlx5_core_dev *dev, u32 sqn)
139 u32 in[MLX5_ST_SZ_DW(destroy_sq_in)];
140 u32 out[MLX5_ST_SZ_DW(destroy_sq_out)];
142 memset(in, 0, sizeof(in));
144 MLX5_SET(destroy_sq_in, in, opcode, MLX5_CMD_OP_DESTROY_SQ);
145 MLX5_SET(destroy_sq_in, in, sqn, sqn);
147 mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out));
150 int mlx5_core_create_tir(struct mlx5_core_dev *dev, u32 *in, int inlen,
151 u32 *tirn)
153 u32 out[MLX5_ST_SZ_DW(create_tir_out)];
154 int err;
156 MLX5_SET(create_tir_in, in, opcode, MLX5_CMD_OP_CREATE_TIR);
158 memset(out, 0, sizeof(out));
159 err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
160 if (!err)
161 *tirn = MLX5_GET(create_tir_out, out, tirn);
163 return err;
166 int mlx5_core_modify_tir(struct mlx5_core_dev *dev, u32 tirn, u32 *in,
167 int inlen)
169 u32 out[MLX5_ST_SZ_DW(modify_tir_out)];
171 MLX5_SET(modify_tir_in, in, tirn, tirn);
172 MLX5_SET(modify_tir_in, in, opcode, MLX5_CMD_OP_MODIFY_TIR);
174 memset(out, 0, sizeof(out));
175 return mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
178 void mlx5_core_destroy_tir(struct mlx5_core_dev *dev, u32 tirn)
180 u32 in[MLX5_ST_SZ_DW(destroy_tir_in)];
181 u32 out[MLX5_ST_SZ_DW(destroy_tir_out)];
183 memset(in, 0, sizeof(in));
185 MLX5_SET(destroy_tir_in, in, opcode, MLX5_CMD_OP_DESTROY_TIR);
186 MLX5_SET(destroy_tir_in, in, tirn, tirn);
188 mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out));
191 int mlx5_core_create_tis(struct mlx5_core_dev *dev, u32 *in, int inlen,
192 u32 *tisn)
194 u32 out[MLX5_ST_SZ_DW(create_tis_out)];
195 int err;
197 MLX5_SET(create_tis_in, in, opcode, MLX5_CMD_OP_CREATE_TIS);
199 memset(out, 0, sizeof(out));
200 err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
201 if (!err)
202 *tisn = MLX5_GET(create_tis_out, out, tisn);
204 return err;
207 void mlx5_core_destroy_tis(struct mlx5_core_dev *dev, u32 tisn)
209 u32 in[MLX5_ST_SZ_DW(destroy_tis_in)];
210 u32 out[MLX5_ST_SZ_DW(destroy_tis_out)];
212 memset(in, 0, sizeof(in));
214 MLX5_SET(destroy_tis_in, in, opcode, MLX5_CMD_OP_DESTROY_TIS);
215 MLX5_SET(destroy_tis_in, in, tisn, tisn);
217 mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out));
220 int mlx5_core_create_rmp(struct mlx5_core_dev *dev, u32 *in, int inlen,
221 u32 *rmpn)
223 u32 out[MLX5_ST_SZ_DW(create_rmp_out)];
224 int err;
226 MLX5_SET(create_rmp_in, in, opcode, MLX5_CMD_OP_CREATE_RMP);
228 memset(out, 0, sizeof(out));
229 err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
230 if (!err)
231 *rmpn = MLX5_GET(create_rmp_out, out, rmpn);
233 return err;
236 int mlx5_core_modify_rmp(struct mlx5_core_dev *dev, u32 *in, int inlen)
238 u32 out[MLX5_ST_SZ_DW(modify_rmp_out)];
240 MLX5_SET(modify_rmp_in, in, opcode, MLX5_CMD_OP_MODIFY_RMP);
242 memset(out, 0, sizeof(out));
243 return mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
246 int mlx5_core_destroy_rmp(struct mlx5_core_dev *dev, u32 rmpn)
248 u32 in[MLX5_ST_SZ_DW(destroy_rmp_in)];
249 u32 out[MLX5_ST_SZ_DW(destroy_rmp_out)];
251 memset(in, 0, sizeof(in));
253 MLX5_SET(destroy_rmp_in, in, opcode, MLX5_CMD_OP_DESTROY_RMP);
254 MLX5_SET(destroy_rmp_in, in, rmpn, rmpn);
256 return mlx5_cmd_exec_check_status(dev, in, sizeof(in), out,
257 sizeof(out));
260 int mlx5_core_query_rmp(struct mlx5_core_dev *dev, u32 rmpn, u32 *out)
262 u32 in[MLX5_ST_SZ_DW(query_rmp_in)];
263 int outlen = MLX5_ST_SZ_BYTES(query_rmp_out);
265 memset(in, 0, sizeof(in));
266 MLX5_SET(query_rmp_in, in, opcode, MLX5_CMD_OP_QUERY_RMP);
267 MLX5_SET(query_rmp_in, in, rmpn, rmpn);
269 return mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, outlen);
272 int mlx5_core_arm_rmp(struct mlx5_core_dev *dev, u32 rmpn, u16 lwm)
274 void *in;
275 void *rmpc;
276 void *wq;
277 void *bitmask;
278 int err;
280 in = mlx5_vzalloc(MLX5_ST_SZ_BYTES(modify_rmp_in));
281 if (!in)
282 return -ENOMEM;
284 rmpc = MLX5_ADDR_OF(modify_rmp_in, in, ctx);
285 bitmask = MLX5_ADDR_OF(modify_rmp_in, in, bitmask);
286 wq = MLX5_ADDR_OF(rmpc, rmpc, wq);
288 MLX5_SET(modify_rmp_in, in, rmp_state, MLX5_RMPC_STATE_RDY);
289 MLX5_SET(modify_rmp_in, in, rmpn, rmpn);
290 MLX5_SET(wq, wq, lwm, lwm);
291 MLX5_SET(rmp_bitmask, bitmask, lwm, 1);
292 MLX5_SET(rmpc, rmpc, state, MLX5_RMPC_STATE_RDY);
294 err = mlx5_core_modify_rmp(dev, in, MLX5_ST_SZ_BYTES(modify_rmp_in));
296 kvfree(in);
298 return err;
301 int mlx5_core_create_xsrq(struct mlx5_core_dev *dev, u32 *in, int inlen,
302 u32 *xsrqn)
304 u32 out[MLX5_ST_SZ_DW(create_xrc_srq_out)];
305 int err;
307 MLX5_SET(create_xrc_srq_in, in, opcode, MLX5_CMD_OP_CREATE_XRC_SRQ);
309 memset(out, 0, sizeof(out));
310 err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
311 if (!err)
312 *xsrqn = MLX5_GET(create_xrc_srq_out, out, xrc_srqn);
314 return err;
317 int mlx5_core_destroy_xsrq(struct mlx5_core_dev *dev, u32 xsrqn)
319 u32 in[MLX5_ST_SZ_DW(destroy_xrc_srq_in)];
320 u32 out[MLX5_ST_SZ_DW(destroy_xrc_srq_out)];
322 memset(in, 0, sizeof(in));
323 memset(out, 0, sizeof(out));
325 MLX5_SET(destroy_xrc_srq_in, in, opcode, MLX5_CMD_OP_DESTROY_XRC_SRQ);
326 MLX5_SET(destroy_xrc_srq_in, in, xrc_srqn, xsrqn);
328 return mlx5_cmd_exec_check_status(dev, in, sizeof(in), out,
329 sizeof(out));
332 int mlx5_core_query_xsrq(struct mlx5_core_dev *dev, u32 xsrqn, u32 *out)
334 u32 in[MLX5_ST_SZ_DW(query_xrc_srq_in)];
335 void *srqc;
336 void *xrc_srqc;
337 int err;
339 memset(in, 0, sizeof(in));
340 MLX5_SET(query_xrc_srq_in, in, opcode, MLX5_CMD_OP_QUERY_XRC_SRQ);
341 MLX5_SET(query_xrc_srq_in, in, xrc_srqn, xsrqn);
343 err = mlx5_cmd_exec_check_status(dev, in, sizeof(in),
344 out,
345 MLX5_ST_SZ_BYTES(query_xrc_srq_out));
346 if (!err) {
347 xrc_srqc = MLX5_ADDR_OF(query_xrc_srq_out, out,
348 xrc_srq_context_entry);
349 srqc = MLX5_ADDR_OF(query_srq_out, out, srq_context_entry);
350 memcpy(srqc, xrc_srqc, MLX5_ST_SZ_BYTES(srqc));
353 return err;
356 int mlx5_core_arm_xsrq(struct mlx5_core_dev *dev, u32 xsrqn, u16 lwm)
358 u32 in[MLX5_ST_SZ_DW(arm_xrc_srq_in)];
359 u32 out[MLX5_ST_SZ_DW(arm_xrc_srq_out)];
361 memset(in, 0, sizeof(in));
362 memset(out, 0, sizeof(out));
364 MLX5_SET(arm_xrc_srq_in, in, opcode, MLX5_CMD_OP_ARM_XRC_SRQ);
365 MLX5_SET(arm_xrc_srq_in, in, xrc_srqn, xsrqn);
366 MLX5_SET(arm_xrc_srq_in, in, lwm, lwm);
367 MLX5_SET(arm_xrc_srq_in, in, op_mod,
368 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ);
370 return mlx5_cmd_exec_check_status(dev, in, sizeof(in), out,
371 sizeof(out));
374 int mlx5_core_create_rqt(struct mlx5_core_dev *dev, u32 *in, int inlen,
375 u32 *rqtn)
377 u32 out[MLX5_ST_SZ_DW(create_rqt_out)];
378 int err;
380 MLX5_SET(create_rqt_in, in, opcode, MLX5_CMD_OP_CREATE_RQT);
382 memset(out, 0, sizeof(out));
383 err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
384 if (!err)
385 *rqtn = MLX5_GET(create_rqt_out, out, rqtn);
387 return err;
390 int mlx5_core_modify_rqt(struct mlx5_core_dev *dev, u32 rqtn, u32 *in,
391 int inlen)
393 u32 out[MLX5_ST_SZ_DW(modify_rqt_out)];
395 MLX5_SET(modify_rqt_in, in, rqtn, rqtn);
396 MLX5_SET(modify_rqt_in, in, opcode, MLX5_CMD_OP_MODIFY_RQT);
398 memset(out, 0, sizeof(out));
399 return mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
402 void mlx5_core_destroy_rqt(struct mlx5_core_dev *dev, u32 rqtn)
404 u32 in[MLX5_ST_SZ_DW(destroy_rqt_in)];
405 u32 out[MLX5_ST_SZ_DW(destroy_rqt_out)];
407 memset(in, 0, sizeof(in));
409 MLX5_SET(destroy_rqt_in, in, opcode, MLX5_CMD_OP_DESTROY_RQT);
410 MLX5_SET(destroy_rqt_in, in, rqtn, rqtn);
412 mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out));