2 * Architecture-specific trap handling.
4 * Copyright (C) 1998-2003 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
7 * 05/12/00 grao <goutham.rao@intel.com> : added isr in siginfo for SIGFPE
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/sched/signal.h>
13 #include <linux/sched/debug.h>
14 #include <linux/tty.h>
15 #include <linux/vt_kern.h> /* For unblank_screen() */
16 #include <linux/export.h>
17 #include <linux/extable.h>
18 #include <linux/hardirq.h>
19 #include <linux/kprobes.h>
20 #include <linux/delay.h> /* for ssleep() */
21 #include <linux/kdebug.h>
22 #include <linux/uaccess.h>
24 #include <asm/fpswa.h>
25 #include <asm/intrinsics.h>
26 #include <asm/processor.h>
27 #include <asm/exception.h>
28 #include <asm/setup.h>
30 fpswa_interface_t
*fpswa_interface
;
31 EXPORT_SYMBOL(fpswa_interface
);
36 if (ia64_boot_param
->fpswa
)
37 /* FPSWA fixup: make the interface pointer a kernel virtual address: */
38 fpswa_interface
= __va(ia64_boot_param
->fpswa
);
42 die (const char *str
, struct pt_regs
*regs
, long err
)
49 .lock
= __SPIN_LOCK_UNLOCKED(die
.lock
),
53 static int die_counter
;
56 if (die
.lock_owner
!= cpu
) {
58 spin_lock_irq(&die
.lock
);
60 die
.lock_owner_depth
= 0;
65 if (++die
.lock_owner_depth
< 3) {
66 printk("%s[%d]: %s %ld [%d]\n",
67 current
->comm
, task_pid_nr(current
), str
, err
, ++die_counter
);
68 if (notify_die(DIE_OOPS
, str
, regs
, err
, 255, SIGSEGV
)
74 printk(KERN_ERR
"Recursive die() failure, output suppressed\n");
78 add_taint(TAINT_DIE
, LOCKDEP_NOW_UNRELIABLE
);
79 spin_unlock_irq(&die
.lock
);
85 panic("Fatal exception");
92 die_if_kernel (char *str
, struct pt_regs
*regs
, long err
)
95 return die(str
, regs
, err
);
100 __kprobes
ia64_bad_break (unsigned long break_num
, struct pt_regs
*regs
)
105 /* SIGILL, SIGFPE, SIGSEGV, and SIGBUS want these field initialized: */
106 siginfo
.si_addr
= (void __user
*) (regs
->cr_iip
+ ia64_psr(regs
)->ri
);
107 siginfo
.si_imm
= break_num
;
108 siginfo
.si_flags
= 0; /* clear __ISR_VALID */
112 case 0: /* unknown error (used by GCC for __builtin_abort()) */
113 if (notify_die(DIE_BREAK
, "break 0", regs
, break_num
, TRAP_BRKPT
, SIGTRAP
)
116 if (die_if_kernel("bugcheck!", regs
, break_num
))
118 sig
= SIGILL
; code
= ILL_ILLOPC
;
121 case 1: /* integer divide by zero */
122 sig
= SIGFPE
; code
= FPE_INTDIV
;
125 case 2: /* integer overflow */
126 sig
= SIGFPE
; code
= FPE_INTOVF
;
129 case 3: /* range check/bounds check */
130 sig
= SIGFPE
; code
= FPE_FLTSUB
;
133 case 4: /* null pointer dereference */
134 sig
= SIGSEGV
; code
= SEGV_MAPERR
;
137 case 5: /* misaligned data */
138 sig
= SIGSEGV
; code
= BUS_ADRALN
;
141 case 6: /* decimal overflow */
142 sig
= SIGFPE
; code
= __FPE_DECOVF
;
145 case 7: /* decimal divide by zero */
146 sig
= SIGFPE
; code
= __FPE_DECDIV
;
149 case 8: /* packed decimal error */
150 sig
= SIGFPE
; code
= __FPE_DECERR
;
153 case 9: /* invalid ASCII digit */
154 sig
= SIGFPE
; code
= __FPE_INVASC
;
157 case 10: /* invalid decimal digit */
158 sig
= SIGFPE
; code
= __FPE_INVDEC
;
161 case 11: /* paragraph stack overflow */
162 sig
= SIGSEGV
; code
= __SEGV_PSTKOVF
;
165 case 0x3f000 ... 0x3ffff: /* bundle-update in progress */
166 sig
= SIGILL
; code
= __ILL_BNDMOD
;
170 if ((break_num
< 0x40000 || break_num
> 0x100000)
171 && die_if_kernel("Bad break", regs
, break_num
))
174 if (break_num
< 0x80000) {
175 sig
= SIGILL
; code
= __ILL_BREAK
;
177 if (notify_die(DIE_BREAK
, "bad break", regs
, break_num
, TRAP_BRKPT
, SIGTRAP
)
180 sig
= SIGTRAP
; code
= TRAP_BRKPT
;
183 siginfo
.si_signo
= sig
;
184 siginfo
.si_errno
= 0;
185 siginfo
.si_code
= code
;
186 force_sig_info(sig
, &siginfo
, current
);
190 * disabled_fph_fault() is called when a user-level process attempts to access f32..f127
191 * and it doesn't own the fp-high register partition. When this happens, we save the
192 * current fph partition in the task_struct of the fpu-owner (if necessary) and then load
193 * the fp-high partition of the current task (if necessary). Note that the kernel has
194 * access to fph by the time we get here, as the IVT's "Disabled FP-Register" handler takes
195 * care of clearing psr.dfh.
198 disabled_fph_fault (struct pt_regs
*regs
)
200 struct ia64_psr
*psr
= ia64_psr(regs
);
202 /* first, grant user-level access to fph partition: */
206 * Make sure that no other task gets in on this processor
207 * while we're claiming the FPU
212 struct task_struct
*fpu_owner
213 = (struct task_struct
*)ia64_get_kr(IA64_KR_FPU_OWNER
);
215 if (ia64_is_local_fpu_owner(current
)) {
216 preempt_enable_no_resched();
221 ia64_flush_fph(fpu_owner
);
223 #endif /* !CONFIG_SMP */
224 ia64_set_local_fpu_owner(current
);
225 if ((current
->thread
.flags
& IA64_THREAD_FPH_VALID
) != 0) {
226 __ia64_load_fpu(current
->thread
.fph
);
231 * Set mfh because the state in thread.fph does not match the state in
236 preempt_enable_no_resched();
240 fp_emulate (int fp_fault
, void *bundle
, long *ipsr
, long *fpsr
, long *isr
, long *pr
, long *ifs
,
241 struct pt_regs
*regs
)
246 if (!fpswa_interface
)
249 memset(&fp_state
, 0, sizeof(fp_state_t
));
252 * compute fp_state. only FP registers f6 - f11 are used by the
253 * kernel, so set those bits in the mask and set the low volatile
254 * pointer to point to these registers.
256 fp_state
.bitmask_low64
= 0xfc0; /* bit6..bit11 */
258 fp_state
.fp_state_low_volatile
= (fp_state_low_volatile_t
*) ®s
->f6
;
260 * unsigned long (*EFI_FPSWA) (
261 * unsigned long trap_type,
263 * unsigned long *pipsr,
264 * unsigned long *pfsr,
265 * unsigned long *pisr,
266 * unsigned long *ppreds,
267 * unsigned long *pifs,
270 ret
= (*fpswa_interface
->fpswa
)((unsigned long) fp_fault
, bundle
,
271 (unsigned long *) ipsr
, (unsigned long *) fpsr
,
272 (unsigned long *) isr
, (unsigned long *) pr
,
273 (unsigned long *) ifs
, &fp_state
);
282 static DEFINE_PER_CPU(struct fpu_swa_msg
, cpulast
);
283 DECLARE_PER_CPU(struct fpu_swa_msg
, cpulast
);
284 static struct fpu_swa_msg last __cacheline_aligned
;
288 * Handle floating-point assist faults and traps.
291 handle_fpu_swa (int fp_fault
, struct pt_regs
*regs
, unsigned long isr
)
293 long exception
, bundle
[2];
294 unsigned long fault_ip
;
295 struct siginfo siginfo
;
297 fault_ip
= regs
->cr_iip
;
298 if (!fp_fault
&& (ia64_psr(regs
)->ri
== 0))
300 if (copy_from_user(bundle
, (void __user
*) fault_ip
, sizeof(bundle
)))
303 if (!(current
->thread
.flags
& IA64_THREAD_FPEMU_NOPRINT
)) {
304 unsigned long count
, current_jiffies
= jiffies
;
305 struct fpu_swa_msg
*cp
= this_cpu_ptr(&cpulast
);
307 if (unlikely(current_jiffies
> cp
->time
))
309 if (unlikely(cp
->count
< 5)) {
311 cp
->time
= current_jiffies
+ 5 * HZ
;
313 /* minimize races by grabbing a copy of count BEFORE checking last.time. */
318 * Lower 4 bits are used as a count. Upper bits are a sequence
319 * number that is updated when count is reset. The cmpxchg will
320 * fail is seqno has changed. This minimizes mutiple cpus
321 * resetting the count.
323 if (current_jiffies
> last
.time
)
324 (void) cmpxchg_acq(&last
.count
, count
, 16 + (count
& ~15));
326 /* used fetchadd to atomically update the count */
327 if ((last
.count
& 15) < 5 && (ia64_fetchadd(1, &last
.count
, acq
) & 15) < 5) {
328 last
.time
= current_jiffies
+ 5 * HZ
;
330 "%s(%d): floating-point assist fault at ip %016lx, isr %016lx\n",
331 current
->comm
, task_pid_nr(current
), regs
->cr_iip
+ ia64_psr(regs
)->ri
, isr
);
336 exception
= fp_emulate(fp_fault
, bundle
, ®s
->cr_ipsr
, ®s
->ar_fpsr
, &isr
, ®s
->pr
,
337 ®s
->cr_ifs
, regs
);
339 if (exception
== 0) {
340 /* emulation was successful */
341 ia64_increment_ip(regs
);
342 } else if (exception
== -1) {
343 printk(KERN_ERR
"handle_fpu_swa: fp_emulate() returned -1\n");
346 /* is next instruction a trap? */
348 ia64_increment_ip(regs
);
350 siginfo
.si_signo
= SIGFPE
;
351 siginfo
.si_errno
= 0;
352 siginfo
.si_code
= __SI_FAULT
; /* default code */
353 siginfo
.si_addr
= (void __user
*) (regs
->cr_iip
+ ia64_psr(regs
)->ri
);
355 siginfo
.si_code
= FPE_FLTINV
;
356 } else if (isr
& 0x22) {
357 /* denormal operand gets the same si_code as underflow
358 * see arch/i386/kernel/traps.c:math_error() */
359 siginfo
.si_code
= FPE_FLTUND
;
360 } else if (isr
& 0x44) {
361 siginfo
.si_code
= FPE_FLTDIV
;
363 siginfo
.si_isr
= isr
;
364 siginfo
.si_flags
= __ISR_VALID
;
366 force_sig_info(SIGFPE
, &siginfo
, current
);
369 if (exception
== -1) {
370 printk(KERN_ERR
"handle_fpu_swa: fp_emulate() returned -1\n");
372 } else if (exception
!= 0) {
373 /* raise exception */
374 siginfo
.si_signo
= SIGFPE
;
375 siginfo
.si_errno
= 0;
376 siginfo
.si_code
= __SI_FAULT
; /* default code */
377 siginfo
.si_addr
= (void __user
*) (regs
->cr_iip
+ ia64_psr(regs
)->ri
);
379 siginfo
.si_code
= FPE_FLTOVF
;
380 } else if (isr
& 0x1100) {
381 siginfo
.si_code
= FPE_FLTUND
;
382 } else if (isr
& 0x2200) {
383 siginfo
.si_code
= FPE_FLTRES
;
385 siginfo
.si_isr
= isr
;
386 siginfo
.si_flags
= __ISR_VALID
;
388 force_sig_info(SIGFPE
, &siginfo
, current
);
394 struct illegal_op_return
{
395 unsigned long fkt
, arg1
, arg2
, arg3
;
398 struct illegal_op_return
399 ia64_illegal_op_fault (unsigned long ec
, long arg1
, long arg2
, long arg3
,
400 long arg4
, long arg5
, long arg6
, long arg7
,
403 struct illegal_op_return rv
;
407 #ifdef CONFIG_IA64_BRL_EMU
409 extern struct illegal_op_return
ia64_emulate_brl (struct pt_regs
*, unsigned long);
411 rv
= ia64_emulate_brl(®s
, ec
);
412 if (rv
.fkt
!= (unsigned long) -1)
417 sprintf(buf
, "IA-64 Illegal operation fault");
419 if (die_if_kernel(buf
, ®s
, 0))
422 memset(&si
, 0, sizeof(si
));
423 si
.si_signo
= SIGILL
;
424 si
.si_code
= ILL_ILLOPC
;
425 si
.si_addr
= (void __user
*) (regs
.cr_iip
+ ia64_psr(®s
)->ri
);
426 force_sig_info(SIGILL
, &si
, current
);
431 ia64_fault (unsigned long vector
, unsigned long isr
, unsigned long ifa
,
432 unsigned long iim
, unsigned long itir
, long arg5
, long arg6
,
433 long arg7
, struct pt_regs regs
)
435 unsigned long code
, error
= isr
, iip
;
436 struct siginfo siginfo
;
439 static const char *reason
[] = {
440 "IA-64 Illegal Operation fault",
441 "IA-64 Privileged Operation fault",
442 "IA-64 Privileged Register fault",
443 "IA-64 Reserved Register/Field fault",
444 "Disabled Instruction Set Transition fault",
445 "Unknown fault 5", "Unknown fault 6", "Unknown fault 7", "Illegal Hazard fault",
446 "Unknown fault 9", "Unknown fault 10", "Unknown fault 11", "Unknown fault 12",
447 "Unknown fault 13", "Unknown fault 14", "Unknown fault 15"
450 if ((isr
& IA64_ISR_NA
) && ((isr
& IA64_ISR_CODE_MASK
) == IA64_ISR_CODE_LFETCH
)) {
452 * This fault was due to lfetch.fault, set "ed" bit in the psr to cancel
455 ia64_psr(®s
)->ed
= 1;
459 iip
= regs
.cr_iip
+ ia64_psr(®s
)->ri
;
462 case 24: /* General Exception */
463 code
= (isr
>> 4) & 0xf;
464 sprintf(buf
, "General Exception: %s%s", reason
[code
],
465 (code
== 3) ? ((isr
& (1UL << 37))
466 ? " (RSE access)" : " (data access)") : "");
468 # ifdef CONFIG_IA64_PRINT_HAZARDS
469 printk("%s[%d]: possible hazard @ ip=%016lx (pr = %016lx)\n",
470 current
->comm
, task_pid_nr(current
),
471 regs
.cr_iip
+ ia64_psr(®s
)->ri
, regs
.pr
);
477 case 25: /* Disabled FP-Register */
479 disabled_fph_fault(®s
);
482 sprintf(buf
, "Disabled FPL fault---not supposed to happen!");
485 case 26: /* NaT Consumption */
486 if (user_mode(®s
)) {
489 if (((isr
>> 4) & 0xf) == 2) {
490 /* NaT page consumption */
493 addr
= (void __user
*) ifa
;
495 /* register NaT consumption */
498 addr
= (void __user
*) (regs
.cr_iip
499 + ia64_psr(®s
)->ri
);
501 siginfo
.si_signo
= sig
;
502 siginfo
.si_code
= code
;
503 siginfo
.si_errno
= 0;
504 siginfo
.si_addr
= addr
;
505 siginfo
.si_imm
= vector
;
506 siginfo
.si_flags
= __ISR_VALID
;
507 siginfo
.si_isr
= isr
;
508 force_sig_info(sig
, &siginfo
, current
);
510 } else if (ia64_done_with_exception(®s
))
512 sprintf(buf
, "NaT consumption");
515 case 31: /* Unsupported Data Reference */
516 if (user_mode(®s
)) {
517 siginfo
.si_signo
= SIGILL
;
518 siginfo
.si_code
= ILL_ILLOPN
;
519 siginfo
.si_errno
= 0;
520 siginfo
.si_addr
= (void __user
*) iip
;
521 siginfo
.si_imm
= vector
;
522 siginfo
.si_flags
= __ISR_VALID
;
523 siginfo
.si_isr
= isr
;
524 force_sig_info(SIGILL
, &siginfo
, current
);
527 sprintf(buf
, "Unsupported data reference");
531 case 35: /* Taken Branch Trap */
532 case 36: /* Single Step Trap */
533 if (fsys_mode(current
, ®s
)) {
534 extern char __kernel_syscall_via_break
[];
536 * Got a trap in fsys-mode: Taken Branch Trap
537 * and Single Step trap need special handling;
538 * Debug trap is ignored (we disable it here
539 * and re-enable it in the lower-privilege trap).
541 if (unlikely(vector
== 29)) {
542 set_thread_flag(TIF_DB_DISABLED
);
543 ia64_psr(®s
)->db
= 0;
544 ia64_psr(®s
)->lp
= 1;
547 /* re-do the system call via break 0x100000: */
548 regs
.cr_iip
= (unsigned long) __kernel_syscall_via_break
;
549 ia64_psr(®s
)->ri
= 0;
550 ia64_psr(®s
)->cpl
= 3;
556 siginfo
.si_code
= TRAP_HWBKPT
;
557 #ifdef CONFIG_ITANIUM
559 * Erratum 10 (IFA may contain incorrect address) now has
560 * "NoFix" status. There are no plans for fixing this.
562 if (ia64_psr(®s
)->is
== 0)
566 case 35: siginfo
.si_code
= TRAP_BRANCH
; ifa
= 0; break;
567 case 36: siginfo
.si_code
= TRAP_TRACE
; ifa
= 0; break;
569 if (notify_die(DIE_FAULT
, "ia64_fault", ®s
, vector
, siginfo
.si_code
, SIGTRAP
)
572 siginfo
.si_signo
= SIGTRAP
;
573 siginfo
.si_errno
= 0;
574 siginfo
.si_addr
= (void __user
*) ifa
;
576 siginfo
.si_flags
= __ISR_VALID
;
577 siginfo
.si_isr
= isr
;
578 force_sig_info(SIGTRAP
, &siginfo
, current
);
581 case 32: /* fp fault */
582 case 33: /* fp trap */
583 result
= handle_fpu_swa((vector
== 32) ? 1 : 0, ®s
, isr
);
584 if ((result
< 0) || (current
->thread
.flags
& IA64_THREAD_FPEMU_SIGFPE
)) {
585 siginfo
.si_signo
= SIGFPE
;
586 siginfo
.si_errno
= 0;
587 siginfo
.si_code
= FPE_FLTINV
;
588 siginfo
.si_addr
= (void __user
*) iip
;
589 siginfo
.si_flags
= __ISR_VALID
;
590 siginfo
.si_isr
= isr
;
592 force_sig_info(SIGFPE
, &siginfo
, current
);
598 /* Lower-Privilege Transfer Trap */
600 /* If we disabled debug traps during an fsyscall,
601 * re-enable them here.
603 if (test_thread_flag(TIF_DB_DISABLED
)) {
604 clear_thread_flag(TIF_DB_DISABLED
);
605 ia64_psr(®s
)->db
= 1;
609 * Just clear PSR.lp and then return immediately:
610 * all the interesting work (e.g., signal delivery)
611 * is done in the kernel exit path.
613 ia64_psr(®s
)->lp
= 0;
616 /* Unimplemented Instr. Address Trap */
617 if (user_mode(®s
)) {
618 siginfo
.si_signo
= SIGILL
;
619 siginfo
.si_code
= ILL_BADIADDR
;
620 siginfo
.si_errno
= 0;
621 siginfo
.si_flags
= 0;
624 siginfo
.si_addr
= (void __user
*) iip
;
625 force_sig_info(SIGILL
, &siginfo
, current
);
628 sprintf(buf
, "Unimplemented Instruction Address fault");
633 printk(KERN_ERR
"Unexpected IA-32 exception (Trap 45)\n");
634 printk(KERN_ERR
" iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx\n",
636 force_sig(SIGSEGV
, current
);
640 printk(KERN_ERR
"Unexpected IA-32 intercept trap (Trap 46)\n");
641 printk(KERN_ERR
" iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx, iim - 0x%lx\n",
643 force_sig(SIGSEGV
, current
);
647 sprintf(buf
, "IA-32 Interruption Fault (int 0x%lx)", isr
>> 16);
651 sprintf(buf
, "Fault %lu", vector
);
654 if (!die_if_kernel(buf
, ®s
, error
))
655 force_sig(SIGILL
, current
);