2 * GE SBC310 Device Tree Source
4 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
18 * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts
21 /include/ "mpc8641si-pre.dtsi"
25 compatible = "gef,sbc310";
28 device_type = "memory";
29 reg = <0x0 0x40000000>; // set by uboot
32 lbc: localbus@fef05000 {
33 reg = <0xfef05000 0x1000>;
35 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
36 1 0 0xe0000000 0x08000000 // Paged Flash 0
37 2 0 0xe8000000 0x08000000 // Paged Flash 1
38 3 0 0xfc100000 0x00020000 // NVRAM
39 4 0 0xfc000000 0x00010000>; // FPGA
41 /* flash@0,0 is a mirror of part of the memory in flash@1,0
43 compatible = "gef,sbc310-firmware-mirror", "cfi-flash";
44 reg = <0x0 0x0 0x01000000>;
51 reg = <0x0 0x01000000>;
58 compatible = "gef,sbc310-paged-flash", "cfi-flash";
59 reg = <0x1 0x0 0x8000000>;
66 reg = <0x0 0x7800000>;
70 reg = <0x7800000 0x800000>;
76 device_type = "nvram";
77 compatible = "simtek,stk14ca8";
78 reg = <0x3 0x0 0x20000>;
82 compatible = "gef,fpga-regs";
87 compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00",
89 reg = <0x4 0x2000 0x8>;
90 interrupts = <0x1a 0x4>;
91 interrupt-parent = <&gef_pic>;
95 compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00",
97 reg = <0x4 0x2010 0x8>;
98 interrupts = <0x1b 0x4>;
99 interrupt-parent = <&gef_pic>;
102 gef_pic: pic@4,4000 {
103 #interrupt-cells = <1>;
104 interrupt-controller;
105 compatible = "gef,sbc310-fpga-pic", "gef,fpga-pic";
106 reg = <0x4 0x4000 0x20>;
107 interrupts = <0x8 0x9 0 0>;
110 gef_gpio: gpio@4,8000 {
112 compatible = "gef,sbc310-gpio";
113 reg = <0x4 0x8000 0x24>;
119 ranges = <0x0 0xfef00000 0x00100000>;
123 compatible = "epson,rx8581";
130 compatible = "national,lm92";
135 compatible = "adi,adt7461";
140 compatible = "dallas,ds1682";
145 enet0: ethernet@24000 {
146 tbi-handle = <&tbi0>;
147 phy-handle = <&phy0>;
148 phy-connection-type = "gmii";
152 phy0: ethernet-phy@0 {
153 interrupt-parent = <&gef_pic>;
154 interrupts = <0x9 0x4>;
157 phy2: ethernet-phy@2 {
158 interrupt-parent = <&gef_pic>;
159 interrupts = <0x8 0x4>;
164 device_type = "tbi-phy";
168 enet1: ethernet@26000 {
169 tbi-handle = <&tbi2>;
170 phy-handle = <&phy2>;
171 phy-connection-type = "gmii";
177 device_type = "tbi-phy";
181 enet2: ethernet@25000 {
189 enet3: ethernet@27000 {
198 pci0: pcie@fef08000 {
199 reg = <0xfef08000 0x1000>;
200 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
201 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
202 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
204 0x0000 0x0 0x0 0x1 &mpic 0x0 0x2
205 0x0000 0x0 0x0 0x2 &mpic 0x1 0x2
206 0x0000 0x0 0x0 0x3 &mpic 0x2 0x2
207 0x0000 0x0 0x0 0x4 &mpic 0x3 0x2
211 ranges = <0x02000000 0x0 0x80000000
212 0x02000000 0x0 0x80000000
215 0x01000000 0x0 0x00000000
216 0x01000000 0x0 0x00000000
221 pci1: pcie@fef09000 {
222 reg = <0xfef09000 0x1000>;
223 ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
224 0x01000000 0x0 0x00000000 0xfe400000 0x0 0x00400000>;
227 ranges = <0x02000000 0x0 0xc0000000
228 0x02000000 0x0 0xc0000000
231 0x01000000 0x0 0x00000000
232 0x01000000 0x0 0x00000000
238 /include/ "mpc8641si-post.dtsi"