arch/powerpc/include/asm/opal.h

   1 /*
   2  * PowerNV OPAL definitions.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #ifndef _ASM_POWERPC_OPAL_H
  13 #define _ASM_POWERPC_OPAL_H
  14
  15 #include <asm/opal-api.h>
  16
  17 #ifndef __ASSEMBLY__
  18
  19 #include <linux/notifier.h>
  20
  21 /* We calculate number of sg entries based on PAGE_SIZE */
  22 #define SG_ENTRIES_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct opal_sg_entry))
  23
  24 /* /sys/firmware/opal */
  25 extern struct kobject *opal_kobj;
  26
  27 /* /ibm,opal */
  28 extern struct device_node *opal_node;
  29
  30 /* API functions */
  31 int64_t opal_invalid_call(void);
  32 int64_t opal_npu_destroy_context(uint64_t phb_id, uint64_t pid, uint64_t bdf);
  33 int64_t opal_npu_init_context(uint64_t phb_id, int pasid, uint64_t msr,
  34                         uint64_t bdf);
  35 int64_t opal_npu_map_lpar(uint64_t phb_id, uint64_t bdf, uint64_t lparid,
  36                         uint64_t lpcr);
  37 int64_t opal_console_write(int64_t term_number, __be64 *length,
  38                            const uint8_t *buffer);
  39 int64_t opal_console_read(int64_t term_number, __be64 *length,
  40                           uint8_t *buffer);
  41 int64_t opal_console_write_buffer_space(int64_t term_number,
  42                                         __be64 *length);
  43 int64_t opal_console_flush(int64_t term_number);
  44 int64_t opal_rtc_read(__be32 *year_month_day,
  45                       __be64 *hour_minute_second_millisecond);
  46 int64_t opal_rtc_write(uint32_t year_month_day,
  47                        uint64_t hour_minute_second_millisecond);
  48 int64_t opal_tpo_read(uint64_t token, __be32 *year_mon_day, __be32 *hour_min);
  49 int64_t opal_tpo_write(uint64_t token, uint32_t year_mon_day,
  50                        uint32_t hour_min);
  51 int64_t opal_cec_power_down(uint64_t request);
  52 int64_t opal_cec_reboot(void);
  53 int64_t opal_cec_reboot2(uint32_t reboot_type, char *diag);
  54 int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
  55 int64_t opal_write_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
  56 int64_t opal_handle_interrupt(uint64_t isn, __be64 *outstanding_event_mask);
  57 int64_t opal_poll_events(__be64 *outstanding_event_mask);
  58 int64_t opal_pci_set_hub_tce_memory(uint64_t hub_id, uint64_t tce_mem_addr,
  59                                     uint64_t tce_mem_size);
  60 int64_t opal_pci_set_phb_tce_memory(uint64_t phb_id, uint64_t tce_mem_addr,
  61                                     uint64_t tce_mem_size);
  62 int64_t opal_pci_config_read_byte(uint64_t phb_id, uint64_t bus_dev_func,
  63                                   uint64_t offset, uint8_t *data);
  64 int64_t opal_pci_config_read_half_word(uint64_t phb_id, uint64_t bus_dev_func,
  65                                        uint64_t offset, __be16 *data);
  66 int64_t opal_pci_config_read_word(uint64_t phb_id, uint64_t bus_dev_func,
  67                                   uint64_t offset, __be32 *data);
  68 int64_t opal_pci_config_write_byte(uint64_t phb_id, uint64_t bus_dev_func,
  69                                    uint64_t offset, uint8_t data);
  70 int64_t opal_pci_config_write_half_word(uint64_t phb_id, uint64_t bus_dev_func,
  71                                         uint64_t offset, uint16_t data);
  72 int64_t opal_pci_config_write_word(uint64_t phb_id, uint64_t bus_dev_func,
  73                                    uint64_t offset, uint32_t data);
  74 int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority);
  75 int64_t opal_get_xive(uint32_t isn, __be16 *server, uint8_t *priority);
  76 int64_t opal_register_exception_handler(uint64_t opal_exception,
  77                                         uint64_t handler_address,
  78                                         uint64_t glue_cache_line);
  79 int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number,
  80                                    uint8_t *freeze_state,
  81                                    __be16 *pci_error_type,
  82                                    __be64 *phb_status);
  83 int64_t opal_pci_eeh_freeze_clear(uint64_t phb_id, uint64_t pe_number,
  84                                   uint64_t eeh_action_token);
  85 int64_t opal_pci_eeh_freeze_set(uint64_t phb_id, uint64_t pe_number,
  86                                 uint64_t eeh_action_token);
  87 int64_t opal_pci_err_inject(uint64_t phb_id, uint32_t pe_no, uint32_t type,
  88                             uint32_t func, uint64_t addr, uint64_t mask);
  89 int64_t opal_pci_shpc(uint64_t phb_id, uint64_t shpc_action, uint8_t *state);
  90
  91
  92
  93 int64_t opal_pci_phb_mmio_enable(uint64_t phb_id, uint16_t window_type,
  94                                  uint16_t window_num, uint16_t enable);
  95 int64_t opal_pci_set_phb_mem_window(uint64_t phb_id, uint16_t window_type,
  96                                     uint16_t window_num,
  97                                     uint64_t starting_real_address,
  98                                     uint64_t starting_pci_address,
  99                                     uint64_t size);
 100 int64_t opal_pci_map_pe_mmio_window(uint64_t phb_id, uint16_t pe_number,
 101                                     uint16_t window_type, uint16_t window_num,
 102                                     uint16_t segment_num);
 103 int64_t opal_pci_set_phb_table_memory(uint64_t phb_id, uint64_t rtt_addr,
 104                                       uint64_t ivt_addr, uint64_t ivt_len,
 105                                       uint64_t reject_array_addr,
 106                                       uint64_t peltv_addr);
 107 int64_t opal_pci_set_pe(uint64_t phb_id, uint64_t pe_number, uint64_t bus_dev_func,
 108                         uint8_t bus_compare, uint8_t dev_compare, uint8_t func_compare,
 109                         uint8_t pe_action);
 110 int64_t opal_pci_set_peltv(uint64_t phb_id, uint32_t parent_pe, uint32_t child_pe,
 111                            uint8_t state);
 112 int64_t opal_pci_set_mve(uint64_t phb_id, uint32_t mve_number, uint32_t pe_number);
 113 int64_t opal_pci_set_mve_enable(uint64_t phb_id, uint32_t mve_number,
 114                                 uint32_t state);
 115 int64_t opal_pci_get_xive_reissue(uint64_t phb_id, uint32_t xive_number,
 116                                   uint8_t *p_bit, uint8_t *q_bit);
 117 int64_t opal_pci_set_xive_reissue(uint64_t phb_id, uint32_t xive_number,
 118                                   uint8_t p_bit, uint8_t q_bit);
 119 int64_t opal_pci_msi_eoi(uint64_t phb_id, uint32_t hw_irq);
 120 int64_t opal_pci_set_xive_pe(uint64_t phb_id, uint32_t pe_number,
 121                              uint32_t xive_num);
 122 int64_t opal_get_xive_source(uint64_t phb_id, uint32_t xive_num,
 123                              __be32 *interrupt_source_number);
 124 int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num,
 125                         uint8_t msi_range, __be32 *msi_address,
 126                         __be32 *message_data);
 127 int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number,
 128                         uint32_t xive_num, uint8_t msi_range,
 129                         __be64 *msi_address, __be32 *message_data);
 130 int64_t opal_start_cpu(uint64_t thread_number, uint64_t start_address);
 131 int64_t opal_query_cpu_status(uint64_t thread_number, uint8_t *thread_status);
 132 int64_t opal_write_oppanel(oppanel_line_t *lines, uint64_t num_lines);
 133 int64_t opal_pci_map_pe_dma_window(uint64_t phb_id, uint16_t pe_number, uint16_t window_id,
 134                                    uint16_t tce_levels, uint64_t tce_table_addr,
 135                                    uint64_t tce_table_size, uint64_t tce_page_size);
 136 int64_t opal_pci_map_pe_dma_window_real(uint64_t phb_id, uint16_t pe_number,
 137                                         uint16_t dma_window_number, uint64_t pci_start_addr,
 138                                         uint64_t pci_mem_size);
 139 int64_t opal_pci_reset(uint64_t id, uint8_t reset_scope, uint8_t assert_state);
 140
 141 int64_t opal_pci_get_hub_diag_data(uint64_t hub_id, void *diag_buffer,
 142                                    uint64_t diag_buffer_len);
 143 int64_t opal_pci_get_phb_diag_data(uint64_t phb_id, void *diag_buffer,
 144                                    uint64_t diag_buffer_len);
 145 int64_t opal_pci_get_phb_diag_data2(uint64_t phb_id, void *diag_buffer,
 146                                     uint64_t diag_buffer_len);
 147 int64_t opal_pci_fence_phb(uint64_t phb_id);
 148 int64_t opal_pci_reinit(uint64_t phb_id, uint64_t reinit_scope, uint64_t data);
 149 int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mask_action);
 150 int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action);
 151 int64_t opal_get_epow_status(__be16 *epow_status, __be16 *num_epow_classes);
 152 int64_t opal_get_dpo_status(__be64 *dpo_timeout);
 153 int64_t opal_set_system_attention_led(uint8_t led_action);
 154 int64_t opal_pci_next_error(uint64_t phb_id, __be64 *first_frozen_pe,
 155                             __be16 *pci_error_type, __be16 *severity);
 156 int64_t opal_pci_poll(uint64_t id);
 157 int64_t opal_return_cpu(void);
 158 int64_t opal_check_token(uint64_t token);
 159 int64_t opal_reinit_cpus(uint64_t flags);
 160
 161 int64_t opal_xscom_read(uint32_t gcid, uint64_t pcb_addr, __be64 *val);
 162 int64_t opal_xscom_write(uint32_t gcid, uint64_t pcb_addr, uint64_t val);
 163
 164 int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
 165                        uint32_t addr, uint32_t data, uint32_t sz);
 166 int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type,
 167                       uint32_t addr, __be32 *data, uint32_t sz);
 168
 169 int64_t opal_read_elog(uint64_t buffer, uint64_t size, uint64_t log_id);
 170 int64_t opal_get_elog_size(__be64 *log_id, __be64 *size, __be64 *elog_type);
 171 int64_t opal_write_elog(uint64_t buffer, uint64_t size, uint64_t offset);
 172 int64_t opal_send_ack_elog(uint64_t log_id);
 173 void opal_resend_pending_logs(void);
 174
 175 int64_t opal_validate_flash(uint64_t buffer, uint32_t *size, uint32_t *result);
 176 int64_t opal_manage_flash(uint8_t op);
 177 int64_t opal_update_flash(uint64_t blk_list);
 178 int64_t opal_dump_init(uint8_t dump_type);
 179 int64_t opal_dump_info(__be32 *dump_id, __be32 *dump_size);
 180 int64_t opal_dump_info2(__be32 *dump_id, __be32 *dump_size, __be32 *dump_type);
 181 int64_t opal_dump_read(uint32_t dump_id, uint64_t buffer);
 182 int64_t opal_dump_ack(uint32_t dump_id);
 183 int64_t opal_dump_resend_notification(void);
 184
 185 int64_t opal_get_msg(uint64_t buffer, uint64_t size);
 186 int64_t opal_write_oppanel_async(uint64_t token, oppanel_line_t *lines,
 187                                         uint64_t num_lines);
 188 int64_t opal_check_completion(uint64_t buffer, uint64_t size, uint64_t token);
 189 int64_t opal_sync_host_reboot(void);
 190 int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer,
 191                 uint64_t length);
 192 int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer,
 193                 uint64_t length);
 194 int64_t opal_sensor_read(uint32_t sensor_hndl, int token, __be32 *sensor_data);
 195 int64_t opal_handle_hmi(void);
 196 int64_t opal_register_dump_region(uint32_t id, uint64_t start, uint64_t end);
 197 int64_t opal_unregister_dump_region(uint32_t id);
 198 int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val);
 199 int64_t opal_config_cpu_idle_state(uint64_t state, uint64_t flag);
 200 int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number);
 201 int64_t opal_ipmi_send(uint64_t interface, struct opal_ipmi_msg *msg,
 202                 uint64_t msg_len);
 203 int64_t opal_ipmi_recv(uint64_t interface, struct opal_ipmi_msg *msg,
 204                 uint64_t *msg_len);
 205 int64_t opal_i2c_request(uint64_t async_token, uint32_t bus_id,
 206                          struct opal_i2c_request *oreq);
 207 int64_t opal_prd_msg(struct opal_prd_msg *msg);
 208 int64_t opal_leds_get_ind(char *loc_code, __be64 *led_mask,
 209                           __be64 *led_value, __be64 *max_led_type);
 210 int64_t opal_leds_set_ind(uint64_t token, char *loc_code, const u64 led_mask,
 211                           const u64 led_value, __be64 *max_led_type);
 212
 213 int64_t opal_flash_read(uint64_t id, uint64_t offset, uint64_t buf,
 214                 uint64_t size, uint64_t token);
 215 int64_t opal_flash_write(uint64_t id, uint64_t offset, uint64_t buf,
 216                 uint64_t size, uint64_t token);
 217 int64_t opal_flash_erase(uint64_t id, uint64_t offset, uint64_t size,
 218                 uint64_t token);
 219 int64_t opal_get_device_tree(uint32_t phandle, uint64_t buf, uint64_t len);
 220 int64_t opal_pci_get_presence_state(uint64_t id, uint64_t data);
 221 int64_t opal_pci_get_power_state(uint64_t id, uint64_t data);
 222 int64_t opal_pci_set_power_state(uint64_t async_token, uint64_t id,
 223                                  uint64_t data);
 224 int64_t opal_pci_poll2(uint64_t id, uint64_t data);
 225
 226 int64_t opal_int_get_xirr(uint32_t *out_xirr, bool just_poll);
 227 int64_t opal_int_set_cppr(uint8_t cppr);
 228 int64_t opal_int_eoi(uint32_t xirr);
 229 int64_t opal_int_set_mfrr(uint32_t cpu, uint8_t mfrr);
 230 int64_t opal_pci_tce_kill(uint64_t phb_id, uint32_t kill_type,
 231                           uint32_t pe_num, uint32_t tce_size,
 232                           uint64_t dma_addr, uint32_t npages);
 233 int64_t opal_nmmu_set_ptcr(uint64_t chip_id, uint64_t ptcr);
 234 int64_t opal_xive_reset(uint64_t version);
 235 int64_t opal_xive_get_irq_info(uint32_t girq,
 236                                __be64 *out_flags,
 237                                __be64 *out_eoi_page,
 238                                __be64 *out_trig_page,
 239                                __be32 *out_esb_shift,
 240                                __be32 *out_src_chip);
 241 int64_t opal_xive_get_irq_config(uint32_t girq, __be64 *out_vp,
 242                                  uint8_t *out_prio, __be32 *out_lirq);
 243 int64_t opal_xive_set_irq_config(uint32_t girq, uint64_t vp, uint8_t prio,
 244                                  uint32_t lirq);
 245 int64_t opal_xive_get_queue_info(uint64_t vp, uint32_t prio,
 246                                  __be64 *out_qpage,
 247                                  __be64 *out_qsize,
 248                                  __be64 *out_qeoi_page,
 249                                  __be32 *out_escalate_irq,
 250                                  __be64 *out_qflags);
 251 int64_t opal_xive_set_queue_info(uint64_t vp, uint32_t prio,
 252                                  uint64_t qpage,
 253                                  uint64_t qsize,
 254                                  uint64_t qflags);
 255 int64_t opal_xive_donate_page(uint32_t chip_id, uint64_t addr);
 256 int64_t opal_xive_alloc_vp_block(uint32_t alloc_order);
 257 int64_t opal_xive_free_vp_block(uint64_t vp);
 258 int64_t opal_xive_get_vp_info(uint64_t vp,
 259                               __be64 *out_flags,
 260                               __be64 *out_cam_value,
 261                               __be64 *out_report_cl_pair,
 262                               __be32 *out_chip_id);
 263 int64_t opal_xive_set_vp_info(uint64_t vp,
 264                               uint64_t flags,
 265                               uint64_t report_cl_pair);
 266 int64_t opal_xive_allocate_irq(uint32_t chip_id);
 267 int64_t opal_xive_free_irq(uint32_t girq);
 268 int64_t opal_xive_sync(uint32_t type, uint32_t id);
 269 int64_t opal_xive_dump(uint32_t type, uint32_t id);
 270
 271 /* Internal functions */
 272 extern int early_init_dt_scan_opal(unsigned long node, const char *uname,
 273                                    int depth, void *data);
 274 extern int early_init_dt_scan_recoverable_ranges(unsigned long node,
 275                                  const char *uname, int depth, void *data);
 276 extern void opal_configure_cores(void);
 277
 278 extern int opal_get_chars(uint32_t vtermno, char *buf, int count);
 279 extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len);
 280
 281 extern void hvc_opal_init_early(void);
 282
 283 extern int opal_notifier_register(struct notifier_block *nb);
 284 extern int opal_notifier_unregister(struct notifier_block *nb);
 285
 286 extern int opal_message_notifier_register(enum opal_msg_type msg_type,
 287                                                 struct notifier_block *nb);
 288 extern int opal_message_notifier_unregister(enum opal_msg_type msg_type,
 289                                             struct notifier_block *nb);
 290 extern void opal_notifier_enable(void);
 291 extern void opal_notifier_disable(void);
 292 extern void opal_notifier_update_evt(uint64_t evt_mask, uint64_t evt_val);
 293
 294 extern int __opal_async_get_token(void);
 295 extern int opal_async_get_token_interruptible(void);
 296 extern int __opal_async_release_token(int token);
 297 extern int opal_async_release_token(int token);
 298 extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg);
 299 extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data);
 300
 301 struct rtc_time;
 302 extern unsigned long opal_get_boot_time(void);
 303 extern void opal_nvram_init(void);
 304 extern void opal_flash_update_init(void);
 305 extern void opal_flash_term_callback(void);
 306 extern int opal_elog_init(void);
 307 extern void opal_platform_dump_init(void);
 308 extern void opal_sys_param_init(void);
 309 extern void opal_msglog_init(void);
 310 extern void opal_msglog_sysfs_init(void);
 311 extern int opal_async_comp_init(void);
 312 extern int opal_sensor_init(void);
 313 extern int opal_hmi_handler_init(void);
 314 extern int opal_event_init(void);
 315
 316 extern int opal_machine_check(struct pt_regs *regs);
 317 extern bool opal_mce_check_early_recovery(struct pt_regs *regs);
 318 extern int opal_hmi_exception_early(struct pt_regs *regs);
 319 extern int opal_handle_hmi_exception(struct pt_regs *regs);
 320
 321 extern void opal_shutdown(void);
 322 extern int opal_resync_timebase(void);
 323
 324 extern void opal_lpc_init(void);
 325
 326 extern void opal_kmsg_init(void);
 327
 328 extern int opal_event_request(unsigned int opal_event_nr);
 329
 330 struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr,
 331                                              unsigned long vmalloc_size);
 332 void opal_free_sg_list(struct opal_sg_list *sg);
 333
 334 extern int opal_error_code(int rc);
 335
 336 ssize_t opal_msglog_copy(char *to, loff_t pos, size_t count);
 337
 338 static inline int opal_get_async_rc(struct opal_msg msg)
 339 {
 340         if (msg.msg_type != OPAL_MSG_ASYNC_COMP)
 341                 return OPAL_PARAMETER;
 342         else
 343                 return be64_to_cpu(msg.params[1]);
 344 }
 345
 346 void opal_wake_poller(void);
 347
 348 #endif /* __ASSEMBLY__ */
 349
 350 #endif /* _ASM_POWERPC_OPAL_H */