2 * A hypervisor allows multiple Operating Systems to run on a single machine.
3 * To quote David Wheeler: "Any problem in computer science can be solved with
4 * another layer of indirection."
6 * We keep things simple in two ways. First, we start with a normal Linux
7 * kernel and insert a module (lg.ko) which allows us to run other Linux
8 * kernels the same way we'd run processes. We call the first kernel the Host,
9 * and the others the Guests. The program which sets up and configures Guests
10 * (such as the example in tools/lguest/lguest.c) is called the Launcher.
12 * Secondly, we only run specially modified Guests, not normal kernels: setting
13 * CONFIG_LGUEST_GUEST to "y" compiles this file into the kernel so it knows
14 * how to be a Guest at boot time. This means that you can use the same kernel
15 * you boot normally (ie. as a Host) as a Guest.
17 * These Guests know that they cannot do privileged operations, such as disable
18 * interrupts, and that they have to ask the Host to do such things explicitly.
19 * This file consists of all the replacements for such low-level native
20 * hardware operations: these special Guest versions call the Host.
22 * So how does the kernel know it's a Guest? We'll see that later, but let's
23 * just say that we end up here where we replace the native functions various
24 * "paravirt" structures with our Guest versions, then boot like normal.
28 * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
30 * This program is free software; you can redistribute it and/or modify
31 * it under the terms of the GNU General Public License as published by
32 * the Free Software Foundation; either version 2 of the License, or
33 * (at your option) any later version.
35 * This program is distributed in the hope that it will be useful, but
36 * WITHOUT ANY WARRANTY; without even the implied warranty of
37 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
38 * NON INFRINGEMENT. See the GNU General Public License for more
41 * You should have received a copy of the GNU General Public License
42 * along with this program; if not, write to the Free Software
43 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
45 #include <linux/kernel.h>
46 #include <linux/start_kernel.h>
47 #include <linux/string.h>
48 #include <linux/console.h>
49 #include <linux/screen_info.h>
50 #include <linux/irq.h>
51 #include <linux/interrupt.h>
52 #include <linux/clocksource.h>
53 #include <linux/clockchips.h>
54 #include <linux/lguest.h>
55 #include <linux/lguest_launcher.h>
56 #include <linux/virtio_console.h>
58 #include <linux/export.h>
59 #include <linux/pci.h>
60 #include <linux/virtio_pci.h>
63 #include <asm/lguest.h>
64 #include <asm/paravirt.h>
65 #include <asm/param.h>
67 #include <asm/pgtable.h>
69 #include <asm/setup.h>
70 #include <asm/e820/api.h>
73 #include <asm/fpu/api.h>
74 #include <asm/stackprotector.h>
75 #include <asm/reboot.h> /* for struct machine_ops */
76 #include <asm/kvm_para.h>
77 #include <asm/pci_x86.h>
78 #include <asm/pci-direct.h>
81 * Welcome to the Guest!
83 * The Guest in our tale is a simple creature: identical to the Host but
84 * behaving in simplified but equivalent ways. In particular, the Guest is the
85 * same kernel as the Host (or at least, built from the same source code).
88 struct lguest_data lguest_data
= {
89 .hcall_status
= { [0 ... LHCALL_RING_SIZE
-1] = 0xFF },
90 .noirq_iret
= (u32
)lguest_noirq_iret
,
91 .kernel_address
= PAGE_OFFSET
,
92 .blocked_interrupts
= { 1 }, /* Block timer interrupts */
93 .syscall_vec
= IA32_SYSCALL_VECTOR
,
97 * async_hcall() is pretty simple: I'm quite proud of it really. We have a
98 * ring buffer of stored hypercalls which the Host will run though next time we
99 * do a normal hypercall. Each entry in the ring has 5 slots for the hypercall
100 * arguments, and a "hcall_status" word which is 0 if the call is ready to go,
101 * and 255 once the Host has finished with it.
103 * If we come around to a slot which hasn't been finished, then the table is
104 * full and we just make the hypercall directly. This has the nice side
105 * effect of causing the Host to run all the stored calls in the ring buffer
106 * which empties it for next time!
108 static void async_hcall(unsigned long call
, unsigned long arg1
,
109 unsigned long arg2
, unsigned long arg3
,
112 /* Note: This code assumes we're uniprocessor. */
113 static unsigned int next_call
;
117 * Disable interrupts if not already disabled: we don't want an
118 * interrupt handler making a hypercall while we're already doing
121 local_irq_save(flags
);
122 if (lguest_data
.hcall_status
[next_call
] != 0xFF) {
123 /* Table full, so do normal hcall which will flush table. */
124 hcall(call
, arg1
, arg2
, arg3
, arg4
);
126 lguest_data
.hcalls
[next_call
].arg0
= call
;
127 lguest_data
.hcalls
[next_call
].arg1
= arg1
;
128 lguest_data
.hcalls
[next_call
].arg2
= arg2
;
129 lguest_data
.hcalls
[next_call
].arg3
= arg3
;
130 lguest_data
.hcalls
[next_call
].arg4
= arg4
;
131 /* Arguments must all be written before we mark it to go */
133 lguest_data
.hcall_status
[next_call
] = 0;
134 if (++next_call
== LHCALL_RING_SIZE
)
137 local_irq_restore(flags
);
141 * Notice the lazy_hcall() above, rather than hcall(). This is our first real
142 * optimization trick!
144 * When lazy_mode is set, it means we're allowed to defer all hypercalls and do
145 * them as a batch when lazy_mode is eventually turned off. Because hypercalls
146 * are reasonably expensive, batching them up makes sense. For example, a
147 * large munmap might update dozens of page table entries: that code calls
148 * paravirt_enter_lazy_mmu(), does the dozen updates, then calls
149 * lguest_leave_lazy_mode().
151 * So, when we're in lazy mode, we call async_hcall() to store the call for
154 static void lazy_hcall1(unsigned long call
, unsigned long arg1
)
156 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE
)
157 hcall(call
, arg1
, 0, 0, 0);
159 async_hcall(call
, arg1
, 0, 0, 0);
162 /* You can imagine what lazy_hcall2, 3 and 4 look like. :*/
163 static void lazy_hcall2(unsigned long call
,
167 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE
)
168 hcall(call
, arg1
, arg2
, 0, 0);
170 async_hcall(call
, arg1
, arg2
, 0, 0);
173 static void lazy_hcall3(unsigned long call
,
178 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE
)
179 hcall(call
, arg1
, arg2
, arg3
, 0);
181 async_hcall(call
, arg1
, arg2
, arg3
, 0);
184 #ifdef CONFIG_X86_PAE
185 static void lazy_hcall4(unsigned long call
,
191 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE
)
192 hcall(call
, arg1
, arg2
, arg3
, arg4
);
194 async_hcall(call
, arg1
, arg2
, arg3
, arg4
);
199 * When lazy mode is turned off, we issue the do-nothing hypercall to
200 * flush any stored calls, and call the generic helper to reset the
201 * per-cpu lazy mode variable.
203 static void lguest_leave_lazy_mmu_mode(void)
205 hcall(LHCALL_FLUSH_ASYNC
, 0, 0, 0, 0);
206 paravirt_leave_lazy_mmu();
210 * We also catch the end of context switch; we enter lazy mode for much of
211 * that too, so again we need to flush here.
213 * (Technically, this is lazy CPU mode, and normally we're in lazy MMU
214 * mode, but unlike Xen, lguest doesn't care about the difference).
216 static void lguest_end_context_switch(struct task_struct
*next
)
218 hcall(LHCALL_FLUSH_ASYNC
, 0, 0, 0, 0);
219 paravirt_end_context_switch(next
);
223 * After that diversion we return to our first native-instruction
224 * replacements: four functions for interrupt control.
226 * The simplest way of implementing these would be to have "turn interrupts
227 * off" and "turn interrupts on" hypercalls. Unfortunately, this is too slow:
228 * these are by far the most commonly called functions of those we override.
230 * So instead we keep an "irq_enabled" field inside our "struct lguest_data",
231 * which the Guest can update with a single instruction. The Host knows to
232 * check there before it tries to deliver an interrupt.
236 * save_flags() is expected to return the processor state (ie. "flags"). The
237 * flags word contains all kind of stuff, but in practice Linux only cares
238 * about the interrupt flag. Our "save_flags()" just returns that.
240 asmlinkage __visible
unsigned long lguest_save_fl(void)
242 return lguest_data
.irq_enabled
;
245 /* Interrupts go off... */
246 asmlinkage __visible
void lguest_irq_disable(void)
248 lguest_data
.irq_enabled
= 0;
252 * Let's pause a moment. Remember how I said these are called so often?
253 * Jeremy Fitzhardinge optimized them so hard early in 2009 that he had to
254 * break some rules. In particular, these functions are assumed to save their
255 * own registers if they need to: normal C functions assume they can trash the
256 * eax register. To use normal C functions, we use
257 * PV_CALLEE_SAVE_REGS_THUNK(), which pushes %eax onto the stack, calls the
258 * C function, then restores it.
260 PV_CALLEE_SAVE_REGS_THUNK(lguest_save_fl
);
261 PV_CALLEE_SAVE_REGS_THUNK(lguest_irq_disable
);
264 /* These are in head_32.S */
265 extern void lg_irq_enable(void);
266 extern void lg_restore_fl(unsigned long flags
);
269 * We could be more efficient in our checking of outstanding interrupts, rather
270 * than using a branch. One way would be to put the "irq_enabled" field in a
271 * page by itself, and have the Host write-protect it when an interrupt comes
272 * in when irqs are disabled. There will then be a page fault as soon as
273 * interrupts are re-enabled.
275 * A better method is to implement soft interrupt disable generally for x86:
276 * instead of disabling interrupts, we set a flag. If an interrupt does come
277 * in, we then disable them for real. This is uncommon, so we could simply use
278 * a hypercall for interrupt control and not worry about efficiency.
282 * The Interrupt Descriptor Table (IDT).
284 * The IDT tells the processor what to do when an interrupt comes in. Each
285 * entry in the table is a 64-bit descriptor: this holds the privilege level,
286 * address of the handler, and... well, who cares? The Guest just asks the
287 * Host to make the change anyway, because the Host controls the real IDT.
289 static void lguest_write_idt_entry(gate_desc
*dt
,
290 int entrynum
, const gate_desc
*g
)
293 * The gate_desc structure is 8 bytes long: we hand it to the Host in
294 * two 32-bit chunks. The whole 32-bit kernel used to hand descriptors
295 * around like this; typesafety wasn't a big concern in Linux's early
298 u32
*desc
= (u32
*)g
;
299 /* Keep the local copy up to date. */
300 native_write_idt_entry(dt
, entrynum
, g
);
301 /* Tell Host about this new entry. */
302 hcall(LHCALL_LOAD_IDT_ENTRY
, entrynum
, desc
[0], desc
[1], 0);
306 * Changing to a different IDT is very rare: we keep the IDT up-to-date every
307 * time it is written, so we can simply loop through all entries and tell the
310 static void lguest_load_idt(const struct desc_ptr
*desc
)
313 struct desc_struct
*idt
= (void *)desc
->address
;
315 for (i
= 0; i
< (desc
->size
+1)/8; i
++)
316 hcall(LHCALL_LOAD_IDT_ENTRY
, i
, idt
[i
].a
, idt
[i
].b
, 0);
320 * The Global Descriptor Table.
322 * The Intel architecture defines another table, called the Global Descriptor
323 * Table (GDT). You tell the CPU where it is (and its size) using the "lgdt"
324 * instruction, and then several other instructions refer to entries in the
325 * table. There are three entries which the Switcher needs, so the Host simply
326 * controls the entire thing and the Guest asks it to make changes using the
327 * LOAD_GDT hypercall.
329 * This is the exactly like the IDT code.
331 static void lguest_load_gdt(const struct desc_ptr
*desc
)
334 struct desc_struct
*gdt
= (void *)desc
->address
;
336 for (i
= 0; i
< (desc
->size
+1)/8; i
++)
337 hcall(LHCALL_LOAD_GDT_ENTRY
, i
, gdt
[i
].a
, gdt
[i
].b
, 0);
341 * For a single GDT entry which changes, we simply change our copy and
342 * then tell the host about it.
344 static void lguest_write_gdt_entry(struct desc_struct
*dt
, int entrynum
,
345 const void *desc
, int type
)
347 native_write_gdt_entry(dt
, entrynum
, desc
, type
);
348 /* Tell Host about this new entry. */
349 hcall(LHCALL_LOAD_GDT_ENTRY
, entrynum
,
350 dt
[entrynum
].a
, dt
[entrynum
].b
, 0);
354 * There are three "thread local storage" GDT entries which change
355 * on every context switch (these three entries are how glibc implements
356 * __thread variables). As an optimization, we have a hypercall
357 * specifically for this case.
359 * Wouldn't it be nicer to have a general LOAD_GDT_ENTRIES hypercall
360 * which took a range of entries?
362 static void lguest_load_tls(struct thread_struct
*t
, unsigned int cpu
)
365 * There's one problem which normal hardware doesn't have: the Host
366 * can't handle us removing entries we're currently using. So we clear
367 * the GS register here: if it's needed it'll be reloaded anyway.
370 lazy_hcall2(LHCALL_LOAD_TLS
, __pa(&t
->tls_array
), cpu
);
374 * That's enough excitement for now, back to ploughing through each of the
375 * different pv_ops structures (we're about 1/3 of the way through).
377 * This is the Local Descriptor Table, another weird Intel thingy. Linux only
378 * uses this for some strange applications like Wine. We don't do anything
379 * here, so they'll get an informative and friendly Segmentation Fault.
381 static void lguest_set_ldt(const void *addr
, unsigned entries
)
386 * This loads a GDT entry into the "Task Register": that entry points to a
387 * structure called the Task State Segment. Some comments scattered though the
388 * kernel code indicate that this used for task switching in ages past, along
389 * with blood sacrifice and astrology.
391 * Now there's nothing interesting in here that we don't get told elsewhere.
392 * But the native version uses the "ltr" instruction, which makes the Host
393 * complain to the Guest about a Segmentation Fault and it'll oops. So we
394 * override the native version with a do-nothing version.
396 static void lguest_load_tr_desc(void)
401 * The "cpuid" instruction is a way of querying both the CPU identity
402 * (manufacturer, model, etc) and its features. It was introduced before the
403 * Pentium in 1993 and keeps getting extended by both Intel, AMD and others.
404 * As you might imagine, after a decade and a half this treatment, it is now a
405 * giant ball of hair. Its entry in the current Intel manual runs to 28 pages.
407 * This instruction even it has its own Wikipedia entry. The Wikipedia entry
408 * has been translated into 6 languages. I am not making this up!
410 * We could get funky here and identify ourselves as "GenuineLguest", but
411 * instead we just use the real "cpuid" instruction. Then I pretty much turned
412 * off feature bits until the Guest booted. (Don't say that: you'll damage
413 * lguest sales!) Shut up, inner voice! (Hey, just pointing out that this is
414 * hardly future proof.) No one's listening! They don't like you anyway,
415 * parenthetic weirdo!
417 * Replacing the cpuid so we can turn features off is great for the kernel, but
418 * anyone (including userspace) can just use the raw "cpuid" instruction and
419 * the Host won't even notice since it isn't privileged. So we try not to get
420 * too worked up about it.
422 static void lguest_cpuid(unsigned int *ax
, unsigned int *bx
,
423 unsigned int *cx
, unsigned int *dx
)
427 native_cpuid(ax
, bx
, cx
, dx
);
430 * CPUID 0 gives the highest legal CPUID number (and the ID string).
431 * We futureproof our code a little by sticking to known CPUID values.
439 * CPUID 1 is a basic feature request.
441 * CX: we only allow kernel to see SSE3, CMPXCHG16B and SSSE3
442 * DX: SSE, SSE2, FXSR, MMX, CMOV, CMPXCHG8B, TSC, FPU and PAE.
448 * The Host can do a nice optimization if it knows that the
449 * kernel mappings (addresses above 0xC0000000 or whatever
450 * PAGE_OFFSET is set to) haven't changed. But Linux calls
451 * flush_tlb_user() for both user and kernel mappings unless
452 * the Page Global Enable (PGE) feature bit is set.
456 * We also lie, and say we're family id 5. 6 or greater
457 * leads to a rdmsr in early_init_intel which we can't handle.
458 * Family ID is returned as bits 8-12 in ax.
465 * This is used to detect if we're running under KVM. We might be,
466 * but that's a Host matter, not us. So say we're not.
468 case KVM_CPUID_SIGNATURE
:
473 * 0x80000000 returns the highest Extended Function, so we futureproof
474 * like we do above by limiting it to known fields.
477 if (*ax
> 0x80000008)
482 * PAE systems can mark pages as non-executable. Linux calls this the
483 * NX bit. Intel calls it XD (eXecute Disable), AMD EVP (Enhanced
484 * Virus Protection). We just switch it off here, since we don't
494 * Intel has four control registers, imaginatively named cr0, cr2, cr3 and cr4.
495 * I assume there's a cr1, but it hasn't bothered us yet, so we'll not bother
496 * it. The Host needs to know when the Guest wants to change them, so we have
497 * a whole series of functions like read_cr0() and write_cr0().
499 * We start with cr0. cr0 allows you to turn on and off all kinds of basic
500 * features, but the only cr0 bit that Linux ever used at runtime was the
501 * horrifically-named Task Switched (TS) bit at bit 3 (ie. 8)
503 * What does the TS bit do? Well, it causes the CPU to trap (interrupt 7) if
504 * the floating point unit is used. Which allows us to restore FPU state
505 * lazily after a task switch if we wanted to, but wouldn't a name like
506 * "FPUTRAP bit" be a little less cryptic?
508 * Fortunately, Linux keeps it simple and doesn't use TS, so we can ignore
511 static void lguest_write_cr0(unsigned long val
)
515 static unsigned long lguest_read_cr0(void)
521 * cr2 is the virtual address of the last page fault, which the Guest only ever
522 * reads. The Host kindly writes this into our "struct lguest_data", so we
523 * just read it out of there.
525 static unsigned long lguest_read_cr2(void)
527 return lguest_data
.cr2
;
530 /* See lguest_set_pte() below. */
531 static bool cr3_changed
= false;
532 static unsigned long current_cr3
;
535 * cr3 is the current toplevel pagetable page: the principle is the same as
536 * cr0. Keep a local copy, and tell the Host when it changes.
538 static void lguest_write_cr3(unsigned long cr3
)
540 lazy_hcall1(LHCALL_NEW_PGTABLE
, cr3
);
543 /* These two page tables are simple, linear, and used during boot */
544 if (cr3
!= __pa_symbol(swapper_pg_dir
) &&
545 cr3
!= __pa_symbol(initial_page_table
))
549 static unsigned long lguest_read_cr3(void)
554 /* cr4 is used to enable and disable PGE, but we don't care. */
555 static unsigned long lguest_read_cr4(void)
560 static void lguest_write_cr4(unsigned long val
)
565 * Page Table Handling.
567 * Now would be a good time to take a rest and grab a coffee or similarly
568 * relaxing stimulant. The easy parts are behind us, and the trek gradually
569 * winds uphill from here.
571 * Quick refresher: memory is divided into "pages" of 4096 bytes each. The CPU
572 * maps virtual addresses to physical addresses using "page tables". We could
573 * use one huge index of 1 million entries: each address is 4 bytes, so that's
574 * 1024 pages just to hold the page tables. But since most virtual addresses
575 * are unused, we use a two level index which saves space. The cr3 register
576 * contains the physical address of the top level "page directory" page, which
577 * contains physical addresses of up to 1024 second-level pages. Each of these
578 * second level pages contains up to 1024 physical addresses of actual pages,
579 * or Page Table Entries (PTEs).
581 * Here's a diagram, where arrows indicate physical addresses:
583 * cr3 ---> +---------+
584 * | --------->+---------+
586 * Mid-level | | PADDR2 |
593 * So to convert a virtual address to a physical address, we look up the top
594 * level, which points us to the second level, which gives us the physical
595 * address of that page. If the top level entry was not present, or the second
596 * level entry was not present, then the virtual address is invalid (we
597 * say "the page was not mapped").
599 * Put another way, a 32-bit virtual address is divided up like so:
601 * 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
602 * |<---- 10 bits ---->|<---- 10 bits ---->|<------ 12 bits ------>|
603 * Index into top Index into second Offset within page
604 * page directory page pagetable page
606 * Now, unfortunately, this isn't the whole story: Intel added Physical Address
607 * Extension (PAE) to allow 32 bit systems to use 64GB of memory (ie. 36 bits).
608 * These are held in 64-bit page table entries, so we can now only fit 512
609 * entries in a page, and the neat three-level tree breaks down.
611 * The result is a four level page table:
613 * cr3 --> [ 4 Upper ]
616 * [(PUD Page)]---> +---------+
617 * | --------->+---------+
619 * Mid-level | | PADDR2 |
627 * And the virtual address is decoded as:
629 * 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
630 * |<-2->|<--- 9 bits ---->|<---- 9 bits --->|<------ 12 bits ------>|
631 * Index into Index into mid Index into lower Offset within page
632 * top entries directory page pagetable page
634 * It's too hard to switch between these two formats at runtime, so Linux only
635 * supports one or the other depending on whether CONFIG_X86_PAE is set. Many
636 * distributions turn it on, and not just for people with silly amounts of
637 * memory: the larger PTE entries allow room for the NX bit, which lets the
638 * kernel disable execution of pages and increase security.
640 * This was a problem for lguest, which couldn't run on these distributions;
641 * then Matias Zabaljauregui figured it all out and implemented it, and only a
642 * handful of puppies were crushed in the process!
644 * Back to our point: the kernel spends a lot of time changing both the
645 * top-level page directory and lower-level pagetable pages. The Guest doesn't
646 * know physical addresses, so while it maintains these page tables exactly
647 * like normal, it also needs to keep the Host informed whenever it makes a
648 * change: the Host will create the real page tables based on the Guests'.
652 * The Guest calls this after it has set a second-level entry (pte), ie. to map
653 * a page into a process' address space. We tell the Host the toplevel and
654 * address this corresponds to. The Guest uses one pagetable per process, so
655 * we need to tell the Host which one we're changing (mm->pgd).
657 static void lguest_pte_update(struct mm_struct
*mm
, unsigned long addr
,
660 #ifdef CONFIG_X86_PAE
661 /* PAE needs to hand a 64 bit page table entry, so it uses two args. */
662 lazy_hcall4(LHCALL_SET_PTE
, __pa(mm
->pgd
), addr
,
663 ptep
->pte_low
, ptep
->pte_high
);
665 lazy_hcall3(LHCALL_SET_PTE
, __pa(mm
->pgd
), addr
, ptep
->pte_low
);
669 /* This is the "set and update" combo-meal-deal version. */
670 static void lguest_set_pte_at(struct mm_struct
*mm
, unsigned long addr
,
671 pte_t
*ptep
, pte_t pteval
)
673 native_set_pte(ptep
, pteval
);
674 lguest_pte_update(mm
, addr
, ptep
);
678 * The Guest calls lguest_set_pud to set a top-level entry and lguest_set_pmd
679 * to set a middle-level entry when PAE is activated.
681 * Again, we set the entry then tell the Host which page we changed,
682 * and the index of the entry we changed.
684 #ifdef CONFIG_X86_PAE
685 static void lguest_set_pud(pud_t
*pudp
, pud_t pudval
)
687 native_set_pud(pudp
, pudval
);
689 /* 32 bytes aligned pdpt address and the index. */
690 lazy_hcall2(LHCALL_SET_PGD
, __pa(pudp
) & 0xFFFFFFE0,
691 (__pa(pudp
) & 0x1F) / sizeof(pud_t
));
694 static void lguest_set_pmd(pmd_t
*pmdp
, pmd_t pmdval
)
696 native_set_pmd(pmdp
, pmdval
);
697 lazy_hcall2(LHCALL_SET_PMD
, __pa(pmdp
) & PAGE_MASK
,
698 (__pa(pmdp
) & (PAGE_SIZE
- 1)) / sizeof(pmd_t
));
702 /* The Guest calls lguest_set_pmd to set a top-level entry when !PAE. */
703 static void lguest_set_pmd(pmd_t
*pmdp
, pmd_t pmdval
)
705 native_set_pmd(pmdp
, pmdval
);
706 lazy_hcall2(LHCALL_SET_PGD
, __pa(pmdp
) & PAGE_MASK
,
707 (__pa(pmdp
) & (PAGE_SIZE
- 1)) / sizeof(pmd_t
));
712 * There are a couple of legacy places where the kernel sets a PTE, but we
713 * don't know the top level any more. This is useless for us, since we don't
714 * know which pagetable is changing or what address, so we just tell the Host
715 * to forget all of them. Fortunately, this is very rare.
717 * ... except in early boot when the kernel sets up the initial pagetables,
718 * which makes booting astonishingly slow: 48 seconds! So we don't even tell
719 * the Host anything changed until we've done the first real page table switch,
720 * which brings boot back to 4.3 seconds.
722 static void lguest_set_pte(pte_t
*ptep
, pte_t pteval
)
724 native_set_pte(ptep
, pteval
);
726 lazy_hcall1(LHCALL_FLUSH_TLB
, 1);
729 #ifdef CONFIG_X86_PAE
731 * With 64-bit PTE values, we need to be careful setting them: if we set 32
732 * bits at a time, the hardware could see a weird half-set entry. These
733 * versions ensure we update all 64 bits at once.
735 static void lguest_set_pte_atomic(pte_t
*ptep
, pte_t pte
)
737 native_set_pte_atomic(ptep
, pte
);
739 lazy_hcall1(LHCALL_FLUSH_TLB
, 1);
742 static void lguest_pte_clear(struct mm_struct
*mm
, unsigned long addr
,
745 native_pte_clear(mm
, addr
, ptep
);
746 lguest_pte_update(mm
, addr
, ptep
);
749 static void lguest_pmd_clear(pmd_t
*pmdp
)
751 lguest_set_pmd(pmdp
, __pmd(0));
756 * Unfortunately for Lguest, the pv_mmu_ops for page tables were based on
757 * native page table operations. On native hardware you can set a new page
758 * table entry whenever you want, but if you want to remove one you have to do
759 * a TLB flush (a TLB is a little cache of page table entries kept by the CPU).
761 * So the lguest_set_pte_at() and lguest_set_pmd() functions above are only
762 * called when a valid entry is written, not when it's removed (ie. marked not
763 * present). Instead, this is where we come when the Guest wants to remove a
764 * page table entry: we tell the Host to set that entry to 0 (ie. the present
767 static void lguest_flush_tlb_single(unsigned long addr
)
769 /* Simply set it to zero: if it was not, it will fault back in. */
770 lazy_hcall3(LHCALL_SET_PTE
, current_cr3
, addr
, 0);
774 * This is what happens after the Guest has removed a large number of entries.
775 * This tells the Host that any of the page table entries for userspace might
776 * have changed, ie. virtual addresses below PAGE_OFFSET.
778 static void lguest_flush_tlb_user(void)
780 lazy_hcall1(LHCALL_FLUSH_TLB
, 0);
784 * This is called when the kernel page tables have changed. That's not very
785 * common (unless the Guest is using highmem, which makes the Guest extremely
786 * slow), so it's worth separating this from the user flushing above.
788 static void lguest_flush_tlb_kernel(void)
790 lazy_hcall1(LHCALL_FLUSH_TLB
, 1);
794 * The Unadvanced Programmable Interrupt Controller.
796 * This is an attempt to implement the simplest possible interrupt controller.
797 * I spent some time looking though routines like set_irq_chip_and_handler,
798 * set_irq_chip_and_handler_name, set_irq_chip_data and set_phasers_to_stun and
799 * I *think* this is as simple as it gets.
801 * We can tell the Host what interrupts we want blocked ready for using the
802 * lguest_data.interrupts bitmap, so disabling (aka "masking") them is as
803 * simple as setting a bit. We don't actually "ack" interrupts as such, we
804 * just mask and unmask them. I wonder if we should be cleverer?
806 static void disable_lguest_irq(struct irq_data
*data
)
808 set_bit(data
->irq
, lguest_data
.blocked_interrupts
);
811 static void enable_lguest_irq(struct irq_data
*data
)
813 clear_bit(data
->irq
, lguest_data
.blocked_interrupts
);
816 /* This structure describes the lguest IRQ controller. */
817 static struct irq_chip lguest_irq_controller
= {
819 .irq_mask
= disable_lguest_irq
,
820 .irq_mask_ack
= disable_lguest_irq
,
821 .irq_unmask
= enable_lguest_irq
,
825 * Interrupt descriptors are allocated as-needed, but low-numbered ones are
826 * reserved by the generic x86 code. So we ignore irq_alloc_desc_at if it
827 * tells us the irq is already used: other errors (ie. ENOMEM) we take
830 static int lguest_setup_irq(unsigned int irq
)
832 struct irq_desc
*desc
;
835 /* Returns -ve error or vector number. */
836 err
= irq_alloc_desc_at(irq
, 0);
837 if (err
< 0 && err
!= -EEXIST
)
841 * Tell the Linux infrastructure that the interrupt is
842 * controlled by our level-based lguest interrupt controller.
844 irq_set_chip_and_handler_name(irq
, &lguest_irq_controller
,
845 handle_level_irq
, "level");
847 /* Some systems map "vectors" to interrupts weirdly. Not us! */
848 desc
= irq_to_desc(irq
);
849 __this_cpu_write(vector_irq
[FIRST_EXTERNAL_VECTOR
+ irq
], desc
);
853 static int lguest_enable_irq(struct pci_dev
*dev
)
858 /* We literally use the PCI interrupt line as the irq number. */
859 pci_read_config_byte(dev
, PCI_INTERRUPT_LINE
, &line
);
860 err
= lguest_setup_irq(line
);
866 /* We don't do hotplug PCI, so this shouldn't be called. */
867 static void lguest_disable_irq(struct pci_dev
*dev
)
873 * This sets up the Interrupt Descriptor Table (IDT) entry for each hardware
874 * interrupt (except 128, which is used for system calls).
876 static void __init
lguest_init_IRQ(void)
880 for (i
= FIRST_EXTERNAL_VECTOR
; i
< FIRST_SYSTEM_VECTOR
; i
++) {
881 if (i
!= IA32_SYSCALL_VECTOR
)
882 set_intr_gate(i
, irq_entries_start
+
883 8 * (i
- FIRST_EXTERNAL_VECTOR
));
887 * This call is required to set up for 4k stacks, where we have
888 * separate stacks for hard and soft interrupts.
890 irq_ctx_init(smp_processor_id());
896 * It would be far better for everyone if the Guest had its own clock, but
897 * until then the Host gives us the time on every interrupt.
899 static void lguest_get_wallclock(struct timespec
*now
)
901 *now
= lguest_data
.time
;
905 * The TSC is an Intel thing called the Time Stamp Counter. The Host tells us
906 * what speed it runs at, or 0 if it's unusable as a reliable clock source.
907 * This matches what we want here: if we return 0 from this function, the x86
908 * TSC clock will give up and not register itself.
910 static unsigned long lguest_tsc_khz(void)
912 return lguest_data
.tsc_khz
;
916 * If we can't use the TSC, the kernel falls back to our lower-priority
917 * "lguest_clock", where we read the time value given to us by the Host.
919 static u64
lguest_clock_read(struct clocksource
*cs
)
921 unsigned long sec
, nsec
;
924 * Since the time is in two parts (seconds and nanoseconds), we risk
925 * reading it just as it's changing from 99 & 0.999999999 to 100 and 0,
926 * and getting 99 and 0. As Linux tends to come apart under the stress
927 * of time travel, we must be careful:
930 /* First we read the seconds part. */
931 sec
= lguest_data
.time
.tv_sec
;
933 * This read memory barrier tells the compiler and the CPU that
934 * this can't be reordered: we have to complete the above
938 /* Now we read the nanoseconds part. */
939 nsec
= lguest_data
.time
.tv_nsec
;
940 /* Make sure we've done that. */
942 /* Now if the seconds part has changed, try again. */
943 } while (unlikely(lguest_data
.time
.tv_sec
!= sec
));
945 /* Our lguest clock is in real nanoseconds. */
946 return sec
*1000000000ULL + nsec
;
949 /* This is the fallback clocksource: lower priority than the TSC clocksource. */
950 static struct clocksource lguest_clock
= {
953 .read
= lguest_clock_read
,
954 .mask
= CLOCKSOURCE_MASK(64),
955 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
959 * We also need a "struct clock_event_device": Linux asks us to set it to go
960 * off some time in the future. Actually, James Morris figured all this out, I
961 * just applied the patch.
963 static int lguest_clockevent_set_next_event(unsigned long delta
,
964 struct clock_event_device
*evt
)
966 /* FIXME: I don't think this can ever happen, but James tells me he had
967 * to put this code in. Maybe we should remove it now. Anyone? */
968 if (delta
< LG_CLOCK_MIN_DELTA
) {
969 if (printk_ratelimit())
970 printk(KERN_DEBUG
"%s: small delta %lu ns\n",
975 /* Please wake us this far in the future. */
976 hcall(LHCALL_SET_CLOCKEVENT
, delta
, 0, 0, 0);
980 static int lguest_clockevent_shutdown(struct clock_event_device
*evt
)
982 /* A 0 argument shuts the clock down. */
983 hcall(LHCALL_SET_CLOCKEVENT
, 0, 0, 0, 0);
987 /* This describes our primitive timer chip. */
988 static struct clock_event_device lguest_clockevent
= {
990 .features
= CLOCK_EVT_FEAT_ONESHOT
,
991 .set_next_event
= lguest_clockevent_set_next_event
,
992 .set_state_shutdown
= lguest_clockevent_shutdown
,
996 .min_delta_ns
= LG_CLOCK_MIN_DELTA
,
997 .min_delta_ticks
= LG_CLOCK_MIN_DELTA
,
998 .max_delta_ns
= LG_CLOCK_MAX_DELTA
,
999 .max_delta_ticks
= LG_CLOCK_MAX_DELTA
,
1003 * This is the Guest timer interrupt handler (hardware interrupt 0). We just
1004 * call the clockevent infrastructure and it does whatever needs doing.
1006 static void lguest_time_irq(struct irq_desc
*desc
)
1008 unsigned long flags
;
1010 /* Don't interrupt us while this is running. */
1011 local_irq_save(flags
);
1012 lguest_clockevent
.event_handler(&lguest_clockevent
);
1013 local_irq_restore(flags
);
1017 * At some point in the boot process, we get asked to set up our timing
1018 * infrastructure. The kernel doesn't expect timer interrupts before this, but
1019 * we cleverly initialized the "blocked_interrupts" field of "struct
1020 * lguest_data" so that timer interrupts were blocked until now.
1022 static void lguest_time_init(void)
1024 /* Set up the timer interrupt (0) to go to our simple timer routine */
1025 if (lguest_setup_irq(0) != 0)
1026 panic("Could not set up timer irq");
1027 irq_set_handler(0, lguest_time_irq
);
1029 clocksource_register_hz(&lguest_clock
, NSEC_PER_SEC
);
1031 /* We can't set cpumask in the initializer: damn C limitations! Set it
1032 * here and register our timer device. */
1033 lguest_clockevent
.cpumask
= cpumask_of(0);
1034 clockevents_register_device(&lguest_clockevent
);
1036 /* Finally, we unblock the timer interrupt. */
1037 clear_bit(0, lguest_data
.blocked_interrupts
);
1041 * Miscellaneous bits and pieces.
1043 * Here is an oddball collection of functions which the Guest needs for things
1044 * to work. They're pretty simple.
1048 * The Guest needs to tell the Host what stack it expects traps to use. For
1049 * native hardware, this is part of the Task State Segment mentioned above in
1050 * lguest_load_tr_desc(), but to help hypervisors there's this special call.
1052 * We tell the Host the segment we want to use (__KERNEL_DS is the kernel data
1053 * segment), the privilege level (we're privilege level 1, the Host is 0 and
1054 * will not tolerate us trying to use that), the stack pointer, and the number
1055 * of pages in the stack.
1057 static void lguest_load_sp0(struct tss_struct
*tss
,
1058 struct thread_struct
*thread
)
1060 lazy_hcall3(LHCALL_SET_STACK
, __KERNEL_DS
| 0x1, thread
->sp0
,
1061 THREAD_SIZE
/ PAGE_SIZE
);
1062 tss
->x86_tss
.sp0
= thread
->sp0
;
1065 /* Let's just say, I wouldn't do debugging under a Guest. */
1066 static unsigned long lguest_get_debugreg(int regno
)
1068 /* FIXME: Implement */
1072 static void lguest_set_debugreg(int regno
, unsigned long value
)
1074 /* FIXME: Implement */
1078 * There are times when the kernel wants to make sure that no memory writes are
1079 * caught in the cache (that they've all reached real hardware devices). This
1080 * doesn't matter for the Guest which has virtual hardware.
1082 * On the Pentium 4 and above, cpuid() indicates that the Cache Line Flush
1083 * (clflush) instruction is available and the kernel uses that. Otherwise, it
1084 * uses the older "Write Back and Invalidate Cache" (wbinvd) instruction.
1085 * Unlike clflush, wbinvd can only be run at privilege level 0. So we can
1086 * ignore clflush, but replace wbinvd.
1088 static void lguest_wbinvd(void)
1093 * If the Guest expects to have an Advanced Programmable Interrupt Controller,
1094 * we play dumb by ignoring writes and returning 0 for reads. So it's no
1095 * longer Programmable nor Controlling anything, and I don't think 8 lines of
1096 * code qualifies for Advanced. It will also never interrupt anything. It
1097 * does, however, allow us to get through the Linux boot code.
1099 #ifdef CONFIG_X86_LOCAL_APIC
1100 static void lguest_apic_write(u32 reg
, u32 v
)
1104 static u32
lguest_apic_read(u32 reg
)
1109 static u64
lguest_apic_icr_read(void)
1114 static void lguest_apic_icr_write(u32 low
, u32 id
)
1116 /* Warn to see if there's any stray references */
1120 static void lguest_apic_wait_icr_idle(void)
1125 static u32
lguest_apic_safe_wait_icr_idle(void)
1130 static void set_lguest_basic_apic_ops(void)
1132 apic
->read
= lguest_apic_read
;
1133 apic
->write
= lguest_apic_write
;
1134 apic
->icr_read
= lguest_apic_icr_read
;
1135 apic
->icr_write
= lguest_apic_icr_write
;
1136 apic
->wait_icr_idle
= lguest_apic_wait_icr_idle
;
1137 apic
->safe_wait_icr_idle
= lguest_apic_safe_wait_icr_idle
;
1141 /* STOP! Until an interrupt comes in. */
1142 static void lguest_safe_halt(void)
1144 hcall(LHCALL_HALT
, 0, 0, 0, 0);
1148 * The SHUTDOWN hypercall takes a string to describe what's happening, and
1149 * an argument which says whether this to restart (reboot) the Guest or not.
1151 * Note that the Host always prefers that the Guest speak in physical addresses
1152 * rather than virtual addresses, so we use __pa() here.
1154 static void lguest_power_off(void)
1156 hcall(LHCALL_SHUTDOWN
, __pa("Power down"),
1157 LGUEST_SHUTDOWN_POWEROFF
, 0, 0);
1163 * Don't. But if you did, this is what happens.
1165 static int lguest_panic(struct notifier_block
*nb
, unsigned long l
, void *p
)
1167 hcall(LHCALL_SHUTDOWN
, __pa(p
), LGUEST_SHUTDOWN_POWEROFF
, 0, 0);
1168 /* The hcall won't return, but to keep gcc happy, we're "done". */
1172 static struct notifier_block paniced
= {
1173 .notifier_call
= lguest_panic
1176 /* Setting up memory is fairly easy. */
1177 static __init
char *lguest_memory_setup(void)
1180 * The Linux bootloader header contains an "e820" memory map: the
1181 * Launcher populated the first entry with our memory limit.
1183 e820__range_add(boot_params
.e820_table
[0].addr
,
1184 boot_params
.e820_table
[0].size
,
1185 boot_params
.e820_table
[0].type
);
1187 /* This string is for the boot messages. */
1191 /* Offset within PCI config space of BAR access capability. */
1192 static int console_cfg_offset
= 0;
1193 static int console_access_cap
;
1195 /* Set up so that we access off in bar0 (on bus 0, device 1, function 0) */
1196 static void set_cfg_window(u32 cfg_offset
, u32 off
)
1198 write_pci_config_byte(0, 1, 0,
1199 cfg_offset
+ offsetof(struct virtio_pci_cap
, bar
),
1201 write_pci_config(0, 1, 0,
1202 cfg_offset
+ offsetof(struct virtio_pci_cap
, length
),
1204 write_pci_config(0, 1, 0,
1205 cfg_offset
+ offsetof(struct virtio_pci_cap
, offset
),
1209 static void write_bar_via_cfg(u32 cfg_offset
, u32 off
, u32 val
)
1212 * We could set this up once, then leave it; nothing else in the *
1213 * kernel should touch these registers. But if it went wrong, that
1214 * would be a horrible bug to find.
1216 set_cfg_window(cfg_offset
, off
);
1217 write_pci_config(0, 1, 0,
1218 cfg_offset
+ sizeof(struct virtio_pci_cap
), val
);
1221 static void probe_pci_console(void)
1223 u8 cap
, common_cap
= 0, device_cap
= 0;
1226 /* Avoid recursive printk into here. */
1227 console_cfg_offset
= -1;
1229 if (!early_pci_allowed()) {
1230 printk(KERN_ERR
"lguest: early PCI access not allowed!\n");
1234 /* We expect a console PCI device at BUS0, slot 1. */
1235 if (read_pci_config(0, 1, 0, 0) != 0x10431AF4) {
1236 printk(KERN_ERR
"lguest: PCI device is %#x!\n",
1237 read_pci_config(0, 1, 0, 0));
1241 /* Find the capabilities we need (must be in bar0) */
1242 cap
= read_pci_config_byte(0, 1, 0, PCI_CAPABILITY_LIST
);
1244 u8 vndr
= read_pci_config_byte(0, 1, 0, cap
);
1245 if (vndr
== PCI_CAP_ID_VNDR
) {
1248 type
= read_pci_config_byte(0, 1, 0,
1249 cap
+ offsetof(struct virtio_pci_cap
, cfg_type
));
1250 bar
= read_pci_config_byte(0, 1, 0,
1251 cap
+ offsetof(struct virtio_pci_cap
, bar
));
1254 case VIRTIO_PCI_CAP_DEVICE_CFG
:
1258 case VIRTIO_PCI_CAP_PCI_CFG
:
1259 console_access_cap
= cap
;
1263 cap
= read_pci_config_byte(0, 1, 0, cap
+ PCI_CAP_LIST_NEXT
);
1265 if (!device_cap
|| !console_access_cap
) {
1266 printk(KERN_ERR
"lguest: No caps (%u/%u/%u) in console!\n",
1267 common_cap
, device_cap
, console_access_cap
);
1272 * Note that we can't check features, until we've set the DRIVER
1273 * status bit. We don't want to do that until we have a real driver,
1274 * so we just check that the device-specific config has room for
1275 * emerg_wr. If it doesn't support VIRTIO_CONSOLE_F_EMERG_WRITE
1276 * it should ignore the access.
1278 device_len
= read_pci_config(0, 1, 0,
1279 device_cap
+ offsetof(struct virtio_pci_cap
, length
));
1280 if (device_len
< (offsetof(struct virtio_console_config
, emerg_wr
)
1282 printk(KERN_ERR
"lguest: console missing emerg_wr field\n");
1286 console_cfg_offset
= read_pci_config(0, 1, 0,
1287 device_cap
+ offsetof(struct virtio_pci_cap
, offset
));
1288 printk(KERN_INFO
"lguest: Console via virtio-pci emerg_wr\n");
1292 * We will eventually use the virtio console device to produce console output,
1293 * but before that is set up we use the virtio PCI console's backdoor mmio
1294 * access and the "emergency" write facility (which is legal even before the
1295 * device is configured).
1297 static __init
int early_put_chars(u32 vtermno
, const char *buf
, int count
)
1299 /* If we couldn't find PCI console, forget it. */
1300 if (console_cfg_offset
< 0)
1303 if (unlikely(!console_cfg_offset
)) {
1304 probe_pci_console();
1305 if (console_cfg_offset
< 0)
1309 write_bar_via_cfg(console_access_cap
,
1311 + offsetof(struct virtio_console_config
, emerg_wr
),
1317 * Rebooting also tells the Host we're finished, but the RESTART flag tells the
1318 * Launcher to reboot us.
1320 static void lguest_restart(char *reason
)
1322 hcall(LHCALL_SHUTDOWN
, __pa(reason
), LGUEST_SHUTDOWN_RESTART
, 0, 0);
1326 * Patching (Powerfully Placating Performance Pedants)
1328 * We have already seen that pv_ops structures let us replace simple native
1329 * instructions with calls to the appropriate back end all throughout the
1330 * kernel. This allows the same kernel to run as a Guest and as a native
1331 * kernel, but it's slow because of all the indirect branches.
1333 * Remember that David Wheeler quote about "Any problem in computer science can
1334 * be solved with another layer of indirection"? The rest of that quote is
1335 * "... But that usually will create another problem." This is the first of
1338 * Our current solution is to allow the paravirt back end to optionally patch
1339 * over the indirect calls to replace them with something more efficient. We
1340 * patch two of the simplest of the most commonly called functions: disable
1341 * interrupts and save interrupts. We usually have 6 or 10 bytes to patch
1342 * into: the Guest versions of these operations are small enough that we can
1345 * First we need assembly templates of each of the patchable Guest operations,
1346 * and these are in head_32.S.
1349 /*G:060 We construct a table from the assembler templates: */
1350 static const struct lguest_insns
1352 const char *start
, *end
;
1353 } lguest_insns
[] = {
1354 [PARAVIRT_PATCH(pv_irq_ops
.irq_disable
)] = { lgstart_cli
, lgend_cli
},
1355 [PARAVIRT_PATCH(pv_irq_ops
.save_fl
)] = { lgstart_pushf
, lgend_pushf
},
1359 * Now our patch routine is fairly simple (based on the native one in
1360 * paravirt.c). If we have a replacement, we copy it in and return how much of
1361 * the available space we used.
1363 static unsigned lguest_patch(u8 type
, u16 clobber
, void *ibuf
,
1364 unsigned long addr
, unsigned len
)
1366 unsigned int insn_len
;
1368 /* Don't do anything special if we don't have a replacement */
1369 if (type
>= ARRAY_SIZE(lguest_insns
) || !lguest_insns
[type
].start
)
1370 return paravirt_patch_default(type
, clobber
, ibuf
, addr
, len
);
1372 insn_len
= lguest_insns
[type
].end
- lguest_insns
[type
].start
;
1374 /* Similarly if it can't fit (doesn't happen, but let's be thorough). */
1376 return paravirt_patch_default(type
, clobber
, ibuf
, addr
, len
);
1378 /* Copy in our instructions. */
1379 memcpy(ibuf
, lguest_insns
[type
].start
, insn_len
);
1384 * Once we get to lguest_init(), we know we're a Guest. The various
1385 * pv_ops structures in the kernel provide points for (almost) every routine we
1386 * have to override to avoid privileged instructions.
1388 __init
void lguest_init(void)
1390 /* We're under lguest. */
1391 pv_info
.name
= "lguest";
1392 /* We're running at privilege level 1, not 0 as normal. */
1393 pv_info
.kernel_rpl
= 1;
1394 /* Everyone except Xen runs with this set. */
1395 pv_info
.shared_kernel_pmd
= 1;
1398 * We set up all the lguest overrides for sensitive operations. These
1399 * are detailed with the operations themselves.
1402 /* Interrupt-related operations */
1403 pv_irq_ops
.save_fl
= PV_CALLEE_SAVE(lguest_save_fl
);
1404 pv_irq_ops
.restore_fl
= __PV_IS_CALLEE_SAVE(lg_restore_fl
);
1405 pv_irq_ops
.irq_disable
= PV_CALLEE_SAVE(lguest_irq_disable
);
1406 pv_irq_ops
.irq_enable
= __PV_IS_CALLEE_SAVE(lg_irq_enable
);
1407 pv_irq_ops
.safe_halt
= lguest_safe_halt
;
1409 /* Setup operations */
1410 pv_init_ops
.patch
= lguest_patch
;
1412 /* Intercepts of various CPU instructions */
1413 pv_cpu_ops
.load_gdt
= lguest_load_gdt
;
1414 pv_cpu_ops
.cpuid
= lguest_cpuid
;
1415 pv_cpu_ops
.load_idt
= lguest_load_idt
;
1416 pv_cpu_ops
.iret
= lguest_iret
;
1417 pv_cpu_ops
.load_sp0
= lguest_load_sp0
;
1418 pv_cpu_ops
.load_tr_desc
= lguest_load_tr_desc
;
1419 pv_cpu_ops
.set_ldt
= lguest_set_ldt
;
1420 pv_cpu_ops
.load_tls
= lguest_load_tls
;
1421 pv_cpu_ops
.get_debugreg
= lguest_get_debugreg
;
1422 pv_cpu_ops
.set_debugreg
= lguest_set_debugreg
;
1423 pv_cpu_ops
.read_cr0
= lguest_read_cr0
;
1424 pv_cpu_ops
.write_cr0
= lguest_write_cr0
;
1425 pv_cpu_ops
.read_cr4
= lguest_read_cr4
;
1426 pv_cpu_ops
.write_cr4
= lguest_write_cr4
;
1427 pv_cpu_ops
.write_gdt_entry
= lguest_write_gdt_entry
;
1428 pv_cpu_ops
.write_idt_entry
= lguest_write_idt_entry
;
1429 pv_cpu_ops
.wbinvd
= lguest_wbinvd
;
1430 pv_cpu_ops
.start_context_switch
= paravirt_start_context_switch
;
1431 pv_cpu_ops
.end_context_switch
= lguest_end_context_switch
;
1433 /* Pagetable management */
1434 pv_mmu_ops
.write_cr3
= lguest_write_cr3
;
1435 pv_mmu_ops
.flush_tlb_user
= lguest_flush_tlb_user
;
1436 pv_mmu_ops
.flush_tlb_single
= lguest_flush_tlb_single
;
1437 pv_mmu_ops
.flush_tlb_kernel
= lguest_flush_tlb_kernel
;
1438 pv_mmu_ops
.set_pte
= lguest_set_pte
;
1439 pv_mmu_ops
.set_pte_at
= lguest_set_pte_at
;
1440 pv_mmu_ops
.set_pmd
= lguest_set_pmd
;
1441 #ifdef CONFIG_X86_PAE
1442 pv_mmu_ops
.set_pte_atomic
= lguest_set_pte_atomic
;
1443 pv_mmu_ops
.pte_clear
= lguest_pte_clear
;
1444 pv_mmu_ops
.pmd_clear
= lguest_pmd_clear
;
1445 pv_mmu_ops
.set_pud
= lguest_set_pud
;
1447 pv_mmu_ops
.read_cr2
= lguest_read_cr2
;
1448 pv_mmu_ops
.read_cr3
= lguest_read_cr3
;
1449 pv_mmu_ops
.lazy_mode
.enter
= paravirt_enter_lazy_mmu
;
1450 pv_mmu_ops
.lazy_mode
.leave
= lguest_leave_lazy_mmu_mode
;
1451 pv_mmu_ops
.lazy_mode
.flush
= paravirt_flush_lazy_mmu
;
1452 pv_mmu_ops
.pte_update
= lguest_pte_update
;
1454 #ifdef CONFIG_X86_LOCAL_APIC
1455 /* APIC read/write intercepts */
1456 set_lguest_basic_apic_ops();
1459 x86_init
.resources
.memory_setup
= lguest_memory_setup
;
1460 x86_init
.irqs
.intr_init
= lguest_init_IRQ
;
1461 x86_init
.timers
.timer_init
= lguest_time_init
;
1462 x86_platform
.calibrate_tsc
= lguest_tsc_khz
;
1463 x86_platform
.get_wallclock
= lguest_get_wallclock
;
1466 * Now is a good time to look at the implementations of these functions
1467 * before returning to the rest of lguest_init().
1471 * Now we've seen all the paravirt_ops, we return to
1472 * lguest_init() where the rest of the fairly chaotic boot setup
1477 * The stack protector is a weird thing where gcc places a canary
1478 * value on the stack and then checks it on return. This file is
1479 * compiled with -fno-stack-protector it, so we got this far without
1480 * problems. The value of the canary is kept at offset 20 from the
1481 * %gs register, so we need to set that up before calling C functions
1484 setup_stack_canary_segment(0);
1487 * We could just call load_stack_canary_segment(), but we might as well
1488 * call switch_to_new_gdt() which loads the whole table and sets up the
1489 * per-cpu segment descriptor register %fs as well.
1491 switch_to_new_gdt(0);
1494 * The Host<->Guest Switcher lives at the top of our address space, and
1495 * the Host told us how big it is when we made LGUEST_INIT hypercall:
1496 * it put the answer in lguest_data.reserve_mem
1498 reserve_top_address(lguest_data
.reserve_mem
);
1500 /* Hook in our special panic hypercall code. */
1501 atomic_notifier_chain_register(&panic_notifier_list
, &paniced
);
1504 * This is messy CPU setup stuff which the native boot code does before
1505 * start_kernel, so we have to do, too:
1507 cpu_detect(&new_cpu_data
);
1508 /* head.S usually sets up the first capability word, so do it here. */
1509 new_cpu_data
.x86_capability
[CPUID_1_EDX
] = cpuid_edx(1);
1511 /* Math is always hard! */
1512 set_cpu_cap(&new_cpu_data
, X86_FEATURE_FPU
);
1514 /* We don't have features. We have puppies! Puppies! */
1515 #ifdef CONFIG_X86_MCE
1516 mca_cfg
.disabled
= true;
1523 * We set the preferred console to "hvc". This is the "hypervisor
1524 * virtual console" driver written by the PowerPC people, which we also
1525 * adapted for lguest's use.
1527 add_preferred_console("hvc", 0, NULL
);
1529 /* Register our very early console. */
1530 virtio_cons_early_init(early_put_chars
);
1532 /* Don't let ACPI try to control our PCI interrupts. */
1535 /* We control them ourselves, by overriding these two hooks. */
1536 pcibios_enable_irq
= lguest_enable_irq
;
1537 pcibios_disable_irq
= lguest_disable_irq
;
1540 * Last of all, we set the power management poweroff hook to point to
1541 * the Guest routine to power off, and the reboot hook to our restart
1544 pm_power_off
= lguest_power_off
;
1545 machine_ops
.restart
= lguest_restart
;
1548 * Now we're set up, call i386_start_kernel() in head32.c and we proceed
1549 * to boot as normal. It never returns.
1551 i386_start_kernel();
1554 * This marks the end of stage II of our journey, The Guest.
1556 * It is now time for us to explore the layer of virtual drivers and complete
1557 * our understanding of the Guest in "make Drivers".