| blob | d9dfde9aa757aad51dff8d264b7d43b1170028c5 |
1 /**************************************************************************
2 *
3 * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
28 #ifndef __VMWGFX_DRM_H__
29 #define __VMWGFX_DRM_H__
33 #if defined(__cplusplus)
35 #endif
37 #define DRM_VMW_MAX_SURFACE_FACES 6
38 #define DRM_VMW_MAX_MIP_LEVELS 24
41 #define DRM_VMW_GET_PARAM 0
42 #define DRM_VMW_ALLOC_DMABUF 1
43 #define DRM_VMW_UNREF_DMABUF 2
44 #define DRM_VMW_HANDLE_CLOSE 2
45 #define DRM_VMW_CURSOR_BYPASS 3
46 /* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/
47 #define DRM_VMW_CONTROL_STREAM 4
48 #define DRM_VMW_CLAIM_STREAM 5
49 #define DRM_VMW_UNREF_STREAM 6
50 /* guarded by DRM_VMW_PARAM_3D == 1 */
51 #define DRM_VMW_CREATE_CONTEXT 7
52 #define DRM_VMW_UNREF_CONTEXT 8
53 #define DRM_VMW_CREATE_SURFACE 9
54 #define DRM_VMW_UNREF_SURFACE 10
55 #define DRM_VMW_REF_SURFACE 11
56 #define DRM_VMW_EXECBUF 12
57 #define DRM_VMW_GET_3D_CAP 13
58 #define DRM_VMW_FENCE_WAIT 14
59 #define DRM_VMW_FENCE_SIGNALED 15
60 #define DRM_VMW_FENCE_UNREF 16
61 #define DRM_VMW_FENCE_EVENT 17
62 #define DRM_VMW_PRESENT 18
63 #define DRM_VMW_PRESENT_READBACK 19
64 #define DRM_VMW_UPDATE_LAYOUT 20
65 #define DRM_VMW_CREATE_SHADER 21
66 #define DRM_VMW_UNREF_SHADER 22
67 #define DRM_VMW_GB_SURFACE_CREATE 23
68 #define DRM_VMW_GB_SURFACE_REF 24
69 #define DRM_VMW_SYNCCPU 25
70 #define DRM_VMW_CREATE_EXTENDED_CONTEXT 26
72 /*************************************************************************/
73 /**
74 * DRM_VMW_GET_PARAM - get device information.
75 *
76 * DRM_VMW_PARAM_FIFO_OFFSET:
77 * Offset to use to map the first page of the FIFO read-only.
78 * The fifo is mapped using the mmap() system call on the drm device.
79 *
80 * DRM_VMW_PARAM_OVERLAY_IOCTL:
81 * Does the driver support the overlay ioctl.
82 */
84 #define DRM_VMW_PARAM_NUM_STREAMS 0
85 #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
86 #define DRM_VMW_PARAM_3D 2
87 #define DRM_VMW_PARAM_HW_CAPS 3
88 #define DRM_VMW_PARAM_FIFO_CAPS 4
89 #define DRM_VMW_PARAM_MAX_FB_SIZE 5
90 #define DRM_VMW_PARAM_FIFO_HW_VERSION 6
91 #define DRM_VMW_PARAM_MAX_SURF_MEMORY 7
92 #define DRM_VMW_PARAM_3D_CAPS_SIZE 8
93 #define DRM_VMW_PARAM_MAX_MOB_MEMORY 9
94 #define DRM_VMW_PARAM_MAX_MOB_SIZE 10
95 #define DRM_VMW_PARAM_SCREEN_TARGET 11
96 #define DRM_VMW_PARAM_DX 12
98 /**
99 * enum drm_vmw_handle_type - handle type for ref ioctls
100 *
101 */
105 };
107 /**
108 * struct drm_vmw_getparam_arg
109 *
110 * @value: Returned value. //Out
111 * @param: Parameter to query. //In.
112 *
113 * Argument to the DRM_VMW_GET_PARAM Ioctl.
114 */
117 __u64 value;
118 __u32 param;
119 __u32 pad64;
120 };
122 /*************************************************************************/
123 /**
124 * DRM_VMW_CREATE_CONTEXT - Create a host context.
125 *
126 * Allocates a device unique context id, and queues a create context command
127 * for the host. Does not wait for host completion.
128 */
130 /**
131 * struct drm_vmw_context_arg
132 *
133 * @cid: Device unique context ID.
134 *
135 * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
136 * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
137 */
140 __s32 cid;
141 __u32 pad64;
142 };
144 /*************************************************************************/
145 /**
146 * DRM_VMW_UNREF_CONTEXT - Create a host context.
147 *
148 * Frees a global context id, and queues a destroy host command for the host.
149 * Does not wait for host completion. The context ID can be used directly
150 * in the command stream and shows up as the same context ID on the host.
151 */
153 /*************************************************************************/
154 /**
155 * DRM_VMW_CREATE_SURFACE - Create a host suface.
156 *
157 * Allocates a device unique surface id, and queues a create surface command
158 * for the host. Does not wait for host completion. The surface ID can be
159 * used directly in the command stream and shows up as the same surface
160 * ID on the host.
161 */
163 /**
164 * struct drm_wmv_surface_create_req
165 *
166 * @flags: Surface flags as understood by the host.
167 * @format: Surface format as understood by the host.
168 * @mip_levels: Number of mip levels for each face.
169 * An unused face should have 0 encoded.
170 * @size_addr: Address of a user-space array of sruct drm_vmw_size
171 * cast to an __u64 for 32-64 bit compatibility.
172 * The size of the array should equal the total number of mipmap levels.
173 * @shareable: Boolean whether other clients (as identified by file descriptors)
174 * may reference this surface.
175 * @scanout: Boolean whether the surface is intended to be used as a
176 * scanout.
177 *
178 * Input data to the DRM_VMW_CREATE_SURFACE Ioctl.
179 * Output data from the DRM_VMW_REF_SURFACE Ioctl.
180 */
183 __u32 flags;
184 __u32 format;
186 __u64 size_addr;
187 __s32 shareable;
188 __s32 scanout;
189 };
191 /**
192 * struct drm_wmv_surface_arg
193 *
194 * @sid: Surface id of created surface or surface to destroy or reference.
195 * @handle_type: Handle type for DRM_VMW_REF_SURFACE Ioctl.
196 *
197 * Output data from the DRM_VMW_CREATE_SURFACE Ioctl.
198 * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl.
199 * Input argument to the DRM_VMW_REF_SURFACE Ioctl.
200 */
203 __s32 sid;
205 };
207 /**
208 * struct drm_vmw_size ioctl.
209 *
210 * @width - mip level width
211 * @height - mip level height
212 * @depth - mip level depth
213 *
214 * Description of a mip level.
215 * Input data to the DRM_WMW_CREATE_SURFACE Ioctl.
216 */
219 __u32 width;
220 __u32 height;
221 __u32 depth;
222 __u32 pad64;
223 };
225 /**
226 * union drm_vmw_surface_create_arg
227 *
228 * @rep: Output data as described above.
229 * @req: Input data as described above.
230 *
231 * Argument to the DRM_VMW_CREATE_SURFACE Ioctl.
232 */
237 };
239 /*************************************************************************/
240 /**
241 * DRM_VMW_REF_SURFACE - Reference a host surface.
242 *
243 * Puts a reference on a host surface with a give sid, as previously
244 * returned by the DRM_VMW_CREATE_SURFACE ioctl.
245 * A reference will make sure the surface isn't destroyed while we hold
246 * it and will allow the calling client to use the surface ID in the command
247 * stream.
248 *
249 * On successful return, the Ioctl returns the surface information given
250 * in the DRM_VMW_CREATE_SURFACE ioctl.
251 */
253 /**
254 * union drm_vmw_surface_reference_arg
255 *
256 * @rep: Output data as described above.
257 * @req: Input data as described above.
258 *
259 * Argument to the DRM_VMW_REF_SURFACE Ioctl.
260 */
265 };
267 /*************************************************************************/
268 /**
269 * DRM_VMW_UNREF_SURFACE - Unreference a host surface.
270 *
271 * Clear a reference previously put on a host surface.
272 * When all references are gone, including the one implicitly placed
273 * on creation,
274 * a destroy surface command will be queued for the host.
275 * Does not wait for completion.
276 */
278 /*************************************************************************/
279 /**
280 * DRM_VMW_EXECBUF
281 *
282 * Submit a command buffer for execution on the host, and return a
283 * fence seqno that when signaled, indicates that the command buffer has
284 * executed.
285 */
287 /**
288 * struct drm_vmw_execbuf_arg
289 *
290 * @commands: User-space address of a command buffer cast to an __u64.
291 * @command-size: Size in bytes of the command buffer.
292 * @throttle-us: Sleep until software is less than @throttle_us
293 * microseconds ahead of hardware. The driver may round this value
294 * to the nearest kernel tick.
295 * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
296 * __u64.
297 * @version: Allows expanding the execbuf ioctl parameters without breaking
298 * backwards compatibility, since user-space will always tell the kernel
299 * which version it uses.
300 * @flags: Execbuf flags. None currently.
301 *
302 * Argument to the DRM_VMW_EXECBUF Ioctl.
303 */
305 #define DRM_VMW_EXECBUF_VERSION 2
308 __u64 commands;
309 __u32 command_size;
310 __u32 throttle_us;
311 __u64 fence_rep;
312 __u32 version;
313 __u32 flags;
314 __u32 context_handle;
315 __u32 pad64;
316 };
318 /**
319 * struct drm_vmw_fence_rep
320 *
321 * @handle: Fence object handle for fence associated with a command submission.
322 * @mask: Fence flags relevant for this fence object.
323 * @seqno: Fence sequence number in fifo. A fence object with a lower
324 * seqno will signal the EXEC flag before a fence object with a higher
325 * seqno. This can be used by user-space to avoid kernel calls to determine
326 * whether a fence has signaled the EXEC flag. Note that @seqno will
327 * wrap at 32-bit.
328 * @passed_seqno: The highest seqno number processed by the hardware
329 * so far. This can be used to mark user-space fence objects as signaled, and
330 * to determine whether a fence seqno might be stale.
331 * @error: This member should've been set to -EFAULT on submission.
332 * The following actions should be take on completion:
333 * error == -EFAULT: Fence communication failed. The host is synchronized.
334 * Use the last fence id read from the FIFO fence register.
335 * error != 0 && error != -EFAULT:
336 * Fence submission failed. The host is synchronized. Use the fence_seq member.
337 * error == 0: All is OK, The host may not be synchronized.
338 * Use the fence_seq member.
339 *
340 * Input / Output data to the DRM_VMW_EXECBUF Ioctl.
341 */
344 __u32 handle;
345 __u32 mask;
346 __u32 seqno;
347 __u32 passed_seqno;
348 __u32 pad64;
349 __s32 error;
350 };
352 /*************************************************************************/
353 /**
354 * DRM_VMW_ALLOC_DMABUF
355 *
356 * Allocate a DMA buffer that is visible also to the host.
357 * NOTE: The buffer is
358 * identified by a handle and an offset, which are private to the guest, but
359 * useable in the command stream. The guest kernel may translate these
360 * and patch up the command stream accordingly. In the future, the offset may
361 * be zero at all times, or it may disappear from the interface before it is
362 * fixed.
363 *
364 * The DMA buffer may stay user-space mapped in the guest at all times,
365 * and is thus suitable for sub-allocation.
366 *
367 * DMA buffers are mapped using the mmap() syscall on the drm device.
368 */
370 /**
371 * struct drm_vmw_alloc_dmabuf_req
372 *
373 * @size: Required minimum size of the buffer.
374 *
375 * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl.
376 */
379 __u32 size;
380 __u32 pad64;
381 };
383 /**
384 * struct drm_vmw_dmabuf_rep
385 *
386 * @map_handle: Offset to use in the mmap() call used to map the buffer.
387 * @handle: Handle unique to this buffer. Used for unreferencing.
388 * @cur_gmr_id: GMR id to use in the command stream when this buffer is
389 * referenced. See not above.
390 * @cur_gmr_offset: Offset to use in the command stream when this buffer is
391 * referenced. See note above.
392 *
393 * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl.
394 */
397 __u64 map_handle;
398 __u32 handle;
399 __u32 cur_gmr_id;
400 __u32 cur_gmr_offset;
401 __u32 pad64;
402 };
404 /**
405 * union drm_vmw_dmabuf_arg
406 *
407 * @req: Input data as described above.
408 * @rep: Output data as described above.
409 *
410 * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl.
411 */
416 };
418 /*************************************************************************/
419 /**
420 * DRM_VMW_UNREF_DMABUF - Free a DMA buffer.
421 *
422 */
424 /**
425 * struct drm_vmw_unref_dmabuf_arg
426 *
427 * @handle: Handle indicating what buffer to free. Obtained from the
428 * DRM_VMW_ALLOC_DMABUF Ioctl.
429 *
430 * Argument to the DRM_VMW_UNREF_DMABUF Ioctl.
431 */
434 __u32 handle;
435 __u32 pad64;
436 };
438 /*************************************************************************/
439 /**
440 * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams.
441 *
442 * This IOCTL controls the overlay units of the svga device.
443 * The SVGA overlay units does not work like regular hardware units in
444 * that they do not automaticaly read back the contents of the given dma
445 * buffer. But instead only read back for each call to this ioctl, and
446 * at any point between this call being made and a following call that
447 * either changes the buffer or disables the stream.
448 */
450 /**
451 * struct drm_vmw_rect
452 *
453 * Defines a rectangle. Used in the overlay ioctl to define
454 * source and destination rectangle.
455 */
458 __s32 x;
459 __s32 y;
460 __u32 w;
461 __u32 h;
462 };
464 /**
465 * struct drm_vmw_control_stream_arg
466 *
467 * @stream_id: Stearm to control
468 * @enabled: If false all following arguments are ignored.
469 * @handle: Handle to buffer for getting data from.
470 * @format: Format of the overlay as understood by the host.
471 * @width: Width of the overlay.
472 * @height: Height of the overlay.
473 * @size: Size of the overlay in bytes.
474 * @pitch: Array of pitches, the two last are only used for YUV12 formats.
475 * @offset: Offset from start of dma buffer to overlay.
476 * @src: Source rect, must be within the defined area above.
477 * @dst: Destination rect, x and y may be negative.
478 *
479 * Argument to the DRM_VMW_CONTROL_STREAM Ioctl.
480 */
483 __u32 stream_id;
484 __u32 enabled;
486 __u32 flags;
487 __u32 color_key;
489 __u32 handle;
490 __u32 offset;
491 __s32 format;
492 __u32 size;
493 __u32 width;
494 __u32 height;
497 __u32 pad64;
500 };
502 /*************************************************************************/
503 /**
504 * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass.
505 *
506 */
508 #define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0)
509 #define DRM_VMW_CURSOR_BYPASS_FLAGS (1)
511 /**
512 * struct drm_vmw_cursor_bypass_arg
513 *
514 * @flags: Flags.
515 * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed.
516 * @xpos: X position of cursor.
517 * @ypos: Y position of cursor.
518 * @xhot: X hotspot.
519 * @yhot: Y hotspot.
520 *
521 * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl.
522 */
525 __u32 flags;
526 __u32 crtc_id;
527 __s32 xpos;
528 __s32 ypos;
529 __s32 xhot;
530 __s32 yhot;
531 };
533 /*************************************************************************/
534 /**
535 * DRM_VMW_CLAIM_STREAM - Claim a single stream.
536 */
538 /**
539 * struct drm_vmw_context_arg
540 *
541 * @stream_id: Device unique context ID.
542 *
543 * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
544 * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
545 */
548 __u32 stream_id;
549 __u32 pad64;
550 };
552 /*************************************************************************/
553 /**
554 * DRM_VMW_UNREF_STREAM - Unclaim a stream.
555 *
556 * Return a single stream that was claimed by this process. Also makes
557 * sure that the stream has been stopped.
558 */
560 /*************************************************************************/
561 /**
562 * DRM_VMW_GET_3D_CAP
563 *
564 * Read 3D capabilities from the FIFO
565 *
566 */
568 /**
569 * struct drm_vmw_get_3d_cap_arg
570 *
571 * @buffer: Pointer to a buffer for capability data, cast to an __u64
572 * @size: Max size to copy
573 *
574 * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL
575 * ioctls.
576 */
579 __u64 buffer;
580 __u32 max_size;
581 __u32 pad64;
582 };
584 /*************************************************************************/
585 /**
586 * DRM_VMW_FENCE_WAIT
587 *
588 * Waits for a fence object to signal. The wait is interruptible, so that
589 * signals may be delivered during the interrupt. The wait may timeout,
590 * in which case the calls returns -EBUSY. If the wait is restarted,
591 * that is restarting without resetting @cookie_valid to zero,
592 * the timeout is computed from the first call.
593 *
594 * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait
595 * on:
596 * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command
597 * stream
598 * have executed.
599 * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish
600 * commands
601 * in the buffer given to the EXECBUF ioctl returning the fence object handle
602 * are available to user-space.
603 *
604 * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the
605 * fenc wait ioctl returns 0, the fence object has been unreferenced after
606 * the wait.
607 */
609 #define DRM_VMW_FENCE_FLAG_EXEC (1 << 0)
610 #define DRM_VMW_FENCE_FLAG_QUERY (1 << 1)
612 #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0)
614 /**
615 * struct drm_vmw_fence_wait_arg
616 *
617 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
618 * @cookie_valid: Must be reset to 0 on first call. Left alone on restart.
619 * @kernel_cookie: Set to 0 on first call. Left alone on restart.
620 * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout.
621 * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick
622 * before returning.
623 * @flags: Fence flags to wait on.
624 * @wait_options: Options that control the behaviour of the wait ioctl.
625 *
626 * Input argument to the DRM_VMW_FENCE_WAIT ioctl.
627 */
630 __u32 handle;
631 __s32 cookie_valid;
632 __u64 kernel_cookie;
633 __u64 timeout_us;
634 __s32 lazy;
635 __s32 flags;
636 __s32 wait_options;
637 __s32 pad64;
638 };
640 /*************************************************************************/
641 /**
642 * DRM_VMW_FENCE_SIGNALED
643 *
644 * Checks if a fence object is signaled..
645 */
647 /**
648 * struct drm_vmw_fence_signaled_arg
649 *
650 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
651 * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl
652 * @signaled: Out: Flags signaled.
653 * @sequence: Out: Highest sequence passed so far. Can be used to signal the
654 * EXEC flag of user-space fence objects.
655 *
656 * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF
657 * ioctls.
658 */
661 __u32 handle;
662 __u32 flags;
663 __s32 signaled;
664 __u32 passed_seqno;
665 __u32 signaled_flags;
666 __u32 pad64;
667 };
669 /*************************************************************************/
670 /**
671 * DRM_VMW_FENCE_UNREF
672 *
673 * Unreferences a fence object, and causes it to be destroyed if there are no
674 * other references to it.
675 *
676 */
678 /**
679 * struct drm_vmw_fence_arg
680 *
681 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
682 *
683 * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl..
684 */
687 __u32 handle;
688 __u32 pad64;
689 };
692 /*************************************************************************/
693 /**
694 * DRM_VMW_FENCE_EVENT
695 *
696 * Queues an event on a fence to be delivered on the drm character device
697 * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag.
698 * Optionally the approximate time when the fence signaled is
699 * given by the event.
700 */
702 /*
703 * The event type
704 */
705 #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000
709 __u64 user_data;
710 __u32 tv_sec;
711 __u32 tv_usec;
712 };
714 /*
715 * Flags that may be given to the command.
716 */
717 /* Request fence signaled time on the event. */
718 #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0)
720 /**
721 * struct drm_vmw_fence_event_arg
722 *
723 * @fence_rep: Pointer to fence_rep structure cast to __u64 or 0 if
724 * the fence is not supposed to be referenced by user-space.
725 * @user_info: Info to be delivered with the event.
726 * @handle: Attach the event to this fence only.
727 * @flags: A set of flags as defined above.
728 */
730 __u64 fence_rep;
731 __u64 user_data;
732 __u32 handle;
733 __u32 flags;
734 };
737 /*************************************************************************/
738 /**
739 * DRM_VMW_PRESENT
740 *
741 * Executes an SVGA present on a given fb for a given surface. The surface
742 * is placed on the framebuffer. Cliprects are given relative to the given
743 * point (the point disignated by dest_{x|y}).
744 *
745 */
747 /**
748 * struct drm_vmw_present_arg
749 * @fb_id: framebuffer id to present / read back from.
750 * @sid: Surface id to present from.
751 * @dest_x: X placement coordinate for surface.
752 * @dest_y: Y placement coordinate for surface.
753 * @clips_ptr: Pointer to an array of clip rects cast to an __u64.
754 * @num_clips: Number of cliprects given relative to the framebuffer origin,
755 * in the same coordinate space as the frame buffer.
756 * @pad64: Unused 64-bit padding.
757 *
758 * Input argument to the DRM_VMW_PRESENT ioctl.
759 */
762 __u32 fb_id;
763 __u32 sid;
764 __s32 dest_x;
765 __s32 dest_y;
766 __u64 clips_ptr;
767 __u32 num_clips;
768 __u32 pad64;
769 };
772 /*************************************************************************/
773 /**
774 * DRM_VMW_PRESENT_READBACK
775 *
776 * Executes an SVGA present readback from a given fb to the dma buffer
777 * currently bound as the fb. If there is no dma buffer bound to the fb,
778 * an error will be returned.
779 *
780 */
782 /**
783 * struct drm_vmw_present_arg
784 * @fb_id: fb_id to present / read back from.
785 * @num_clips: Number of cliprects.
786 * @clips_ptr: Pointer to an array of clip rects cast to an __u64.
787 * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an __u64.
788 * If this member is NULL, then the ioctl should not return a fence.
789 */
792 __u32 fb_id;
793 __u32 num_clips;
794 __u64 clips_ptr;
795 __u64 fence_rep;
796 };
798 /*************************************************************************/
799 /**
800 * DRM_VMW_UPDATE_LAYOUT - Update layout
801 *
802 * Updates the preferred modes and connection status for connectors. The
803 * command consists of one drm_vmw_update_layout_arg pointing to an array
804 * of num_outputs drm_vmw_rect's.
805 */
807 /**
808 * struct drm_vmw_update_layout_arg
809 *
810 * @num_outputs: number of active connectors
811 * @rects: pointer to array of drm_vmw_rect cast to an __u64
812 *
813 * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl.
814 */
816 __u32 num_outputs;
817 __u32 pad64;
818 __u64 rects;
819 };
822 /*************************************************************************/
823 /**
824 * DRM_VMW_CREATE_SHADER - Create shader
825 *
826 * Creates a shader and optionally binds it to a dma buffer containing
827 * the shader byte-code.
828 */
830 /**
831 * enum drm_vmw_shader_type - Shader types
832 */
835 drm_vmw_shader_type_ps,
836 };
839 /**
840 * struct drm_vmw_shader_create_arg
841 *
842 * @shader_type: Shader type of the shader to create.
843 * @size: Size of the byte-code in bytes.
844 * where the shader byte-code starts
845 * @buffer_handle: Buffer handle identifying the buffer containing the
846 * shader byte-code
847 * @shader_handle: On successful completion contains a handle that
848 * can be used to subsequently identify the shader.
849 * @offset: Offset in bytes into the buffer given by @buffer_handle,
850 *
851 * Input / Output argument to the DRM_VMW_CREATE_SHADER Ioctl.
852 */
855 __u32 size;
856 __u32 buffer_handle;
857 __u32 shader_handle;
858 __u64 offset;
859 };
861 /*************************************************************************/
862 /**
863 * DRM_VMW_UNREF_SHADER - Unreferences a shader
864 *
865 * Destroys a user-space reference to a shader, optionally destroying
866 * it.
867 */
869 /**
870 * struct drm_vmw_shader_arg
871 *
872 * @handle: Handle identifying the shader to destroy.
873 *
874 * Input argument to the DRM_VMW_UNREF_SHADER ioctl.
875 */
877 __u32 handle;
878 __u32 pad64;
879 };
881 /*************************************************************************/
882 /**
883 * DRM_VMW_GB_SURFACE_CREATE - Create a host guest-backed surface.
884 *
885 * Allocates a surface handle and queues a create surface command
886 * for the host on the first use of the surface. The surface ID can
887 * be used as the surface ID in commands referencing the surface.
888 */
890 /**
891 * enum drm_vmw_surface_flags
892 *
893 * @drm_vmw_surface_flag_shareable: Whether the surface is shareable
894 * @drm_vmw_surface_flag_scanout: Whether the surface is a scanout
895 * surface.
896 * @drm_vmw_surface_flag_create_buffer: Create a backup buffer if none is
897 * given.
898 */
903 };
905 /**
906 * struct drm_vmw_gb_surface_create_req
907 *
908 * @svga3d_flags: SVGA3d surface flags for the device.
909 * @format: SVGA3d format.
910 * @mip_level: Number of mip levels for all faces.
911 * @drm_surface_flags Flags as described above.
912 * @multisample_count Future use. Set to 0.
913 * @autogen_filter Future use. Set to 0.
914 * @buffer_handle Buffer handle of backup buffer. SVGA3D_INVALID_ID
915 * if none.
916 * @base_size Size of the base mip level for all faces.
917 * @array_size Must be zero for non-DX hardware, and if non-zero
918 * svga3d_flags must have proper bind flags setup.
919 *
920 * Input argument to the DRM_VMW_GB_SURFACE_CREATE Ioctl.
921 * Part of output argument for the DRM_VMW_GB_SURFACE_REF Ioctl.
922 */
924 __u32 svga3d_flags;
925 __u32 format;
926 __u32 mip_levels;
928 __u32 multisample_count;
929 __u32 autogen_filter;
930 __u32 buffer_handle;
931 __u32 array_size;
933 };
935 /**
936 * struct drm_vmw_gb_surface_create_rep
937 *
938 * @handle: Surface handle.
939 * @backup_size: Size of backup buffers for this surface.
940 * @buffer_handle: Handle of backup buffer. SVGA3D_INVALID_ID if none.
941 * @buffer_size: Actual size of the buffer identified by
942 * @buffer_handle
943 * @buffer_map_handle: Offset into device address space for the buffer
944 * identified by @buffer_handle.
945 *
946 * Part of output argument for the DRM_VMW_GB_SURFACE_REF ioctl.
947 * Output argument for the DRM_VMW_GB_SURFACE_CREATE ioctl.
948 */
950 __u32 handle;
951 __u32 backup_size;
952 __u32 buffer_handle;
953 __u32 buffer_size;
954 __u64 buffer_map_handle;
955 };
957 /**
958 * union drm_vmw_gb_surface_create_arg
959 *
960 * @req: Input argument as described above.
961 * @rep: Output argument as described above.
962 *
963 * Argument to the DRM_VMW_GB_SURFACE_CREATE ioctl.
964 */
968 };
970 /*************************************************************************/
971 /**
972 * DRM_VMW_GB_SURFACE_REF - Reference a host surface.
973 *
974 * Puts a reference on a host surface with a given handle, as previously
975 * returned by the DRM_VMW_GB_SURFACE_CREATE ioctl.
976 * A reference will make sure the surface isn't destroyed while we hold
977 * it and will allow the calling client to use the surface handle in
978 * the command stream.
979 *
980 * On successful return, the Ioctl returns the surface information given
981 * to and returned from the DRM_VMW_GB_SURFACE_CREATE ioctl.
982 */
984 /**
985 * struct drm_vmw_gb_surface_reference_arg
986 *
987 * @creq: The data used as input when the surface was created, as described
988 * above at "struct drm_vmw_gb_surface_create_req"
989 * @crep: Additional data output when the surface was created, as described
990 * above at "struct drm_vmw_gb_surface_create_rep"
991 *
992 * Output Argument to the DRM_VMW_GB_SURFACE_REF ioctl.
993 */
997 };
999 /**
1000 * union drm_vmw_gb_surface_reference_arg
1001 *
1002 * @req: Input data as described above at "struct drm_vmw_surface_arg"
1003 * @rep: Output data as described above at "struct drm_vmw_gb_surface_ref_rep"
1004 *
1005 * Argument to the DRM_VMW_GB_SURFACE_REF Ioctl.
1006 */
1010 };
1013 /*************************************************************************/
1014 /**
1015 * DRM_VMW_SYNCCPU - Sync a DMA buffer / MOB for CPU access.
1016 *
1017 * Idles any previously submitted GPU operations on the buffer and
1018 * by default blocks command submissions that reference the buffer.
1019 * If the file descriptor used to grab a blocking CPU sync is closed, the
1020 * cpu sync is released.
1021 * The flags argument indicates how the grab / release operation should be
1022 * performed:
1023 */
1025 /**
1026 * enum drm_vmw_synccpu_flags - Synccpu flags:
1027 *
1028 * @drm_vmw_synccpu_read: Sync for read. If sync is done for read only, it's a
1029 * hint to the kernel to allow command submissions that references the buffer
1030 * for read-only.
1031 * @drm_vmw_synccpu_write: Sync for write. Block all command submissions
1032 * referencing this buffer.
1033 * @drm_vmw_synccpu_dontblock: Dont wait for GPU idle, but rather return
1034 * -EBUSY should the buffer be busy.
1035 * @drm_vmw_synccpu_allow_cs: Allow command submission that touches the buffer
1036 * while the buffer is synced for CPU. This is similar to the GEM bo idle
1037 * behavior.
1038 */
1044 };
1046 /**
1047 * enum drm_vmw_synccpu_op - Synccpu operations:
1048 *
1049 * @drm_vmw_synccpu_grab: Grab the buffer for CPU operations
1050 * @drm_vmw_synccpu_release: Release a previous grab.
1051 */
1053 drm_vmw_synccpu_grab,
1054 drm_vmw_synccpu_release
1055 };
1057 /**
1058 * struct drm_vmw_synccpu_arg
1059 *
1060 * @op: The synccpu operation as described above.
1061 * @handle: Handle identifying the buffer object.
1062 * @flags: Flags as described above.
1063 */
1067 __u32 handle;
1068 __u32 pad64;
1069 };
1071 /*************************************************************************/
1072 /**
1073 * DRM_VMW_CREATE_EXTENDED_CONTEXT - Create a host context.
1074 *
1075 * Allocates a device unique context id, and queues a create context command
1076 * for the host. Does not wait for host completion.
1077 */
1079 drm_vmw_context_legacy,
1080 drm_vmw_context_dx
1081 };
1083 /**
1084 * union drm_vmw_extended_context_arg
1085 *
1086 * @req: Context type.
1087 * @rep: Context identifier.
1088 *
1089 * Argument to the DRM_VMW_CREATE_EXTENDED_CONTEXT Ioctl.
1090 */
1094 };
1096 /*************************************************************************/
1097 /*
1098 * DRM_VMW_HANDLE_CLOSE - Close a user-space handle and release its
1099 * underlying resource.
1100 *
1101 * Note that this ioctl is overlaid on the DRM_VMW_UNREF_DMABUF Ioctl.
1102 * The ioctl arguments therefore need to be identical in layout.
1103 *
1104 */
1106 /**
1107 * struct drm_vmw_handle_close_arg
1108 *
1109 * @handle: Handle to close.
1110 *
1111 * Argument to the DRM_VMW_HANDLE_CLOSE Ioctl.
1112 */
1114 __u32 handle;
1115 __u32 pad64;
1116 };
1119 #if defined(__cplusplus)
1120 }
1121 #endif
1123 #endif