drivers/staging/vt6655/desc.h

   1 /*
   2  * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * File: desc.h
  20  *
  21  * Purpose:The header file of descriptor
  22  *
  23  * Revision History:
  24  *
  25  * Author: Tevin Chen
  26  *
  27  * Date: May 21, 1996
  28  *
  29  */
  30
  31 #ifndef __DESC_H__
  32 #define __DESC_H__
  33
  34 #include <linux/types.h>
  35 #include <linux/mm.h>
  36 #include "linux/ieee80211.h"
  37
  38 #define B_OWNED_BY_CHIP     1
  39 #define B_OWNED_BY_HOST     0
  40
  41 /* Bits in the RSR register */
  42 #define RSR_ADDRBROAD       0x80
  43 #define RSR_ADDRMULTI       0x40
  44 #define RSR_ADDRUNI         0x00
  45 #define RSR_IVLDTYP         0x20
  46 #define RSR_IVLDLEN         0x10        /* invalid len (> 2312 byte) */
  47 #define RSR_BSSIDOK         0x08
  48 #define RSR_CRCOK           0x04
  49 #define RSR_BCNSSIDOK       0x02
  50 #define RSR_ADDROK          0x01
  51
  52 /* Bits in the new RSR register */
  53 #define NEWRSR_DECRYPTOK    0x10
  54 #define NEWRSR_CFPIND       0x08
  55 #define NEWRSR_HWUTSF       0x04
  56 #define NEWRSR_BCNHITAID    0x02
  57 #define NEWRSR_BCNHITAID0   0x01
  58
  59 /* Bits in the TSR0 register */
  60 #define TSR0_PWRSTS1_2      0xC0
  61 #define TSR0_PWRSTS7        0x20
  62 #define TSR0_NCR            0x1F
  63
  64 /* Bits in the TSR1 register */
  65 #define TSR1_TERR           0x80
  66 #define TSR1_PWRSTS4_6      0x70
  67 #define TSR1_RETRYTMO       0x08
  68 #define TSR1_TMO            0x04
  69 #define TSR1_PWRSTS3        0x02
  70 #define ACK_DATA            0x01
  71
  72 /* Bits in the TCR register */
  73 #define EDMSDU              0x04        /* end of sdu */
  74 #define TCR_EDP             0x02        /* end of packet */
  75 #define TCR_STP             0x01        /* start of packet */
  76
  77 /* max transmit or receive buffer size */
  78 #define CB_MAX_BUF_SIZE     2900U
  79                                         /* NOTE: must be multiple of 4 */
  80 #define CB_MAX_TX_BUF_SIZE          CB_MAX_BUF_SIZE
  81 #define CB_MAX_RX_BUF_SIZE_NORMAL   CB_MAX_BUF_SIZE
  82
  83 #define CB_BEACON_BUF_SIZE  512U
  84
  85 #define CB_MAX_RX_DESC      128
  86 #define CB_MIN_RX_DESC      16
  87 #define CB_MAX_TX_DESC      64
  88 #define CB_MIN_TX_DESC      16
  89
  90 #define CB_MAX_RECEIVED_PACKETS     16
  91                                 /*
  92                                  * limit our receive routine to indicating
  93                                  * this many at a time for 2 reasons:
  94                                  * 1. driver flow control to protocol layer
  95                                  * 2. limit the time used in ISR routine
  96                                  */
  97
  98 #define CB_EXTRA_RD_NUM     32
  99 #define CB_RD_NUM           32
 100 #define CB_TD_NUM           32
 101
 102 /*
 103  * max number of physical segments in a single NDIS packet. Above this
 104  * threshold, the packet is copied into a single physically contiguous buffer
 105  */
 106 #define CB_MAX_SEGMENT      4
 107
 108 #define CB_MIN_MAP_REG_NUM  4
 109 #define CB_MAX_MAP_REG_NUM  CB_MAX_TX_DESC
 110
 111 #define CB_PROTOCOL_RESERVED_SECTION    16
 112
 113 /*
 114  * if retrys excess 15 times , tx will abort, and if tx fifo underflow,
 115  * tx will fail, we should try to resend it
 116  */
 117 #define CB_MAX_TX_ABORT_RETRY   3
 118
 119 /* WMAC definition FIFO Control */
 120 #define FIFOCTL_AUTO_FB_1   0x1000
 121 #define FIFOCTL_AUTO_FB_0   0x0800
 122 #define FIFOCTL_GRPACK      0x0400
 123 #define FIFOCTL_11GA        0x0300
 124 #define FIFOCTL_11GB        0x0200
 125 #define FIFOCTL_11B         0x0100
 126 #define FIFOCTL_11A         0x0000
 127 #define FIFOCTL_RTS         0x0080
 128 #define FIFOCTL_ISDMA0      0x0040
 129 #define FIFOCTL_GENINT      0x0020
 130 #define FIFOCTL_TMOEN       0x0010
 131 #define FIFOCTL_LRETRY      0x0008
 132 #define FIFOCTL_CRCDIS      0x0004
 133 #define FIFOCTL_NEEDACK     0x0002
 134 #define FIFOCTL_LHEAD       0x0001
 135
 136 /* WMAC definition Frag Control */
 137 #define FRAGCTL_AES         0x0300
 138 #define FRAGCTL_TKIP        0x0200
 139 #define FRAGCTL_LEGACY      0x0100
 140 #define FRAGCTL_NONENCRYPT  0x0000
 141 #define FRAGCTL_ENDFRAG     0x0003
 142 #define FRAGCTL_MIDFRAG     0x0002
 143 #define FRAGCTL_STAFRAG     0x0001
 144 #define FRAGCTL_NONFRAG     0x0000
 145
 146 #define TYPE_TXDMA0     0
 147 #define TYPE_AC0DMA     1
 148 #define TYPE_ATIMDMA    2
 149 #define TYPE_SYNCDMA    3
 150 #define TYPE_MAXTD      2
 151
 152 #define TYPE_BEACONDMA  4
 153
 154 #define TYPE_RXDMA0     0
 155 #define TYPE_RXDMA1     1
 156 #define TYPE_MAXRD      2
 157
 158 /* TD_INFO flags control bit */
 159 #define TD_FLAGS_NETIF_SKB      0x01    /* check if need release skb */
 160 #define TD_FLAGS_PRIV_SKB       0x02    /* check if called from private skb (hostap) */
 161 #define TD_FLAGS_PS_RETRY       0x04    /* check if PS STA frame re-transmit */
 162
 163 /*
 164  * ref_sk_buff is used for mapping the skb structure between pre-built
 165  * driver-obj & running kernel. Since different kernel version (2.4x) may
 166  * change skb structure, i.e. pre-built driver-obj may link to older skb that
 167  * leads error.
 168  */
 169
 170 typedef struct tagDEVICE_RD_INFO {
 171         struct sk_buff *skb;
 172         dma_addr_t  skb_dma;
 173         dma_addr_t  curr_desc;
 174 } DEVICE_RD_INFO,   *PDEVICE_RD_INFO;
 175
 176 #ifdef __BIG_ENDIAN
 177
 178 typedef struct tagRDES0 {
 179         volatile unsigned short wResCount;
 180         union {
 181                 volatile u16    f15Reserved;
 182                 struct {
 183                         volatile u8 f8Reserved1;
 184                         volatile u8 f1Owner:1;
 185                         volatile u8 f7Reserved:7;
 186                 } __attribute__ ((__packed__));
 187         } __attribute__ ((__packed__));
 188 } __attribute__ ((__packed__))
 189 SRDES0, *PSRDES0;
 190
 191 #else
 192
 193 typedef struct tagRDES0 {
 194         unsigned short wResCount;
 195         unsigned short f15Reserved:15;
 196         unsigned short f1Owner:1;
 197 } __attribute__ ((__packed__))
 198 SRDES0;
 199
 200 #endif
 201
 202 typedef struct tagRDES1 {
 203         unsigned short wReqCount;
 204         unsigned short wReserved;
 205 } __attribute__ ((__packed__))
 206 SRDES1;
 207
 208 /* Rx descriptor*/
 209 typedef struct tagSRxDesc {
 210         volatile SRDES0 m_rd0RD0;
 211         volatile SRDES1 m_rd1RD1;
 212         volatile u32    buff_addr;
 213         volatile u32    next_desc;
 214         struct tagSRxDesc *next __aligned(8);
 215         volatile PDEVICE_RD_INFO pRDInfo __aligned(8);
 216 } __attribute__ ((__packed__))
 217 SRxDesc, *PSRxDesc;
 218 typedef const SRxDesc *PCSRxDesc;
 219
 220 #ifdef __BIG_ENDIAN
 221
 222 typedef struct tagTDES0 {
 223         volatile    unsigned char byTSR0;
 224         volatile    unsigned char byTSR1;
 225         union {
 226                 volatile u16    f15Txtime;
 227                 struct {
 228                         volatile u8 f8Reserved1;
 229                         volatile u8 f1Owner:1;
 230                         volatile u8 f7Reserved:7;
 231                 } __attribute__ ((__packed__));
 232         } __attribute__ ((__packed__));
 233 } __attribute__ ((__packed__))
 234 STDES0, PSTDES0;
 235
 236 #else
 237
 238 typedef struct tagTDES0 {
 239         volatile    unsigned char byTSR0;
 240         volatile    unsigned char byTSR1;
 241         volatile    unsigned short f15Txtime:15;
 242         volatile    unsigned short f1Owner:1;
 243 } __attribute__ ((__packed__))
 244 STDES0;
 245
 246 #endif
 247
 248 typedef struct tagTDES1 {
 249         volatile    unsigned short wReqCount;
 250         volatile    unsigned char byTCR;
 251         volatile    unsigned char byReserved;
 252 } __attribute__ ((__packed__))
 253 STDES1;
 254
 255 typedef struct tagDEVICE_TD_INFO {
 256         void *mic_hdr;
 257         struct sk_buff *skb;
 258         unsigned char *buf;
 259         dma_addr_t          skb_dma;
 260         dma_addr_t          buf_dma;
 261         dma_addr_t          curr_desc;
 262         unsigned long dwReqCount;
 263         unsigned long dwHeaderLength;
 264         unsigned char byFlags;
 265 } DEVICE_TD_INFO,    *PDEVICE_TD_INFO;
 266
 267 /* transmit descriptor */
 268 typedef struct tagSTxDesc {
 269         volatile    STDES0  m_td0TD0;
 270         volatile    STDES1  m_td1TD1;
 271         volatile    u32    buff_addr;
 272         volatile    u32    next_desc;
 273         struct tagSTxDesc *next __aligned(8);
 274         volatile    PDEVICE_TD_INFO pTDInfo __aligned(8);
 275 } __attribute__ ((__packed__))
 276 STxDesc, *PSTxDesc;
 277 typedef const STxDesc *PCSTxDesc;
 278
 279 typedef struct tagSTxSyncDesc {
 280         volatile    STDES0  m_td0TD0;
 281         volatile    STDES1  m_td1TD1;
 282         volatile    u32 buff_addr; /* pointer to logical buffer */
 283         volatile    u32 next_desc; /* pointer to next logical descriptor */
 284         volatile    unsigned short m_wFIFOCtl;
 285         volatile    unsigned short m_wTimeStamp;
 286         struct tagSTxSyncDesc *next __aligned(8);
 287         volatile    PDEVICE_TD_INFO pTDInfo __aligned(8);
 288 } __attribute__ ((__packed__))
 289 STxSyncDesc, *PSTxSyncDesc;
 290 typedef const STxSyncDesc *PCSTxSyncDesc;
 291
 292 /* RsvTime buffer header */
 293 typedef struct tagSRrvTime_atim {
 294         unsigned short wCTSTxRrvTime_ba;
 295         unsigned short wTxRrvTime_a;
 296 } __attribute__ ((__packed__))
 297 SRrvTime_atim, *PSRrvTime_atim;
 298 typedef const SRrvTime_atim *PCSRrvTime_atim;
 299
 300 /* Length, Service, and Signal fields of Phy for Tx */
 301 struct vnt_phy_field {
 302         u8 signal;
 303         u8 service;
 304         __le16 len;
 305 } __packed;
 306
 307 union vnt_phy_field_swap {
 308         struct vnt_phy_field field_read;
 309         u16 swap[2];
 310         u32 field_write;
 311 };
 312
 313 /* Tx FIFO header */
 314 typedef struct tagSTxBufHead {
 315         u32 adwTxKey[4];
 316         unsigned short wFIFOCtl;
 317         unsigned short wTimeStamp;
 318         unsigned short wFragCtl;
 319         unsigned char byTxPower;
 320         unsigned char wReserved;
 321 } __attribute__ ((__packed__))
 322 STxBufHead, *PSTxBufHead;
 323 typedef const STxBufHead *PCSTxBufHead;
 324
 325 typedef struct tagSBEACONCtl {
 326         u32 BufReady:1;
 327         u32 TSF:15;
 328         u32 BufLen:11;
 329         u32 Reserved:5;
 330 } __attribute__ ((__packed__))
 331 SBEACONCtl;
 332
 333 typedef struct tagSSecretKey {
 334         u32 dwLowDword;
 335         unsigned char byHighByte;
 336 } __attribute__ ((__packed__))
 337 SSecretKey;
 338
 339 typedef struct tagSKeyEntry {
 340         unsigned char abyAddrHi[2];
 341         unsigned short wKCTL;
 342         unsigned char abyAddrLo[4];
 343         u32 dwKey0[4];
 344         u32 dwKey1[4];
 345         u32 dwKey2[4];
 346         u32 dwKey3[4];
 347         u32 dwKey4[4];
 348 } __attribute__ ((__packed__))
 349 SKeyEntry;
 350
 351 #endif /* __DESC_H__ */