Bluetooth: hci_uart: Use generic functionality from Broadcom module
[linux/fpc-iii.git] / drivers / staging / vt6655 / mac.c
blob3653a2bd1e36014d39e2454d74cd8258785ed6c9
1 /*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 * File: mac.c
22 * Purpose: MAC routines
24 * Author: Tevin Chen
26 * Date: May 21, 1996
28 * Functions:
29 * MACbIsRegBitsOn - Test if All test Bits On
30 * MACbIsRegBitsOff - Test if All test Bits Off
31 * MACbIsIntDisable - Test if MAC interrupt disable
32 * MACvSetShortRetryLimit - Set 802.11 Short Retry limit
33 * MACvSetLongRetryLimit - Set 802.11 Long Retry limit
34 * MACvSetLoopbackMode - Set MAC Loopback Mode
35 * MACvSaveContext - Save Context of MAC Registers
36 * MACvRestoreContext - Restore Context of MAC Registers
37 * MACbSoftwareReset - Software Reset MAC
38 * MACbSafeRxOff - Turn Off MAC Rx
39 * MACbSafeTxOff - Turn Off MAC Tx
40 * MACbSafeStop - Stop MAC function
41 * MACbShutdown - Shut down MAC
42 * MACvInitialize - Initialize MAC
43 * MACvSetCurrRxDescAddr - Set Rx Descriptors Address
44 * MACvSetCurrTx0DescAddr - Set Tx0 Descriptors Address
45 * MACvSetCurrTx1DescAddr - Set Tx1 Descriptors Address
46 * MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
48 * Revision History:
49 * 08-22-2003 Kyle Hsu : Porting MAC functions from sim53
50 * 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& MACvEnableBusSusEn()
51 * 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry
55 #include "tmacro.h"
56 #include "mac.h"
59 * Description:
60 * Test if all test bits on
62 * Parameters:
63 * In:
64 * dwIoBase - Base Address for MAC
65 * byRegOfs - Offset of MAC Register
66 * byTestBits - Test bits
67 * Out:
68 * none
70 * Return Value: true if all test bits On; otherwise false
73 bool MACbIsRegBitsOn(void __iomem *dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
75 unsigned char byData;
77 VNSvInPortB(dwIoBase + byRegOfs, &byData);
78 return (byData & byTestBits) == byTestBits;
82 * Description:
83 * Test if all test bits off
85 * Parameters:
86 * In:
87 * dwIoBase - Base Address for MAC
88 * byRegOfs - Offset of MAC Register
89 * byTestBits - Test bits
90 * Out:
91 * none
93 * Return Value: true if all test bits Off; otherwise false
96 bool MACbIsRegBitsOff(void __iomem *dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
98 unsigned char byData;
100 VNSvInPortB(dwIoBase + byRegOfs, &byData);
101 return !(byData & byTestBits);
105 * Description:
106 * Test if MAC interrupt disable
108 * Parameters:
109 * In:
110 * dwIoBase - Base Address for MAC
111 * Out:
112 * none
114 * Return Value: true if interrupt is disable; otherwise false
117 bool MACbIsIntDisable(void __iomem *dwIoBase)
119 unsigned long dwData;
121 VNSvInPortD(dwIoBase + MAC_REG_IMR, &dwData);
122 if (dwData != 0)
123 return false;
125 return true;
129 * Description:
130 * Set 802.11 Short Retry Limit
132 * Parameters:
133 * In:
134 * dwIoBase - Base Address for MAC
135 * byRetryLimit- Retry Limit
136 * Out:
137 * none
139 * Return Value: none
142 void MACvSetShortRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
144 // set SRT
145 VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit);
150 * Description:
151 * Set 802.11 Long Retry Limit
153 * Parameters:
154 * In:
155 * dwIoBase - Base Address for MAC
156 * byRetryLimit- Retry Limit
157 * Out:
158 * none
160 * Return Value: none
163 void MACvSetLongRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
165 // set LRT
166 VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit);
170 * Description:
171 * Set MAC Loopback mode
173 * Parameters:
174 * In:
175 * dwIoBase - Base Address for MAC
176 * byLoopbackMode - Loopback Mode
177 * Out:
178 * none
180 * Return Value: none
183 void MACvSetLoopbackMode(void __iomem *dwIoBase, unsigned char byLoopbackMode)
185 unsigned char byOrgValue;
187 ASSERT(byLoopbackMode < 3);
188 byLoopbackMode <<= 6;
189 // set TCR
190 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
191 byOrgValue = byOrgValue & 0x3F;
192 byOrgValue = byOrgValue | byLoopbackMode;
193 VNSvOutPortB(dwIoBase + MAC_REG_TEST, byOrgValue);
197 * Description:
198 * Save MAC registers to context buffer
200 * Parameters:
201 * In:
202 * dwIoBase - Base Address for MAC
203 * Out:
204 * pbyCxtBuf - Context buffer
206 * Return Value: none
209 void MACvSaveContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
211 int ii;
213 // read page0 register
214 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++)
215 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii));
217 MACvSelectPage1(dwIoBase);
219 // read page1 register
220 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
221 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
223 MACvSelectPage0(dwIoBase);
227 * Description:
228 * Restore MAC registers from context buffer
230 * Parameters:
231 * In:
232 * dwIoBase - Base Address for MAC
233 * pbyCxtBuf - Context buffer
234 * Out:
235 * none
237 * Return Value: none
240 void MACvRestoreContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
242 int ii;
244 MACvSelectPage1(dwIoBase);
245 // restore page1
246 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
247 VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
249 MACvSelectPage0(dwIoBase);
251 // restore RCR,TCR,IMR...
252 for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++)
253 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
255 // restore MAC Config.
256 for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++)
257 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
259 VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG));
261 // restore PS Config.
262 for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++)
263 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
265 // restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
266 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0));
267 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR));
268 VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_BCNDMAPTR));
270 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0));
272 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1));
276 * Description:
277 * Software Reset MAC
279 * Parameters:
280 * In:
281 * dwIoBase - Base Address for MAC
282 * Out:
283 * none
285 * Return Value: true if Reset Success; otherwise false
288 bool MACbSoftwareReset(void __iomem *dwIoBase)
290 unsigned char byData;
291 unsigned short ww;
293 // turn on HOSTCR_SOFTRST, just write 0x01 to reset
294 VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, 0x01);
296 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
297 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
298 if (!(byData & HOSTCR_SOFTRST))
299 break;
301 if (ww == W_MAX_TIMEOUT)
302 return false;
303 return true;
307 * Description:
308 * save some important register's value, then do reset, then restore register's value
310 * Parameters:
311 * In:
312 * dwIoBase - Base Address for MAC
313 * Out:
314 * none
316 * Return Value: true if success; otherwise false
319 bool MACbSafeSoftwareReset(void __iomem *dwIoBase)
321 unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
322 bool bRetVal;
324 // PATCH....
325 // save some important register's value, then do
326 // reset, then restore register's value
328 // save MAC context
329 MACvSaveContext(dwIoBase, abyTmpRegData);
330 // do reset
331 bRetVal = MACbSoftwareReset(dwIoBase);
332 // restore MAC context, except CR0
333 MACvRestoreContext(dwIoBase, abyTmpRegData);
335 return bRetVal;
339 * Description:
340 * Turn Off MAC Rx
342 * Parameters:
343 * In:
344 * dwIoBase - Base Address for MAC
345 * Out:
346 * none
348 * Return Value: true if success; otherwise false
351 bool MACbSafeRxOff(void __iomem *dwIoBase)
353 unsigned short ww;
354 unsigned long dwData;
355 unsigned char byData;
357 // turn off wow temp for turn off Rx safely
359 // Clear RX DMA0,1
360 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
361 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
362 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
363 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData);
364 if (!(dwData & DMACTL_RUN))
365 break;
367 if (ww == W_MAX_TIMEOUT) {
368 DBG_PORT80(0x10);
369 pr_debug(" DBG_PORT80(0x10)\n");
370 return false;
372 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
373 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData);
374 if (!(dwData & DMACTL_RUN))
375 break;
377 if (ww == W_MAX_TIMEOUT) {
378 DBG_PORT80(0x11);
379 pr_debug(" DBG_PORT80(0x11)\n");
380 return false;
383 // try to safe shutdown RX
384 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);
385 // W_MAX_TIMEOUT is the timeout period
386 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
387 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
388 if (!(byData & HOSTCR_RXONST))
389 break;
391 if (ww == W_MAX_TIMEOUT) {
392 DBG_PORT80(0x12);
393 pr_debug(" DBG_PORT80(0x12)\n");
394 return false;
396 return true;
400 * Description:
401 * Turn Off MAC Tx
403 * Parameters:
404 * In:
405 * dwIoBase - Base Address for MAC
406 * Out:
407 * none
409 * Return Value: true if success; otherwise false
412 bool MACbSafeTxOff(void __iomem *dwIoBase)
414 unsigned short ww;
415 unsigned long dwData;
416 unsigned char byData;
418 // Clear TX DMA
419 //Tx0
420 VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
421 //AC0
422 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);
424 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
425 VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData);
426 if (!(dwData & DMACTL_RUN))
427 break;
429 if (ww == W_MAX_TIMEOUT) {
430 DBG_PORT80(0x20);
431 pr_debug(" DBG_PORT80(0x20)\n");
432 return false;
434 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
435 VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData);
436 if (!(dwData & DMACTL_RUN))
437 break;
439 if (ww == W_MAX_TIMEOUT) {
440 DBG_PORT80(0x21);
441 pr_debug(" DBG_PORT80(0x21)\n");
442 return false;
445 // try to safe shutdown TX
446 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);
448 // W_MAX_TIMEOUT is the timeout period
449 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
450 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
451 if (!(byData & HOSTCR_TXONST))
452 break;
454 if (ww == W_MAX_TIMEOUT) {
455 DBG_PORT80(0x24);
456 pr_debug(" DBG_PORT80(0x24)\n");
457 return false;
459 return true;
463 * Description:
464 * Stop MAC function
466 * Parameters:
467 * In:
468 * dwIoBase - Base Address for MAC
469 * Out:
470 * none
472 * Return Value: true if success; otherwise false
475 bool MACbSafeStop(void __iomem *dwIoBase)
477 MACvRegBitsOff(dwIoBase, MAC_REG_TCR, TCR_AUTOBCNTX);
479 if (!MACbSafeRxOff(dwIoBase)) {
480 DBG_PORT80(0xA1);
481 pr_debug(" MACbSafeRxOff == false)\n");
482 MACbSafeSoftwareReset(dwIoBase);
483 return false;
485 if (!MACbSafeTxOff(dwIoBase)) {
486 DBG_PORT80(0xA2);
487 pr_debug(" MACbSafeTxOff == false)\n");
488 MACbSafeSoftwareReset(dwIoBase);
489 return false;
492 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_MACEN);
494 return true;
498 * Description:
499 * Shut Down MAC
501 * Parameters:
502 * In:
503 * dwIoBase - Base Address for MAC
504 * Out:
505 * none
507 * Return Value: true if success; otherwise false
510 bool MACbShutdown(void __iomem *dwIoBase)
512 // disable MAC IMR
513 MACvIntDisable(dwIoBase);
514 MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL);
515 // stop the adapter
516 if (!MACbSafeStop(dwIoBase)) {
517 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
518 return false;
520 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
521 return true;
525 * Description:
526 * Initialize MAC
528 * Parameters:
529 * In:
530 * dwIoBase - Base Address for MAC
531 * Out:
532 * none
534 * Return Value: none
537 void MACvInitialize(void __iomem *dwIoBase)
539 // clear sticky bits
540 MACvClearStckDS(dwIoBase);
541 // disable force PME-enable
542 VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR);
543 // only 3253 A
545 // do reset
546 MACbSoftwareReset(dwIoBase);
548 // reset TSF counter
549 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
550 // enable TSF counter
551 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
555 * Description:
556 * Set the chip with current rx descriptor address
558 * Parameters:
559 * In:
560 * dwIoBase - Base Address for MAC
561 * dwCurrDescAddr - Descriptor Address
562 * Out:
563 * none
565 * Return Value: none
568 void MACvSetCurrRx0DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
570 unsigned short ww;
571 unsigned char byData;
572 unsigned char byOrgDMACtl;
574 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl);
575 if (byOrgDMACtl & DMACTL_RUN)
576 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN);
578 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
579 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData);
580 if (!(byData & DMACTL_RUN))
581 break;
584 if (ww == W_MAX_TIMEOUT)
585 DBG_PORT80(0x13);
587 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr);
588 if (byOrgDMACtl & DMACTL_RUN)
589 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN);
593 * Description:
594 * Set the chip with current rx descriptor address
596 * Parameters:
597 * In:
598 * dwIoBase - Base Address for MAC
599 * dwCurrDescAddr - Descriptor Address
600 * Out:
601 * none
603 * Return Value: none
606 void MACvSetCurrRx1DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
608 unsigned short ww;
609 unsigned char byData;
610 unsigned char byOrgDMACtl;
612 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byOrgDMACtl);
613 if (byOrgDMACtl & DMACTL_RUN)
614 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1+2, DMACTL_RUN);
616 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
617 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byData);
618 if (!(byData & DMACTL_RUN))
619 break;
621 if (ww == W_MAX_TIMEOUT)
622 DBG_PORT80(0x14);
624 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, dwCurrDescAddr);
625 if (byOrgDMACtl & DMACTL_RUN)
626 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN);
631 * Description:
632 * Set the chip with current tx0 descriptor address
634 * Parameters:
635 * In:
636 * dwIoBase - Base Address for MAC
637 * dwCurrDescAddr - Descriptor Address
638 * Out:
639 * none
641 * Return Value: none
644 void MACvSetCurrTx0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
646 unsigned short ww;
647 unsigned char byData;
648 unsigned char byOrgDMACtl;
650 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byOrgDMACtl);
651 if (byOrgDMACtl & DMACTL_RUN)
652 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
654 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
655 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
656 if (!(byData & DMACTL_RUN))
657 break;
659 if (ww == W_MAX_TIMEOUT)
660 DBG_PORT80(0x25);
662 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, dwCurrDescAddr);
663 if (byOrgDMACtl & DMACTL_RUN)
664 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN);
668 * Description:
669 * Set the chip with current AC0 descriptor address
671 * Parameters:
672 * In:
673 * dwIoBase - Base Address for MAC
674 * dwCurrDescAddr - Descriptor Address
675 * Out:
676 * none
678 * Return Value: none
681 //TxDMA1 = AC0DMA
682 void MACvSetCurrAC0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
684 unsigned short ww;
685 unsigned char byData;
686 unsigned char byOrgDMACtl;
688 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl);
689 if (byOrgDMACtl & DMACTL_RUN)
690 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
692 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
693 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
694 if (!(byData & DMACTL_RUN))
695 break;
697 if (ww == W_MAX_TIMEOUT) {
698 DBG_PORT80(0x26);
699 pr_debug(" DBG_PORT80(0x26)\n");
701 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr);
702 if (byOrgDMACtl & DMACTL_RUN)
703 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN);
706 void MACvSetCurrTXDescAddr(int iTxType, void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
708 if (iTxType == TYPE_AC0DMA)
709 MACvSetCurrAC0DescAddrEx(dwIoBase, dwCurrDescAddr);
710 else if (iTxType == TYPE_TXDMA0)
711 MACvSetCurrTx0DescAddrEx(dwIoBase, dwCurrDescAddr);
715 * Description:
716 * Micro Second Delay via MAC
718 * Parameters:
719 * In:
720 * dwIoBase - Base Address for MAC
721 * uDelay - Delay time (timer resolution is 4 us)
722 * Out:
723 * none
725 * Return Value: none
728 void MACvTimer0MicroSDelay(void __iomem *dwIoBase, unsigned int uDelay)
730 unsigned char byValue;
731 unsigned int uu, ii;
733 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
734 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay);
735 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
736 for (ii = 0; ii < 66; ii++) { // assume max PCI clock is 66Mhz
737 for (uu = 0; uu < uDelay; uu++) {
738 VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue);
739 if ((byValue == 0) ||
740 (byValue & TMCTL_TSUSP)) {
741 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
742 return;
746 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
750 * Description:
751 * Micro Second One shot timer via MAC
753 * Parameters:
754 * In:
755 * dwIoBase - Base Address for MAC
756 * uDelay - Delay time
757 * Out:
758 * none
760 * Return Value: none
763 void MACvOneShotTimer1MicroSec(void __iomem *dwIoBase, unsigned int uDelayTime)
765 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0);
766 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime);
767 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
770 void MACvSetMISCFifo(void __iomem *dwIoBase, unsigned short wOffset, unsigned long dwData)
772 if (wOffset > 273)
773 return;
774 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
775 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
776 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
779 bool MACbPSWakeup(void __iomem *dwIoBase)
781 unsigned char byOrgValue;
782 unsigned int ww;
783 // Read PSCTL
784 if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS))
785 return true;
787 // Disable PS
788 MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN);
790 // Check if SyncFlushOK
791 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
792 VNSvInPortB(dwIoBase + MAC_REG_PSCTL, &byOrgValue);
793 if (byOrgValue & PSCTL_WAKEDONE)
794 break;
796 if (ww == W_MAX_TIMEOUT) {
797 DBG_PORT80(0x36);
798 pr_debug(" DBG_PORT80(0x33)\n");
799 return false;
801 return true;
805 * Description:
806 * Set the Key by MISCFIFO
808 * Parameters:
809 * In:
810 * dwIoBase - Base Address for MAC
812 * Out:
813 * none
815 * Return Value: none
819 void MACvSetKeyEntry(void __iomem *dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx,
820 unsigned int uKeyIdx, unsigned char *pbyAddr, u32 *pdwKey, unsigned char byLocalID)
822 unsigned short wOffset;
823 u32 dwData;
824 int ii;
826 if (byLocalID <= 1)
827 return;
829 pr_debug("MACvSetKeyEntry\n");
830 wOffset = MISCFIFO_KEYETRY0;
831 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
833 dwData = 0;
834 dwData |= wKeyCtl;
835 dwData <<= 16;
836 dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
837 pr_debug("1. wOffset: %d, Data: %X, KeyCtl:%X\n",
838 wOffset, dwData, wKeyCtl);
840 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
841 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
842 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
843 wOffset++;
845 dwData = 0;
846 dwData |= *(pbyAddr+3);
847 dwData <<= 8;
848 dwData |= *(pbyAddr+2);
849 dwData <<= 8;
850 dwData |= *(pbyAddr+1);
851 dwData <<= 8;
852 dwData |= *(pbyAddr+0);
853 pr_debug("2. wOffset: %d, Data: %X\n", wOffset, dwData);
855 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
856 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
857 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
858 wOffset++;
860 wOffset += (uKeyIdx * 4);
861 for (ii = 0; ii < 4; ii++) {
862 // always push 128 bits
863 pr_debug("3.(%d) wOffset: %d, Data: %X\n",
864 ii, wOffset+ii, *pdwKey);
865 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
866 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
867 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
872 * Description:
873 * Disable the Key Entry by MISCFIFO
875 * Parameters:
876 * In:
877 * dwIoBase - Base Address for MAC
879 * Out:
880 * none
882 * Return Value: none
885 void MACvDisableKeyEntry(void __iomem *dwIoBase, unsigned int uEntryIdx)
887 unsigned short wOffset;
889 wOffset = MISCFIFO_KEYETRY0;
890 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
892 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
893 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0);
894 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);