1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * This header provides macros for X2000 DMA bindings.
5 * Copyright (c) 2020 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
8 #ifndef __DT_BINDINGS_DMA_X2000_DMA_H__
9 #define __DT_BINDINGS_DMA_X2000_DMA_H__
12 * Request type numbers for the X2000 DMA controller (written to the DRTn
13 * register for the channel).
15 #define X2000_DMA_AUTO 0x8
16 #define X2000_DMA_UART5_TX 0xa
17 #define X2000_DMA_UART5_RX 0xb
18 #define X2000_DMA_UART4_TX 0xc
19 #define X2000_DMA_UART4_RX 0xd
20 #define X2000_DMA_UART3_TX 0xe
21 #define X2000_DMA_UART3_RX 0xf
22 #define X2000_DMA_UART2_TX 0x10
23 #define X2000_DMA_UART2_RX 0x11
24 #define X2000_DMA_UART1_TX 0x12
25 #define X2000_DMA_UART1_RX 0x13
26 #define X2000_DMA_UART0_TX 0x14
27 #define X2000_DMA_UART0_RX 0x15
28 #define X2000_DMA_SSI0_TX 0x16
29 #define X2000_DMA_SSI0_RX 0x17
30 #define X2000_DMA_SSI1_TX 0x18
31 #define X2000_DMA_SSI1_RX 0x19
32 #define X2000_DMA_I2C0_TX 0x24
33 #define X2000_DMA_I2C0_RX 0x25
34 #define X2000_DMA_I2C1_TX 0x26
35 #define X2000_DMA_I2C1_RX 0x27
36 #define X2000_DMA_I2C2_TX 0x28
37 #define X2000_DMA_I2C2_RX 0x29
38 #define X2000_DMA_I2C3_TX 0x2a
39 #define X2000_DMA_I2C3_RX 0x2b
40 #define X2000_DMA_I2C4_TX 0x2c
41 #define X2000_DMA_I2C4_RX 0x2d
42 #define X2000_DMA_I2C5_TX 0x2e
43 #define X2000_DMA_I2C5_RX 0x2f
44 #define X2000_DMA_UART6_TX 0x30
45 #define X2000_DMA_UART6_RX 0x31
46 #define X2000_DMA_UART7_TX 0x32
47 #define X2000_DMA_UART7_RX 0x33
48 #define X2000_DMA_UART8_TX 0x34
49 #define X2000_DMA_UART8_RX 0x35
50 #define X2000_DMA_UART9_TX 0x36
51 #define X2000_DMA_UART9_RX 0x37
52 #define X2000_DMA_SADC_RX 0x38
54 #endif /* __DT_BINDINGS_DMA_X2000_DMA_H__ */