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powerpc/eeh: Fix PE#0 check in eeh_add_to_parent_pe()
[linux/fpc-iii.git] / drivers / message / fusion / mptbase.c
blob187f83629f7ef8df1fcf4f5d7c6c7d83cff49fb5
1 /*
2 * linux/drivers/message/fusion/mptbase.c
3 * This is the Fusion MPT base driver which supports multiple
4 * (SCSI + LAN) specialized protocol drivers.
5 * For use with LSI PCI chip/adapter(s)
6 * running LSI Fusion MPT (Message Passing Technology) firmware.
7 *
8 * Copyright (c) 1999-2008 LSI Corporation
9 * (mailto:DL-MPTFusionLinux@lsi.com)
10 *
11 */
12 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
13 /*
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; version 2 of the License.
17
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
22
23 NO WARRANTY
24 THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
25 CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
26 LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
27 MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
28 solely responsible for determining the appropriateness of using and
29 distributing the Program and assumes all risks associated with its
30 exercise of rights under this Agreement, including but not limited to
31 the risks and costs of program errors, damage to or loss of data,
32 programs or equipment, and unavailability or interruption of operations.
33
34 DISCLAIMER OF LIABILITY
35 NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
36 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
38 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
39 TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
40 USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
41 HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
42
43 You should have received a copy of the GNU General Public License
44 along with this program; if not, write to the Free Software
45 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
46 */
47 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
48
49 #include <linux/kernel.h>
50 #include <linux/module.h>
51 #include <linux/errno.h>
52 #include <linux/init.h>
53 #include <linux/seq_file.h>
54 #include <linux/slab.h>
55 #include <linux/types.h>
56 #include <linux/pci.h>
57 #include <linux/kdev_t.h>
58 #include <linux/blkdev.h>
59 #include <linux/delay.h>
60 #include <linux/interrupt.h> /* needed for in_interrupt() proto */
61 #include <linux/dma-mapping.h>
62 #include <asm/io.h>
63 #ifdef CONFIG_MTRR
64 #include <asm/mtrr.h>
65 #endif
66 #include <linux/kthread.h>
67 #include <scsi/scsi_host.h>
68
69 #include "mptbase.h"
70 #include "lsi/mpi_log_fc.h"
71
72 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
73 #define my_NAME "Fusion MPT base driver"
74 #define my_VERSION MPT_LINUX_VERSION_COMMON
75 #define MYNAM "mptbase"
76
77 MODULE_AUTHOR(MODULEAUTHOR);
78 MODULE_DESCRIPTION(my_NAME);
79 MODULE_LICENSE("GPL");
80 MODULE_VERSION(my_VERSION);
81
82 /*
83 * cmd line parameters
84 */
85
86 static int mpt_msi_enable_spi;
87 module_param(mpt_msi_enable_spi, int, 0);
88 MODULE_PARM_DESC(mpt_msi_enable_spi,
89 " Enable MSI Support for SPI controllers (default=0)");
90
91 static int mpt_msi_enable_fc;
92 module_param(mpt_msi_enable_fc, int, 0);
93 MODULE_PARM_DESC(mpt_msi_enable_fc,
94 " Enable MSI Support for FC controllers (default=0)");
95
96 static int mpt_msi_enable_sas;
97 module_param(mpt_msi_enable_sas, int, 0);
98 MODULE_PARM_DESC(mpt_msi_enable_sas,
99 " Enable MSI Support for SAS controllers (default=0)");
100
101 static int mpt_channel_mapping;
102 module_param(mpt_channel_mapping, int, 0);
103 MODULE_PARM_DESC(mpt_channel_mapping, " Mapping id's to channels (default=0)");
104
105 static int mpt_debug_level;
106 static int mpt_set_debug_level(const char *val, struct kernel_param *kp);
107 module_param_call(mpt_debug_level, mpt_set_debug_level, param_get_int,
108 &mpt_debug_level, 0600);
109 MODULE_PARM_DESC(mpt_debug_level,
110 " debug level - refer to mptdebug.h - (default=0)");
111
112 int mpt_fwfault_debug;
113 EXPORT_SYMBOL(mpt_fwfault_debug);
114 module_param(mpt_fwfault_debug, int, 0600);
115 MODULE_PARM_DESC(mpt_fwfault_debug,
116 "Enable detection of Firmware fault and halt Firmware on fault - (default=0)");
117
118 static char MptCallbacksName[MPT_MAX_PROTOCOL_DRIVERS]
119 [MPT_MAX_CALLBACKNAME_LEN+1];
120
121 #ifdef MFCNT
122 static int mfcounter = 0;
123 #define PRINT_MF_COUNT 20000
124 #endif
125
126 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
127 /*
128 * Public data...
129 */
130
131 #define WHOINIT_UNKNOWN 0xAA
132
133 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
134 /*
135 * Private data...
136 */
137 /* Adapter link list */
138 LIST_HEAD(ioc_list);
139 /* Callback lookup table */
140 static MPT_CALLBACK MptCallbacks[MPT_MAX_PROTOCOL_DRIVERS];
141 /* Protocol driver class lookup table */
142 static int MptDriverClass[MPT_MAX_PROTOCOL_DRIVERS];
143 /* Event handler lookup table */
144 static MPT_EVHANDLER MptEvHandlers[MPT_MAX_PROTOCOL_DRIVERS];
145 /* Reset handler lookup table */
146 static MPT_RESETHANDLER MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS];
147 static struct mpt_pci_driver *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS];
148
149 #ifdef CONFIG_PROC_FS
150 static struct proc_dir_entry *mpt_proc_root_dir;
151 #endif
152
153 /*
154 * Driver Callback Index's
155 */
156 static u8 mpt_base_index = MPT_MAX_PROTOCOL_DRIVERS;
157 static u8 last_drv_idx;
158
159 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
160 /*
161 * Forward protos...
162 */
163 static irqreturn_t mpt_interrupt(int irq, void *bus_id);
164 static int mptbase_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req,
165 MPT_FRAME_HDR *reply);
166 static int mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
167 u32 *req, int replyBytes, u16 *u16reply, int maxwait,
168 int sleepFlag);
169 static int mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
170 static void mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
171 static void mpt_adapter_disable(MPT_ADAPTER *ioc);
172 static void mpt_adapter_dispose(MPT_ADAPTER *ioc);
173
174 static void MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
175 static int MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
176 static int GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
177 static int GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
178 static int SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
179 static int SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
180 static int mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
181 static int mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
182 static int mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
183 static int KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
184 static int SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
185 static int PrimeIocFifos(MPT_ADAPTER *ioc);
186 static int WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
187 static int WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
188 static int WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
189 static int GetLanConfigPages(MPT_ADAPTER *ioc);
190 static int GetIoUnitPage2(MPT_ADAPTER *ioc);
191 int mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
192 static int mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
193 static int mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
194 static void mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
195 static void mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
196 static void mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc);
197 static int SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch,
198 int sleepFlag);
199 static int SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
200 static int mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
201 static int mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
202
203 #ifdef CONFIG_PROC_FS
204 static const struct file_operations mpt_summary_proc_fops;
205 static const struct file_operations mpt_version_proc_fops;
206 static const struct file_operations mpt_iocinfo_proc_fops;
207 #endif
208 static void mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
209
210 static int ProcessEventNotification(MPT_ADAPTER *ioc,
211 EventNotificationReply_t *evReply, int *evHandlers);
212 static void mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
213 static void mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
214 static void mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info);
215 static void mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info , u8 cb_idx);
216 static int mpt_read_ioc_pg_3(MPT_ADAPTER *ioc);
217 static void mpt_inactive_raid_list_free(MPT_ADAPTER *ioc);
218
219 /* module entry point */
220 static int __init fusion_init (void);
221 static void __exit fusion_exit (void);
222
223 #define CHIPREG_READ32(addr) readl_relaxed(addr)
224 #define CHIPREG_READ32_dmasync(addr) readl(addr)
225 #define CHIPREG_WRITE32(addr,val) writel(val, addr)
226 #define CHIPREG_PIO_WRITE32(addr,val) outl(val, (unsigned long)addr)
227 #define CHIPREG_PIO_READ32(addr) inl((unsigned long)addr)
228
229 static void
230 pci_disable_io_access(struct pci_dev *pdev)
231 {
232 u16 command_reg;
233
234 pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
235 command_reg &= ~1;
236 pci_write_config_word(pdev, PCI_COMMAND, command_reg);
237 }
238
239 static void
240 pci_enable_io_access(struct pci_dev *pdev)
241 {
242 u16 command_reg;
243
244 pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
245 command_reg |= 1;
246 pci_write_config_word(pdev, PCI_COMMAND, command_reg);
247 }
248
249 static int mpt_set_debug_level(const char *val, struct kernel_param *kp)
250 {
251 int ret = param_set_int(val, kp);
252 MPT_ADAPTER *ioc;
253
254 if (ret)
255 return ret;
256
257 list_for_each_entry(ioc, &ioc_list, list)
258 ioc->debug_level = mpt_debug_level;
259 return 0;
260 }
261
262 /**
263 * mpt_get_cb_idx - obtain cb_idx for registered driver
264 * @dclass: class driver enum
265 *
266 * Returns cb_idx, or zero means it wasn't found
267 **/
268 static u8
269 mpt_get_cb_idx(MPT_DRIVER_CLASS dclass)
270 {
271 u8 cb_idx;
272
273 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--)
274 if (MptDriverClass[cb_idx] == dclass)
275 return cb_idx;
276 return 0;
277 }
278
279 /**
280 * mpt_is_discovery_complete - determine if discovery has completed
281 * @ioc: per adatper instance
282 *
283 * Returns 1 when discovery completed, else zero.
284 */
285 static int
286 mpt_is_discovery_complete(MPT_ADAPTER *ioc)
287 {
288 ConfigExtendedPageHeader_t hdr;
289 CONFIGPARMS cfg;
290 SasIOUnitPage0_t *buffer;
291 dma_addr_t dma_handle;
292 int rc = 0;
293
294 memset(&hdr, 0, sizeof(ConfigExtendedPageHeader_t));
295 memset(&cfg, 0, sizeof(CONFIGPARMS));
296 hdr.PageVersion = MPI_SASIOUNITPAGE0_PAGEVERSION;
297 hdr.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
298 hdr.ExtPageType = MPI_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
299 cfg.cfghdr.ehdr = &hdr;
300 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
301
302 if ((mpt_config(ioc, &cfg)))
303 goto out;
304 if (!hdr.ExtPageLength)
305 goto out;
306
307 buffer = pci_alloc_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
308 &dma_handle);
309 if (!buffer)
310 goto out;
311
312 cfg.physAddr = dma_handle;
313 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
314
315 if ((mpt_config(ioc, &cfg)))
316 goto out_free_consistent;
317
318 if (!(buffer->PhyData[0].PortFlags &
319 MPI_SAS_IOUNIT0_PORT_FLAGS_DISCOVERY_IN_PROGRESS))
320 rc = 1;
321
322 out_free_consistent:
323 pci_free_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
324 buffer, dma_handle);
325 out:
326 return rc;
327 }
328
329
330 /**
331 * mpt_remove_dead_ioc_func - kthread context to remove dead ioc
332 * @arg: input argument, used to derive ioc
333 *
334 * Return 0 if controller is removed from pci subsystem.
335 * Return -1 for other case.
336 */
337 static int mpt_remove_dead_ioc_func(void *arg)
338 {
339 MPT_ADAPTER *ioc = (MPT_ADAPTER *)arg;
340 struct pci_dev *pdev;
341
342 if ((ioc == NULL))
343 return -1;
344
345 pdev = ioc->pcidev;
346 if ((pdev == NULL))
347 return -1;
348
349 pci_stop_and_remove_bus_device_locked(pdev);
350 return 0;
351 }
352
353
354
355 /**
356 * mpt_fault_reset_work - work performed on workq after ioc fault
357 * @work: input argument, used to derive ioc
358 *
359 **/
360 static void
361 mpt_fault_reset_work(struct work_struct *work)
362 {
363 MPT_ADAPTER *ioc =
364 container_of(work, MPT_ADAPTER, fault_reset_work.work);
365 u32 ioc_raw_state;
366 int rc;
367 unsigned long flags;
368 MPT_SCSI_HOST *hd;
369 struct task_struct *p;
370
371 if (ioc->ioc_reset_in_progress || !ioc->active)
372 goto out;
373
374
375 ioc_raw_state = mpt_GetIocState(ioc, 0);
376 if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_MASK) {
377 printk(MYIOC_s_INFO_FMT "%s: IOC is non-operational !!!!\n",
378 ioc->name, __func__);
379
380 /*
381 * Call mptscsih_flush_pending_cmds callback so that we
382 * flush all pending commands back to OS.
383 * This call is required to aovid deadlock at block layer.
384 * Dead IOC will fail to do diag reset,and this call is safe
385 * since dead ioc will never return any command back from HW.
386 */
387 hd = shost_priv(ioc->sh);
388 ioc->schedule_dead_ioc_flush_running_cmds(hd);
389
390 /*Remove the Dead Host */
391 p = kthread_run(mpt_remove_dead_ioc_func, ioc,
392 "mpt_dead_ioc_%d", ioc->id);
393 if (IS_ERR(p)) {
394 printk(MYIOC_s_ERR_FMT
395 "%s: Running mpt_dead_ioc thread failed !\n",
396 ioc->name, __func__);
397 } else {
398 printk(MYIOC_s_WARN_FMT
399 "%s: Running mpt_dead_ioc thread success !\n",
400 ioc->name, __func__);
401 }
402 return; /* don't rearm timer */
403 }
404
405 if ((ioc_raw_state & MPI_IOC_STATE_MASK)
406 == MPI_IOC_STATE_FAULT) {
407 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state (%04xh)!!!\n",
408 ioc->name, ioc_raw_state & MPI_DOORBELL_DATA_MASK);
409 printk(MYIOC_s_WARN_FMT "Issuing HardReset from %s!!\n",
410 ioc->name, __func__);
411 rc = mpt_HardResetHandler(ioc, CAN_SLEEP);
412 printk(MYIOC_s_WARN_FMT "%s: HardReset: %s\n", ioc->name,
413 __func__, (rc == 0) ? "success" : "failed");
414 ioc_raw_state = mpt_GetIocState(ioc, 0);
415 if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT)
416 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state after "
417 "reset (%04xh)\n", ioc->name, ioc_raw_state &
418 MPI_DOORBELL_DATA_MASK);
419 } else if (ioc->bus_type == SAS && ioc->sas_discovery_quiesce_io) {
420 if ((mpt_is_discovery_complete(ioc))) {
421 devtprintk(ioc, printk(MYIOC_s_DEBUG_FMT "clearing "
422 "discovery_quiesce_io flag\n", ioc->name));
423 ioc->sas_discovery_quiesce_io = 0;
424 }
425 }
426
427 out:
428 /*
429 * Take turns polling alternate controller
430 */
431 if (ioc->alt_ioc)
432 ioc = ioc->alt_ioc;
433
434 /* rearm the timer */
435 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
436 if (ioc->reset_work_q)
437 queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
438 msecs_to_jiffies(MPT_POLLING_INTERVAL));
439 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
440 }
441
442
443 /*
444 * Process turbo (context) reply...
445 */
446 static void
447 mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
448 {
449 MPT_FRAME_HDR *mf = NULL;
450 MPT_FRAME_HDR *mr = NULL;
451 u16 req_idx = 0;
452 u8 cb_idx;
453
454 dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got TURBO reply req_idx=%08x\n",
455 ioc->name, pa));
456
457 switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) {
458 case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT:
459 req_idx = pa & 0x0000FFFF;
460 cb_idx = (pa & 0x00FF0000) >> 16;
461 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
462 break;
463 case MPI_CONTEXT_REPLY_TYPE_LAN:
464 cb_idx = mpt_get_cb_idx(MPTLAN_DRIVER);
465 /*
466 * Blind set of mf to NULL here was fatal
467 * after lan_reply says "freeme"
468 * Fix sort of combined with an optimization here;
469 * added explicit check for case where lan_reply
470 * was just returning 1 and doing nothing else.
471 * For this case skip the callback, but set up
472 * proper mf value first here:-)
473 */
474 if ((pa & 0x58000000) == 0x58000000) {
475 req_idx = pa & 0x0000FFFF;
476 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
477 mpt_free_msg_frame(ioc, mf);
478 mb();
479 return;
480 break;
481 }
482 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
483 break;
484 case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET:
485 cb_idx = mpt_get_cb_idx(MPTSTM_DRIVER);
486 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
487 break;
488 default:
489 cb_idx = 0;
490 BUG();
491 }
492
493 /* Check for (valid) IO callback! */
494 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
495 MptCallbacks[cb_idx] == NULL) {
496 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
497 __func__, ioc->name, cb_idx);
498 goto out;
499 }
500
501 if (MptCallbacks[cb_idx](ioc, mf, mr))
502 mpt_free_msg_frame(ioc, mf);
503 out:
504 mb();
505 }
506
507 static void
508 mpt_reply(MPT_ADAPTER *ioc, u32 pa)
509 {
510 MPT_FRAME_HDR *mf;
511 MPT_FRAME_HDR *mr;
512 u16 req_idx;
513 u8 cb_idx;
514 int freeme;
515
516 u32 reply_dma_low;
517 u16 ioc_stat;
518
519 /* non-TURBO reply! Hmmm, something may be up...
520 * Newest turbo reply mechanism; get address
521 * via left shift 1 (get rid of MPI_ADDRESS_REPLY_A_BIT)!
522 */
523
524 /* Map DMA address of reply header to cpu address.
525 * pa is 32 bits - but the dma address may be 32 or 64 bits
526 * get offset based only only the low addresses
527 */
528
529 reply_dma_low = (pa <<= 1);
530 mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
531 (reply_dma_low - ioc->reply_frames_low_dma));
532
533 req_idx = le16_to_cpu(mr->u.frame.hwhdr.msgctxu.fld.req_idx);
534 cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx;
535 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
536
537 dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
538 ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
539 DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mr);
540
541 /* Check/log IOC log info
542 */
543 ioc_stat = le16_to_cpu(mr->u.reply.IOCStatus);
544 if (ioc_stat & MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
545 u32 log_info = le32_to_cpu(mr->u.reply.IOCLogInfo);
546 if (ioc->bus_type == FC)
547 mpt_fc_log_info(ioc, log_info);
548 else if (ioc->bus_type == SPI)
549 mpt_spi_log_info(ioc, log_info);
550 else if (ioc->bus_type == SAS)
551 mpt_sas_log_info(ioc, log_info, cb_idx);
552 }
553
554 if (ioc_stat & MPI_IOCSTATUS_MASK)
555 mpt_iocstatus_info(ioc, (u32)ioc_stat, mf);
556
557 /* Check for (valid) IO callback! */
558 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
559 MptCallbacks[cb_idx] == NULL) {
560 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
561 __func__, ioc->name, cb_idx);
562 freeme = 0;
563 goto out;
564 }
565
566 freeme = MptCallbacks[cb_idx](ioc, mf, mr);
567
568 out:
569 /* Flush (non-TURBO) reply with a WRITE! */
570 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
571
572 if (freeme)
573 mpt_free_msg_frame(ioc, mf);
574 mb();
575 }
576
577 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
578 /**
579 * mpt_interrupt - MPT adapter (IOC) specific interrupt handler.
580 * @irq: irq number (not used)
581 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
582 *
583 * This routine is registered via the request_irq() kernel API call,
584 * and handles all interrupts generated from a specific MPT adapter
585 * (also referred to as a IO Controller or IOC).
586 * This routine must clear the interrupt from the adapter and does
587 * so by reading the reply FIFO. Multiple replies may be processed
588 * per single call to this routine.
589 *
590 * This routine handles register-level access of the adapter but
591 * dispatches (calls) a protocol-specific callback routine to handle
592 * the protocol-specific details of the MPT request completion.
593 */
594 static irqreturn_t
595 mpt_interrupt(int irq, void *bus_id)
596 {
597 MPT_ADAPTER *ioc = bus_id;
598 u32 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
599
600 if (pa == 0xFFFFFFFF)
601 return IRQ_NONE;
602
603 /*
604 * Drain the reply FIFO!
605 */
606 do {
607 if (pa & MPI_ADDRESS_REPLY_A_BIT)
608 mpt_reply(ioc, pa);
609 else
610 mpt_turbo_reply(ioc, pa);
611 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
612 } while (pa != 0xFFFFFFFF);
613
614 return IRQ_HANDLED;
615 }
616
617 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
618 /**
619 * mptbase_reply - MPT base driver's callback routine
620 * @ioc: Pointer to MPT_ADAPTER structure
621 * @req: Pointer to original MPT request frame
622 * @reply: Pointer to MPT reply frame (NULL if TurboReply)
623 *
624 * MPT base driver's callback routine; all base driver
625 * "internal" request/reply processing is routed here.
626 * Currently used for EventNotification and EventAck handling.
627 *
628 * Returns 1 indicating original alloc'd request frame ptr
629 * should be freed, or 0 if it shouldn't.
630 */
631 static int
632 mptbase_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply)
633 {
634 EventNotificationReply_t *pEventReply;
635 u8 event;
636 int evHandlers;
637 int freereq = 1;
638
639 switch (reply->u.hdr.Function) {
640 case MPI_FUNCTION_EVENT_NOTIFICATION:
641 pEventReply = (EventNotificationReply_t *)reply;
642 evHandlers = 0;
643 ProcessEventNotification(ioc, pEventReply, &evHandlers);
644 event = le32_to_cpu(pEventReply->Event) & 0xFF;
645 if (pEventReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)
646 freereq = 0;
647 if (event != MPI_EVENT_EVENT_CHANGE)
648 break;
649 case MPI_FUNCTION_CONFIG:
650 case MPI_FUNCTION_SAS_IO_UNIT_CONTROL:
651 ioc->mptbase_cmds.status |= MPT_MGMT_STATUS_COMMAND_GOOD;
652 ioc->mptbase_cmds.status |= MPT_MGMT_STATUS_RF_VALID;
653 memcpy(ioc->mptbase_cmds.reply, reply,
654 min(MPT_DEFAULT_FRAME_SIZE,
655 4 * reply->u.reply.MsgLength));
656 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_PENDING) {
657 ioc->mptbase_cmds.status &= ~MPT_MGMT_STATUS_PENDING;
658 complete(&ioc->mptbase_cmds.done);
659 } else
660 freereq = 0;
661 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_FREE_MF)
662 freereq = 1;
663 break;
664 case MPI_FUNCTION_EVENT_ACK:
665 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
666 "EventAck reply received\n", ioc->name));
667 break;
668 default:
669 printk(MYIOC_s_ERR_FMT
670 "Unexpected msg function (=%02Xh) reply received!\n",
671 ioc->name, reply->u.hdr.Function);
672 break;
673 }
674
675 /*
676 * Conditionally tell caller to free the original
677 * EventNotification/EventAck/unexpected request frame!
678 */
679 return freereq;
680 }
681
682 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
683 /**
684 * mpt_register - Register protocol-specific main callback handler.
685 * @cbfunc: callback function pointer
686 * @dclass: Protocol driver's class (%MPT_DRIVER_CLASS enum value)
687 * @func_name: call function's name
688 *
689 * This routine is called by a protocol-specific driver (SCSI host,
690 * LAN, SCSI target) to register its reply callback routine. Each
691 * protocol-specific driver must do this before it will be able to
692 * use any IOC resources, such as obtaining request frames.
693 *
694 * NOTES: The SCSI protocol driver currently calls this routine thrice
695 * in order to register separate callbacks; one for "normal" SCSI IO;
696 * one for MptScsiTaskMgmt requests; one for Scan/DV requests.
697 *
698 * Returns u8 valued "handle" in the range (and S.O.D. order)
699 * {N,...,7,6,5,...,1} if successful.
700 * A return value of MPT_MAX_PROTOCOL_DRIVERS (including zero!) should be
701 * considered an error by the caller.
702 */
703 u8
704 mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass, char *func_name)
705 {
706 u8 cb_idx;
707 last_drv_idx = MPT_MAX_PROTOCOL_DRIVERS;
708
709 /*
710 * Search for empty callback slot in this order: {N,...,7,6,5,...,1}
711 * (slot/handle 0 is reserved!)
712 */
713 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
714 if (MptCallbacks[cb_idx] == NULL) {
715 MptCallbacks[cb_idx] = cbfunc;
716 MptDriverClass[cb_idx] = dclass;
717 MptEvHandlers[cb_idx] = NULL;
718 last_drv_idx = cb_idx;
719 strlcpy(MptCallbacksName[cb_idx], func_name,
720 MPT_MAX_CALLBACKNAME_LEN+1);
721 break;
722 }
723 }
724
725 return last_drv_idx;
726 }
727
728 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
729 /**
730 * mpt_deregister - Deregister a protocol drivers resources.
731 * @cb_idx: previously registered callback handle
732 *
733 * Each protocol-specific driver should call this routine when its
734 * module is unloaded.
735 */
736 void
737 mpt_deregister(u8 cb_idx)
738 {
739 if (cb_idx && (cb_idx < MPT_MAX_PROTOCOL_DRIVERS)) {
740 MptCallbacks[cb_idx] = NULL;
741 MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
742 MptEvHandlers[cb_idx] = NULL;
743
744 last_drv_idx++;
745 }
746 }
747
748 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
749 /**
750 * mpt_event_register - Register protocol-specific event callback handler.
751 * @cb_idx: previously registered (via mpt_register) callback handle
752 * @ev_cbfunc: callback function
753 *
754 * This routine can be called by one or more protocol-specific drivers
755 * if/when they choose to be notified of MPT events.
756 *
757 * Returns 0 for success.
758 */
759 int
760 mpt_event_register(u8 cb_idx, MPT_EVHANDLER ev_cbfunc)
761 {
762 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
763 return -1;
764
765 MptEvHandlers[cb_idx] = ev_cbfunc;
766 return 0;
767 }
768
769 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
770 /**
771 * mpt_event_deregister - Deregister protocol-specific event callback handler
772 * @cb_idx: previously registered callback handle
773 *
774 * Each protocol-specific driver should call this routine
775 * when it does not (or can no longer) handle events,
776 * or when its module is unloaded.
777 */
778 void
779 mpt_event_deregister(u8 cb_idx)
780 {
781 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
782 return;
783
784 MptEvHandlers[cb_idx] = NULL;
785 }
786
787 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
788 /**
789 * mpt_reset_register - Register protocol-specific IOC reset handler.
790 * @cb_idx: previously registered (via mpt_register) callback handle
791 * @reset_func: reset function
792 *
793 * This routine can be called by one or more protocol-specific drivers
794 * if/when they choose to be notified of IOC resets.
795 *
796 * Returns 0 for success.
797 */
798 int
799 mpt_reset_register(u8 cb_idx, MPT_RESETHANDLER reset_func)
800 {
801 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
802 return -1;
803
804 MptResetHandlers[cb_idx] = reset_func;
805 return 0;
806 }
807
808 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
809 /**
810 * mpt_reset_deregister - Deregister protocol-specific IOC reset handler.
811 * @cb_idx: previously registered callback handle
812 *
813 * Each protocol-specific driver should call this routine
814 * when it does not (or can no longer) handle IOC reset handling,
815 * or when its module is unloaded.
816 */
817 void
818 mpt_reset_deregister(u8 cb_idx)
819 {
820 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
821 return;
822
823 MptResetHandlers[cb_idx] = NULL;
824 }
825
826 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
827 /**
828 * mpt_device_driver_register - Register device driver hooks
829 * @dd_cbfunc: driver callbacks struct
830 * @cb_idx: MPT protocol driver index
831 */
832 int
833 mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, u8 cb_idx)
834 {
835 MPT_ADAPTER *ioc;
836 const struct pci_device_id *id;
837
838 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
839 return -EINVAL;
840
841 MptDeviceDriverHandlers[cb_idx] = dd_cbfunc;
842
843 /* call per pci device probe entry point */
844 list_for_each_entry(ioc, &ioc_list, list) {
845 id = ioc->pcidev->driver ?
846 ioc->pcidev->driver->id_table : NULL;
847 if (dd_cbfunc->probe)
848 dd_cbfunc->probe(ioc->pcidev, id);
849 }
850
851 return 0;
852 }
853
854 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
855 /**
856 * mpt_device_driver_deregister - DeRegister device driver hooks
857 * @cb_idx: MPT protocol driver index
858 */
859 void
860 mpt_device_driver_deregister(u8 cb_idx)
861 {
862 struct mpt_pci_driver *dd_cbfunc;
863 MPT_ADAPTER *ioc;
864
865 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
866 return;
867
868 dd_cbfunc = MptDeviceDriverHandlers[cb_idx];
869
870 list_for_each_entry(ioc, &ioc_list, list) {
871 if (dd_cbfunc->remove)
872 dd_cbfunc->remove(ioc->pcidev);
873 }
874
875 MptDeviceDriverHandlers[cb_idx] = NULL;
876 }
877
878
879 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
880 /**
881 * mpt_get_msg_frame - Obtain an MPT request frame from the pool
882 * @cb_idx: Handle of registered MPT protocol driver
883 * @ioc: Pointer to MPT adapter structure
884 *
885 * Obtain an MPT request frame from the pool (of 1024) that are
886 * allocated per MPT adapter.
887 *
888 * Returns pointer to a MPT request frame or %NULL if none are available
889 * or IOC is not active.
890 */
891 MPT_FRAME_HDR*
892 mpt_get_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc)
893 {
894 MPT_FRAME_HDR *mf;
895 unsigned long flags;
896 u16 req_idx; /* Request index */
897
898 /* validate handle and ioc identifier */
899
900 #ifdef MFCNT
901 if (!ioc->active)
902 printk(MYIOC_s_WARN_FMT "IOC Not Active! mpt_get_msg_frame "
903 "returning NULL!\n", ioc->name);
904 #endif
905
906 /* If interrupts are not attached, do not return a request frame */
907 if (!ioc->active)
908 return NULL;
909
910 spin_lock_irqsave(&ioc->FreeQlock, flags);
911 if (!list_empty(&ioc->FreeQ)) {
912 int req_offset;
913
914 mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
915 u.frame.linkage.list);
916 list_del(&mf->u.frame.linkage.list);
917 mf->u.frame.linkage.arg1 = 0;
918 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx; /* byte */
919 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
920 /* u16! */
921 req_idx = req_offset / ioc->req_sz;
922 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
923 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
924 /* Default, will be changed if necessary in SG generation */
925 ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame;
926 #ifdef MFCNT
927 ioc->mfcnt++;
928 #endif
929 }
930 else
931 mf = NULL;
932 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
933
934 #ifdef MFCNT
935 if (mf == NULL)
936 printk(MYIOC_s_WARN_FMT "IOC Active. No free Msg Frames! "
937 "Count 0x%x Max 0x%x\n", ioc->name, ioc->mfcnt,
938 ioc->req_depth);
939 mfcounter++;
940 if (mfcounter == PRINT_MF_COUNT)
941 printk(MYIOC_s_INFO_FMT "MF Count 0x%x Max 0x%x \n", ioc->name,
942 ioc->mfcnt, ioc->req_depth);
943 #endif
944
945 dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_get_msg_frame(%d,%d), got mf=%p\n",
946 ioc->name, cb_idx, ioc->id, mf));
947 return mf;
948 }
949
950 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
951 /**
952 * mpt_put_msg_frame - Send a protocol-specific MPT request frame to an IOC
953 * @cb_idx: Handle of registered MPT protocol driver
954 * @ioc: Pointer to MPT adapter structure
955 * @mf: Pointer to MPT request frame
956 *
957 * This routine posts an MPT request frame to the request post FIFO of a
958 * specific MPT adapter.
959 */
960 void
961 mpt_put_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
962 {
963 u32 mf_dma_addr;
964 int req_offset;
965 u16 req_idx; /* Request index */
966
967 /* ensure values are reset properly! */
968 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx; /* byte */
969 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
970 /* u16! */
971 req_idx = req_offset / ioc->req_sz;
972 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
973 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
974
975 DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
976
977 mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
978 dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d "
979 "RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx,
980 ioc->RequestNB[req_idx]));
981 CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
982 }
983
984 /**
985 * mpt_put_msg_frame_hi_pri - Send a hi-pri protocol-specific MPT request frame
986 * @cb_idx: Handle of registered MPT protocol driver
987 * @ioc: Pointer to MPT adapter structure
988 * @mf: Pointer to MPT request frame
989 *
990 * Send a protocol-specific MPT request frame to an IOC using
991 * hi-priority request queue.
992 *
993 * This routine posts an MPT request frame to the request post FIFO of a
994 * specific MPT adapter.
995 **/
996 void
997 mpt_put_msg_frame_hi_pri(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
998 {
999 u32 mf_dma_addr;
1000 int req_offset;
1001 u16 req_idx; /* Request index */
1002
1003 /* ensure values are reset properly! */
1004 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;
1005 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
1006 req_idx = req_offset / ioc->req_sz;
1007 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
1008 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
1009
1010 DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
1011
1012 mf_dma_addr = (ioc->req_frames_low_dma + req_offset);
1013 dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d\n",
1014 ioc->name, mf_dma_addr, req_idx));
1015 CHIPREG_WRITE32(&ioc->chip->RequestHiPriFifo, mf_dma_addr);
1016 }
1017
1018 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1019 /**
1020 * mpt_free_msg_frame - Place MPT request frame back on FreeQ.
1021 * @ioc: Pointer to MPT adapter structure
1022 * @mf: Pointer to MPT request frame
1023 *
1024 * This routine places a MPT request frame back on the MPT adapter's
1025 * FreeQ.
1026 */
1027 void
1028 mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
1029 {
1030 unsigned long flags;
1031
1032 /* Put Request back on FreeQ! */
1033 spin_lock_irqsave(&ioc->FreeQlock, flags);
1034 if (cpu_to_le32(mf->u.frame.linkage.arg1) == 0xdeadbeaf)
1035 goto out;
1036 /* signature to know if this mf is freed */
1037 mf->u.frame.linkage.arg1 = cpu_to_le32(0xdeadbeaf);
1038 list_add(&mf->u.frame.linkage.list, &ioc->FreeQ);
1039 #ifdef MFCNT
1040 ioc->mfcnt--;
1041 #endif
1042 out:
1043 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
1044 }
1045
1046 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1047 /**
1048 * mpt_add_sge - Place a simple 32 bit SGE at address pAddr.
1049 * @pAddr: virtual address for SGE
1050 * @flagslength: SGE flags and data transfer length
1051 * @dma_addr: Physical address
1052 *
1053 * This routine places a MPT request frame back on the MPT adapter's
1054 * FreeQ.
1055 */
1056 static void
1057 mpt_add_sge(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
1058 {
1059 SGESimple32_t *pSge = (SGESimple32_t *) pAddr;
1060 pSge->FlagsLength = cpu_to_le32(flagslength);
1061 pSge->Address = cpu_to_le32(dma_addr);
1062 }
1063
1064 /**
1065 * mpt_add_sge_64bit - Place a simple 64 bit SGE at address pAddr.
1066 * @pAddr: virtual address for SGE
1067 * @flagslength: SGE flags and data transfer length
1068 * @dma_addr: Physical address
1069 *
1070 * This routine places a MPT request frame back on the MPT adapter's
1071 * FreeQ.
1072 **/
1073 static void
1074 mpt_add_sge_64bit(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
1075 {
1076 SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
1077 pSge->Address.Low = cpu_to_le32
1078 (lower_32_bits(dma_addr));
1079 pSge->Address.High = cpu_to_le32
1080 (upper_32_bits(dma_addr));
1081 pSge->FlagsLength = cpu_to_le32
1082 ((flagslength | MPT_SGE_FLAGS_64_BIT_ADDRESSING));
1083 }
1084
1085 /**
1086 * mpt_add_sge_64bit_1078 - Place a simple 64 bit SGE at address pAddr (1078 workaround).
1087 * @pAddr: virtual address for SGE
1088 * @flagslength: SGE flags and data transfer length
1089 * @dma_addr: Physical address
1090 *
1091 * This routine places a MPT request frame back on the MPT adapter's
1092 * FreeQ.
1093 **/
1094 static void
1095 mpt_add_sge_64bit_1078(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
1096 {
1097 SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
1098 u32 tmp;
1099
1100 pSge->Address.Low = cpu_to_le32
1101 (lower_32_bits(dma_addr));
1102 tmp = (u32)(upper_32_bits(dma_addr));
1103
1104 /*
1105 * 1078 errata workaround for the 36GB limitation
1106 */
1107 if ((((u64)dma_addr + MPI_SGE_LENGTH(flagslength)) >> 32) == 9) {
1108 flagslength |=
1109 MPI_SGE_SET_FLAGS(MPI_SGE_FLAGS_LOCAL_ADDRESS);
1110 tmp |= (1<<31);
1111 if (mpt_debug_level & MPT_DEBUG_36GB_MEM)
1112 printk(KERN_DEBUG "1078 P0M2 addressing for "
1113 "addr = 0x%llx len = %d\n",
1114 (unsigned long long)dma_addr,
1115 MPI_SGE_LENGTH(flagslength));
1116 }
1117
1118 pSge->Address.High = cpu_to_le32(tmp);
1119 pSge->FlagsLength = cpu_to_le32(
1120 (flagslength | MPT_SGE_FLAGS_64_BIT_ADDRESSING));
1121 }
1122
1123 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1124 /**
1125 * mpt_add_chain - Place a 32 bit chain SGE at address pAddr.
1126 * @pAddr: virtual address for SGE
1127 * @next: nextChainOffset value (u32's)
1128 * @length: length of next SGL segment
1129 * @dma_addr: Physical address
1130 *
1131 */
1132 static void
1133 mpt_add_chain(void *pAddr, u8 next, u16 length, dma_addr_t dma_addr)
1134 {
1135 SGEChain32_t *pChain = (SGEChain32_t *) pAddr;
1136 pChain->Length = cpu_to_le16(length);
1137 pChain->Flags = MPI_SGE_FLAGS_CHAIN_ELEMENT;
1138 pChain->NextChainOffset = next;
1139 pChain->Address = cpu_to_le32(dma_addr);
1140 }
1141
1142 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1143 /**
1144 * mpt_add_chain_64bit - Place a 64 bit chain SGE at address pAddr.
1145 * @pAddr: virtual address for SGE
1146 * @next: nextChainOffset value (u32's)
1147 * @length: length of next SGL segment
1148 * @dma_addr: Physical address
1149 *
1150 */
1151 static void
1152 mpt_add_chain_64bit(void *pAddr, u8 next, u16 length, dma_addr_t dma_addr)
1153 {
1154 SGEChain64_t *pChain = (SGEChain64_t *) pAddr;
1155 u32 tmp = dma_addr & 0xFFFFFFFF;
1156
1157 pChain->Length = cpu_to_le16(length);
1158 pChain->Flags = (MPI_SGE_FLAGS_CHAIN_ELEMENT |
1159 MPI_SGE_FLAGS_64_BIT_ADDRESSING);
1160
1161 pChain->NextChainOffset = next;
1162
1163 pChain->Address.Low = cpu_to_le32(tmp);
1164 tmp = (u32)(upper_32_bits(dma_addr));
1165 pChain->Address.High = cpu_to_le32(tmp);
1166 }
1167
1168 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1169 /**
1170 * mpt_send_handshake_request - Send MPT request via doorbell handshake method.
1171 * @cb_idx: Handle of registered MPT protocol driver
1172 * @ioc: Pointer to MPT adapter structure
1173 * @reqBytes: Size of the request in bytes
1174 * @req: Pointer to MPT request frame
1175 * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
1176 *
1177 * This routine is used exclusively to send MptScsiTaskMgmt
1178 * requests since they are required to be sent via doorbell handshake.
1179 *
1180 * NOTE: It is the callers responsibility to byte-swap fields in the
1181 * request which are greater than 1 byte in size.
1182 *
1183 * Returns 0 for success, non-zero for failure.
1184 */
1185 int
1186 mpt_send_handshake_request(u8 cb_idx, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
1187 {
1188 int r = 0;
1189 u8 *req_as_bytes;
1190 int ii;
1191
1192 /* State is known to be good upon entering
1193 * this function so issue the bus reset
1194 * request.
1195 */
1196
1197 /*
1198 * Emulate what mpt_put_msg_frame() does /wrt to sanity
1199 * setting cb_idx/req_idx. But ONLY if this request
1200 * is in proper (pre-alloc'd) request buffer range...
1201 */
1202 ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
1203 if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
1204 MPT_FRAME_HDR *mf = (MPT_FRAME_HDR*)req;
1205 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(ii);
1206 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;
1207 }
1208
1209 /* Make sure there are no doorbells */
1210 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1211
1212 CHIPREG_WRITE32(&ioc->chip->Doorbell,
1213 ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
1214 ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
1215
1216 /* Wait for IOC doorbell int */
1217 if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
1218 return ii;
1219 }
1220
1221 /* Read doorbell and check for active bit */
1222 if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
1223 return -5;
1224
1225 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_send_handshake_request start, WaitCnt=%d\n",
1226 ioc->name, ii));
1227
1228 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1229
1230 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1231 return -2;
1232 }
1233
1234 /* Send request via doorbell handshake */
1235 req_as_bytes = (u8 *) req;
1236 for (ii = 0; ii < reqBytes/4; ii++) {
1237 u32 word;
1238
1239 word = ((req_as_bytes[(ii*4) + 0] << 0) |
1240 (req_as_bytes[(ii*4) + 1] << 8) |
1241 (req_as_bytes[(ii*4) + 2] << 16) |
1242 (req_as_bytes[(ii*4) + 3] << 24));
1243 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
1244 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1245 r = -3;
1246 break;
1247 }
1248 }
1249
1250 if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
1251 r = 0;
1252 else
1253 r = -4;
1254
1255 /* Make sure there are no doorbells */
1256 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1257
1258 return r;
1259 }
1260
1261 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1262 /**
1263 * mpt_host_page_access_control - control the IOC's Host Page Buffer access
1264 * @ioc: Pointer to MPT adapter structure
1265 * @access_control_value: define bits below
1266 * @sleepFlag: Specifies whether the process can sleep
1267 *
1268 * Provides mechanism for the host driver to control the IOC's
1269 * Host Page Buffer access.
1270 *
1271 * Access Control Value - bits[15:12]
1272 * 0h Reserved
1273 * 1h Enable Access { MPI_DB_HPBAC_ENABLE_ACCESS }
1274 * 2h Disable Access { MPI_DB_HPBAC_DISABLE_ACCESS }
1275 * 3h Free Buffer { MPI_DB_HPBAC_FREE_BUFFER }
1276 *
1277 * Returns 0 for success, non-zero for failure.
1278 */
1279
1280 static int
1281 mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
1282 {
1283 int r = 0;
1284
1285 /* return if in use */
1286 if (CHIPREG_READ32(&ioc->chip->Doorbell)
1287 & MPI_DOORBELL_ACTIVE)
1288 return -1;
1289
1290 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1291
1292 CHIPREG_WRITE32(&ioc->chip->Doorbell,
1293 ((MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL
1294 <<MPI_DOORBELL_FUNCTION_SHIFT) |
1295 (access_control_value<<12)));
1296
1297 /* Wait for IOC to clear Doorbell Status bit */
1298 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1299 return -2;
1300 }else
1301 return 0;
1302 }
1303
1304 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1305 /**
1306 * mpt_host_page_alloc - allocate system memory for the fw
1307 * @ioc: Pointer to pointer to IOC adapter
1308 * @ioc_init: Pointer to ioc init config page
1309 *
1310 * If we already allocated memory in past, then resend the same pointer.
1311 * Returns 0 for success, non-zero for failure.
1312 */
1313 static int
1314 mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
1315 {
1316 char *psge;
1317 int flags_length;
1318 u32 host_page_buffer_sz=0;
1319
1320 if(!ioc->HostPageBuffer) {
1321
1322 host_page_buffer_sz =
1323 le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
1324
1325 if(!host_page_buffer_sz)
1326 return 0; /* fw doesn't need any host buffers */
1327
1328 /* spin till we get enough memory */
1329 while(host_page_buffer_sz > 0) {
1330
1331 if((ioc->HostPageBuffer = pci_alloc_consistent(
1332 ioc->pcidev,
1333 host_page_buffer_sz,
1334 &ioc->HostPageBuffer_dma)) != NULL) {
1335
1336 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
1337 "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n",
1338 ioc->name, ioc->HostPageBuffer,
1339 (u32)ioc->HostPageBuffer_dma,
1340 host_page_buffer_sz));
1341 ioc->alloc_total += host_page_buffer_sz;
1342 ioc->HostPageBuffer_sz = host_page_buffer_sz;
1343 break;
1344 }
1345
1346 host_page_buffer_sz -= (4*1024);
1347 }
1348 }
1349
1350 if(!ioc->HostPageBuffer) {
1351 printk(MYIOC_s_ERR_FMT
1352 "Failed to alloc memory for host_page_buffer!\n",
1353 ioc->name);
1354 return -999;
1355 }
1356
1357 psge = (char *)&ioc_init->HostPageBufferSGE;
1358 flags_length = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
1359 MPI_SGE_FLAGS_SYSTEM_ADDRESS |
1360 MPI_SGE_FLAGS_HOST_TO_IOC |
1361 MPI_SGE_FLAGS_END_OF_BUFFER;
1362 flags_length = flags_length << MPI_SGE_FLAGS_SHIFT;
1363 flags_length |= ioc->HostPageBuffer_sz;
1364 ioc->add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
1365 ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
1366
1367 return 0;
1368 }
1369
1370 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1371 /**
1372 * mpt_verify_adapter - Given IOC identifier, set pointer to its adapter structure.
1373 * @iocid: IOC unique identifier (integer)
1374 * @iocpp: Pointer to pointer to IOC adapter
1375 *
1376 * Given a unique IOC identifier, set pointer to the associated MPT
1377 * adapter structure.
1378 *
1379 * Returns iocid and sets iocpp if iocid is found.
1380 * Returns -1 if iocid is not found.
1381 */
1382 int
1383 mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp)
1384 {
1385 MPT_ADAPTER *ioc;
1386
1387 list_for_each_entry(ioc,&ioc_list,list) {
1388 if (ioc->id == iocid) {
1389 *iocpp =ioc;
1390 return iocid;
1391 }
1392 }
1393
1394 *iocpp = NULL;
1395 return -1;
1396 }
1397
1398 /**
1399 * mpt_get_product_name - returns product string
1400 * @vendor: pci vendor id
1401 * @device: pci device id
1402 * @revision: pci revision id
1403 *
1404 * Returns product string displayed when driver loads,
1405 * in /proc/mpt/summary and /sysfs/class/scsi_host/host<X>/version_product
1406 *
1407 **/
1408 static const char*
1409 mpt_get_product_name(u16 vendor, u16 device, u8 revision)
1410 {
1411 char *product_str = NULL;
1412
1413 if (vendor == PCI_VENDOR_ID_BROCADE) {
1414 switch (device)
1415 {
1416 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1417 switch (revision)
1418 {
1419 case 0x00:
1420 product_str = "BRE040 A0";
1421 break;
1422 case 0x01:
1423 product_str = "BRE040 A1";
1424 break;
1425 default:
1426 product_str = "BRE040";
1427 break;
1428 }
1429 break;
1430 }
1431 goto out;
1432 }
1433
1434 switch (device)
1435 {
1436 case MPI_MANUFACTPAGE_DEVICEID_FC909:
1437 product_str = "LSIFC909 B1";
1438 break;
1439 case MPI_MANUFACTPAGE_DEVICEID_FC919:
1440 product_str = "LSIFC919 B0";
1441 break;
1442 case MPI_MANUFACTPAGE_DEVICEID_FC929:
1443 product_str = "LSIFC929 B0";
1444 break;
1445 case MPI_MANUFACTPAGE_DEVICEID_FC919X:
1446 if (revision < 0x80)
1447 product_str = "LSIFC919X A0";
1448 else
1449 product_str = "LSIFC919XL A1";
1450 break;
1451 case MPI_MANUFACTPAGE_DEVICEID_FC929X:
1452 if (revision < 0x80)
1453 product_str = "LSIFC929X A0";
1454 else
1455 product_str = "LSIFC929XL A1";
1456 break;
1457 case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1458 product_str = "LSIFC939X A1";
1459 break;
1460 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1461 product_str = "LSIFC949X A1";
1462 break;
1463 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1464 switch (revision)
1465 {
1466 case 0x00:
1467 product_str = "LSIFC949E A0";
1468 break;
1469 case 0x01:
1470 product_str = "LSIFC949E A1";
1471 break;
1472 default:
1473 product_str = "LSIFC949E";
1474 break;
1475 }
1476 break;
1477 case MPI_MANUFACTPAGE_DEVID_53C1030:
1478 switch (revision)
1479 {
1480 case 0x00:
1481 product_str = "LSI53C1030 A0";
1482 break;
1483 case 0x01:
1484 product_str = "LSI53C1030 B0";
1485 break;
1486 case 0x03:
1487 product_str = "LSI53C1030 B1";
1488 break;
1489 case 0x07:
1490 product_str = "LSI53C1030 B2";
1491 break;
1492 case 0x08:
1493 product_str = "LSI53C1030 C0";
1494 break;
1495 case 0x80:
1496 product_str = "LSI53C1030T A0";
1497 break;
1498 case 0x83:
1499 product_str = "LSI53C1030T A2";
1500 break;
1501 case 0x87:
1502 product_str = "LSI53C1030T A3";
1503 break;
1504 case 0xc1:
1505 product_str = "LSI53C1020A A1";
1506 break;
1507 default:
1508 product_str = "LSI53C1030";
1509 break;
1510 }
1511 break;
1512 case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1513 switch (revision)
1514 {
1515 case 0x03:
1516 product_str = "LSI53C1035 A2";
1517 break;
1518 case 0x04:
1519 product_str = "LSI53C1035 B0";
1520 break;
1521 default:
1522 product_str = "LSI53C1035";
1523 break;
1524 }
1525 break;
1526 case MPI_MANUFACTPAGE_DEVID_SAS1064:
1527 switch (revision)
1528 {
1529 case 0x00:
1530 product_str = "LSISAS1064 A1";
1531 break;
1532 case 0x01:
1533 product_str = "LSISAS1064 A2";
1534 break;
1535 case 0x02:
1536 product_str = "LSISAS1064 A3";
1537 break;
1538 case 0x03:
1539 product_str = "LSISAS1064 A4";
1540 break;
1541 default:
1542 product_str = "LSISAS1064";
1543 break;
1544 }
1545 break;
1546 case MPI_MANUFACTPAGE_DEVID_SAS1064E:
1547 switch (revision)
1548 {
1549 case 0x00:
1550 product_str = "LSISAS1064E A0";
1551 break;
1552 case 0x01:
1553 product_str = "LSISAS1064E B0";
1554 break;
1555 case 0x02:
1556 product_str = "LSISAS1064E B1";
1557 break;
1558 case 0x04:
1559 product_str = "LSISAS1064E B2";
1560 break;
1561 case 0x08:
1562 product_str = "LSISAS1064E B3";
1563 break;
1564 default:
1565 product_str = "LSISAS1064E";
1566 break;
1567 }
1568 break;
1569 case MPI_MANUFACTPAGE_DEVID_SAS1068:
1570 switch (revision)
1571 {
1572 case 0x00:
1573 product_str = "LSISAS1068 A0";
1574 break;
1575 case 0x01:
1576 product_str = "LSISAS1068 B0";
1577 break;
1578 case 0x02:
1579 product_str = "LSISAS1068 B1";
1580 break;
1581 default:
1582 product_str = "LSISAS1068";
1583 break;
1584 }
1585 break;
1586 case MPI_MANUFACTPAGE_DEVID_SAS1068E:
1587 switch (revision)
1588 {
1589 case 0x00:
1590 product_str = "LSISAS1068E A0";
1591 break;
1592 case 0x01:
1593 product_str = "LSISAS1068E B0";
1594 break;
1595 case 0x02:
1596 product_str = "LSISAS1068E B1";
1597 break;
1598 case 0x04:
1599 product_str = "LSISAS1068E B2";
1600 break;
1601 case 0x08:
1602 product_str = "LSISAS1068E B3";
1603 break;
1604 default:
1605 product_str = "LSISAS1068E";
1606 break;
1607 }
1608 break;
1609 case MPI_MANUFACTPAGE_DEVID_SAS1078:
1610 switch (revision)
1611 {
1612 case 0x00:
1613 product_str = "LSISAS1078 A0";
1614 break;
1615 case 0x01:
1616 product_str = "LSISAS1078 B0";
1617 break;
1618 case 0x02:
1619 product_str = "LSISAS1078 C0";
1620 break;
1621 case 0x03:
1622 product_str = "LSISAS1078 C1";
1623 break;
1624 case 0x04:
1625 product_str = "LSISAS1078 C2";
1626 break;
1627 default:
1628 product_str = "LSISAS1078";
1629 break;
1630 }
1631 break;
1632 }
1633
1634 out:
1635 return product_str;
1636 }
1637
1638 /**
1639 * mpt_mapresources - map in memory mapped io
1640 * @ioc: Pointer to pointer to IOC adapter
1641 *
1642 **/
1643 static int
1644 mpt_mapresources(MPT_ADAPTER *ioc)
1645 {
1646 u8 __iomem *mem;
1647 int ii;
1648 resource_size_t mem_phys;
1649 unsigned long port;
1650 u32 msize;
1651 u32 psize;
1652 int r = -ENODEV;
1653 struct pci_dev *pdev;
1654
1655 pdev = ioc->pcidev;
1656 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1657 if (pci_enable_device_mem(pdev)) {
1658 printk(MYIOC_s_ERR_FMT "pci_enable_device_mem() "
1659 "failed\n", ioc->name);
1660 return r;
1661 }
1662 if (pci_request_selected_regions(pdev, ioc->bars, "mpt")) {
1663 printk(MYIOC_s_ERR_FMT "pci_request_selected_regions() with "
1664 "MEM failed\n", ioc->name);
1665 goto out_pci_disable_device;
1666 }
1667
1668 if (sizeof(dma_addr_t) > 4) {
1669 const uint64_t required_mask = dma_get_required_mask
1670 (&pdev->dev);
1671 if (required_mask > DMA_BIT_MASK(32)
1672 && !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
1673 && !pci_set_consistent_dma_mask(pdev,
1674 DMA_BIT_MASK(64))) {
1675 ioc->dma_mask = DMA_BIT_MASK(64);
1676 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1677 ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1678 ioc->name));
1679 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1680 && !pci_set_consistent_dma_mask(pdev,
1681 DMA_BIT_MASK(32))) {
1682 ioc->dma_mask = DMA_BIT_MASK(32);
1683 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1684 ": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1685 ioc->name));
1686 } else {
1687 printk(MYIOC_s_WARN_FMT "no suitable DMA mask for %s\n",
1688 ioc->name, pci_name(pdev));
1689 goto out_pci_release_region;
1690 }
1691 } else {
1692 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1693 && !pci_set_consistent_dma_mask(pdev,
1694 DMA_BIT_MASK(32))) {
1695 ioc->dma_mask = DMA_BIT_MASK(32);
1696 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1697 ": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1698 ioc->name));
1699 } else {
1700 printk(MYIOC_s_WARN_FMT "no suitable DMA mask for %s\n",
1701 ioc->name, pci_name(pdev));
1702 goto out_pci_release_region;
1703 }
1704 }
1705
1706 mem_phys = msize = 0;
1707 port = psize = 0;
1708 for (ii = 0; ii < DEVICE_COUNT_RESOURCE; ii++) {
1709 if (pci_resource_flags(pdev, ii) & PCI_BASE_ADDRESS_SPACE_IO) {
1710 if (psize)
1711 continue;
1712 /* Get I/O space! */
1713 port = pci_resource_start(pdev, ii);
1714 psize = pci_resource_len(pdev, ii);
1715 } else {
1716 if (msize)
1717 continue;
1718 /* Get memmap */
1719 mem_phys = pci_resource_start(pdev, ii);
1720 msize = pci_resource_len(pdev, ii);
1721 }
1722 }
1723 ioc->mem_size = msize;
1724
1725 mem = NULL;
1726 /* Get logical ptr for PciMem0 space */
1727 /*mem = ioremap(mem_phys, msize);*/
1728 mem = ioremap(mem_phys, msize);
1729 if (mem == NULL) {
1730 printk(MYIOC_s_ERR_FMT ": ERROR - Unable to map adapter"
1731 " memory!\n", ioc->name);
1732 r = -EINVAL;
1733 goto out_pci_release_region;
1734 }
1735 ioc->memmap = mem;
1736 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "mem = %p, mem_phys = %llx\n",
1737 ioc->name, mem, (unsigned long long)mem_phys));
1738
1739 ioc->mem_phys = mem_phys;
1740 ioc->chip = (SYSIF_REGS __iomem *)mem;
1741
1742 /* Save Port IO values in case we need to do downloadboot */
1743 ioc->pio_mem_phys = port;
1744 ioc->pio_chip = (SYSIF_REGS __iomem *)port;
1745
1746 return 0;
1747
1748 out_pci_release_region:
1749 pci_release_selected_regions(pdev, ioc->bars);
1750 out_pci_disable_device:
1751 pci_disable_device(pdev);
1752 return r;
1753 }
1754
1755 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1756 /**
1757 * mpt_attach - Install a PCI intelligent MPT adapter.
1758 * @pdev: Pointer to pci_dev structure
1759 * @id: PCI device ID information
1760 *
1761 * This routine performs all the steps necessary to bring the IOC of
1762 * a MPT adapter to a OPERATIONAL state. This includes registering
1763 * memory regions, registering the interrupt, and allocating request
1764 * and reply memory pools.
1765 *
1766 * This routine also pre-fetches the LAN MAC address of a Fibre Channel
1767 * MPT adapter.
1768 *
1769 * Returns 0 for success, non-zero for failure.
1770 *
1771 * TODO: Add support for polled controllers
1772 */
1773 int
1774 mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
1775 {
1776 MPT_ADAPTER *ioc;
1777 u8 cb_idx;
1778 int r = -ENODEV;
1779 u8 pcixcmd;
1780 static int mpt_ids = 0;
1781 #ifdef CONFIG_PROC_FS
1782 struct proc_dir_entry *dent;
1783 #endif
1784
1785 ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC);
1786 if (ioc == NULL) {
1787 printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n");
1788 return -ENOMEM;
1789 }
1790
1791 ioc->id = mpt_ids++;
1792 sprintf(ioc->name, "ioc%d", ioc->id);
1793 dinitprintk(ioc, printk(KERN_WARNING MYNAM ": mpt_adapter_install\n"));
1794
1795 /*
1796 * set initial debug level
1797 * (refer to mptdebug.h)
1798 *
1799 */
1800 ioc->debug_level = mpt_debug_level;
1801 if (mpt_debug_level)
1802 printk(KERN_INFO "mpt_debug_level=%xh\n", mpt_debug_level);
1803
1804 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": mpt_adapter_install\n", ioc->name));
1805
1806 ioc->pcidev = pdev;
1807 if (mpt_mapresources(ioc)) {
1808 kfree(ioc);
1809 return r;
1810 }
1811
1812 /*
1813 * Setting up proper handlers for scatter gather handling
1814 */
1815 if (ioc->dma_mask == DMA_BIT_MASK(64)) {
1816 if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1078)
1817 ioc->add_sge = &mpt_add_sge_64bit_1078;
1818 else
1819 ioc->add_sge = &mpt_add_sge_64bit;
1820 ioc->add_chain = &mpt_add_chain_64bit;
1821 ioc->sg_addr_size = 8;
1822 } else {
1823 ioc->add_sge = &mpt_add_sge;
1824 ioc->add_chain = &mpt_add_chain;
1825 ioc->sg_addr_size = 4;
1826 }
1827 ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;
1828
1829 ioc->alloc_total = sizeof(MPT_ADAPTER);
1830 ioc->req_sz = MPT_DEFAULT_FRAME_SIZE; /* avoid div by zero! */
1831 ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
1832
1833
1834 spin_lock_init(&ioc->taskmgmt_lock);
1835 mutex_init(&ioc->internal_cmds.mutex);
1836 init_completion(&ioc->internal_cmds.done);
1837 mutex_init(&ioc->mptbase_cmds.mutex);
1838 init_completion(&ioc->mptbase_cmds.done);
1839 mutex_init(&ioc->taskmgmt_cmds.mutex);
1840 init_completion(&ioc->taskmgmt_cmds.done);
1841
1842 /* Initialize the event logging.
1843 */
1844 ioc->eventTypes = 0; /* None */
1845 ioc->eventContext = 0;
1846 ioc->eventLogSize = 0;
1847 ioc->events = NULL;
1848
1849 #ifdef MFCNT
1850 ioc->mfcnt = 0;
1851 #endif
1852
1853 ioc->sh = NULL;
1854 ioc->cached_fw = NULL;
1855
1856 /* Initialize SCSI Config Data structure
1857 */
1858 memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
1859
1860 /* Initialize the fc rport list head.
1861 */
1862 INIT_LIST_HEAD(&ioc->fc_rports);
1863
1864 /* Find lookup slot. */
1865 INIT_LIST_HEAD(&ioc->list);
1866
1867
1868 /* Initialize workqueue */
1869 INIT_DELAYED_WORK(&ioc->fault_reset_work, mpt_fault_reset_work);
1870
1871 snprintf(ioc->reset_work_q_name, MPT_KOBJ_NAME_LEN,
1872 "mpt_poll_%d", ioc->id);
1873 ioc->reset_work_q =
1874 create_singlethread_workqueue(ioc->reset_work_q_name);
1875 if (!ioc->reset_work_q) {
1876 printk(MYIOC_s_ERR_FMT "Insufficient memory to add adapter!\n",
1877 ioc->name);
1878 pci_release_selected_regions(pdev, ioc->bars);
1879 kfree(ioc);
1880 return -ENOMEM;
1881 }
1882
1883 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "facts @ %p, pfacts[0] @ %p\n",
1884 ioc->name, &ioc->facts, &ioc->pfacts[0]));
1885
1886 ioc->prod_name = mpt_get_product_name(pdev->vendor, pdev->device,
1887 pdev->revision);
1888
1889 switch (pdev->device)
1890 {
1891 case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1892 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1893 ioc->errata_flag_1064 = 1;
1894 case MPI_MANUFACTPAGE_DEVICEID_FC909:
1895 case MPI_MANUFACTPAGE_DEVICEID_FC929:
1896 case MPI_MANUFACTPAGE_DEVICEID_FC919:
1897 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1898 ioc->bus_type = FC;
1899 break;
1900
1901 case MPI_MANUFACTPAGE_DEVICEID_FC929X:
1902 if (pdev->revision < XL_929) {
1903 /* 929X Chip Fix. Set Split transactions level
1904 * for PCIX. Set MOST bits to zero.
1905 */
1906 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1907 pcixcmd &= 0x8F;
1908 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1909 } else {
1910 /* 929XL Chip Fix. Set MMRBC to 0x08.
1911 */
1912 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1913 pcixcmd |= 0x08;
1914 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1915 }
1916 ioc->bus_type = FC;
1917 break;
1918
1919 case MPI_MANUFACTPAGE_DEVICEID_FC919X:
1920 /* 919X Chip Fix. Set Split transactions level
1921 * for PCIX. Set MOST bits to zero.
1922 */
1923 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1924 pcixcmd &= 0x8F;
1925 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1926 ioc->bus_type = FC;
1927 break;
1928
1929 case MPI_MANUFACTPAGE_DEVID_53C1030:
1930 /* 1030 Chip Fix. Disable Split transactions
1931 * for PCIX. Set MOST bits to zero if Rev < C0( = 8).
1932 */
1933 if (pdev->revision < C0_1030) {
1934 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1935 pcixcmd &= 0x8F;
1936 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1937 }
1938
1939 case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1940 ioc->bus_type = SPI;
1941 break;
1942
1943 case MPI_MANUFACTPAGE_DEVID_SAS1064:
1944 case MPI_MANUFACTPAGE_DEVID_SAS1068:
1945 ioc->errata_flag_1064 = 1;
1946 ioc->bus_type = SAS;
1947 break;
1948
1949 case MPI_MANUFACTPAGE_DEVID_SAS1064E:
1950 case MPI_MANUFACTPAGE_DEVID_SAS1068E:
1951 case MPI_MANUFACTPAGE_DEVID_SAS1078:
1952 ioc->bus_type = SAS;
1953 break;
1954 }
1955
1956
1957 switch (ioc->bus_type) {
1958
1959 case SAS:
1960 ioc->msi_enable = mpt_msi_enable_sas;
1961 break;
1962
1963 case SPI:
1964 ioc->msi_enable = mpt_msi_enable_spi;
1965 break;
1966
1967 case FC:
1968 ioc->msi_enable = mpt_msi_enable_fc;
1969 break;
1970
1971 default:
1972 ioc->msi_enable = 0;
1973 break;
1974 }
1975
1976 ioc->fw_events_off = 1;
1977
1978 if (ioc->errata_flag_1064)
1979 pci_disable_io_access(pdev);
1980
1981 spin_lock_init(&ioc->FreeQlock);
1982
1983 /* Disable all! */
1984 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1985 ioc->active = 0;
1986 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1987
1988 /* Set IOC ptr in the pcidev's driver data. */
1989 pci_set_drvdata(ioc->pcidev, ioc);
1990
1991 /* Set lookup ptr. */
1992 list_add_tail(&ioc->list, &ioc_list);
1993
1994 /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets.
1995 */
1996 mpt_detect_bound_ports(ioc, pdev);
1997
1998 INIT_LIST_HEAD(&ioc->fw_event_list);
1999 spin_lock_init(&ioc->fw_event_lock);
2000 snprintf(ioc->fw_event_q_name, MPT_KOBJ_NAME_LEN, "mpt/%d", ioc->id);
2001 ioc->fw_event_q = create_singlethread_workqueue(ioc->fw_event_q_name);
2002
2003 if ((r = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
2004 CAN_SLEEP)) != 0){
2005 printk(MYIOC_s_ERR_FMT "didn't initialize properly! (%d)\n",
2006 ioc->name, r);
2007
2008 list_del(&ioc->list);
2009 if (ioc->alt_ioc)
2010 ioc->alt_ioc->alt_ioc = NULL;
2011 iounmap(ioc->memmap);
2012 if (r != -5)
2013 pci_release_selected_regions(pdev, ioc->bars);
2014
2015 destroy_workqueue(ioc->reset_work_q);
2016 ioc->reset_work_q = NULL;
2017
2018 kfree(ioc);
2019 pci_set_drvdata(pdev, NULL);
2020 return r;
2021 }
2022
2023 /* call per device driver probe entry point */
2024 for(cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
2025 if(MptDeviceDriverHandlers[cb_idx] &&
2026 MptDeviceDriverHandlers[cb_idx]->probe) {
2027 MptDeviceDriverHandlers[cb_idx]->probe(pdev,id);
2028 }
2029 }
2030
2031 #ifdef CONFIG_PROC_FS
2032 /*
2033 * Create "/proc/mpt/iocN" subdirectory entry for each MPT adapter.
2034 */
2035 dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
2036 if (dent) {
2037 proc_create_data("info", S_IRUGO, dent, &mpt_iocinfo_proc_fops, ioc);
2038 proc_create_data("summary", S_IRUGO, dent, &mpt_summary_proc_fops, ioc);
2039 }
2040 #endif
2041
2042 if (!ioc->alt_ioc)
2043 queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
2044 msecs_to_jiffies(MPT_POLLING_INTERVAL));
2045
2046 return 0;
2047 }
2048
2049 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2050 /**
2051 * mpt_detach - Remove a PCI intelligent MPT adapter.
2052 * @pdev: Pointer to pci_dev structure
2053 */
2054
2055 void
2056 mpt_detach(struct pci_dev *pdev)
2057 {
2058 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2059 char pname[32];
2060 u8 cb_idx;
2061 unsigned long flags;
2062 struct workqueue_struct *wq;
2063
2064 /*
2065 * Stop polling ioc for fault condition
2066 */
2067 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
2068 wq = ioc->reset_work_q;
2069 ioc->reset_work_q = NULL;
2070 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
2071 cancel_delayed_work(&ioc->fault_reset_work);
2072 destroy_workqueue(wq);
2073
2074 spin_lock_irqsave(&ioc->fw_event_lock, flags);
2075 wq = ioc->fw_event_q;
2076 ioc->fw_event_q = NULL;
2077 spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
2078 destroy_workqueue(wq);
2079
2080 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
2081 remove_proc_entry(pname, NULL);
2082 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
2083 remove_proc_entry(pname, NULL);
2084 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
2085 remove_proc_entry(pname, NULL);
2086
2087 /* call per device driver remove entry point */
2088 for(cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
2089 if(MptDeviceDriverHandlers[cb_idx] &&
2090 MptDeviceDriverHandlers[cb_idx]->remove) {
2091 MptDeviceDriverHandlers[cb_idx]->remove(pdev);
2092 }
2093 }
2094
2095 /* Disable interrupts! */
2096 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2097
2098 ioc->active = 0;
2099 synchronize_irq(pdev->irq);
2100
2101 /* Clear any lingering interrupt */
2102 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2103
2104 CHIPREG_READ32(&ioc->chip->IntStatus);
2105
2106 mpt_adapter_dispose(ioc);
2107
2108 }
2109
2110 /**************************************************************************
2111 * Power Management
2112 */
2113 #ifdef CONFIG_PM
2114 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2115 /**
2116 * mpt_suspend - Fusion MPT base driver suspend routine.
2117 * @pdev: Pointer to pci_dev structure
2118 * @state: new state to enter
2119 */
2120 int
2121 mpt_suspend(struct pci_dev *pdev, pm_message_t state)
2122 {
2123 u32 device_state;
2124 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2125
2126 device_state = pci_choose_state(pdev, state);
2127 printk(MYIOC_s_INFO_FMT "pci-suspend: pdev=0x%p, slot=%s, Entering "
2128 "operating state [D%d]\n", ioc->name, pdev, pci_name(pdev),
2129 device_state);
2130
2131 /* put ioc into READY_STATE */
2132 if(SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
2133 printk(MYIOC_s_ERR_FMT
2134 "pci-suspend: IOC msg unit reset failed!\n", ioc->name);
2135 }
2136
2137 /* disable interrupts */
2138 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2139 ioc->active = 0;
2140
2141 /* Clear any lingering interrupt */
2142 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2143
2144 free_irq(ioc->pci_irq, ioc);
2145 if (ioc->msi_enable)
2146 pci_disable_msi(ioc->pcidev);
2147 ioc->pci_irq = -1;
2148 pci_save_state(pdev);
2149 pci_disable_device(pdev);
2150 pci_release_selected_regions(pdev, ioc->bars);
2151 pci_set_power_state(pdev, device_state);
2152 return 0;
2153 }
2154
2155 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2156 /**
2157 * mpt_resume - Fusion MPT base driver resume routine.
2158 * @pdev: Pointer to pci_dev structure
2159 */
2160 int
2161 mpt_resume(struct pci_dev *pdev)
2162 {
2163 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2164 u32 device_state = pdev->current_state;
2165 int recovery_state;
2166 int err;
2167
2168 printk(MYIOC_s_INFO_FMT "pci-resume: pdev=0x%p, slot=%s, Previous "
2169 "operating state [D%d]\n", ioc->name, pdev, pci_name(pdev),
2170 device_state);
2171
2172 pci_set_power_state(pdev, PCI_D0);
2173 pci_enable_wake(pdev, PCI_D0, 0);
2174 pci_restore_state(pdev);
2175 ioc->pcidev = pdev;
2176 err = mpt_mapresources(ioc);
2177 if (err)
2178 return err;
2179
2180 if (ioc->dma_mask == DMA_BIT_MASK(64)) {
2181 if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1078)
2182 ioc->add_sge = &mpt_add_sge_64bit_1078;
2183 else
2184 ioc->add_sge = &mpt_add_sge_64bit;
2185 ioc->add_chain = &mpt_add_chain_64bit;
2186 ioc->sg_addr_size = 8;
2187 } else {
2188
2189 ioc->add_sge = &mpt_add_sge;
2190 ioc->add_chain = &mpt_add_chain;
2191 ioc->sg_addr_size = 4;
2192 }
2193 ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;
2194
2195 printk(MYIOC_s_INFO_FMT "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
2196 ioc->name, (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
2197 CHIPREG_READ32(&ioc->chip->Doorbell));
2198
2199 /*
2200 * Errata workaround for SAS pci express:
2201 * Upon returning to the D0 state, the contents of the doorbell will be
2202 * stale data, and this will incorrectly signal to the host driver that
2203 * the firmware is ready to process mpt commands. The workaround is
2204 * to issue a diagnostic reset.
2205 */
2206 if (ioc->bus_type == SAS && (pdev->device ==
2207 MPI_MANUFACTPAGE_DEVID_SAS1068E || pdev->device ==
2208 MPI_MANUFACTPAGE_DEVID_SAS1064E)) {
2209 if (KickStart(ioc, 1, CAN_SLEEP) < 0) {
2210 printk(MYIOC_s_WARN_FMT "pci-resume: Cannot recover\n",
2211 ioc->name);
2212 goto out;
2213 }
2214 }
2215
2216 /* bring ioc to operational state */
2217 printk(MYIOC_s_INFO_FMT "Sending mpt_do_ioc_recovery\n", ioc->name);
2218 recovery_state = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
2219 CAN_SLEEP);
2220 if (recovery_state != 0)
2221 printk(MYIOC_s_WARN_FMT "pci-resume: Cannot recover, "
2222 "error:[%x]\n", ioc->name, recovery_state);
2223 else
2224 printk(MYIOC_s_INFO_FMT
2225 "pci-resume: success\n", ioc->name);
2226 out:
2227 return 0;
2228
2229 }
2230 #endif
2231
2232 static int
2233 mpt_signal_reset(u8 index, MPT_ADAPTER *ioc, int reset_phase)
2234 {
2235 if ((MptDriverClass[index] == MPTSPI_DRIVER &&
2236 ioc->bus_type != SPI) ||
2237 (MptDriverClass[index] == MPTFC_DRIVER &&
2238 ioc->bus_type != FC) ||
2239 (MptDriverClass[index] == MPTSAS_DRIVER &&
2240 ioc->bus_type != SAS))
2241 /* make sure we only call the relevant reset handler
2242 * for the bus */
2243 return 0;
2244 return (MptResetHandlers[index])(ioc, reset_phase);
2245 }
2246
2247 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2248 /**
2249 * mpt_do_ioc_recovery - Initialize or recover MPT adapter.
2250 * @ioc: Pointer to MPT adapter structure
2251 * @reason: Event word / reason
2252 * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
2253 *
2254 * This routine performs all the steps necessary to bring the IOC
2255 * to a OPERATIONAL state.
2256 *
2257 * This routine also pre-fetches the LAN MAC address of a Fibre Channel
2258 * MPT adapter.
2259 *
2260 * Returns:
2261 * 0 for success
2262 * -1 if failed to get board READY
2263 * -2 if READY but IOCFacts Failed
2264 * -3 if READY but PrimeIOCFifos Failed
2265 * -4 if READY but IOCInit Failed
2266 * -5 if failed to enable_device and/or request_selected_regions
2267 * -6 if failed to upload firmware
2268 */
2269 static int
2270 mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
2271 {
2272 int hard_reset_done = 0;
2273 int alt_ioc_ready = 0;
2274 int hard;
2275 int rc=0;
2276 int ii;
2277 int ret = 0;
2278 int reset_alt_ioc_active = 0;
2279 int irq_allocated = 0;
2280 u8 *a;
2281
2282 printk(MYIOC_s_INFO_FMT "Initiating %s\n", ioc->name,
2283 reason == MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery");
2284
2285 /* Disable reply interrupts (also blocks FreeQ) */
2286 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2287 ioc->active = 0;
2288
2289 if (ioc->alt_ioc) {
2290 if (ioc->alt_ioc->active ||
2291 reason == MPT_HOSTEVENT_IOC_RECOVER) {
2292 reset_alt_ioc_active = 1;
2293 /* Disable alt-IOC's reply interrupts
2294 * (and FreeQ) for a bit
2295 **/
2296 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask,
2297 0xFFFFFFFF);
2298 ioc->alt_ioc->active = 0;
2299 }
2300 }
2301
2302 hard = 1;
2303 if (reason == MPT_HOSTEVENT_IOC_BRINGUP)
2304 hard = 0;
2305
2306 if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
2307 if (hard_reset_done == -4) {
2308 printk(MYIOC_s_WARN_FMT "Owned by PEER..skipping!\n",
2309 ioc->name);
2310
2311 if (reset_alt_ioc_active && ioc->alt_ioc) {
2312 /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */
2313 dprintk(ioc, printk(MYIOC_s_INFO_FMT
2314 "alt_ioc reply irq re-enabled\n", ioc->alt_ioc->name));
2315 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
2316 ioc->alt_ioc->active = 1;
2317 }
2318
2319 } else {
2320 printk(MYIOC_s_WARN_FMT
2321 "NOT READY WARNING!\n", ioc->name);
2322 }
2323 ret = -1;
2324 goto out;
2325 }
2326
2327 /* hard_reset_done = 0 if a soft reset was performed
2328 * and 1 if a hard reset was performed.
2329 */
2330 if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
2331 if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
2332 alt_ioc_ready = 1;
2333 else
2334 printk(MYIOC_s_WARN_FMT
2335 ": alt-ioc Not ready WARNING!\n",
2336 ioc->alt_ioc->name);
2337 }
2338
2339 for (ii=0; ii<5; ii++) {
2340 /* Get IOC facts! Allow 5 retries */
2341 if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
2342 break;
2343 }
2344
2345
2346 if (ii == 5) {
2347 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2348 "Retry IocFacts failed rc=%x\n", ioc->name, rc));
2349 ret = -2;
2350 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2351 MptDisplayIocCapabilities(ioc);
2352 }
2353
2354 if (alt_ioc_ready) {
2355 if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
2356 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2357 "Initial Alt IocFacts failed rc=%x\n",
2358 ioc->name, rc));
2359 /* Retry - alt IOC was initialized once
2360 */
2361 rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
2362 }
2363 if (rc) {
2364 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2365 "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
2366 alt_ioc_ready = 0;
2367 reset_alt_ioc_active = 0;
2368 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2369 MptDisplayIocCapabilities(ioc->alt_ioc);
2370 }
2371 }
2372
2373 if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP) &&
2374 (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)) {
2375 pci_release_selected_regions(ioc->pcidev, ioc->bars);
2376 ioc->bars = pci_select_bars(ioc->pcidev, IORESOURCE_MEM |
2377 IORESOURCE_IO);
2378 if (pci_enable_device(ioc->pcidev))
2379 return -5;
2380 if (pci_request_selected_regions(ioc->pcidev, ioc->bars,
2381 "mpt"))
2382 return -5;
2383 }
2384
2385 /*
2386 * Device is reset now. It must have de-asserted the interrupt line
2387 * (if it was asserted) and it should be safe to register for the
2388 * interrupt now.
2389 */
2390 if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
2391 ioc->pci_irq = -1;
2392 if (ioc->pcidev->irq) {
2393 if (ioc->msi_enable && !pci_enable_msi(ioc->pcidev))
2394 printk(MYIOC_s_INFO_FMT "PCI-MSI enabled\n",
2395 ioc->name);
2396 else
2397 ioc->msi_enable = 0;
2398 rc = request_irq(ioc->pcidev->irq, mpt_interrupt,
2399 IRQF_SHARED, ioc->name, ioc);
2400 if (rc < 0) {
2401 printk(MYIOC_s_ERR_FMT "Unable to allocate "
2402 "interrupt %d!\n",
2403 ioc->name, ioc->pcidev->irq);
2404 if (ioc->msi_enable)
2405 pci_disable_msi(ioc->pcidev);
2406 ret = -EBUSY;
2407 goto out;
2408 }
2409 irq_allocated = 1;
2410 ioc->pci_irq = ioc->pcidev->irq;
2411 pci_set_master(ioc->pcidev); /* ?? */
2412 pci_set_drvdata(ioc->pcidev, ioc);
2413 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2414 "installed at interrupt %d\n", ioc->name,
2415 ioc->pcidev->irq));
2416 }
2417 }
2418
2419 /* Prime reply & request queues!
2420 * (mucho alloc's) Must be done prior to
2421 * init as upper addresses are needed for init.
2422 * If fails, continue with alt-ioc processing
2423 */
2424 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "PrimeIocFifos\n",
2425 ioc->name));
2426 if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
2427 ret = -3;
2428
2429 /* May need to check/upload firmware & data here!
2430 * If fails, continue with alt-ioc processing
2431 */
2432 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "SendIocInit\n",
2433 ioc->name));
2434 if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
2435 ret = -4;
2436 // NEW!
2437 if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
2438 printk(MYIOC_s_WARN_FMT
2439 ": alt-ioc (%d) FIFO mgmt alloc WARNING!\n",
2440 ioc->alt_ioc->name, rc);
2441 alt_ioc_ready = 0;
2442 reset_alt_ioc_active = 0;
2443 }
2444
2445 if (alt_ioc_ready) {
2446 if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
2447 alt_ioc_ready = 0;
2448 reset_alt_ioc_active = 0;
2449 printk(MYIOC_s_WARN_FMT
2450 ": alt-ioc: (%d) init failure WARNING!\n",
2451 ioc->alt_ioc->name, rc);
2452 }
2453 }
2454
2455 if (reason == MPT_HOSTEVENT_IOC_BRINGUP){
2456 if (ioc->upload_fw) {
2457 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2458 "firmware upload required!\n", ioc->name));
2459
2460 /* Controller is not operational, cannot do upload
2461 */
2462 if (ret == 0) {
2463 rc = mpt_do_upload(ioc, sleepFlag);
2464 if (rc == 0) {
2465 if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
2466 /*
2467 * Maintain only one pointer to FW memory
2468 * so there will not be two attempt to
2469 * downloadboot onboard dual function
2470 * chips (mpt_adapter_disable,
2471 * mpt_diag_reset)
2472 */
2473 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2474 "mpt_upload: alt_%s has cached_fw=%p \n",
2475 ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
2476 ioc->cached_fw = NULL;
2477 }
2478 } else {
2479 printk(MYIOC_s_WARN_FMT
2480 "firmware upload failure!\n", ioc->name);
2481 ret = -6;
2482 }
2483 }
2484 }
2485 }
2486
2487 /* Enable MPT base driver management of EventNotification
2488 * and EventAck handling.
2489 */
2490 if ((ret == 0) && (!ioc->facts.EventState)) {
2491 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2492 "SendEventNotification\n",
2493 ioc->name));
2494 ret = SendEventNotification(ioc, 1, sleepFlag); /* 1=Enable */
2495 }
2496
2497 if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
2498 rc = SendEventNotification(ioc->alt_ioc, 1, sleepFlag);
2499
2500 if (ret == 0) {
2501 /* Enable! (reply interrupt) */
2502 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
2503 ioc->active = 1;
2504 }
2505 if (rc == 0) { /* alt ioc */
2506 if (reset_alt_ioc_active && ioc->alt_ioc) {
2507 /* (re)Enable alt-IOC! (reply interrupt) */
2508 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "alt-ioc"
2509 "reply irq re-enabled\n",
2510 ioc->alt_ioc->name));
2511 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask,
2512 MPI_HIM_DIM);
2513 ioc->alt_ioc->active = 1;
2514 }
2515 }
2516
2517
2518 /* Add additional "reason" check before call to GetLanConfigPages
2519 * (combined with GetIoUnitPage2 call). This prevents a somewhat
2520 * recursive scenario; GetLanConfigPages times out, timer expired
2521 * routine calls HardResetHandler, which calls into here again,
2522 * and we try GetLanConfigPages again...
2523 */
2524 if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
2525
2526 /*
2527 * Initialize link list for inactive raid volumes.
2528 */
2529 mutex_init(&ioc->raid_data.inactive_list_mutex);
2530 INIT_LIST_HEAD(&ioc->raid_data.inactive_list);
2531
2532 switch (ioc->bus_type) {
2533
2534 case SAS:
2535 /* clear persistency table */
2536 if(ioc->facts.IOCExceptions &
2537 MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL) {
2538 ret = mptbase_sas_persist_operation(ioc,
2539 MPI_SAS_OP_CLEAR_NOT_PRESENT);
2540 if(ret != 0)
2541 goto out;
2542 }
2543
2544 /* Find IM volumes
2545 */
2546 mpt_findImVolumes(ioc);
2547
2548 /* Check, and possibly reset, the coalescing value
2549 */
2550 mpt_read_ioc_pg_1(ioc);
2551
2552 break;
2553
2554 case FC:
2555 if ((ioc->pfacts[0].ProtocolFlags &
2556 MPI_PORTFACTS_PROTOCOL_LAN) &&
2557 (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
2558 /*
2559 * Pre-fetch the ports LAN MAC address!
2560 * (LANPage1_t stuff)
2561 */
2562 (void) GetLanConfigPages(ioc);
2563 a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
2564 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2565 "LanAddr = %02X:%02X:%02X"
2566 ":%02X:%02X:%02X\n",
2567 ioc->name, a[5], a[4],
2568 a[3], a[2], a[1], a[0]));
2569 }
2570 break;
2571
2572 case SPI:
2573 /* Get NVRAM and adapter maximums from SPP 0 and 2
2574 */
2575 mpt_GetScsiPortSettings(ioc, 0);
2576
2577 /* Get version and length of SDP 1
2578 */
2579 mpt_readScsiDevicePageHeaders(ioc, 0);
2580
2581 /* Find IM volumes
2582 */
2583 if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
2584 mpt_findImVolumes(ioc);
2585
2586 /* Check, and possibly reset, the coalescing value
2587 */
2588 mpt_read_ioc_pg_1(ioc);
2589
2590 mpt_read_ioc_pg_4(ioc);
2591
2592 break;
2593 }
2594
2595 GetIoUnitPage2(ioc);
2596 mpt_get_manufacturing_pg_0(ioc);
2597 }
2598
2599 out:
2600 if ((ret != 0) && irq_allocated) {
2601 free_irq(ioc->pci_irq, ioc);
2602 if (ioc->msi_enable)
2603 pci_disable_msi(ioc->pcidev);
2604 }
2605 return ret;
2606 }
2607
2608 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2609 /**
2610 * mpt_detect_bound_ports - Search for matching PCI bus/dev_function
2611 * @ioc: Pointer to MPT adapter structure
2612 * @pdev: Pointer to (struct pci_dev) structure
2613 *
2614 * Search for PCI bus/dev_function which matches
2615 * PCI bus/dev_function (+/-1) for newly discovered 929,
2616 * 929X, 1030 or 1035.
2617 *
2618 * If match on PCI dev_function +/-1 is found, bind the two MPT adapters
2619 * using alt_ioc pointer fields in their %MPT_ADAPTER structures.
2620 */
2621 static void
2622 mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
2623 {
2624 struct pci_dev *peer=NULL;
2625 unsigned int slot = PCI_SLOT(pdev->devfn);
2626 unsigned int func = PCI_FUNC(pdev->devfn);
2627 MPT_ADAPTER *ioc_srch;
2628
2629 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "PCI device %s devfn=%x/%x,"
2630 " searching for devfn match on %x or %x\n",
2631 ioc->name, pci_name(pdev), pdev->bus->number,
2632 pdev->devfn, func-1, func+1));
2633
2634 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func-1));
2635 if (!peer) {
2636 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func+1));
2637 if (!peer)
2638 return;
2639 }
2640
2641 list_for_each_entry(ioc_srch, &ioc_list, list) {
2642 struct pci_dev *_pcidev = ioc_srch->pcidev;
2643 if (_pcidev == peer) {
2644 /* Paranoia checks */
2645 if (ioc->alt_ioc != NULL) {
2646 printk(MYIOC_s_WARN_FMT
2647 "Oops, already bound (%s <==> %s)!\n",
2648 ioc->name, ioc->name, ioc->alt_ioc->name);
2649 break;
2650 } else if (ioc_srch->alt_ioc != NULL) {
2651 printk(MYIOC_s_WARN_FMT
2652 "Oops, already bound (%s <==> %s)!\n",
2653 ioc_srch->name, ioc_srch->name,
2654 ioc_srch->alt_ioc->name);
2655 break;
2656 }
2657 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2658 "FOUND! binding %s <==> %s\n",
2659 ioc->name, ioc->name, ioc_srch->name));
2660 ioc_srch->alt_ioc = ioc;
2661 ioc->alt_ioc = ioc_srch;
2662 }
2663 }
2664 pci_dev_put(peer);
2665 }
2666
2667 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2668 /**
2669 * mpt_adapter_disable - Disable misbehaving MPT adapter.
2670 * @ioc: Pointer to MPT adapter structure
2671 */
2672 static void
2673 mpt_adapter_disable(MPT_ADAPTER *ioc)
2674 {
2675 int sz;
2676 int ret;
2677
2678 if (ioc->cached_fw != NULL) {
2679 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2680 "%s: Pushing FW onto adapter\n", __func__, ioc->name));
2681 if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)
2682 ioc->cached_fw, CAN_SLEEP)) < 0) {
2683 printk(MYIOC_s_WARN_FMT
2684 ": firmware downloadboot failure (%d)!\n",
2685 ioc->name, ret);
2686 }
2687 }
2688
2689 /*
2690 * Put the controller into ready state (if its not already)
2691 */
2692 if (mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_READY) {
2693 if (!SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET,
2694 CAN_SLEEP)) {
2695 if (mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_READY)
2696 printk(MYIOC_s_ERR_FMT "%s: IOC msg unit "
2697 "reset failed to put ioc in ready state!\n",
2698 ioc->name, __func__);
2699 } else
2700 printk(MYIOC_s_ERR_FMT "%s: IOC msg unit reset "
2701 "failed!\n", ioc->name, __func__);
2702 }
2703
2704
2705 /* Disable adapter interrupts! */
2706 synchronize_irq(ioc->pcidev->irq);
2707 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2708 ioc->active = 0;
2709
2710 /* Clear any lingering interrupt */
2711 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2712 CHIPREG_READ32(&ioc->chip->IntStatus);
2713
2714 if (ioc->alloc != NULL) {
2715 sz = ioc->alloc_sz;
2716 dexitprintk(ioc, printk(MYIOC_s_INFO_FMT "free @ %p, sz=%d bytes\n",
2717 ioc->name, ioc->alloc, ioc->alloc_sz));
2718 pci_free_consistent(ioc->pcidev, sz,
2719 ioc->alloc, ioc->alloc_dma);
2720 ioc->reply_frames = NULL;
2721 ioc->req_frames = NULL;
2722 ioc->alloc = NULL;
2723 ioc->alloc_total -= sz;
2724 }
2725
2726 if (ioc->sense_buf_pool != NULL) {
2727 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
2728 pci_free_consistent(ioc->pcidev, sz,
2729 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
2730 ioc->sense_buf_pool = NULL;
2731 ioc->alloc_total -= sz;
2732 }
2733
2734 if (ioc->events != NULL){
2735 sz = MPTCTL_EVENT_LOG_SIZE * sizeof(MPT_IOCTL_EVENTS);
2736 kfree(ioc->events);
2737 ioc->events = NULL;
2738 ioc->alloc_total -= sz;
2739 }
2740
2741 mpt_free_fw_memory(ioc);
2742
2743 kfree(ioc->spi_data.nvram);
2744 mpt_inactive_raid_list_free(ioc);
2745 kfree(ioc->raid_data.pIocPg2);
2746 kfree(ioc->raid_data.pIocPg3);
2747 ioc->spi_data.nvram = NULL;
2748 ioc->raid_data.pIocPg3 = NULL;
2749
2750 if (ioc->spi_data.pIocPg4 != NULL) {
2751 sz = ioc->spi_data.IocPg4Sz;
2752 pci_free_consistent(ioc->pcidev, sz,
2753 ioc->spi_data.pIocPg4,
2754 ioc->spi_data.IocPg4_dma);
2755 ioc->spi_data.pIocPg4 = NULL;
2756 ioc->alloc_total -= sz;
2757 }
2758
2759 if (ioc->ReqToChain != NULL) {
2760 kfree(ioc->ReqToChain);
2761 kfree(ioc->RequestNB);
2762 ioc->ReqToChain = NULL;
2763 }
2764
2765 kfree(ioc->ChainToChain);
2766 ioc->ChainToChain = NULL;
2767
2768 if (ioc->HostPageBuffer != NULL) {
2769 if((ret = mpt_host_page_access_control(ioc,
2770 MPI_DB_HPBAC_FREE_BUFFER, NO_SLEEP)) != 0) {
2771 printk(MYIOC_s_ERR_FMT
2772 ": %s: host page buffers free failed (%d)!\n",
2773 ioc->name, __func__, ret);
2774 }
2775 dexitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2776 "HostPageBuffer free @ %p, sz=%d bytes\n",
2777 ioc->name, ioc->HostPageBuffer,
2778 ioc->HostPageBuffer_sz));
2779 pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz,
2780 ioc->HostPageBuffer, ioc->HostPageBuffer_dma);
2781 ioc->HostPageBuffer = NULL;
2782 ioc->HostPageBuffer_sz = 0;
2783 ioc->alloc_total -= ioc->HostPageBuffer_sz;
2784 }
2785
2786 pci_set_drvdata(ioc->pcidev, NULL);
2787 }
2788 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2789 /**
2790 * mpt_adapter_dispose - Free all resources associated with an MPT adapter
2791 * @ioc: Pointer to MPT adapter structure
2792 *
2793 * This routine unregisters h/w resources and frees all alloc'd memory
2794 * associated with a MPT adapter structure.
2795 */
2796 static void
2797 mpt_adapter_dispose(MPT_ADAPTER *ioc)
2798 {
2799 int sz_first, sz_last;
2800
2801 if (ioc == NULL)
2802 return;
2803
2804 sz_first = ioc->alloc_total;
2805
2806 mpt_adapter_disable(ioc);
2807
2808 if (ioc->pci_irq != -1) {
2809 free_irq(ioc->pci_irq, ioc);
2810 if (ioc->msi_enable)
2811 pci_disable_msi(ioc->pcidev);
2812 ioc->pci_irq = -1;
2813 }
2814
2815 if (ioc->memmap != NULL) {
2816 iounmap(ioc->memmap);
2817 ioc->memmap = NULL;
2818 }
2819
2820 pci_disable_device(ioc->pcidev);
2821 pci_release_selected_regions(ioc->pcidev, ioc->bars);
2822
2823 #if defined(CONFIG_MTRR) && 0
2824 if (ioc->mtrr_reg > 0) {
2825 mtrr_del(ioc->mtrr_reg, 0, 0);
2826 dprintk(ioc, printk(MYIOC_s_INFO_FMT "MTRR region de-registered\n", ioc->name));
2827 }
2828 #endif
2829
2830 /* Zap the adapter lookup ptr! */
2831 list_del(&ioc->list);
2832
2833 sz_last = ioc->alloc_total;
2834 dprintk(ioc, printk(MYIOC_s_INFO_FMT "free'd %d of %d bytes\n",
2835 ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
2836
2837 if (ioc->alt_ioc)
2838 ioc->alt_ioc->alt_ioc = NULL;
2839
2840 kfree(ioc);
2841 }
2842
2843 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2844 /**
2845 * MptDisplayIocCapabilities - Disply IOC's capabilities.
2846 * @ioc: Pointer to MPT adapter structure
2847 */
2848 static void
2849 MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
2850 {
2851 int i = 0;
2852
2853 printk(KERN_INFO "%s: ", ioc->name);
2854 if (ioc->prod_name)
2855 printk("%s: ", ioc->prod_name);
2856 printk("Capabilities={");
2857
2858 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
2859 printk("Initiator");
2860 i++;
2861 }
2862
2863 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2864 printk("%sTarget", i ? "," : "");
2865 i++;
2866 }
2867
2868 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
2869 printk("%sLAN", i ? "," : "");
2870 i++;
2871 }
2872
2873 #if 0
2874 /*
2875 * This would probably evoke more questions than it's worth
2876 */
2877 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2878 printk("%sLogBusAddr", i ? "," : "");
2879 i++;
2880 }
2881 #endif
2882
2883 printk("}\n");
2884 }
2885
2886 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2887 /**
2888 * MakeIocReady - Get IOC to a READY state, using KickStart if needed.
2889 * @ioc: Pointer to MPT_ADAPTER structure
2890 * @force: Force hard KickStart of IOC
2891 * @sleepFlag: Specifies whether the process can sleep
2892 *
2893 * Returns:
2894 * 1 - DIAG reset and READY
2895 * 0 - READY initially OR soft reset and READY
2896 * -1 - Any failure on KickStart
2897 * -2 - Msg Unit Reset Failed
2898 * -3 - IO Unit Reset Failed
2899 * -4 - IOC owned by a PEER
2900 */
2901 static int
2902 MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
2903 {
2904 u32 ioc_state;
2905 int statefault = 0;
2906 int cntdn;
2907 int hard_reset_done = 0;
2908 int r;
2909 int ii;
2910 int whoinit;
2911
2912 /* Get current [raw] IOC state */
2913 ioc_state = mpt_GetIocState(ioc, 0);
2914 dhsprintk(ioc, printk(MYIOC_s_INFO_FMT "MakeIocReady [raw] state=%08x\n", ioc->name, ioc_state));
2915
2916 /*
2917 * Check to see if IOC got left/stuck in doorbell handshake
2918 * grip of death. If so, hard reset the IOC.
2919 */
2920 if (ioc_state & MPI_DOORBELL_ACTIVE) {
2921 statefault = 1;
2922 printk(MYIOC_s_WARN_FMT "Unexpected doorbell active!\n",
2923 ioc->name);
2924 }
2925
2926 /* Is it already READY? */
2927 if (!statefault &&
2928 ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_READY)) {
2929 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2930 "IOC is in READY state\n", ioc->name));
2931 return 0;
2932 }
2933
2934 /*
2935 * Check to see if IOC is in FAULT state.
2936 */
2937 if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
2938 statefault = 2;
2939 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state!!!\n",
2940 ioc->name);
2941 printk(MYIOC_s_WARN_FMT " FAULT code = %04xh\n",
2942 ioc->name, ioc_state & MPI_DOORBELL_DATA_MASK);
2943 }
2944
2945 /*
2946 * Hmmm... Did it get left operational?
2947 */
2948 if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) {
2949 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOC operational unexpected\n",
2950 ioc->name));
2951
2952 /* Check WhoInit.
2953 * If PCI Peer, exit.
2954 * Else, if no fault conditions are present, issue a MessageUnitReset
2955 * Else, fall through to KickStart case
2956 */
2957 whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT;
2958 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2959 "whoinit 0x%x statefault %d force %d\n",
2960 ioc->name, whoinit, statefault, force));
2961 if (whoinit == MPI_WHOINIT_PCI_PEER)
2962 return -4;
2963 else {
2964 if ((statefault == 0 ) && (force == 0)) {
2965 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
2966 return 0;
2967 }
2968 statefault = 3;
2969 }
2970 }
2971
2972 hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
2973 if (hard_reset_done < 0)
2974 return -1;
2975
2976 /*
2977 * Loop here waiting for IOC to come READY.
2978 */
2979 ii = 0;
2980 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 5; /* 5 seconds */
2981
2982 while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
2983 if (ioc_state == MPI_IOC_STATE_OPERATIONAL) {
2984 /*
2985 * BIOS or previous driver load left IOC in OP state.
2986 * Reset messaging FIFOs.
2987 */
2988 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
2989 printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
2990 return -2;
2991 }
2992 } else if (ioc_state == MPI_IOC_STATE_RESET) {
2993 /*
2994 * Something is wrong. Try to get IOC back
2995 * to a known state.
2996 */
2997 if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
2998 printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
2999 return -3;
3000 }
3001 }
3002
3003 ii++; cntdn--;
3004 if (!cntdn) {
3005 printk(MYIOC_s_ERR_FMT
3006 "Wait IOC_READY state (0x%x) timeout(%d)!\n",
3007 ioc->name, ioc_state, (int)((ii+5)/HZ));
3008 return -ETIME;
3009 }
3010
3011 if (sleepFlag == CAN_SLEEP) {
3012 msleep(1);
3013 } else {
3014 mdelay (1); /* 1 msec delay */
3015 }
3016
3017 }
3018
3019 if (statefault < 3) {
3020 printk(MYIOC_s_INFO_FMT "Recovered from %s\n", ioc->name,
3021 statefault == 1 ? "stuck handshake" : "IOC FAULT");
3022 }
3023
3024 return hard_reset_done;
3025 }
3026
3027 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3028 /**
3029 * mpt_GetIocState - Get the current state of a MPT adapter.
3030 * @ioc: Pointer to MPT_ADAPTER structure
3031 * @cooked: Request raw or cooked IOC state
3032 *
3033 * Returns all IOC Doorbell register bits if cooked==0, else just the
3034 * Doorbell bits in MPI_IOC_STATE_MASK.
3035 */
3036 u32
3037 mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
3038 {
3039 u32 s, sc;
3040
3041 /* Get! */
3042 s = CHIPREG_READ32(&ioc->chip->Doorbell);
3043 sc = s & MPI_IOC_STATE_MASK;
3044
3045 /* Save! */
3046 ioc->last_state = sc;
3047
3048 return cooked ? sc : s;
3049 }
3050
3051 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3052 /**
3053 * GetIocFacts - Send IOCFacts request to MPT adapter.
3054 * @ioc: Pointer to MPT_ADAPTER structure
3055 * @sleepFlag: Specifies whether the process can sleep
3056 * @reason: If recovery, only update facts.
3057 *
3058 * Returns 0 for success, non-zero for failure.
3059 */
3060 static int
3061 GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
3062 {
3063 IOCFacts_t get_facts;
3064 IOCFactsReply_t *facts;
3065 int r;
3066 int req_sz;
3067 int reply_sz;
3068 int sz;
3069 u32 status, vv;
3070 u8 shiftFactor=1;
3071
3072 /* IOC *must* NOT be in RESET state! */
3073 if (ioc->last_state == MPI_IOC_STATE_RESET) {
3074 printk(KERN_ERR MYNAM
3075 ": ERROR - Can't get IOCFacts, %s NOT READY! (%08x)\n",
3076 ioc->name, ioc->last_state);
3077 return -44;
3078 }
3079
3080 facts = &ioc->facts;
3081
3082 /* Destination (reply area)... */
3083 reply_sz = sizeof(*facts);
3084 memset(facts, 0, reply_sz);
3085
3086 /* Request area (get_facts on the stack right now!) */
3087 req_sz = sizeof(get_facts);
3088 memset(&get_facts, 0, req_sz);
3089
3090 get_facts.Function = MPI_FUNCTION_IOC_FACTS;
3091 /* Assert: All other get_facts fields are zero! */
3092
3093 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3094 "Sending get IocFacts request req_sz=%d reply_sz=%d\n",
3095 ioc->name, req_sz, reply_sz));
3096
3097 /* No non-zero fields in the get_facts request are greater than
3098 * 1 byte in size, so we can just fire it off as is.
3099 */
3100 r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
3101 reply_sz, (u16*)facts, 5 /*seconds*/, sleepFlag);
3102 if (r != 0)
3103 return r;
3104
3105 /*
3106 * Now byte swap (GRRR) the necessary fields before any further
3107 * inspection of reply contents.
3108 *
3109 * But need to do some sanity checks on MsgLength (byte) field
3110 * to make sure we don't zero IOC's req_sz!
3111 */
3112 /* Did we get a valid reply? */
3113 if (facts->MsgLength > offsetof(IOCFactsReply_t, RequestFrameSize)/sizeof(u32)) {
3114 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
3115 /*
3116 * If not been here, done that, save off first WhoInit value
3117 */
3118 if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
3119 ioc->FirstWhoInit = facts->WhoInit;
3120 }
3121
3122 facts->MsgVersion = le16_to_cpu(facts->MsgVersion);
3123 facts->MsgContext = le32_to_cpu(facts->MsgContext);
3124 facts->IOCExceptions = le16_to_cpu(facts->IOCExceptions);
3125 facts->IOCStatus = le16_to_cpu(facts->IOCStatus);
3126 facts->IOCLogInfo = le32_to_cpu(facts->IOCLogInfo);
3127 status = le16_to_cpu(facts->IOCStatus) & MPI_IOCSTATUS_MASK;
3128 /* CHECKME! IOCStatus, IOCLogInfo */
3129
3130 facts->ReplyQueueDepth = le16_to_cpu(facts->ReplyQueueDepth);
3131 facts->RequestFrameSize = le16_to_cpu(facts->RequestFrameSize);
3132
3133 /*
3134 * FC f/w version changed between 1.1 and 1.2
3135 * Old: u16{Major(4),Minor(4),SubMinor(8)}
3136 * New: u32{Major(8),Minor(8),Unit(8),Dev(8)}
3137 */
3138 if (facts->MsgVersion < MPI_VERSION_01_02) {
3139 /*
3140 * Handle old FC f/w style, convert to new...
3141 */
3142 u16 oldv = le16_to_cpu(facts->Reserved_0101_FWVersion);
3143 facts->FWVersion.Word =
3144 ((oldv<<12) & 0xFF000000) |
3145 ((oldv<<8) & 0x000FFF00);
3146 } else
3147 facts->FWVersion.Word = le32_to_cpu(facts->FWVersion.Word);
3148
3149 facts->ProductID = le16_to_cpu(facts->ProductID);
3150
3151 if ((ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
3152 > MPI_FW_HEADER_PID_PROD_TARGET_SCSI)
3153 ioc->ir_firmware = 1;
3154
3155 facts->CurrentHostMfaHighAddr =
3156 le32_to_cpu(facts->CurrentHostMfaHighAddr);
3157 facts->GlobalCredits = le16_to_cpu(facts->GlobalCredits);
3158 facts->CurrentSenseBufferHighAddr =
3159 le32_to_cpu(facts->CurrentSenseBufferHighAddr);
3160 facts->CurReplyFrameSize =
3161 le16_to_cpu(facts->CurReplyFrameSize);
3162 facts->IOCCapabilities = le32_to_cpu(facts->IOCCapabilities);
3163
3164 /*
3165 * Handle NEW (!) IOCFactsReply fields in MPI-1.01.xx
3166 * Older MPI-1.00.xx struct had 13 dwords, and enlarged
3167 * to 14 in MPI-1.01.0x.
3168 */
3169 if (facts->MsgLength >= (offsetof(IOCFactsReply_t,FWImageSize) + 7)/4 &&
3170 facts->MsgVersion > MPI_VERSION_01_00) {
3171 facts->FWImageSize = le32_to_cpu(facts->FWImageSize);
3172 }
3173
3174 facts->FWImageSize = ALIGN(facts->FWImageSize, 4);
3175
3176 if (!facts->RequestFrameSize) {
3177 /* Something is wrong! */
3178 printk(MYIOC_s_ERR_FMT "IOC reported invalid 0 request size!\n",
3179 ioc->name);
3180 return -55;
3181 }
3182
3183 r = sz = facts->BlockSize;
3184 vv = ((63 / (sz * 4)) + 1) & 0x03;
3185 ioc->NB_for_64_byte_frame = vv;
3186 while ( sz )
3187 {
3188 shiftFactor++;
3189 sz = sz >> 1;
3190 }
3191 ioc->NBShiftFactor = shiftFactor;
3192 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3193 "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n",
3194 ioc->name, vv, shiftFactor, r));
3195
3196 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
3197 /*
3198 * Set values for this IOC's request & reply frame sizes,
3199 * and request & reply queue depths...
3200 */
3201 ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
3202 ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
3203 ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
3204 ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
3205
3206 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "reply_sz=%3d, reply_depth=%4d\n",
3207 ioc->name, ioc->reply_sz, ioc->reply_depth));
3208 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "req_sz =%3d, req_depth =%4d\n",
3209 ioc->name, ioc->req_sz, ioc->req_depth));
3210
3211 /* Get port facts! */
3212 if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
3213 return r;
3214 }
3215 } else {
3216 printk(MYIOC_s_ERR_FMT
3217 "Invalid IOC facts reply, msgLength=%d offsetof=%zd!\n",
3218 ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
3219 RequestFrameSize)/sizeof(u32)));
3220 return -66;
3221 }
3222
3223 return 0;
3224 }
3225
3226 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3227 /**
3228 * GetPortFacts - Send PortFacts request to MPT adapter.
3229 * @ioc: Pointer to MPT_ADAPTER structure
3230 * @portnum: Port number
3231 * @sleepFlag: Specifies whether the process can sleep
3232 *
3233 * Returns 0 for success, non-zero for failure.
3234 */
3235 static int
3236 GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3237 {
3238 PortFacts_t get_pfacts;
3239 PortFactsReply_t *pfacts;
3240 int ii;
3241 int req_sz;
3242 int reply_sz;
3243 int max_id;
3244
3245 /* IOC *must* NOT be in RESET state! */
3246 if (ioc->last_state == MPI_IOC_STATE_RESET) {
3247 printk(MYIOC_s_ERR_FMT "Can't get PortFacts NOT READY! (%08x)\n",
3248 ioc->name, ioc->last_state );
3249 return -4;
3250 }
3251
3252 pfacts = &ioc->pfacts[portnum];
3253
3254 /* Destination (reply area)... */
3255 reply_sz = sizeof(*pfacts);
3256 memset(pfacts, 0, reply_sz);
3257
3258 /* Request area (get_pfacts on the stack right now!) */
3259 req_sz = sizeof(get_pfacts);
3260 memset(&get_pfacts, 0, req_sz);
3261
3262 get_pfacts.Function = MPI_FUNCTION_PORT_FACTS;
3263 get_pfacts.PortNumber = portnum;
3264 /* Assert: All other get_pfacts fields are zero! */
3265
3266 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending get PortFacts(%d) request\n",
3267 ioc->name, portnum));
3268
3269 /* No non-zero fields in the get_pfacts request are greater than
3270 * 1 byte in size, so we can just fire it off as is.
3271 */
3272 ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
3273 reply_sz, (u16*)pfacts, 5 /*seconds*/, sleepFlag);
3274 if (ii != 0)
3275 return ii;
3276
3277 /* Did we get a valid reply? */
3278
3279 /* Now byte swap the necessary fields in the response. */
3280 pfacts->MsgContext = le32_to_cpu(pfacts->MsgContext);
3281 pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus);
3282 pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo);
3283 pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices);
3284 pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID);
3285 pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags);
3286 pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers);
3287 pfacts->MaxPersistentIDs = le16_to_cpu(pfacts->MaxPersistentIDs);
3288 pfacts->MaxLanBuckets = le16_to_cpu(pfacts->MaxLanBuckets);
3289
3290 max_id = (ioc->bus_type == SAS) ? pfacts->PortSCSIID :
3291 pfacts->MaxDevices;
3292 ioc->devices_per_bus = (max_id > 255) ? 256 : max_id;
3293 ioc->number_of_buses = (ioc->devices_per_bus < 256) ? 1 : max_id/256;
3294
3295 /*
3296 * Place all the devices on channels
3297 *
3298 * (for debuging)
3299 */
3300 if (mpt_channel_mapping) {
3301 ioc->devices_per_bus = 1;
3302 ioc->number_of_buses = (max_id > 255) ? 255 : max_id;
3303 }
3304
3305 return 0;
3306 }
3307
3308 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3309 /**
3310 * SendIocInit - Send IOCInit request to MPT adapter.
3311 * @ioc: Pointer to MPT_ADAPTER structure
3312 * @sleepFlag: Specifies whether the process can sleep
3313 *
3314 * Send IOCInit followed by PortEnable to bring IOC to OPERATIONAL state.
3315 *
3316 * Returns 0 for success, non-zero for failure.
3317 */
3318 static int
3319 SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
3320 {
3321 IOCInit_t ioc_init;
3322 MPIDefaultReply_t init_reply;
3323 u32 state;
3324 int r;
3325 int count;
3326 int cntdn;
3327
3328 memset(&ioc_init, 0, sizeof(ioc_init));
3329 memset(&init_reply, 0, sizeof(init_reply));
3330
3331 ioc_init.WhoInit = MPI_WHOINIT_HOST_DRIVER;
3332 ioc_init.Function = MPI_FUNCTION_IOC_INIT;
3333
3334 /* If we are in a recovery mode and we uploaded the FW image,
3335 * then this pointer is not NULL. Skip the upload a second time.
3336 * Set this flag if cached_fw set for either IOC.
3337 */
3338 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
3339 ioc->upload_fw = 1;
3340 else
3341 ioc->upload_fw = 0;
3342 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "upload_fw %d facts.Flags=%x\n",
3343 ioc->name, ioc->upload_fw, ioc->facts.Flags));
3344
3345 ioc_init.MaxDevices = (U8)ioc->devices_per_bus;
3346 ioc_init.MaxBuses = (U8)ioc->number_of_buses;
3347
3348 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "facts.MsgVersion=%x\n",
3349 ioc->name, ioc->facts.MsgVersion));
3350 if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
3351 // set MsgVersion and HeaderVersion host driver was built with
3352 ioc_init.MsgVersion = cpu_to_le16(MPI_VERSION);
3353 ioc_init.HeaderVersion = cpu_to_le16(MPI_HEADER_VERSION);
3354
3355 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
3356 ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
3357 } else if(mpt_host_page_alloc(ioc, &ioc_init))
3358 return -99;
3359 }
3360 ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz); /* in BYTES */
3361
3362 if (ioc->sg_addr_size == sizeof(u64)) {
3363 /* Save the upper 32-bits of the request
3364 * (reply) and sense buffers.
3365 */
3366 ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
3367 ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
3368 } else {
3369 /* Force 32-bit addressing */
3370 ioc_init.HostMfaHighAddr = cpu_to_le32(0);
3371 ioc_init.SenseBufferHighAddr = cpu_to_le32(0);
3372 }
3373
3374 ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
3375 ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
3376 ioc->facts.MaxDevices = ioc_init.MaxDevices;
3377 ioc->facts.MaxBuses = ioc_init.MaxBuses;
3378
3379 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOCInit (req @ %p)\n",
3380 ioc->name, &ioc_init));
3381
3382 r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
3383 sizeof(MPIDefaultReply_t), (u16*)&init_reply, 10 /*seconds*/, sleepFlag);
3384 if (r != 0) {
3385 printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
3386 return r;
3387 }
3388
3389 /* No need to byte swap the multibyte fields in the reply
3390 * since we don't even look at its contents.
3391 */
3392
3393 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending PortEnable (req @ %p)\n",
3394 ioc->name, &ioc_init));
3395
3396 if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
3397 printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
3398 return r;
3399 }
3400
3401 /* YIKES! SUPER IMPORTANT!!!
3402 * Poll IocState until _OPERATIONAL while IOC is doing
3403 * LoopInit and TargetDiscovery!
3404 */
3405 count = 0;
3406 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 60; /* 60 seconds */
3407 state = mpt_GetIocState(ioc, 1);
3408 while (state != MPI_IOC_STATE_OPERATIONAL && --cntdn) {
3409 if (sleepFlag == CAN_SLEEP) {
3410 msleep(1);
3411 } else {
3412 mdelay(1);
3413 }
3414
3415 if (!cntdn) {
3416 printk(MYIOC_s_ERR_FMT "Wait IOC_OP state timeout(%d)!\n",
3417 ioc->name, (int)((count+5)/HZ));
3418 return -9;
3419 }
3420
3421 state = mpt_GetIocState(ioc, 1);
3422 count++;
3423 }
3424 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wait IOC_OPERATIONAL state (cnt=%d)\n",
3425 ioc->name, count));
3426
3427 ioc->aen_event_read_flag=0;
3428 return r;
3429 }
3430
3431 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3432 /**
3433 * SendPortEnable - Send PortEnable request to MPT adapter port.
3434 * @ioc: Pointer to MPT_ADAPTER structure
3435 * @portnum: Port number to enable
3436 * @sleepFlag: Specifies whether the process can sleep
3437 *
3438 * Send PortEnable to bring IOC to OPERATIONAL state.
3439 *
3440 * Returns 0 for success, non-zero for failure.
3441 */
3442 static int
3443 SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3444 {
3445 PortEnable_t port_enable;
3446 MPIDefaultReply_t reply_buf;
3447 int rc;
3448 int req_sz;
3449 int reply_sz;
3450
3451 /* Destination... */
3452 reply_sz = sizeof(MPIDefaultReply_t);
3453 memset(&reply_buf, 0, reply_sz);
3454
3455 req_sz = sizeof(PortEnable_t);
3456 memset(&port_enable, 0, req_sz);
3457
3458 port_enable.Function = MPI_FUNCTION_PORT_ENABLE;
3459 port_enable.PortNumber = portnum;
3460 /* port_enable.ChainOffset = 0; */
3461 /* port_enable.MsgFlags = 0; */
3462 /* port_enable.MsgContext = 0; */
3463
3464 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending Port(%d)Enable (req @ %p)\n",
3465 ioc->name, portnum, &port_enable));
3466
3467 /* RAID FW may take a long time to enable
3468 */
3469 if (ioc->ir_firmware || ioc->bus_type == SAS) {
3470 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3471 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
3472 300 /*seconds*/, sleepFlag);
3473 } else {
3474 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3475 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
3476 30 /*seconds*/, sleepFlag);
3477 }
3478 return rc;
3479 }
3480
3481 /**
3482 * mpt_alloc_fw_memory - allocate firmware memory
3483 * @ioc: Pointer to MPT_ADAPTER structure
3484 * @size: total FW bytes
3485 *
3486 * If memory has already been allocated, the same (cached) value
3487 * is returned.
3488 *
3489 * Return 0 if successful, or non-zero for failure
3490 **/
3491 int
3492 mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
3493 {
3494 int rc;
3495
3496 if (ioc->cached_fw) {
3497 rc = 0; /* use already allocated memory */
3498 goto out;
3499 }
3500 else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
3501 ioc->cached_fw = ioc->alt_ioc->cached_fw; /* use alt_ioc's memory */
3502 ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
3503 rc = 0;
3504 goto out;
3505 }
3506 ioc->cached_fw = pci_alloc_consistent(ioc->pcidev, size, &ioc->cached_fw_dma);
3507 if (!ioc->cached_fw) {
3508 printk(MYIOC_s_ERR_FMT "Unable to allocate memory for the cached firmware image!\n",
3509 ioc->name);
3510 rc = -1;
3511 } else {
3512 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Image @ %p[%p], sz=%d[%x] bytes\n",
3513 ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, size, size));
3514 ioc->alloc_total += size;
3515 rc = 0;
3516 }
3517 out:
3518 return rc;
3519 }
3520
3521 /**
3522 * mpt_free_fw_memory - free firmware memory
3523 * @ioc: Pointer to MPT_ADAPTER structure
3524 *
3525 * If alt_img is NULL, delete from ioc structure.
3526 * Else, delete a secondary image in same format.
3527 **/
3528 void
3529 mpt_free_fw_memory(MPT_ADAPTER *ioc)
3530 {
3531 int sz;
3532
3533 if (!ioc->cached_fw)
3534 return;
3535
3536 sz = ioc->facts.FWImageSize;
3537 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "free_fw_memory: FW Image @ %p[%p], sz=%d[%x] bytes\n",
3538 ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3539 pci_free_consistent(ioc->pcidev, sz, ioc->cached_fw, ioc->cached_fw_dma);
3540 ioc->alloc_total -= sz;
3541 ioc->cached_fw = NULL;
3542 }
3543
3544 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3545 /**
3546 * mpt_do_upload - Construct and Send FWUpload request to MPT adapter port.
3547 * @ioc: Pointer to MPT_ADAPTER structure
3548 * @sleepFlag: Specifies whether the process can sleep
3549 *
3550 * Returns 0 for success, >0 for handshake failure
3551 * <0 for fw upload failure.
3552 *
3553 * Remark: If bound IOC and a successful FWUpload was performed
3554 * on the bound IOC, the second image is discarded
3555 * and memory is free'd. Both channels must upload to prevent
3556 * IOC from running in degraded mode.
3557 */
3558 static int
3559 mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
3560 {
3561 u8 reply[sizeof(FWUploadReply_t)];
3562 FWUpload_t *prequest;
3563 FWUploadReply_t *preply;
3564 FWUploadTCSGE_t *ptcsge;
3565 u32 flagsLength;
3566 int ii, sz, reply_sz;
3567 int cmdStatus;
3568 int request_size;
3569 /* If the image size is 0, we are done.
3570 */
3571 if ((sz = ioc->facts.FWImageSize) == 0)
3572 return 0;
3573
3574 if (mpt_alloc_fw_memory(ioc, ioc->facts.FWImageSize) != 0)
3575 return -ENOMEM;
3576
3577 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": FW Image @ %p[%p], sz=%d[%x] bytes\n",
3578 ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3579
3580 prequest = (sleepFlag == NO_SLEEP) ? kzalloc(ioc->req_sz, GFP_ATOMIC) :
3581 kzalloc(ioc->req_sz, GFP_KERNEL);
3582 if (!prequest) {
3583 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed "
3584 "while allocating memory \n", ioc->name));
3585 mpt_free_fw_memory(ioc);
3586 return -ENOMEM;
3587 }
3588
3589 preply = (FWUploadReply_t *)&reply;
3590
3591 reply_sz = sizeof(reply);
3592 memset(preply, 0, reply_sz);
3593
3594 prequest->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
3595 prequest->Function = MPI_FUNCTION_FW_UPLOAD;
3596
3597 ptcsge = (FWUploadTCSGE_t *) &prequest->SGL;
3598 ptcsge->DetailsLength = 12;
3599 ptcsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
3600 ptcsge->ImageSize = cpu_to_le32(sz);
3601 ptcsge++;
3602
3603 flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | sz;
3604 ioc->add_sge((char *)ptcsge, flagsLength, ioc->cached_fw_dma);
3605 request_size = offsetof(FWUpload_t, SGL) + sizeof(FWUploadTCSGE_t) +
3606 ioc->SGE_size;
3607 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending FW Upload "
3608 " (req @ %p) fw_size=%d mf_request_size=%d\n", ioc->name, prequest,
3609 ioc->facts.FWImageSize, request_size));
3610 DBG_DUMP_FW_REQUEST_FRAME(ioc, (u32 *)prequest);
3611
3612 ii = mpt_handshake_req_reply_wait(ioc, request_size, (u32 *)prequest,
3613 reply_sz, (u16 *)preply, 65 /*seconds*/, sleepFlag);
3614
3615 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Upload completed "
3616 "rc=%x \n", ioc->name, ii));
3617
3618 cmdStatus = -EFAULT;
3619 if (ii == 0) {
3620 /* Handshake transfer was complete and successful.
3621 * Check the Reply Frame.
3622 */
3623 int status;
3624 status = le16_to_cpu(preply->IOCStatus) &
3625 MPI_IOCSTATUS_MASK;
3626 if (status == MPI_IOCSTATUS_SUCCESS &&
3627 ioc->facts.FWImageSize ==
3628 le32_to_cpu(preply->ActualImageSize))
3629 cmdStatus = 0;
3630 }
3631 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": do_upload cmdStatus=%d \n",
3632 ioc->name, cmdStatus));
3633
3634
3635 if (cmdStatus) {
3636 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed, "
3637 "freeing image \n", ioc->name));
3638 mpt_free_fw_memory(ioc);
3639 }
3640 kfree(prequest);
3641
3642 return cmdStatus;
3643 }
3644
3645 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3646 /**
3647 * mpt_downloadboot - DownloadBoot code
3648 * @ioc: Pointer to MPT_ADAPTER structure
3649 * @pFwHeader: Pointer to firmware header info
3650 * @sleepFlag: Specifies whether the process can sleep
3651 *
3652 * FwDownloadBoot requires Programmed IO access.
3653 *
3654 * Returns 0 for success
3655 * -1 FW Image size is 0
3656 * -2 No valid cached_fw Pointer
3657 * <0 for fw upload failure.
3658 */
3659 static int
3660 mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
3661 {
3662 MpiExtImageHeader_t *pExtImage;
3663 u32 fwSize;
3664 u32 diag0val;
3665 int count;
3666 u32 *ptrFw;
3667 u32 diagRwData;
3668 u32 nextImage;
3669 u32 load_addr;
3670 u32 ioc_state=0;
3671
3672 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
3673 ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
3674
3675 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3676 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3677 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3678 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3679 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3680 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3681
3682 CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
3683
3684 /* wait 1 msec */
3685 if (sleepFlag == CAN_SLEEP) {
3686 msleep(1);
3687 } else {
3688 mdelay (1);
3689 }
3690
3691 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3692 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
3693
3694 for (count = 0; count < 30; count ++) {
3695 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3696 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
3697 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RESET_ADAPTER cleared, count=%d\n",
3698 ioc->name, count));
3699 break;
3700 }
3701 /* wait .1 sec */
3702 if (sleepFlag == CAN_SLEEP) {
3703 msleep (100);
3704 } else {
3705 mdelay (100);
3706 }
3707 }
3708
3709 if ( count == 30 ) {
3710 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot failed! "
3711 "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n",
3712 ioc->name, diag0val));
3713 return -3;
3714 }
3715
3716 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3717 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3718 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3719 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3720 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3721 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3722
3723 /* Set the DiagRwEn and Disable ARM bits */
3724 CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
3725
3726 fwSize = (pFwHeader->ImageSize + 3)/4;
3727 ptrFw = (u32 *) pFwHeader;
3728
3729 /* Write the LoadStartAddress to the DiagRw Address Register
3730 * using Programmed IO
3731 */
3732 if (ioc->errata_flag_1064)
3733 pci_enable_io_access(ioc->pcidev);
3734
3735 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
3736 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "LoadStart addr written 0x%x \n",
3737 ioc->name, pFwHeader->LoadStartAddress));
3738
3739 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write FW Image: 0x%x bytes @ %p\n",
3740 ioc->name, fwSize*4, ptrFw));
3741 while (fwSize--) {
3742 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3743 }
3744
3745 nextImage = pFwHeader->NextImageHeaderOffset;
3746 while (nextImage) {
3747 pExtImage = (MpiExtImageHeader_t *) ((char *)pFwHeader + nextImage);
3748
3749 load_addr = pExtImage->LoadStartAddress;
3750
3751 fwSize = (pExtImage->ImageSize + 3) >> 2;
3752 ptrFw = (u32 *)pExtImage;
3753
3754 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
3755 ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
3756 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
3757
3758 while (fwSize--) {
3759 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3760 }
3761 nextImage = pExtImage->NextImageHeaderOffset;
3762 }
3763
3764 /* Write the IopResetVectorRegAddr */
3765 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Addr=%x! \n", ioc->name, pFwHeader->IopResetRegAddr));
3766 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
3767
3768 /* Write the IopResetVectorValue */
3769 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
3770 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
3771
3772 /* Clear the internal flash bad bit - autoincrementing register,
3773 * so must do two writes.
3774 */
3775 if (ioc->bus_type == SPI) {
3776 /*
3777 * 1030 and 1035 H/W errata, workaround to access
3778 * the ClearFlashBadSignatureBit
3779 */
3780 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3781 diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
3782 diagRwData |= 0x40000000;
3783 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3784 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
3785
3786 } else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
3787 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3788 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
3789 MPI_DIAG_CLEAR_FLASH_BAD_SIG);
3790
3791 /* wait 1 msec */
3792 if (sleepFlag == CAN_SLEEP) {
3793 msleep (1);
3794 } else {
3795 mdelay (1);
3796 }
3797 }
3798
3799 if (ioc->errata_flag_1064)
3800 pci_disable_io_access(ioc->pcidev);
3801
3802 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3803 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot diag0val=%x, "
3804 "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n",
3805 ioc->name, diag0val));
3806 diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE);
3807 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot now diag0val=%x\n",
3808 ioc->name, diag0val));
3809 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3810
3811 /* Write 0xFF to reset the sequencer */
3812 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3813
3814 if (ioc->bus_type == SAS) {
3815 ioc_state = mpt_GetIocState(ioc, 0);
3816 if ( (GetIocFacts(ioc, sleepFlag,
3817 MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) {
3818 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "GetIocFacts failed: IocState=%x\n",
3819 ioc->name, ioc_state));
3820 return -EFAULT;
3821 }
3822 }
3823
3824 for (count=0; count<HZ*20; count++) {
3825 if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
3826 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3827 "downloadboot successful! (count=%d) IocState=%x\n",
3828 ioc->name, count, ioc_state));
3829 if (ioc->bus_type == SAS) {
3830 return 0;
3831 }
3832 if ((SendIocInit(ioc, sleepFlag)) != 0) {
3833 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3834 "downloadboot: SendIocInit failed\n",
3835 ioc->name));
3836 return -EFAULT;
3837 }
3838 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3839 "downloadboot: SendIocInit successful\n",
3840 ioc->name));
3841 return 0;
3842 }
3843 if (sleepFlag == CAN_SLEEP) {
3844 msleep (10);
3845 } else {
3846 mdelay (10);
3847 }
3848 }
3849 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3850 "downloadboot failed! IocState=%x\n",ioc->name, ioc_state));
3851 return -EFAULT;
3852 }
3853
3854 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3855 /**
3856 * KickStart - Perform hard reset of MPT adapter.
3857 * @ioc: Pointer to MPT_ADAPTER structure
3858 * @force: Force hard reset
3859 * @sleepFlag: Specifies whether the process can sleep
3860 *
3861 * This routine places MPT adapter in diagnostic mode via the
3862 * WriteSequence register, and then performs a hard reset of adapter
3863 * via the Diagnostic register.
3864 *
3865 * Inputs: sleepflag - CAN_SLEEP (non-interrupt thread)
3866 * or NO_SLEEP (interrupt thread, use mdelay)
3867 * force - 1 if doorbell active, board fault state
3868 * board operational, IOC_RECOVERY or
3869 * IOC_BRINGUP and there is an alt_ioc.
3870 * 0 else
3871 *
3872 * Returns:
3873 * 1 - hard reset, READY
3874 * 0 - no reset due to History bit, READY
3875 * -1 - no reset due to History bit but not READY
3876 * OR reset but failed to come READY
3877 * -2 - no reset, could not enter DIAG mode
3878 * -3 - reset but bad FW bit
3879 */
3880 static int
3881 KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
3882 {
3883 int hard_reset_done = 0;
3884 u32 ioc_state=0;
3885 int cnt,cntdn;
3886
3887 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStarting!\n", ioc->name));
3888 if (ioc->bus_type == SPI) {
3889 /* Always issue a Msg Unit Reset first. This will clear some
3890 * SCSI bus hang conditions.
3891 */
3892 SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
3893
3894 if (sleepFlag == CAN_SLEEP) {
3895 msleep (1000);
3896 } else {
3897 mdelay (1000);
3898 }
3899 }
3900
3901 hard_reset_done = mpt_diag_reset(ioc, force, sleepFlag);
3902 if (hard_reset_done < 0)
3903 return hard_reset_done;
3904
3905 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset successful!\n",
3906 ioc->name));
3907
3908 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 2; /* 2 seconds */
3909 for (cnt=0; cnt<cntdn; cnt++) {
3910 ioc_state = mpt_GetIocState(ioc, 1);
3911 if ((ioc_state == MPI_IOC_STATE_READY) || (ioc_state == MPI_IOC_STATE_OPERATIONAL)) {
3912 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStart successful! (cnt=%d)\n",
3913 ioc->name, cnt));
3914 return hard_reset_done;
3915 }
3916 if (sleepFlag == CAN_SLEEP) {
3917 msleep (10);
3918 } else {
3919 mdelay (10);
3920 }
3921 }
3922
3923 dinitprintk(ioc, printk(MYIOC_s_ERR_FMT "Failed to come READY after reset! IocState=%x\n",
3924 ioc->name, mpt_GetIocState(ioc, 0)));
3925 return -1;
3926 }
3927
3928 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3929 /**
3930 * mpt_diag_reset - Perform hard reset of the adapter.
3931 * @ioc: Pointer to MPT_ADAPTER structure
3932 * @ignore: Set if to honor and clear to ignore
3933 * the reset history bit
3934 * @sleepFlag: CAN_SLEEP if called in a non-interrupt thread,
3935 * else set to NO_SLEEP (use mdelay instead)
3936 *
3937 * This routine places the adapter in diagnostic mode via the
3938 * WriteSequence register and then performs a hard reset of adapter
3939 * via the Diagnostic register. Adapter should be in ready state
3940 * upon successful completion.
3941 *
3942 * Returns: 1 hard reset successful
3943 * 0 no reset performed because reset history bit set
3944 * -2 enabling diagnostic mode failed
3945 * -3 diagnostic reset failed
3946 */
3947 static int
3948 mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
3949 {
3950 u32 diag0val;
3951 u32 doorbell;
3952 int hard_reset_done = 0;
3953 int count = 0;
3954 u32 diag1val = 0;
3955 MpiFwHeader_t *cached_fw; /* Pointer to FW */
3956 u8 cb_idx;
3957
3958 /* Clear any existing interrupts */
3959 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3960
3961 if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) {
3962
3963 if (!ignore)
3964 return 0;
3965
3966 drsprintk(ioc, printk(MYIOC_s_WARN_FMT "%s: Doorbell=%p; 1078 reset "
3967 "address=%p\n", ioc->name, __func__,
3968 &ioc->chip->Doorbell, &ioc->chip->Reset_1078));
3969 CHIPREG_WRITE32(&ioc->chip->Reset_1078, 0x07);
3970 if (sleepFlag == CAN_SLEEP)
3971 msleep(1);
3972 else
3973 mdelay(1);
3974
3975 /*
3976 * Call each currently registered protocol IOC reset handler
3977 * with pre-reset indication.
3978 * NOTE: If we're doing _IOC_BRINGUP, there can be no
3979 * MptResetHandlers[] registered yet.
3980 */
3981 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
3982 if (MptResetHandlers[cb_idx])
3983 (*(MptResetHandlers[cb_idx]))(ioc,
3984 MPT_IOC_PRE_RESET);
3985 }
3986
3987 for (count = 0; count < 60; count ++) {
3988 doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
3989 doorbell &= MPI_IOC_STATE_MASK;
3990
3991 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3992 "looking for READY STATE: doorbell=%x"
3993 " count=%d\n",
3994 ioc->name, doorbell, count));
3995
3996 if (doorbell == MPI_IOC_STATE_READY) {
3997 return 1;
3998 }
3999
4000 /* wait 1 sec */
4001 if (sleepFlag == CAN_SLEEP)
4002 msleep(1000);
4003 else
4004 mdelay(1000);
4005 }
4006 return -1;
4007 }
4008
4009 /* Use "Diagnostic reset" method! (only thing available!) */
4010 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4011
4012 if (ioc->debug_level & MPT_DEBUG) {
4013 if (ioc->alt_ioc)
4014 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4015 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG1: diag0=%08x, diag1=%08x\n",
4016 ioc->name, diag0val, diag1val));
4017 }
4018
4019 /* Do the reset if we are told to ignore the reset history
4020 * or if the reset history is 0
4021 */
4022 if (ignore || !(diag0val & MPI_DIAG_RESET_HISTORY)) {
4023 while ((diag0val & MPI_DIAG_DRWE) == 0) {
4024 /* Write magic sequence to WriteSequence register
4025 * Loop until in diagnostic mode
4026 */
4027 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
4028 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
4029 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
4030 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
4031 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
4032 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
4033
4034 /* wait 100 msec */
4035 if (sleepFlag == CAN_SLEEP) {
4036 msleep (100);
4037 } else {
4038 mdelay (100);
4039 }
4040
4041 count++;
4042 if (count > 20) {
4043 printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
4044 ioc->name, diag0val);
4045 return -2;
4046
4047 }
4048
4049 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4050
4051 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wrote magic DiagWriteEn sequence (%x)\n",
4052 ioc->name, diag0val));
4053 }
4054
4055 if (ioc->debug_level & MPT_DEBUG) {
4056 if (ioc->alt_ioc)
4057 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4058 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG2: diag0=%08x, diag1=%08x\n",
4059 ioc->name, diag0val, diag1val));
4060 }
4061 /*
4062 * Disable the ARM (Bug fix)
4063 *
4064 */
4065 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_DISABLE_ARM);
4066 mdelay(1);
4067
4068 /*
4069 * Now hit the reset bit in the Diagnostic register
4070 * (THE BIG HAMMER!) (Clears DRWE bit).
4071 */
4072 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
4073 hard_reset_done = 1;
4074 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset performed\n",
4075 ioc->name));
4076
4077 /*
4078 * Call each currently registered protocol IOC reset handler
4079 * with pre-reset indication.
4080 * NOTE: If we're doing _IOC_BRINGUP, there can be no
4081 * MptResetHandlers[] registered yet.
4082 */
4083 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
4084 if (MptResetHandlers[cb_idx]) {
4085 mpt_signal_reset(cb_idx,
4086 ioc, MPT_IOC_PRE_RESET);
4087 if (ioc->alt_ioc) {
4088 mpt_signal_reset(cb_idx,
4089 ioc->alt_ioc, MPT_IOC_PRE_RESET);
4090 }
4091 }
4092 }
4093
4094 if (ioc->cached_fw)
4095 cached_fw = (MpiFwHeader_t *)ioc->cached_fw;
4096 else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw)
4097 cached_fw = (MpiFwHeader_t *)ioc->alt_ioc->cached_fw;
4098 else
4099 cached_fw = NULL;
4100 if (cached_fw) {
4101 /* If the DownloadBoot operation fails, the
4102 * IOC will be left unusable. This is a fatal error
4103 * case. _diag_reset will return < 0
4104 */
4105 for (count = 0; count < 30; count ++) {
4106 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4107 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
4108 break;
4109 }
4110
4111 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "cached_fw: diag0val=%x count=%d\n",
4112 ioc->name, diag0val, count));
4113 /* wait 1 sec */
4114 if (sleepFlag == CAN_SLEEP) {
4115 msleep (1000);
4116 } else {
4117 mdelay (1000);
4118 }
4119 }
4120 if ((count = mpt_downloadboot(ioc, cached_fw, sleepFlag)) < 0) {
4121 printk(MYIOC_s_WARN_FMT
4122 "firmware downloadboot failure (%d)!\n", ioc->name, count);
4123 }
4124
4125 } else {
4126 /* Wait for FW to reload and for board
4127 * to go to the READY state.
4128 * Maximum wait is 60 seconds.
4129 * If fail, no error will check again
4130 * with calling program.
4131 */
4132 for (count = 0; count < 60; count ++) {
4133 doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
4134 doorbell &= MPI_IOC_STATE_MASK;
4135
4136 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4137 "looking for READY STATE: doorbell=%x"
4138 " count=%d\n", ioc->name, doorbell, count));
4139
4140 if (doorbell == MPI_IOC_STATE_READY) {
4141 break;
4142 }
4143
4144 /* wait 1 sec */
4145 if (sleepFlag == CAN_SLEEP) {
4146 msleep (1000);
4147 } else {
4148 mdelay (1000);
4149 }
4150 }
4151
4152 if (doorbell != MPI_IOC_STATE_READY)
4153 printk(MYIOC_s_ERR_FMT "Failed to come READY "
4154 "after reset! IocState=%x", ioc->name,
4155 doorbell);
4156 }
4157 }
4158
4159 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4160 if (ioc->debug_level & MPT_DEBUG) {
4161 if (ioc->alt_ioc)
4162 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4163 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG3: diag0=%08x, diag1=%08x\n",
4164 ioc->name, diag0val, diag1val));
4165 }
4166
4167 /* Clear RESET_HISTORY bit! Place board in the
4168 * diagnostic mode to update the diag register.
4169 */
4170 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4171 count = 0;
4172 while ((diag0val & MPI_DIAG_DRWE) == 0) {
4173 /* Write magic sequence to WriteSequence register
4174 * Loop until in diagnostic mode
4175 */
4176 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
4177 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
4178 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
4179 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
4180 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
4181 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
4182
4183 /* wait 100 msec */
4184 if (sleepFlag == CAN_SLEEP) {
4185 msleep (100);
4186 } else {
4187 mdelay (100);
4188 }
4189
4190 count++;
4191 if (count > 20) {
4192 printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
4193 ioc->name, diag0val);
4194 break;
4195 }
4196 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4197 }
4198 diag0val &= ~MPI_DIAG_RESET_HISTORY;
4199 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
4200 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4201 if (diag0val & MPI_DIAG_RESET_HISTORY) {
4202 printk(MYIOC_s_WARN_FMT "ResetHistory bit failed to clear!\n",
4203 ioc->name);
4204 }
4205
4206 /* Disable Diagnostic Mode
4207 */
4208 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFFFFFFFF);
4209
4210 /* Check FW reload status flags.
4211 */
4212 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4213 if (diag0val & (MPI_DIAG_FLASH_BAD_SIG | MPI_DIAG_RESET_ADAPTER | MPI_DIAG_DISABLE_ARM)) {
4214 printk(MYIOC_s_ERR_FMT "Diagnostic reset FAILED! (%02xh)\n",
4215 ioc->name, diag0val);
4216 return -3;
4217 }
4218
4219 if (ioc->debug_level & MPT_DEBUG) {
4220 if (ioc->alt_ioc)
4221 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4222 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG4: diag0=%08x, diag1=%08x\n",
4223 ioc->name, diag0val, diag1val));
4224 }
4225
4226 /*
4227 * Reset flag that says we've enabled event notification
4228 */
4229 ioc->facts.EventState = 0;
4230
4231 if (ioc->alt_ioc)
4232 ioc->alt_ioc->facts.EventState = 0;
4233
4234 return hard_reset_done;
4235 }
4236
4237 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4238 /**
4239 * SendIocReset - Send IOCReset request to MPT adapter.
4240 * @ioc: Pointer to MPT_ADAPTER structure
4241 * @reset_type: reset type, expected values are
4242 * %MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET or %MPI_FUNCTION_IO_UNIT_RESET
4243 * @sleepFlag: Specifies whether the process can sleep
4244 *
4245 * Send IOCReset request to the MPT adapter.
4246 *
4247 * Returns 0 for success, non-zero for failure.
4248 */
4249 static int
4250 SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag)
4251 {
4252 int r;
4253 u32 state;
4254 int cntdn, count;
4255
4256 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOC reset(0x%02x)!\n",
4257 ioc->name, reset_type));
4258 CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT);
4259 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4260 return r;
4261
4262 /* FW ACK'd request, wait for READY state
4263 */
4264 count = 0;
4265 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 15; /* 15 seconds */
4266
4267 while ((state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
4268 cntdn--;
4269 count++;
4270 if (!cntdn) {
4271 if (sleepFlag != CAN_SLEEP)
4272 count *= 10;
4273
4274 printk(MYIOC_s_ERR_FMT
4275 "Wait IOC_READY state (0x%x) timeout(%d)!\n",
4276 ioc->name, state, (int)((count+5)/HZ));
4277 return -ETIME;
4278 }
4279
4280 if (sleepFlag == CAN_SLEEP) {
4281 msleep(1);
4282 } else {
4283 mdelay (1); /* 1 msec delay */
4284 }
4285 }
4286
4287 /* TODO!
4288 * Cleanup all event stuff for this IOC; re-issue EventNotification
4289 * request if needed.
4290 */
4291 if (ioc->facts.Function)
4292 ioc->facts.EventState = 0;
4293
4294 return 0;
4295 }
4296
4297 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4298 /**
4299 * initChainBuffers - Allocate memory for and initialize chain buffers
4300 * @ioc: Pointer to MPT_ADAPTER structure
4301 *
4302 * Allocates memory for and initializes chain buffers,
4303 * chain buffer control arrays and spinlock.
4304 */
4305 static int
4306 initChainBuffers(MPT_ADAPTER *ioc)
4307 {
4308 u8 *mem;
4309 int sz, ii, num_chain;
4310 int scale, num_sge, numSGE;
4311
4312 /* ReqToChain size must equal the req_depth
4313 * index = req_idx
4314 */
4315 if (ioc->ReqToChain == NULL) {
4316 sz = ioc->req_depth * sizeof(int);
4317 mem = kmalloc(sz, GFP_ATOMIC);
4318 if (mem == NULL)
4319 return -1;
4320
4321 ioc->ReqToChain = (int *) mem;
4322 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReqToChain alloc @ %p, sz=%d bytes\n",
4323 ioc->name, mem, sz));
4324 mem = kmalloc(sz, GFP_ATOMIC);
4325 if (mem == NULL)
4326 return -1;
4327
4328 ioc->RequestNB = (int *) mem;
4329 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestNB alloc @ %p, sz=%d bytes\n",
4330 ioc->name, mem, sz));
4331 }
4332 for (ii = 0; ii < ioc->req_depth; ii++) {
4333 ioc->ReqToChain[ii] = MPT_HOST_NO_CHAIN;
4334 }
4335
4336 /* ChainToChain size must equal the total number
4337 * of chain buffers to be allocated.
4338 * index = chain_idx
4339 *
4340 * Calculate the number of chain buffers needed(plus 1) per I/O
4341 * then multiply the maximum number of simultaneous cmds
4342 *
4343 * num_sge = num sge in request frame + last chain buffer
4344 * scale = num sge per chain buffer if no chain element
4345 */
4346 scale = ioc->req_sz / ioc->SGE_size;
4347 if (ioc->sg_addr_size == sizeof(u64))
4348 num_sge = scale + (ioc->req_sz - 60) / ioc->SGE_size;
4349 else
4350 num_sge = 1 + scale + (ioc->req_sz - 64) / ioc->SGE_size;
4351
4352 if (ioc->sg_addr_size == sizeof(u64)) {
4353 numSGE = (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
4354 (ioc->req_sz - 60) / ioc->SGE_size;
4355 } else {
4356 numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) +
4357 scale + (ioc->req_sz - 64) / ioc->SGE_size;
4358 }
4359 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "num_sge=%d numSGE=%d\n",
4360 ioc->name, num_sge, numSGE));
4361
4362 if (ioc->bus_type == FC) {
4363 if (numSGE > MPT_SCSI_FC_SG_DEPTH)
4364 numSGE = MPT_SCSI_FC_SG_DEPTH;
4365 } else {
4366 if (numSGE > MPT_SCSI_SG_DEPTH)
4367 numSGE = MPT_SCSI_SG_DEPTH;
4368 }
4369
4370 num_chain = 1;
4371 while (numSGE - num_sge > 0) {
4372 num_chain++;
4373 num_sge += (scale - 1);
4374 }
4375 num_chain++;
4376
4377 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Now numSGE=%d num_sge=%d num_chain=%d\n",
4378 ioc->name, numSGE, num_sge, num_chain));
4379
4380 if (ioc->bus_type == SPI)
4381 num_chain *= MPT_SCSI_CAN_QUEUE;
4382 else if (ioc->bus_type == SAS)
4383 num_chain *= MPT_SAS_CAN_QUEUE;
4384 else
4385 num_chain *= MPT_FC_CAN_QUEUE;
4386
4387 ioc->num_chain = num_chain;
4388
4389 sz = num_chain * sizeof(int);
4390 if (ioc->ChainToChain == NULL) {
4391 mem = kmalloc(sz, GFP_ATOMIC);
4392 if (mem == NULL)
4393 return -1;
4394
4395 ioc->ChainToChain = (int *) mem;
4396 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainToChain alloc @ %p, sz=%d bytes\n",
4397 ioc->name, mem, sz));
4398 } else {
4399 mem = (u8 *) ioc->ChainToChain;
4400 }
4401 memset(mem, 0xFF, sz);
4402 return num_chain;
4403 }
4404
4405 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4406 /**
4407 * PrimeIocFifos - Initialize IOC request and reply FIFOs.
4408 * @ioc: Pointer to MPT_ADAPTER structure
4409 *
4410 * This routine allocates memory for the MPT reply and request frame
4411 * pools (if necessary), and primes the IOC reply FIFO with
4412 * reply frames.
4413 *
4414 * Returns 0 for success, non-zero for failure.
4415 */
4416 static int
4417 PrimeIocFifos(MPT_ADAPTER *ioc)
4418 {
4419 MPT_FRAME_HDR *mf;
4420 unsigned long flags;
4421 dma_addr_t alloc_dma;
4422 u8 *mem;
4423 int i, reply_sz, sz, total_size, num_chain;
4424 u64 dma_mask;
4425
4426 dma_mask = 0;
4427
4428 /* Prime reply FIFO... */
4429
4430 if (ioc->reply_frames == NULL) {
4431 if ( (num_chain = initChainBuffers(ioc)) < 0)
4432 return -1;
4433 /*
4434 * 1078 errata workaround for the 36GB limitation
4435 */
4436 if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078 &&
4437 ioc->dma_mask > DMA_BIT_MASK(35)) {
4438 if (!pci_set_dma_mask(ioc->pcidev, DMA_BIT_MASK(32))
4439 && !pci_set_consistent_dma_mask(ioc->pcidev,
4440 DMA_BIT_MASK(32))) {
4441 dma_mask = DMA_BIT_MASK(35);
4442 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4443 "setting 35 bit addressing for "
4444 "Request/Reply/Chain and Sense Buffers\n",
4445 ioc->name));
4446 } else {
4447 /*Reseting DMA mask to 64 bit*/
4448 pci_set_dma_mask(ioc->pcidev,
4449 DMA_BIT_MASK(64));
4450 pci_set_consistent_dma_mask(ioc->pcidev,
4451 DMA_BIT_MASK(64));
4452
4453 printk(MYIOC_s_ERR_FMT
4454 "failed setting 35 bit addressing for "
4455 "Request/Reply/Chain and Sense Buffers\n",
4456 ioc->name);
4457 return -1;
4458 }
4459 }
4460
4461 total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth);
4462 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d bytes, ReplyDepth=%d\n",
4463 ioc->name, ioc->reply_sz, ioc->reply_depth));
4464 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d[%x] bytes\n",
4465 ioc->name, reply_sz, reply_sz));
4466
4467 sz = (ioc->req_sz * ioc->req_depth);
4468 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d bytes, RequestDepth=%d\n",
4469 ioc->name, ioc->req_sz, ioc->req_depth));
4470 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d[%x] bytes\n",
4471 ioc->name, sz, sz));
4472 total_size += sz;
4473
4474 sz = num_chain * ioc->req_sz; /* chain buffer pool size */
4475 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d bytes, ChainDepth=%d\n",
4476 ioc->name, ioc->req_sz, num_chain));
4477 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d[%x] bytes num_chain=%d\n",
4478 ioc->name, sz, sz, num_chain));
4479
4480 total_size += sz;
4481 mem = pci_alloc_consistent(ioc->pcidev, total_size, &alloc_dma);
4482 if (mem == NULL) {
4483 printk(MYIOC_s_ERR_FMT "Unable to allocate Reply, Request, Chain Buffers!\n",
4484 ioc->name);
4485 goto out_fail;
4486 }
4487
4488 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Total alloc @ %p[%p], sz=%d[%x] bytes\n",
4489 ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size));
4490
4491 memset(mem, 0, total_size);
4492 ioc->alloc_total += total_size;
4493 ioc->alloc = mem;
4494 ioc->alloc_dma = alloc_dma;
4495 ioc->alloc_sz = total_size;
4496 ioc->reply_frames = (MPT_FRAME_HDR *) mem;
4497 ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4498
4499 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4500 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4501
4502 alloc_dma += reply_sz;
4503 mem += reply_sz;
4504
4505 /* Request FIFO - WE manage this! */
4506
4507 ioc->req_frames = (MPT_FRAME_HDR *) mem;
4508 ioc->req_frames_dma = alloc_dma;
4509
4510 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffers @ %p[%p]\n",
4511 ioc->name, mem, (void *)(ulong)alloc_dma));
4512
4513 ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4514
4515 #if defined(CONFIG_MTRR) && 0
4516 /*
4517 * Enable Write Combining MTRR for IOC's memory region.
4518 * (at least as much as we can; "size and base must be
4519 * multiples of 4 kiB"
4520 */
4521 ioc->mtrr_reg = mtrr_add(ioc->req_frames_dma,
4522 sz,
4523 MTRR_TYPE_WRCOMB, 1);
4524 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "MTRR region registered (base:size=%08x:%x)\n",
4525 ioc->name, ioc->req_frames_dma, sz));
4526 #endif
4527
4528 for (i = 0; i < ioc->req_depth; i++) {
4529 alloc_dma += ioc->req_sz;
4530 mem += ioc->req_sz;
4531 }
4532
4533 ioc->ChainBuffer = mem;
4534 ioc->ChainBufferDMA = alloc_dma;
4535
4536 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffers @ %p(%p)\n",
4537 ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA));
4538
4539 /* Initialize the free chain Q.
4540 */
4541
4542 INIT_LIST_HEAD(&ioc->FreeChainQ);
4543
4544 /* Post the chain buffers to the FreeChainQ.
4545 */
4546 mem = (u8 *)ioc->ChainBuffer;
4547 for (i=0; i < num_chain; i++) {
4548 mf = (MPT_FRAME_HDR *) mem;
4549 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeChainQ);
4550 mem += ioc->req_sz;
4551 }
4552
4553 /* Initialize Request frames linked list
4554 */
4555 alloc_dma = ioc->req_frames_dma;
4556 mem = (u8 *) ioc->req_frames;
4557
4558 spin_lock_irqsave(&ioc->FreeQlock, flags);
4559 INIT_LIST_HEAD(&ioc->FreeQ);
4560 for (i = 0; i < ioc->req_depth; i++) {
4561 mf = (MPT_FRAME_HDR *) mem;
4562
4563 /* Queue REQUESTs *internally*! */
4564 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
4565
4566 mem += ioc->req_sz;
4567 }
4568 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
4569
4570 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4571 ioc->sense_buf_pool =
4572 pci_alloc_consistent(ioc->pcidev, sz, &ioc->sense_buf_pool_dma);
4573 if (ioc->sense_buf_pool == NULL) {
4574 printk(MYIOC_s_ERR_FMT "Unable to allocate Sense Buffers!\n",
4575 ioc->name);
4576 goto out_fail;
4577 }
4578
4579 ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF);
4580 ioc->alloc_total += sz;
4581 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SenseBuffers @ %p[%p]\n",
4582 ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma));
4583
4584 }
4585
4586 /* Post Reply frames to FIFO
4587 */
4588 alloc_dma = ioc->alloc_dma;
4589 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4590 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4591
4592 for (i = 0; i < ioc->reply_depth; i++) {
4593 /* Write each address to the IOC! */
4594 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, alloc_dma);
4595 alloc_dma += ioc->reply_sz;
4596 }
4597
4598 if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
4599 ioc->dma_mask) && !pci_set_consistent_dma_mask(ioc->pcidev,
4600 ioc->dma_mask))
4601 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4602 "restoring 64 bit addressing\n", ioc->name));
4603
4604 return 0;
4605
4606 out_fail:
4607
4608 if (ioc->alloc != NULL) {
4609 sz = ioc->alloc_sz;
4610 pci_free_consistent(ioc->pcidev,
4611 sz,
4612 ioc->alloc, ioc->alloc_dma);
4613 ioc->reply_frames = NULL;
4614 ioc->req_frames = NULL;
4615 ioc->alloc_total -= sz;
4616 }
4617 if (ioc->sense_buf_pool != NULL) {
4618 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4619 pci_free_consistent(ioc->pcidev,
4620 sz,
4621 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
4622 ioc->sense_buf_pool = NULL;
4623 }
4624
4625 if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
4626 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(ioc->pcidev,
4627 DMA_BIT_MASK(64)))
4628 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4629 "restoring 64 bit addressing\n", ioc->name));
4630
4631 return -1;
4632 }
4633
4634 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4635 /**
4636 * mpt_handshake_req_reply_wait - Send MPT request to and receive reply
4637 * from IOC via doorbell handshake method.
4638 * @ioc: Pointer to MPT_ADAPTER structure
4639 * @reqBytes: Size of the request in bytes
4640 * @req: Pointer to MPT request frame
4641 * @replyBytes: Expected size of the reply in bytes
4642 * @u16reply: Pointer to area where reply should be written
4643 * @maxwait: Max wait time for a reply (in seconds)
4644 * @sleepFlag: Specifies whether the process can sleep
4645 *
4646 * NOTES: It is the callers responsibility to byte-swap fields in the
4647 * request which are greater than 1 byte in size. It is also the
4648 * callers responsibility to byte-swap response fields which are
4649 * greater than 1 byte in size.
4650 *
4651 * Returns 0 for success, non-zero for failure.
4652 */
4653 static int
4654 mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req,
4655 int replyBytes, u16 *u16reply, int maxwait, int sleepFlag)
4656 {
4657 MPIDefaultReply_t *mptReply;
4658 int failcnt = 0;
4659 int t;
4660
4661 /*
4662 * Get ready to cache a handshake reply
4663 */
4664 ioc->hs_reply_idx = 0;
4665 mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4666 mptReply->MsgLength = 0;
4667
4668 /*
4669 * Make sure there are no doorbells (WRITE 0 to IntStatus reg),
4670 * then tell IOC that we want to handshake a request of N words.
4671 * (WRITE u32val to Doorbell reg).
4672 */
4673 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4674 CHIPREG_WRITE32(&ioc->chip->Doorbell,
4675 ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
4676 ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
4677
4678 /*
4679 * Wait for IOC's doorbell handshake int
4680 */
4681 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4682 failcnt++;
4683
4684 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n",
4685 ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4686
4687 /* Read doorbell and check for active bit */
4688 if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
4689 return -1;
4690
4691 /*
4692 * Clear doorbell int (WRITE 0 to IntStatus reg),
4693 * then wait for IOC to ACKnowledge that it's ready for
4694 * our handshake request.
4695 */
4696 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4697 if (!failcnt && (t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4698 failcnt++;
4699
4700 if (!failcnt) {
4701 int ii;
4702 u8 *req_as_bytes = (u8 *) req;
4703
4704 /*
4705 * Stuff request words via doorbell handshake,
4706 * with ACK from IOC for each.
4707 */
4708 for (ii = 0; !failcnt && ii < reqBytes/4; ii++) {
4709 u32 word = ((req_as_bytes[(ii*4) + 0] << 0) |
4710 (req_as_bytes[(ii*4) + 1] << 8) |
4711 (req_as_bytes[(ii*4) + 2] << 16) |
4712 (req_as_bytes[(ii*4) + 3] << 24));
4713
4714 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
4715 if ((t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4716 failcnt++;
4717 }
4718
4719 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Handshake request frame (@%p) header\n", ioc->name, req));
4720 DBG_DUMP_REQUEST_FRAME_HDR(ioc, (u32 *)req);
4721
4722 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request post done, WaitCnt=%d%s\n",
4723 ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : ""));
4724
4725 /*
4726 * Wait for completion of doorbell handshake reply from the IOC
4727 */
4728 if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0)
4729 failcnt++;
4730
4731 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake reply count=%d%s\n",
4732 ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : ""));
4733
4734 /*
4735 * Copy out the cached reply...
4736 */
4737 for (ii=0; ii < min(replyBytes/2,mptReply->MsgLength*2); ii++)
4738 u16reply[ii] = ioc->hs_reply[ii];
4739 } else {
4740 return -99;
4741 }
4742
4743 return -failcnt;
4744 }
4745
4746 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4747 /**
4748 * WaitForDoorbellAck - Wait for IOC doorbell handshake acknowledge
4749 * @ioc: Pointer to MPT_ADAPTER structure
4750 * @howlong: How long to wait (in seconds)
4751 * @sleepFlag: Specifies whether the process can sleep
4752 *
4753 * This routine waits (up to ~2 seconds max) for IOC doorbell
4754 * handshake ACKnowledge, indicated by the IOP_DOORBELL_STATUS
4755 * bit in its IntStatus register being clear.
4756 *
4757 * Returns a negative value on failure, else wait loop count.
4758 */
4759 static int
4760 WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4761 {
4762 int cntdn;
4763 int count = 0;
4764 u32 intstat=0;
4765
4766 cntdn = 1000 * howlong;
4767
4768 if (sleepFlag == CAN_SLEEP) {
4769 while (--cntdn) {
4770 msleep (1);
4771 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4772 if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
4773 break;
4774 count++;
4775 }
4776 } else {
4777 while (--cntdn) {
4778 udelay (1000);
4779 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4780 if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
4781 break;
4782 count++;
4783 }
4784 }
4785
4786 if (cntdn) {
4787 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell ACK (count=%d)\n",
4788 ioc->name, count));
4789 return count;
4790 }
4791
4792 printk(MYIOC_s_ERR_FMT "Doorbell ACK timeout (count=%d), IntStatus=%x!\n",
4793 ioc->name, count, intstat);
4794 return -1;
4795 }
4796
4797 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4798 /**
4799 * WaitForDoorbellInt - Wait for IOC to set its doorbell interrupt bit
4800 * @ioc: Pointer to MPT_ADAPTER structure
4801 * @howlong: How long to wait (in seconds)
4802 * @sleepFlag: Specifies whether the process can sleep
4803 *
4804 * This routine waits (up to ~2 seconds max) for IOC doorbell interrupt
4805 * (MPI_HIS_DOORBELL_INTERRUPT) to be set in the IntStatus register.
4806 *
4807 * Returns a negative value on failure, else wait loop count.
4808 */
4809 static int
4810 WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4811 {
4812 int cntdn;
4813 int count = 0;
4814 u32 intstat=0;
4815
4816 cntdn = 1000 * howlong;
4817 if (sleepFlag == CAN_SLEEP) {
4818 while (--cntdn) {
4819 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4820 if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
4821 break;
4822 msleep(1);
4823 count++;
4824 }
4825 } else {
4826 while (--cntdn) {
4827 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4828 if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
4829 break;
4830 udelay (1000);
4831 count++;
4832 }
4833 }
4834
4835 if (cntdn) {
4836 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n",
4837 ioc->name, count, howlong));
4838 return count;
4839 }
4840
4841 printk(MYIOC_s_ERR_FMT "Doorbell INT timeout (count=%d), IntStatus=%x!\n",
4842 ioc->name, count, intstat);
4843 return -1;
4844 }
4845
4846 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4847 /**
4848 * WaitForDoorbellReply - Wait for and capture an IOC handshake reply.
4849 * @ioc: Pointer to MPT_ADAPTER structure
4850 * @howlong: How long to wait (in seconds)
4851 * @sleepFlag: Specifies whether the process can sleep
4852 *
4853 * This routine polls the IOC for a handshake reply, 16 bits at a time.
4854 * Reply is cached to IOC private area large enough to hold a maximum
4855 * of 128 bytes of reply data.
4856 *
4857 * Returns a negative value on failure, else size of reply in WORDS.
4858 */
4859 static int
4860 WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4861 {
4862 int u16cnt = 0;
4863 int failcnt = 0;
4864 int t;
4865 u16 *hs_reply = ioc->hs_reply;
4866 volatile MPIDefaultReply_t *mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4867 u16 hword;
4868
4869 hs_reply[0] = hs_reply[1] = hs_reply[7] = 0;
4870
4871 /*
4872 * Get first two u16's so we can look at IOC's intended reply MsgLength
4873 */
4874 u16cnt=0;
4875 if ((t = WaitForDoorbellInt(ioc, howlong, sleepFlag)) < 0) {
4876 failcnt++;
4877 } else {
4878 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4879 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4880 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4881 failcnt++;
4882 else {
4883 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4884 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4885 }
4886 }
4887
4888 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitCnt=%d First handshake reply word=%08x%s\n",
4889 ioc->name, t, le32_to_cpu(*(u32 *)hs_reply),
4890 failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4891
4892 /*
4893 * If no error (and IOC said MsgLength is > 0), piece together
4894 * reply 16 bits at a time.
4895 */
4896 for (u16cnt=2; !failcnt && u16cnt < (2 * mptReply->MsgLength); u16cnt++) {
4897 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4898 failcnt++;
4899 hword = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4900 /* don't overflow our IOC hs_reply[] buffer! */
4901 if (u16cnt < ARRAY_SIZE(ioc->hs_reply))
4902 hs_reply[u16cnt] = hword;
4903 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4904 }
4905
4906 if (!failcnt && (t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4907 failcnt++;
4908 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4909
4910 if (failcnt) {
4911 printk(MYIOC_s_ERR_FMT "Handshake reply failure!\n",
4912 ioc->name);
4913 return -failcnt;
4914 }
4915 #if 0
4916 else if (u16cnt != (2 * mptReply->MsgLength)) {
4917 return -101;
4918 }
4919 else if ((mptReply->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
4920 return -102;
4921 }
4922 #endif
4923
4924 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got Handshake reply:\n", ioc->name));
4925 DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mptReply);
4926
4927 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n",
4928 ioc->name, t, u16cnt/2));
4929 return u16cnt/2;
4930 }
4931
4932 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4933 /**
4934 * GetLanConfigPages - Fetch LANConfig pages.
4935 * @ioc: Pointer to MPT_ADAPTER structure
4936 *
4937 * Return: 0 for success
4938 * -ENOMEM if no memory available
4939 * -EPERM if not allowed due to ISR context
4940 * -EAGAIN if no msg frames currently available
4941 * -EFAULT for non-successful reply or no reply (timeout)
4942 */
4943 static int
4944 GetLanConfigPages(MPT_ADAPTER *ioc)
4945 {
4946 ConfigPageHeader_t hdr;
4947 CONFIGPARMS cfg;
4948 LANPage0_t *ppage0_alloc;
4949 dma_addr_t page0_dma;
4950 LANPage1_t *ppage1_alloc;
4951 dma_addr_t page1_dma;
4952 int rc = 0;
4953 int data_sz;
4954 int copy_sz;
4955
4956 /* Get LAN Page 0 header */
4957 hdr.PageVersion = 0;
4958 hdr.PageLength = 0;
4959 hdr.PageNumber = 0;
4960 hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
4961 cfg.cfghdr.hdr = &hdr;
4962 cfg.physAddr = -1;
4963 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4964 cfg.dir = 0;
4965 cfg.pageAddr = 0;
4966 cfg.timeout = 0;
4967
4968 if ((rc = mpt_config(ioc, &cfg)) != 0)
4969 return rc;
4970
4971 if (hdr.PageLength > 0) {
4972 data_sz = hdr.PageLength * 4;
4973 ppage0_alloc = (LANPage0_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page0_dma);
4974 rc = -ENOMEM;
4975 if (ppage0_alloc) {
4976 memset((u8 *)ppage0_alloc, 0, data_sz);
4977 cfg.physAddr = page0_dma;
4978 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4979
4980 if ((rc = mpt_config(ioc, &cfg)) == 0) {
4981 /* save the data */
4982 copy_sz = min_t(int, sizeof(LANPage0_t), data_sz);
4983 memcpy(&ioc->lan_cnfg_page0, ppage0_alloc, copy_sz);
4984
4985 }
4986
4987 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage0_alloc, page0_dma);
4988
4989 /* FIXME!
4990 * Normalize endianness of structure data,
4991 * by byte-swapping all > 1 byte fields!
4992 */
4993
4994 }
4995
4996 if (rc)
4997 return rc;
4998 }
4999
5000 /* Get LAN Page 1 header */
5001 hdr.PageVersion = 0;
5002 hdr.PageLength = 0;
5003 hdr.PageNumber = 1;
5004 hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
5005 cfg.cfghdr.hdr = &hdr;
5006 cfg.physAddr = -1;
5007 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5008 cfg.dir = 0;
5009 cfg.pageAddr = 0;
5010
5011 if ((rc = mpt_config(ioc, &cfg)) != 0)
5012 return rc;
5013
5014 if (hdr.PageLength == 0)
5015 return 0;
5016
5017 data_sz = hdr.PageLength * 4;
5018 rc = -ENOMEM;
5019 ppage1_alloc = (LANPage1_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page1_dma);
5020 if (ppage1_alloc) {
5021 memset((u8 *)ppage1_alloc, 0, data_sz);
5022 cfg.physAddr = page1_dma;
5023 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5024
5025 if ((rc = mpt_config(ioc, &cfg)) == 0) {
5026 /* save the data */
5027 copy_sz = min_t(int, sizeof(LANPage1_t), data_sz);
5028 memcpy(&ioc->lan_cnfg_page1, ppage1_alloc, copy_sz);
5029 }
5030
5031 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage1_alloc, page1_dma);
5032
5033 /* FIXME!
5034 * Normalize endianness of structure data,
5035 * by byte-swapping all > 1 byte fields!
5036 */
5037
5038 }
5039
5040 return rc;
5041 }
5042
5043 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5044 /**
5045 * mptbase_sas_persist_operation - Perform operation on SAS Persistent Table
5046 * @ioc: Pointer to MPT_ADAPTER structure
5047 * @persist_opcode: see below
5048 *
5049 * MPI_SAS_OP_CLEAR_NOT_PRESENT - Free all persist TargetID mappings for
5050 * devices not currently present.
5051 * MPI_SAS_OP_CLEAR_ALL_PERSISTENT - Clear al persist TargetID mappings
5052 *
5053 * NOTE: Don't use not this function during interrupt time.
5054 *
5055 * Returns 0 for success, non-zero error
5056 */
5057
5058 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5059 int
5060 mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode)
5061 {
5062 SasIoUnitControlRequest_t *sasIoUnitCntrReq;
5063 SasIoUnitControlReply_t *sasIoUnitCntrReply;
5064 MPT_FRAME_HDR *mf = NULL;
5065 MPIHeader_t *mpi_hdr;
5066 int ret = 0;
5067 unsigned long timeleft;
5068
5069 mutex_lock(&ioc->mptbase_cmds.mutex);
5070
5071 /* init the internal cmd struct */
5072 memset(ioc->mptbase_cmds.reply, 0 , MPT_DEFAULT_FRAME_SIZE);
5073 INITIALIZE_MGMT_STATUS(ioc->mptbase_cmds.status)
5074
5075 /* insure garbage is not sent to fw */
5076 switch(persist_opcode) {
5077
5078 case MPI_SAS_OP_CLEAR_NOT_PRESENT:
5079 case MPI_SAS_OP_CLEAR_ALL_PERSISTENT:
5080 break;
5081
5082 default:
5083 ret = -1;
5084 goto out;
5085 }
5086
5087 printk(KERN_DEBUG "%s: persist_opcode=%x\n",
5088 __func__, persist_opcode);
5089
5090 /* Get a MF for this command.
5091 */
5092 if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
5093 printk(KERN_DEBUG "%s: no msg frames!\n", __func__);
5094 ret = -1;
5095 goto out;
5096 }
5097
5098 mpi_hdr = (MPIHeader_t *) mf;
5099 sasIoUnitCntrReq = (SasIoUnitControlRequest_t *)mf;
5100 memset(sasIoUnitCntrReq,0,sizeof(SasIoUnitControlRequest_t));
5101 sasIoUnitCntrReq->Function = MPI_FUNCTION_SAS_IO_UNIT_CONTROL;
5102 sasIoUnitCntrReq->MsgContext = mpi_hdr->MsgContext;
5103 sasIoUnitCntrReq->Operation = persist_opcode;
5104
5105 mpt_put_msg_frame(mpt_base_index, ioc, mf);
5106 timeleft = wait_for_completion_timeout(&ioc->mptbase_cmds.done, 10*HZ);
5107 if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_COMMAND_GOOD)) {
5108 ret = -ETIME;
5109 printk(KERN_DEBUG "%s: failed\n", __func__);
5110 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_DID_IOCRESET)
5111 goto out;
5112 if (!timeleft) {
5113 printk(MYIOC_s_WARN_FMT
5114 "Issuing Reset from %s!!, doorbell=0x%08x\n",
5115 ioc->name, __func__, mpt_GetIocState(ioc, 0));
5116 mpt_Soft_Hard_ResetHandler(ioc, CAN_SLEEP);
5117 mpt_free_msg_frame(ioc, mf);
5118 }
5119 goto out;
5120 }
5121
5122 if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_RF_VALID)) {
5123 ret = -1;
5124 goto out;
5125 }
5126
5127 sasIoUnitCntrReply =
5128 (SasIoUnitControlReply_t *)ioc->mptbase_cmds.reply;
5129 if (le16_to_cpu(sasIoUnitCntrReply->IOCStatus) != MPI_IOCSTATUS_SUCCESS) {
5130 printk(KERN_DEBUG "%s: IOCStatus=0x%X IOCLogInfo=0x%X\n",
5131 __func__, sasIoUnitCntrReply->IOCStatus,
5132 sasIoUnitCntrReply->IOCLogInfo);
5133 printk(KERN_DEBUG "%s: failed\n", __func__);
5134 ret = -1;
5135 } else
5136 printk(KERN_DEBUG "%s: success\n", __func__);
5137 out:
5138
5139 CLEAR_MGMT_STATUS(ioc->mptbase_cmds.status)
5140 mutex_unlock(&ioc->mptbase_cmds.mutex);
5141 return ret;
5142 }
5143
5144 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5145
5146 static void
5147 mptbase_raid_process_event_data(MPT_ADAPTER *ioc,
5148 MpiEventDataRaid_t * pRaidEventData)
5149 {
5150 int volume;
5151 int reason;
5152 int disk;
5153 int status;
5154 int flags;
5155 int state;
5156
5157 volume = pRaidEventData->VolumeID;
5158 reason = pRaidEventData->ReasonCode;
5159 disk = pRaidEventData->PhysDiskNum;
5160 status = le32_to_cpu(pRaidEventData->SettingsStatus);
5161 flags = (status >> 0) & 0xff;
5162 state = (status >> 8) & 0xff;
5163
5164 if (reason == MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED) {
5165 return;
5166 }
5167
5168 if ((reason >= MPI_EVENT_RAID_RC_PHYSDISK_CREATED &&
5169 reason <= MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED) ||
5170 (reason == MPI_EVENT_RAID_RC_SMART_DATA)) {
5171 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for PhysDisk %d id=%d\n",
5172 ioc->name, disk, volume);
5173 } else {
5174 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for VolumeID %d\n",
5175 ioc->name, volume);
5176 }
5177
5178 switch(reason) {
5179 case MPI_EVENT_RAID_RC_VOLUME_CREATED:
5180 printk(MYIOC_s_INFO_FMT " volume has been created\n",
5181 ioc->name);
5182 break;
5183
5184 case MPI_EVENT_RAID_RC_VOLUME_DELETED:
5185
5186 printk(MYIOC_s_INFO_FMT " volume has been deleted\n",
5187 ioc->name);
5188 break;
5189
5190 case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED:
5191 printk(MYIOC_s_INFO_FMT " volume settings have been changed\n",
5192 ioc->name);
5193 break;
5194
5195 case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED:
5196 printk(MYIOC_s_INFO_FMT " volume is now %s%s%s%s\n",
5197 ioc->name,
5198 state == MPI_RAIDVOL0_STATUS_STATE_OPTIMAL
5199 ? "optimal"
5200 : state == MPI_RAIDVOL0_STATUS_STATE_DEGRADED
5201 ? "degraded"
5202 : state == MPI_RAIDVOL0_STATUS_STATE_FAILED
5203 ? "failed"
5204 : "state unknown",
5205 flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED
5206 ? ", enabled" : "",
5207 flags & MPI_RAIDVOL0_STATUS_FLAG_QUIESCED
5208 ? ", quiesced" : "",
5209 flags & MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
5210 ? ", resync in progress" : "" );
5211 break;
5212
5213 case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED:
5214 printk(MYIOC_s_INFO_FMT " volume membership of PhysDisk %d has changed\n",
5215 ioc->name, disk);
5216 break;
5217
5218 case MPI_EVENT_RAID_RC_PHYSDISK_CREATED:
5219 printk(MYIOC_s_INFO_FMT " PhysDisk has been created\n",
5220 ioc->name);
5221 break;
5222
5223 case MPI_EVENT_RAID_RC_PHYSDISK_DELETED:
5224 printk(MYIOC_s_INFO_FMT " PhysDisk has been deleted\n",
5225 ioc->name);
5226 break;
5227
5228 case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED:
5229 printk(MYIOC_s_INFO_FMT " PhysDisk settings have been changed\n",
5230 ioc->name);
5231 break;
5232
5233 case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED:
5234 printk(MYIOC_s_INFO_FMT " PhysDisk is now %s%s%s\n",
5235 ioc->name,
5236 state == MPI_PHYSDISK0_STATUS_ONLINE
5237 ? "online"
5238 : state == MPI_PHYSDISK0_STATUS_MISSING
5239 ? "missing"
5240 : state == MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE
5241 ? "not compatible"
5242 : state == MPI_PHYSDISK0_STATUS_FAILED
5243 ? "failed"
5244 : state == MPI_PHYSDISK0_STATUS_INITIALIZING
5245 ? "initializing"
5246 : state == MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED
5247 ? "offline requested"
5248 : state == MPI_PHYSDISK0_STATUS_FAILED_REQUESTED
5249 ? "failed requested"
5250 : state == MPI_PHYSDISK0_STATUS_OTHER_OFFLINE
5251 ? "offline"
5252 : "state unknown",
5253 flags & MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
5254 ? ", out of sync" : "",
5255 flags & MPI_PHYSDISK0_STATUS_FLAG_QUIESCED
5256 ? ", quiesced" : "" );
5257 break;
5258
5259 case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED:
5260 printk(MYIOC_s_INFO_FMT " Domain Validation needed for PhysDisk %d\n",
5261 ioc->name, disk);
5262 break;
5263
5264 case MPI_EVENT_RAID_RC_SMART_DATA:
5265 printk(MYIOC_s_INFO_FMT " SMART data received, ASC/ASCQ = %02xh/%02xh\n",
5266 ioc->name, pRaidEventData->ASC, pRaidEventData->ASCQ);
5267 break;
5268
5269 case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED:
5270 printk(MYIOC_s_INFO_FMT " replacement of PhysDisk %d has started\n",
5271 ioc->name, disk);
5272 break;
5273 }
5274 }
5275
5276 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5277 /**
5278 * GetIoUnitPage2 - Retrieve BIOS version and boot order information.
5279 * @ioc: Pointer to MPT_ADAPTER structure
5280 *
5281 * Returns: 0 for success
5282 * -ENOMEM if no memory available
5283 * -EPERM if not allowed due to ISR context
5284 * -EAGAIN if no msg frames currently available
5285 * -EFAULT for non-successful reply or no reply (timeout)
5286 */
5287 static int
5288 GetIoUnitPage2(MPT_ADAPTER *ioc)
5289 {
5290 ConfigPageHeader_t hdr;
5291 CONFIGPARMS cfg;
5292 IOUnitPage2_t *ppage_alloc;
5293 dma_addr_t page_dma;
5294 int data_sz;
5295 int rc;
5296
5297 /* Get the page header */
5298 hdr.PageVersion = 0;
5299 hdr.PageLength = 0;
5300 hdr.PageNumber = 2;
5301 hdr.PageType = MPI_CONFIG_PAGETYPE_IO_UNIT;
5302 cfg.cfghdr.hdr = &hdr;
5303 cfg.physAddr = -1;
5304 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5305 cfg.dir = 0;
5306 cfg.pageAddr = 0;
5307 cfg.timeout = 0;
5308
5309 if ((rc = mpt_config(ioc, &cfg)) != 0)
5310 return rc;
5311
5312 if (hdr.PageLength == 0)
5313 return 0;
5314
5315 /* Read the config page */
5316 data_sz = hdr.PageLength * 4;
5317 rc = -ENOMEM;
5318 ppage_alloc = (IOUnitPage2_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page_dma);
5319 if (ppage_alloc) {
5320 memset((u8 *)ppage_alloc, 0, data_sz);
5321 cfg.physAddr = page_dma;
5322 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5323
5324 /* If Good, save data */
5325 if ((rc = mpt_config(ioc, &cfg)) == 0)
5326 ioc->biosVersion = le32_to_cpu(ppage_alloc->BiosVersion);
5327
5328 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage_alloc, page_dma);
5329 }
5330
5331 return rc;
5332 }
5333
5334 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5335 /**
5336 * mpt_GetScsiPortSettings - read SCSI Port Page 0 and 2
5337 * @ioc: Pointer to a Adapter Strucutre
5338 * @portnum: IOC port number
5339 *
5340 * Return: -EFAULT if read of config page header fails
5341 * or if no nvram
5342 * If read of SCSI Port Page 0 fails,
5343 * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
5344 * Adapter settings: async, narrow
5345 * Return 1
5346 * If read of SCSI Port Page 2 fails,
5347 * Adapter settings valid
5348 * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
5349 * Return 1
5350 * Else
5351 * Both valid
5352 * Return 0
5353 * CHECK - what type of locking mechanisms should be used????
5354 */
5355 static int
5356 mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
5357 {
5358 u8 *pbuf;
5359 dma_addr_t buf_dma;
5360 CONFIGPARMS cfg;
5361 ConfigPageHeader_t header;
5362 int ii;
5363 int data, rc = 0;
5364
5365 /* Allocate memory
5366 */
5367 if (!ioc->spi_data.nvram) {
5368 int sz;
5369 u8 *mem;
5370 sz = MPT_MAX_SCSI_DEVICES * sizeof(int);
5371 mem = kmalloc(sz, GFP_ATOMIC);
5372 if (mem == NULL)
5373 return -EFAULT;
5374
5375 ioc->spi_data.nvram = (int *) mem;
5376
5377 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SCSI device NVRAM settings @ %p, sz=%d\n",
5378 ioc->name, ioc->spi_data.nvram, sz));
5379 }
5380
5381 /* Invalidate NVRAM information
5382 */
5383 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5384 ioc->spi_data.nvram[ii] = MPT_HOST_NVRAM_INVALID;
5385 }
5386
5387 /* Read SPP0 header, allocate memory, then read page.
5388 */
5389 header.PageVersion = 0;
5390 header.PageLength = 0;
5391 header.PageNumber = 0;
5392 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
5393 cfg.cfghdr.hdr = &header;
5394 cfg.physAddr = -1;
5395 cfg.pageAddr = portnum;
5396 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5397 cfg.dir = 0;
5398 cfg.timeout = 0; /* use default */
5399 if (mpt_config(ioc, &cfg) != 0)
5400 return -EFAULT;
5401
5402 if (header.PageLength > 0) {
5403 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
5404 if (pbuf) {
5405 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5406 cfg.physAddr = buf_dma;
5407 if (mpt_config(ioc, &cfg) != 0) {
5408 ioc->spi_data.maxBusWidth = MPT_NARROW;
5409 ioc->spi_data.maxSyncOffset = 0;
5410 ioc->spi_data.minSyncFactor = MPT_ASYNC;
5411 ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN;
5412 rc = 1;
5413 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5414 "Unable to read PortPage0 minSyncFactor=%x\n",
5415 ioc->name, ioc->spi_data.minSyncFactor));
5416 } else {
5417 /* Save the Port Page 0 data
5418 */
5419 SCSIPortPage0_t *pPP0 = (SCSIPortPage0_t *) pbuf;
5420 pPP0->Capabilities = le32_to_cpu(pPP0->Capabilities);
5421 pPP0->PhysicalInterface = le32_to_cpu(pPP0->PhysicalInterface);
5422
5423 if ( (pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_QAS) == 0 ) {
5424 ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS;
5425 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5426 "noQas due to Capabilities=%x\n",
5427 ioc->name, pPP0->Capabilities));
5428 }
5429 ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0;
5430 data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK;
5431 if (data) {
5432 ioc->spi_data.maxSyncOffset = (u8) (data >> 16);
5433 data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK;
5434 ioc->spi_data.minSyncFactor = (u8) (data >> 8);
5435 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5436 "PortPage0 minSyncFactor=%x\n",
5437 ioc->name, ioc->spi_data.minSyncFactor));
5438 } else {
5439 ioc->spi_data.maxSyncOffset = 0;
5440 ioc->spi_data.minSyncFactor = MPT_ASYNC;
5441 }
5442
5443 ioc->spi_data.busType = pPP0->PhysicalInterface & MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK;
5444
5445 /* Update the minSyncFactor based on bus type.
5446 */
5447 if ((ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD) ||
5448 (ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE)) {
5449
5450 if (ioc->spi_data.minSyncFactor < MPT_ULTRA) {
5451 ioc->spi_data.minSyncFactor = MPT_ULTRA;
5452 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5453 "HVD or SE detected, minSyncFactor=%x\n",
5454 ioc->name, ioc->spi_data.minSyncFactor));
5455 }
5456 }
5457 }
5458 if (pbuf) {
5459 pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
5460 }
5461 }
5462 }
5463
5464 /* SCSI Port Page 2 - Read the header then the page.
5465 */
5466 header.PageVersion = 0;
5467 header.PageLength = 0;
5468 header.PageNumber = 2;
5469 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
5470 cfg.cfghdr.hdr = &header;
5471 cfg.physAddr = -1;
5472 cfg.pageAddr = portnum;
5473 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5474 cfg.dir = 0;
5475 if (mpt_config(ioc, &cfg) != 0)
5476 return -EFAULT;
5477
5478 if (header.PageLength > 0) {
5479 /* Allocate memory and read SCSI Port Page 2
5480 */
5481 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
5482 if (pbuf) {
5483 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_NVRAM;
5484 cfg.physAddr = buf_dma;
5485 if (mpt_config(ioc, &cfg) != 0) {
5486 /* Nvram data is left with INVALID mark
5487 */
5488 rc = 1;
5489 } else if (ioc->pcidev->vendor == PCI_VENDOR_ID_ATTO) {
5490
5491 /* This is an ATTO adapter, read Page2 accordingly
5492 */
5493 ATTO_SCSIPortPage2_t *pPP2 = (ATTO_SCSIPortPage2_t *) pbuf;
5494 ATTODeviceInfo_t *pdevice = NULL;
5495 u16 ATTOFlags;
5496
5497 /* Save the Port Page 2 data
5498 * (reformat into a 32bit quantity)
5499 */
5500 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5501 pdevice = &pPP2->DeviceSettings[ii];
5502 ATTOFlags = le16_to_cpu(pdevice->ATTOFlags);
5503 data = 0;
5504
5505 /* Translate ATTO device flags to LSI format
5506 */
5507 if (ATTOFlags & ATTOFLAG_DISC)
5508 data |= (MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE);
5509 if (ATTOFlags & ATTOFLAG_ID_ENB)
5510 data |= (MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE);
5511 if (ATTOFlags & ATTOFLAG_LUN_ENB)
5512 data |= (MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE);
5513 if (ATTOFlags & ATTOFLAG_TAGGED)
5514 data |= (MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE);
5515 if (!(ATTOFlags & ATTOFLAG_WIDE_ENB))
5516 data |= (MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE);
5517
5518 data = (data << 16) | (pdevice->Period << 8) | 10;
5519 ioc->spi_data.nvram[ii] = data;
5520 }
5521 } else {
5522 SCSIPortPage2_t *pPP2 = (SCSIPortPage2_t *) pbuf;
5523 MpiDeviceInfo_t *pdevice = NULL;
5524
5525 /*
5526 * Save "Set to Avoid SCSI Bus Resets" flag
5527 */
5528 ioc->spi_data.bus_reset =
5529 (le32_to_cpu(pPP2->PortFlags) &
5530 MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET) ?
5531 0 : 1 ;
5532
5533 /* Save the Port Page 2 data
5534 * (reformat into a 32bit quantity)
5535 */
5536 data = le32_to_cpu(pPP2->PortFlags) & MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK;
5537 ioc->spi_data.PortFlags = data;
5538 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5539 pdevice = &pPP2->DeviceSettings[ii];
5540 data = (le16_to_cpu(pdevice->DeviceFlags) << 16) |
5541 (pdevice->SyncFactor << 8) | pdevice->Timeout;
5542 ioc->spi_data.nvram[ii] = data;
5543 }
5544 }
5545
5546 pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
5547 }
5548 }
5549
5550 /* Update Adapter limits with those from NVRAM
5551 * Comment: Don't need to do this. Target performance
5552 * parameters will never exceed the adapters limits.
5553 */
5554
5555 return rc;
5556 }
5557
5558 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5559 /**
5560 * mpt_readScsiDevicePageHeaders - save version and length of SDP1
5561 * @ioc: Pointer to a Adapter Strucutre
5562 * @portnum: IOC port number
5563 *
5564 * Return: -EFAULT if read of config page header fails
5565 * or 0 if success.
5566 */
5567 static int
5568 mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum)
5569 {
5570 CONFIGPARMS cfg;
5571 ConfigPageHeader_t header;
5572
5573 /* Read the SCSI Device Page 1 header
5574 */
5575 header.PageVersion = 0;
5576 header.PageLength = 0;
5577 header.PageNumber = 1;
5578 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
5579 cfg.cfghdr.hdr = &header;
5580 cfg.physAddr = -1;
5581 cfg.pageAddr = portnum;
5582 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5583 cfg.dir = 0;
5584 cfg.timeout = 0;
5585 if (mpt_config(ioc, &cfg) != 0)
5586 return -EFAULT;
5587
5588 ioc->spi_data.sdp1version = cfg.cfghdr.hdr->PageVersion;
5589 ioc->spi_data.sdp1length = cfg.cfghdr.hdr->PageLength;
5590
5591 header.PageVersion = 0;
5592 header.PageLength = 0;
5593 header.PageNumber = 0;
5594 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
5595 if (mpt_config(ioc, &cfg) != 0)
5596 return -EFAULT;
5597
5598 ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion;
5599 ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength;
5600
5601 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 0: version %d length %d\n",
5602 ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length));
5603
5604 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 1: version %d length %d\n",
5605 ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length));
5606 return 0;
5607 }
5608
5609 /**
5610 * mpt_inactive_raid_list_free - This clears this link list.
5611 * @ioc : pointer to per adapter structure
5612 **/
5613 static void
5614 mpt_inactive_raid_list_free(MPT_ADAPTER *ioc)
5615 {
5616 struct inactive_raid_component_info *component_info, *pNext;
5617
5618 if (list_empty(&ioc->raid_data.inactive_list))
5619 return;
5620
5621 mutex_lock(&ioc->raid_data.inactive_list_mutex);
5622 list_for_each_entry_safe(component_info, pNext,
5623 &ioc->raid_data.inactive_list, list) {
5624 list_del(&component_info->list);
5625 kfree(component_info);
5626 }
5627 mutex_unlock(&ioc->raid_data.inactive_list_mutex);
5628 }
5629
5630 /**
5631 * mpt_inactive_raid_volumes - sets up link list of phy_disk_nums for devices belonging in an inactive volume
5632 *
5633 * @ioc : pointer to per adapter structure
5634 * @channel : volume channel
5635 * @id : volume target id
5636 **/
5637 static void
5638 mpt_inactive_raid_volumes(MPT_ADAPTER *ioc, u8 channel, u8 id)
5639 {
5640 CONFIGPARMS cfg;
5641 ConfigPageHeader_t hdr;
5642 dma_addr_t dma_handle;
5643 pRaidVolumePage0_t buffer = NULL;
5644 int i;
5645 RaidPhysDiskPage0_t phys_disk;
5646 struct inactive_raid_component_info *component_info;
5647 int handle_inactive_volumes;
5648
5649 memset(&cfg, 0 , sizeof(CONFIGPARMS));
5650 memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5651 hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_VOLUME;
5652 cfg.pageAddr = (channel << 8) + id;
5653 cfg.cfghdr.hdr = &hdr;
5654 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5655
5656 if (mpt_config(ioc, &cfg) != 0)
5657 goto out;
5658
5659 if (!hdr.PageLength)
5660 goto out;
5661
5662 buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5663 &dma_handle);
5664
5665 if (!buffer)
5666 goto out;
5667
5668 cfg.physAddr = dma_handle;
5669 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5670
5671 if (mpt_config(ioc, &cfg) != 0)
5672 goto out;
5673
5674 if (!buffer->NumPhysDisks)
5675 goto out;
5676
5677 handle_inactive_volumes =
5678 (buffer->VolumeStatus.Flags & MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE ||
5679 (buffer->VolumeStatus.Flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED) == 0 ||
5680 buffer->VolumeStatus.State == MPI_RAIDVOL0_STATUS_STATE_FAILED ||
5681 buffer->VolumeStatus.State == MPI_RAIDVOL0_STATUS_STATE_MISSING) ? 1 : 0;
5682
5683 if (!handle_inactive_volumes)
5684 goto out;
5685
5686 mutex_lock(&ioc->raid_data.inactive_list_mutex);
5687 for (i = 0; i < buffer->NumPhysDisks; i++) {
5688 if(mpt_raid_phys_disk_pg0(ioc,
5689 buffer->PhysDisk[i].PhysDiskNum, &phys_disk) != 0)
5690 continue;
5691
5692 if ((component_info = kmalloc(sizeof (*component_info),
5693 GFP_KERNEL)) == NULL)
5694 continue;
5695
5696 component_info->volumeID = id;
5697 component_info->volumeBus = channel;
5698 component_info->d.PhysDiskNum = phys_disk.PhysDiskNum;
5699 component_info->d.PhysDiskBus = phys_disk.PhysDiskBus;
5700 component_info->d.PhysDiskID = phys_disk.PhysDiskID;
5701 component_info->d.PhysDiskIOC = phys_disk.PhysDiskIOC;
5702
5703 list_add_tail(&component_info->list,
5704 &ioc->raid_data.inactive_list);
5705 }
5706 mutex_unlock(&ioc->raid_data.inactive_list_mutex);
5707
5708 out:
5709 if (buffer)
5710 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5711 dma_handle);
5712 }
5713
5714 /**
5715 * mpt_raid_phys_disk_pg0 - returns phys disk page zero
5716 * @ioc: Pointer to a Adapter Structure
5717 * @phys_disk_num: io unit unique phys disk num generated by the ioc
5718 * @phys_disk: requested payload data returned
5719 *
5720 * Return:
5721 * 0 on success
5722 * -EFAULT if read of config page header fails or data pointer not NULL
5723 * -ENOMEM if pci_alloc failed
5724 **/
5725 int
5726 mpt_raid_phys_disk_pg0(MPT_ADAPTER *ioc, u8 phys_disk_num,
5727 RaidPhysDiskPage0_t *phys_disk)
5728 {
5729 CONFIGPARMS cfg;
5730 ConfigPageHeader_t hdr;
5731 dma_addr_t dma_handle;
5732 pRaidPhysDiskPage0_t buffer = NULL;
5733 int rc;
5734
5735 memset(&cfg, 0 , sizeof(CONFIGPARMS));
5736 memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5737 memset(phys_disk, 0, sizeof(RaidPhysDiskPage0_t));
5738
5739 hdr.PageVersion = MPI_RAIDPHYSDISKPAGE0_PAGEVERSION;
5740 hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_PHYSDISK;
5741 cfg.cfghdr.hdr = &hdr;
5742 cfg.physAddr = -1;
5743 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5744
5745 if (mpt_config(ioc, &cfg) != 0) {
5746 rc = -EFAULT;
5747 goto out;
5748 }
5749
5750 if (!hdr.PageLength) {
5751 rc = -EFAULT;
5752 goto out;
5753 }
5754
5755 buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5756 &dma_handle);
5757
5758 if (!buffer) {
5759 rc = -ENOMEM;
5760 goto out;
5761 }
5762
5763 cfg.physAddr = dma_handle;
5764 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5765 cfg.pageAddr = phys_disk_num;
5766
5767 if (mpt_config(ioc, &cfg) != 0) {
5768 rc = -EFAULT;
5769 goto out;
5770 }
5771
5772 rc = 0;
5773 memcpy(phys_disk, buffer, sizeof(*buffer));
5774 phys_disk->MaxLBA = le32_to_cpu(buffer->MaxLBA);
5775
5776 out:
5777
5778 if (buffer)
5779 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5780 dma_handle);
5781
5782 return rc;
5783 }
5784
5785 /**
5786 * mpt_raid_phys_disk_get_num_paths - returns number paths associated to this phys_num
5787 * @ioc: Pointer to a Adapter Structure
5788 * @phys_disk_num: io unit unique phys disk num generated by the ioc
5789 *
5790 * Return:
5791 * returns number paths
5792 **/
5793 int
5794 mpt_raid_phys_disk_get_num_paths(MPT_ADAPTER *ioc, u8 phys_disk_num)
5795 {
5796 CONFIGPARMS cfg;
5797 ConfigPageHeader_t hdr;
5798 dma_addr_t dma_handle;
5799 pRaidPhysDiskPage1_t buffer = NULL;
5800 int rc;
5801
5802 memset(&cfg, 0 , sizeof(CONFIGPARMS));
5803 memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5804
5805 hdr.PageVersion = MPI_RAIDPHYSDISKPAGE1_PAGEVERSION;
5806 hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_PHYSDISK;
5807 hdr.PageNumber = 1;
5808 cfg.cfghdr.hdr = &hdr;
5809 cfg.physAddr = -1;
5810 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5811
5812 if (mpt_config(ioc, &cfg) != 0) {
5813 rc = 0;
5814 goto out;
5815 }
5816
5817 if (!hdr.PageLength) {
5818 rc = 0;
5819 goto out;
5820 }
5821
5822 buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5823 &dma_handle);
5824
5825 if (!buffer) {
5826 rc = 0;
5827 goto out;
5828 }
5829
5830 cfg.physAddr = dma_handle;
5831 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5832 cfg.pageAddr = phys_disk_num;
5833
5834 if (mpt_config(ioc, &cfg) != 0) {
5835 rc = 0;
5836 goto out;
5837 }
5838
5839 rc = buffer->NumPhysDiskPaths;
5840 out:
5841
5842 if (buffer)
5843 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5844 dma_handle);
5845
5846 return rc;
5847 }
5848 EXPORT_SYMBOL(mpt_raid_phys_disk_get_num_paths);
5849
5850 /**
5851 * mpt_raid_phys_disk_pg1 - returns phys disk page 1
5852 * @ioc: Pointer to a Adapter Structure
5853 * @phys_disk_num: io unit unique phys disk num generated by the ioc
5854 * @phys_disk: requested payload data returned
5855 *
5856 * Return:
5857 * 0 on success
5858 * -EFAULT if read of config page header fails or data pointer not NULL
5859 * -ENOMEM if pci_alloc failed
5860 **/
5861 int
5862 mpt_raid_phys_disk_pg1(MPT_ADAPTER *ioc, u8 phys_disk_num,
5863 RaidPhysDiskPage1_t *phys_disk)
5864 {
5865 CONFIGPARMS cfg;
5866 ConfigPageHeader_t hdr;
5867 dma_addr_t dma_handle;
5868 pRaidPhysDiskPage1_t buffer = NULL;
5869 int rc;
5870 int i;
5871 __le64 sas_address;
5872
5873 memset(&cfg, 0 , sizeof(CONFIGPARMS));
5874 memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5875 rc = 0;
5876
5877 hdr.PageVersion = MPI_RAIDPHYSDISKPAGE1_PAGEVERSION;
5878 hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_PHYSDISK;
5879 hdr.PageNumber = 1;
5880 cfg.cfghdr.hdr = &hdr;
5881 cfg.physAddr = -1;
5882 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5883
5884 if (mpt_config(ioc, &cfg) != 0) {
5885 rc = -EFAULT;
5886 goto out;
5887 }
5888
5889 if (!hdr.PageLength) {
5890 rc = -EFAULT;
5891 goto out;
5892 }
5893
5894 buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5895 &dma_handle);
5896
5897 if (!buffer) {
5898 rc = -ENOMEM;
5899 goto out;
5900 }
5901
5902 cfg.physAddr = dma_handle;
5903 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5904 cfg.pageAddr = phys_disk_num;
5905
5906 if (mpt_config(ioc, &cfg) != 0) {
5907 rc = -EFAULT;
5908 goto out;
5909 }
5910
5911 phys_disk->NumPhysDiskPaths = buffer->NumPhysDiskPaths;
5912 phys_disk->PhysDiskNum = phys_disk_num;
5913 for (i = 0; i < phys_disk->NumPhysDiskPaths; i++) {
5914 phys_disk->Path[i].PhysDiskID = buffer->Path[i].PhysDiskID;
5915 phys_disk->Path[i].PhysDiskBus = buffer->Path[i].PhysDiskBus;
5916 phys_disk->Path[i].OwnerIdentifier =
5917 buffer->Path[i].OwnerIdentifier;
5918 phys_disk->Path[i].Flags = le16_to_cpu(buffer->Path[i].Flags);
5919 memcpy(&sas_address, &buffer->Path[i].WWID, sizeof(__le64));
5920 sas_address = le64_to_cpu(sas_address);
5921 memcpy(&phys_disk->Path[i].WWID, &sas_address, sizeof(__le64));
5922 memcpy(&sas_address,
5923 &buffer->Path[i].OwnerWWID, sizeof(__le64));
5924 sas_address = le64_to_cpu(sas_address);
5925 memcpy(&phys_disk->Path[i].OwnerWWID,
5926 &sas_address, sizeof(__le64));
5927 }
5928
5929 out:
5930
5931 if (buffer)
5932 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5933 dma_handle);
5934
5935 return rc;
5936 }
5937 EXPORT_SYMBOL(mpt_raid_phys_disk_pg1);
5938
5939
5940 /**
5941 * mpt_findImVolumes - Identify IDs of hidden disks and RAID Volumes
5942 * @ioc: Pointer to a Adapter Strucutre
5943 *
5944 * Return:
5945 * 0 on success
5946 * -EFAULT if read of config page header fails or data pointer not NULL
5947 * -ENOMEM if pci_alloc failed
5948 **/
5949 int
5950 mpt_findImVolumes(MPT_ADAPTER *ioc)
5951 {
5952 IOCPage2_t *pIoc2;
5953 u8 *mem;
5954 dma_addr_t ioc2_dma;
5955 CONFIGPARMS cfg;
5956 ConfigPageHeader_t header;
5957 int rc = 0;
5958 int iocpage2sz;
5959 int i;
5960
5961 if (!ioc->ir_firmware)
5962 return 0;
5963
5964 /* Free the old page
5965 */
5966 kfree(ioc->raid_data.pIocPg2);
5967 ioc->raid_data.pIocPg2 = NULL;
5968 mpt_inactive_raid_list_free(ioc);
5969
5970 /* Read IOCP2 header then the page.
5971 */
5972 header.PageVersion = 0;
5973 header.PageLength = 0;
5974 header.PageNumber = 2;
5975 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
5976 cfg.cfghdr.hdr = &header;
5977 cfg.physAddr = -1;
5978 cfg.pageAddr = 0;
5979 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5980 cfg.dir = 0;
5981 cfg.timeout = 0;
5982 if (mpt_config(ioc, &cfg) != 0)
5983 return -EFAULT;
5984
5985 if (header.PageLength == 0)
5986 return -EFAULT;
5987
5988 iocpage2sz = header.PageLength * 4;
5989 pIoc2 = pci_alloc_consistent(ioc->pcidev, iocpage2sz, &ioc2_dma);
5990 if (!pIoc2)
5991 return -ENOMEM;
5992
5993 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5994 cfg.physAddr = ioc2_dma;
5995 if (mpt_config(ioc, &cfg) != 0)
5996 goto out;
5997
5998 mem = kmalloc(iocpage2sz, GFP_KERNEL);
5999 if (!mem) {
6000 rc = -ENOMEM;
6001 goto out;
6002 }
6003
6004 memcpy(mem, (u8 *)pIoc2, iocpage2sz);
6005 ioc->raid_data.pIocPg2 = (IOCPage2_t *) mem;
6006
6007 mpt_read_ioc_pg_3(ioc);
6008
6009 for (i = 0; i < pIoc2->NumActiveVolumes ; i++)
6010 mpt_inactive_raid_volumes(ioc,
6011 pIoc2->RaidVolume[i].VolumeBus,
6012 pIoc2->RaidVolume[i].VolumeID);
6013
6014 out:
6015 pci_free_consistent(ioc->pcidev, iocpage2sz, pIoc2, ioc2_dma);
6016
6017 return rc;
6018 }
6019
6020 static int
6021 mpt_read_ioc_pg_3(MPT_ADAPTER *ioc)
6022 {
6023 IOCPage3_t *pIoc3;
6024 u8 *mem;
6025 CONFIGPARMS cfg;
6026 ConfigPageHeader_t header;
6027 dma_addr_t ioc3_dma;
6028 int iocpage3sz = 0;
6029
6030 /* Free the old page
6031 */
6032 kfree(ioc->raid_data.pIocPg3);
6033 ioc->raid_data.pIocPg3 = NULL;
6034
6035 /* There is at least one physical disk.
6036 * Read and save IOC Page 3
6037 */
6038 header.PageVersion = 0;
6039 header.PageLength = 0;
6040 header.PageNumber = 3;
6041 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
6042 cfg.cfghdr.hdr = &header;
6043 cfg.physAddr = -1;
6044 cfg.pageAddr = 0;
6045 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6046 cfg.dir = 0;
6047 cfg.timeout = 0;
6048 if (mpt_config(ioc, &cfg) != 0)
6049 return 0;
6050
6051 if (header.PageLength == 0)
6052 return 0;
6053
6054 /* Read Header good, alloc memory
6055 */
6056 iocpage3sz = header.PageLength * 4;
6057 pIoc3 = pci_alloc_consistent(ioc->pcidev, iocpage3sz, &ioc3_dma);
6058 if (!pIoc3)
6059 return 0;
6060
6061 /* Read the Page and save the data
6062 * into malloc'd memory.
6063 */
6064 cfg.physAddr = ioc3_dma;
6065 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6066 if (mpt_config(ioc, &cfg) == 0) {
6067 mem = kmalloc(iocpage3sz, GFP_KERNEL);
6068 if (mem) {
6069 memcpy(mem, (u8 *)pIoc3, iocpage3sz);
6070 ioc->raid_data.pIocPg3 = (IOCPage3_t *) mem;
6071 }
6072 }
6073
6074 pci_free_consistent(ioc->pcidev, iocpage3sz, pIoc3, ioc3_dma);
6075
6076 return 0;
6077 }
6078
6079 static void
6080 mpt_read_ioc_pg_4(MPT_ADAPTER *ioc)
6081 {
6082 IOCPage4_t *pIoc4;
6083 CONFIGPARMS cfg;
6084 ConfigPageHeader_t header;
6085 dma_addr_t ioc4_dma;
6086 int iocpage4sz;
6087
6088 /* Read and save IOC Page 4
6089 */
6090 header.PageVersion = 0;
6091 header.PageLength = 0;
6092 header.PageNumber = 4;
6093 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
6094 cfg.cfghdr.hdr = &header;
6095 cfg.physAddr = -1;
6096 cfg.pageAddr = 0;
6097 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6098 cfg.dir = 0;
6099 cfg.timeout = 0;
6100 if (mpt_config(ioc, &cfg) != 0)
6101 return;
6102
6103 if (header.PageLength == 0)
6104 return;
6105
6106 if ( (pIoc4 = ioc->spi_data.pIocPg4) == NULL ) {
6107 iocpage4sz = (header.PageLength + 4) * 4; /* Allow 4 additional SEP's */
6108 pIoc4 = pci_alloc_consistent(ioc->pcidev, iocpage4sz, &ioc4_dma);
6109 if (!pIoc4)
6110 return;
6111 ioc->alloc_total += iocpage4sz;
6112 } else {
6113 ioc4_dma = ioc->spi_data.IocPg4_dma;
6114 iocpage4sz = ioc->spi_data.IocPg4Sz;
6115 }
6116
6117 /* Read the Page into dma memory.
6118 */
6119 cfg.physAddr = ioc4_dma;
6120 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6121 if (mpt_config(ioc, &cfg) == 0) {
6122 ioc->spi_data.pIocPg4 = (IOCPage4_t *) pIoc4;
6123 ioc->spi_data.IocPg4_dma = ioc4_dma;
6124 ioc->spi_data.IocPg4Sz = iocpage4sz;
6125 } else {
6126 pci_free_consistent(ioc->pcidev, iocpage4sz, pIoc4, ioc4_dma);
6127 ioc->spi_data.pIocPg4 = NULL;
6128 ioc->alloc_total -= iocpage4sz;
6129 }
6130 }
6131
6132 static void
6133 mpt_read_ioc_pg_1(MPT_ADAPTER *ioc)
6134 {
6135 IOCPage1_t *pIoc1;
6136 CONFIGPARMS cfg;
6137 ConfigPageHeader_t header;
6138 dma_addr_t ioc1_dma;
6139 int iocpage1sz = 0;
6140 u32 tmp;
6141
6142 /* Check the Coalescing Timeout in IOC Page 1
6143 */
6144 header.PageVersion = 0;
6145 header.PageLength = 0;
6146 header.PageNumber = 1;
6147 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
6148 cfg.cfghdr.hdr = &header;
6149 cfg.physAddr = -1;
6150 cfg.pageAddr = 0;
6151 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6152 cfg.dir = 0;
6153 cfg.timeout = 0;
6154 if (mpt_config(ioc, &cfg) != 0)
6155 return;
6156
6157 if (header.PageLength == 0)
6158 return;
6159
6160 /* Read Header good, alloc memory
6161 */
6162 iocpage1sz = header.PageLength * 4;
6163 pIoc1 = pci_alloc_consistent(ioc->pcidev, iocpage1sz, &ioc1_dma);
6164 if (!pIoc1)
6165 return;
6166
6167 /* Read the Page and check coalescing timeout
6168 */
6169 cfg.physAddr = ioc1_dma;
6170 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6171 if (mpt_config(ioc, &cfg) == 0) {
6172
6173 tmp = le32_to_cpu(pIoc1->Flags) & MPI_IOCPAGE1_REPLY_COALESCING;
6174 if (tmp == MPI_IOCPAGE1_REPLY_COALESCING) {
6175 tmp = le32_to_cpu(pIoc1->CoalescingTimeout);
6176
6177 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Coalescing Enabled Timeout = %d\n",
6178 ioc->name, tmp));
6179
6180 if (tmp > MPT_COALESCING_TIMEOUT) {
6181 pIoc1->CoalescingTimeout = cpu_to_le32(MPT_COALESCING_TIMEOUT);
6182
6183 /* Write NVRAM and current
6184 */
6185 cfg.dir = 1;
6186 cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT;
6187 if (mpt_config(ioc, &cfg) == 0) {
6188 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Reset Current Coalescing Timeout to = %d\n",
6189 ioc->name, MPT_COALESCING_TIMEOUT));
6190
6191 cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM;
6192 if (mpt_config(ioc, &cfg) == 0) {
6193 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6194 "Reset NVRAM Coalescing Timeout to = %d\n",
6195 ioc->name, MPT_COALESCING_TIMEOUT));
6196 } else {
6197 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6198 "Reset NVRAM Coalescing Timeout Failed\n",
6199 ioc->name));
6200 }
6201
6202 } else {
6203 dprintk(ioc, printk(MYIOC_s_WARN_FMT
6204 "Reset of Current Coalescing Timeout Failed!\n",
6205 ioc->name));
6206 }
6207 }
6208
6209 } else {
6210 dprintk(ioc, printk(MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name));
6211 }
6212 }
6213
6214 pci_free_consistent(ioc->pcidev, iocpage1sz, pIoc1, ioc1_dma);
6215
6216 return;
6217 }
6218
6219 static void
6220 mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc)
6221 {
6222 CONFIGPARMS cfg;
6223 ConfigPageHeader_t hdr;
6224 dma_addr_t buf_dma;
6225 ManufacturingPage0_t *pbuf = NULL;
6226
6227 memset(&cfg, 0 , sizeof(CONFIGPARMS));
6228 memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
6229
6230 hdr.PageType = MPI_CONFIG_PAGETYPE_MANUFACTURING;
6231 cfg.cfghdr.hdr = &hdr;
6232 cfg.physAddr = -1;
6233 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6234 cfg.timeout = 10;
6235
6236 if (mpt_config(ioc, &cfg) != 0)
6237 goto out;
6238
6239 if (!cfg.cfghdr.hdr->PageLength)
6240 goto out;
6241
6242 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6243 pbuf = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4, &buf_dma);
6244 if (!pbuf)
6245 goto out;
6246
6247 cfg.physAddr = buf_dma;
6248
6249 if (mpt_config(ioc, &cfg) != 0)
6250 goto out;
6251
6252 memcpy(ioc->board_name, pbuf->BoardName, sizeof(ioc->board_name));
6253 memcpy(ioc->board_assembly, pbuf->BoardAssembly, sizeof(ioc->board_assembly));
6254 memcpy(ioc->board_tracer, pbuf->BoardTracerNumber, sizeof(ioc->board_tracer));
6255
6256 out:
6257
6258 if (pbuf)
6259 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, pbuf, buf_dma);
6260 }
6261
6262 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6263 /**
6264 * SendEventNotification - Send EventNotification (on or off) request to adapter
6265 * @ioc: Pointer to MPT_ADAPTER structure
6266 * @EvSwitch: Event switch flags
6267 * @sleepFlag: Specifies whether the process can sleep
6268 */
6269 static int
6270 SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch, int sleepFlag)
6271 {
6272 EventNotification_t evn;
6273 MPIDefaultReply_t reply_buf;
6274
6275 memset(&evn, 0, sizeof(EventNotification_t));
6276 memset(&reply_buf, 0, sizeof(MPIDefaultReply_t));
6277
6278 evn.Function = MPI_FUNCTION_EVENT_NOTIFICATION;
6279 evn.Switch = EvSwitch;
6280 evn.MsgContext = cpu_to_le32(mpt_base_index << 16);
6281
6282 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6283 "Sending EventNotification (%d) request %p\n",
6284 ioc->name, EvSwitch, &evn));
6285
6286 return mpt_handshake_req_reply_wait(ioc, sizeof(EventNotification_t),
6287 (u32 *)&evn, sizeof(MPIDefaultReply_t), (u16 *)&reply_buf, 30,
6288 sleepFlag);
6289 }
6290
6291 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6292 /**
6293 * SendEventAck - Send EventAck request to MPT adapter.
6294 * @ioc: Pointer to MPT_ADAPTER structure
6295 * @evnp: Pointer to original EventNotification request
6296 */
6297 static int
6298 SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp)
6299 {
6300 EventAck_t *pAck;
6301
6302 if ((pAck = (EventAck_t *) mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
6303 dfailprintk(ioc, printk(MYIOC_s_WARN_FMT "%s, no msg frames!!\n",
6304 ioc->name, __func__));
6305 return -1;
6306 }
6307
6308 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending EventAck\n", ioc->name));
6309
6310 pAck->Function = MPI_FUNCTION_EVENT_ACK;
6311 pAck->ChainOffset = 0;
6312 pAck->Reserved[0] = pAck->Reserved[1] = 0;
6313 pAck->MsgFlags = 0;
6314 pAck->Reserved1[0] = pAck->Reserved1[1] = pAck->Reserved1[2] = 0;
6315 pAck->Event = evnp->Event;
6316 pAck->EventContext = evnp->EventContext;
6317
6318 mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)pAck);
6319
6320 return 0;
6321 }
6322
6323 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6324 /**
6325 * mpt_config - Generic function to issue config message
6326 * @ioc: Pointer to an adapter structure
6327 * @pCfg: Pointer to a configuration structure. Struct contains
6328 * action, page address, direction, physical address
6329 * and pointer to a configuration page header
6330 * Page header is updated.
6331 *
6332 * Returns 0 for success
6333 * -EPERM if not allowed due to ISR context
6334 * -EAGAIN if no msg frames currently available
6335 * -EFAULT for non-successful reply or no reply (timeout)
6336 */
6337 int
6338 mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)
6339 {
6340 Config_t *pReq;
6341 ConfigReply_t *pReply;
6342 ConfigExtendedPageHeader_t *pExtHdr = NULL;
6343 MPT_FRAME_HDR *mf;
6344 int ii;
6345 int flagsLength;
6346 long timeout;
6347 int ret;
6348 u8 page_type = 0, extend_page;
6349 unsigned long timeleft;
6350 unsigned long flags;
6351 int in_isr;
6352 u8 issue_hard_reset = 0;
6353 u8 retry_count = 0;
6354
6355 /* Prevent calling wait_event() (below), if caller happens
6356 * to be in ISR context, because that is fatal!
6357 */
6358 in_isr = in_interrupt();
6359 if (in_isr) {
6360 dcprintk(ioc, printk(MYIOC_s_WARN_FMT "Config request not allowed in ISR context!\n",
6361 ioc->name));
6362 return -EPERM;
6363 }
6364
6365 /* don't send a config page during diag reset */
6366 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6367 if (ioc->ioc_reset_in_progress) {
6368 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6369 "%s: busy with host reset\n", ioc->name, __func__));
6370 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6371 return -EBUSY;
6372 }
6373 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6374
6375 /* don't send if no chance of success */
6376 if (!ioc->active ||
6377 mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_OPERATIONAL) {
6378 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6379 "%s: ioc not operational, %d, %xh\n",
6380 ioc->name, __func__, ioc->active,
6381 mpt_GetIocState(ioc, 0)));
6382 return -EFAULT;
6383 }
6384
6385 retry_config:
6386 mutex_lock(&ioc->mptbase_cmds.mutex);
6387 /* init the internal cmd struct */
6388 memset(ioc->mptbase_cmds.reply, 0 , MPT_DEFAULT_FRAME_SIZE);
6389 INITIALIZE_MGMT_STATUS(ioc->mptbase_cmds.status)
6390
6391 /* Get and Populate a free Frame
6392 */
6393 if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
6394 dcprintk(ioc, printk(MYIOC_s_WARN_FMT
6395 "mpt_config: no msg frames!\n", ioc->name));
6396 ret = -EAGAIN;
6397 goto out;
6398 }
6399
6400 pReq = (Config_t *)mf;
6401 pReq->Action = pCfg->action;
6402 pReq->Reserved = 0;
6403 pReq->ChainOffset = 0;
6404 pReq->Function = MPI_FUNCTION_CONFIG;
6405
6406 /* Assume page type is not extended and clear "reserved" fields. */
6407 pReq->ExtPageLength = 0;
6408 pReq->ExtPageType = 0;
6409 pReq->MsgFlags = 0;
6410
6411 for (ii=0; ii < 8; ii++)
6412 pReq->Reserved2[ii] = 0;
6413
6414 pReq->Header.PageVersion = pCfg->cfghdr.hdr->PageVersion;
6415 pReq->Header.PageLength = pCfg->cfghdr.hdr->PageLength;
6416 pReq->Header.PageNumber = pCfg->cfghdr.hdr->PageNumber;
6417 pReq->Header.PageType = (pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK);
6418
6419 if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
6420 pExtHdr = (ConfigExtendedPageHeader_t *)pCfg->cfghdr.ehdr;
6421 pReq->ExtPageLength = cpu_to_le16(pExtHdr->ExtPageLength);
6422 pReq->ExtPageType = pExtHdr->ExtPageType;
6423 pReq->Header.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
6424
6425 /* Page Length must be treated as a reserved field for the
6426 * extended header.
6427 */
6428 pReq->Header.PageLength = 0;
6429 }
6430
6431 pReq->PageAddress = cpu_to_le32(pCfg->pageAddr);
6432
6433 /* Add a SGE to the config request.
6434 */
6435 if (pCfg->dir)
6436 flagsLength = MPT_SGE_FLAGS_SSIMPLE_WRITE;
6437 else
6438 flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ;
6439
6440 if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) ==
6441 MPI_CONFIG_PAGETYPE_EXTENDED) {
6442 flagsLength |= pExtHdr->ExtPageLength * 4;
6443 page_type = pReq->ExtPageType;
6444 extend_page = 1;
6445 } else {
6446 flagsLength |= pCfg->cfghdr.hdr->PageLength * 4;
6447 page_type = pReq->Header.PageType;
6448 extend_page = 0;
6449 }
6450
6451 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6452 "Sending Config request type 0x%x, page 0x%x and action %d\n",
6453 ioc->name, page_type, pReq->Header.PageNumber, pReq->Action));
6454
6455 ioc->add_sge((char *)&pReq->PageBufferSGE, flagsLength, pCfg->physAddr);
6456 timeout = (pCfg->timeout < 15) ? HZ*15 : HZ*pCfg->timeout;
6457 mpt_put_msg_frame(mpt_base_index, ioc, mf);
6458 timeleft = wait_for_completion_timeout(&ioc->mptbase_cmds.done,
6459 timeout);
6460 if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_COMMAND_GOOD)) {
6461 ret = -ETIME;
6462 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6463 "Failed Sending Config request type 0x%x, page 0x%x,"
6464 " action %d, status %xh, time left %ld\n\n",
6465 ioc->name, page_type, pReq->Header.PageNumber,
6466 pReq->Action, ioc->mptbase_cmds.status, timeleft));
6467 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_DID_IOCRESET)
6468 goto out;
6469 if (!timeleft) {
6470 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6471 if (ioc->ioc_reset_in_progress) {
6472 spin_unlock_irqrestore(&ioc->taskmgmt_lock,
6473 flags);
6474 printk(MYIOC_s_INFO_FMT "%s: host reset in"
6475 " progress mpt_config timed out.!!\n",
6476 __func__, ioc->name);
6477 mutex_unlock(&ioc->mptbase_cmds.mutex);
6478 return -EFAULT;
6479 }
6480 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6481 issue_hard_reset = 1;
6482 }
6483 goto out;
6484 }
6485
6486 if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_RF_VALID)) {
6487 ret = -1;
6488 goto out;
6489 }
6490 pReply = (ConfigReply_t *)ioc->mptbase_cmds.reply;
6491 ret = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK;
6492 if (ret == MPI_IOCSTATUS_SUCCESS) {
6493 if (extend_page) {
6494 pCfg->cfghdr.ehdr->ExtPageLength =
6495 le16_to_cpu(pReply->ExtPageLength);
6496 pCfg->cfghdr.ehdr->ExtPageType =
6497 pReply->ExtPageType;
6498 }
6499 pCfg->cfghdr.hdr->PageVersion = pReply->Header.PageVersion;
6500 pCfg->cfghdr.hdr->PageLength = pReply->Header.PageLength;
6501 pCfg->cfghdr.hdr->PageNumber = pReply->Header.PageNumber;
6502 pCfg->cfghdr.hdr->PageType = pReply->Header.PageType;
6503
6504 }
6505
6506 if (retry_count)
6507 printk(MYIOC_s_INFO_FMT "Retry completed "
6508 "ret=0x%x timeleft=%ld\n",
6509 ioc->name, ret, timeleft);
6510
6511 dcprintk(ioc, printk(KERN_DEBUG "IOCStatus=%04xh, IOCLogInfo=%08xh\n",
6512 ret, le32_to_cpu(pReply->IOCLogInfo)));
6513
6514 out:
6515
6516 CLEAR_MGMT_STATUS(ioc->mptbase_cmds.status)
6517 mutex_unlock(&ioc->mptbase_cmds.mutex);
6518 if (issue_hard_reset) {
6519 issue_hard_reset = 0;
6520 printk(MYIOC_s_WARN_FMT
6521 "Issuing Reset from %s!!, doorbell=0x%08x\n",
6522 ioc->name, __func__, mpt_GetIocState(ioc, 0));
6523 if (retry_count == 0) {
6524 if (mpt_Soft_Hard_ResetHandler(ioc, CAN_SLEEP) != 0)
6525 retry_count++;
6526 } else
6527 mpt_HardResetHandler(ioc, CAN_SLEEP);
6528
6529 mpt_free_msg_frame(ioc, mf);
6530 /* attempt one retry for a timed out command */
6531 if (retry_count < 2) {
6532 printk(MYIOC_s_INFO_FMT
6533 "Attempting Retry Config request"
6534 " type 0x%x, page 0x%x,"
6535 " action %d\n", ioc->name, page_type,
6536 pCfg->cfghdr.hdr->PageNumber, pCfg->action);
6537 retry_count++;
6538 goto retry_config;
6539 }
6540 }
6541 return ret;
6542
6543 }
6544
6545 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6546 /**
6547 * mpt_ioc_reset - Base cleanup for hard reset
6548 * @ioc: Pointer to the adapter structure
6549 * @reset_phase: Indicates pre- or post-reset functionality
6550 *
6551 * Remark: Frees resources with internally generated commands.
6552 */
6553 static int
6554 mpt_ioc_reset(MPT_ADAPTER *ioc, int reset_phase)
6555 {
6556 switch (reset_phase) {
6557 case MPT_IOC_SETUP_RESET:
6558 ioc->taskmgmt_quiesce_io = 1;
6559 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6560 "%s: MPT_IOC_SETUP_RESET\n", ioc->name, __func__));
6561 break;
6562 case MPT_IOC_PRE_RESET:
6563 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6564 "%s: MPT_IOC_PRE_RESET\n", ioc->name, __func__));
6565 break;
6566 case MPT_IOC_POST_RESET:
6567 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6568 "%s: MPT_IOC_POST_RESET\n", ioc->name, __func__));
6569 /* wake up mptbase_cmds */
6570 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_PENDING) {
6571 ioc->mptbase_cmds.status |=
6572 MPT_MGMT_STATUS_DID_IOCRESET;
6573 complete(&ioc->mptbase_cmds.done);
6574 }
6575 /* wake up taskmgmt_cmds */
6576 if (ioc->taskmgmt_cmds.status & MPT_MGMT_STATUS_PENDING) {
6577 ioc->taskmgmt_cmds.status |=
6578 MPT_MGMT_STATUS_DID_IOCRESET;
6579 complete(&ioc->taskmgmt_cmds.done);
6580 }
6581 break;
6582 default:
6583 break;
6584 }
6585
6586 return 1; /* currently means nothing really */
6587 }
6588
6589
6590 #ifdef CONFIG_PROC_FS /* { */
6591 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6592 /*
6593 * procfs (%MPT_PROCFS_MPTBASEDIR/...) support stuff...
6594 */
6595 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6596 /**
6597 * procmpt_create - Create %MPT_PROCFS_MPTBASEDIR entries.
6598 *
6599 * Returns 0 for success, non-zero for failure.
6600 */
6601 static int
6602 procmpt_create(void)
6603 {
6604 mpt_proc_root_dir = proc_mkdir(MPT_PROCFS_MPTBASEDIR, NULL);
6605 if (mpt_proc_root_dir == NULL)
6606 return -ENOTDIR;
6607
6608 proc_create("summary", S_IRUGO, mpt_proc_root_dir, &mpt_summary_proc_fops);
6609 proc_create("version", S_IRUGO, mpt_proc_root_dir, &mpt_version_proc_fops);
6610 return 0;
6611 }
6612
6613 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6614 /**
6615 * procmpt_destroy - Tear down %MPT_PROCFS_MPTBASEDIR entries.
6616 *
6617 * Returns 0 for success, non-zero for failure.
6618 */
6619 static void
6620 procmpt_destroy(void)
6621 {
6622 remove_proc_entry("version", mpt_proc_root_dir);
6623 remove_proc_entry("summary", mpt_proc_root_dir);
6624 remove_proc_entry(MPT_PROCFS_MPTBASEDIR, NULL);
6625 }
6626
6627 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6628 /*
6629 * Handles read request from /proc/mpt/summary or /proc/mpt/iocN/summary.
6630 */
6631 static void seq_mpt_print_ioc_summary(MPT_ADAPTER *ioc, struct seq_file *m, int showlan);
6632
6633 static int mpt_summary_proc_show(struct seq_file *m, void *v)
6634 {
6635 MPT_ADAPTER *ioc = m->private;
6636
6637 if (ioc) {
6638 seq_mpt_print_ioc_summary(ioc, m, 1);
6639 } else {
6640 list_for_each_entry(ioc, &ioc_list, list) {
6641 seq_mpt_print_ioc_summary(ioc, m, 1);
6642 }
6643 }
6644
6645 return 0;
6646 }
6647
6648 static int mpt_summary_proc_open(struct inode *inode, struct file *file)
6649 {
6650 return single_open(file, mpt_summary_proc_show, PDE_DATA(inode));
6651 }
6652
6653 static const struct file_operations mpt_summary_proc_fops = {
6654 .owner = THIS_MODULE,
6655 .open = mpt_summary_proc_open,
6656 .read = seq_read,
6657 .llseek = seq_lseek,
6658 .release = single_release,
6659 };
6660
6661 static int mpt_version_proc_show(struct seq_file *m, void *v)
6662 {
6663 u8 cb_idx;
6664 int scsi, fc, sas, lan, ctl, targ, dmp;
6665 char *drvname;
6666
6667 seq_printf(m, "%s-%s\n", "mptlinux", MPT_LINUX_VERSION_COMMON);
6668 seq_printf(m, " Fusion MPT base driver\n");
6669
6670 scsi = fc = sas = lan = ctl = targ = dmp = 0;
6671 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
6672 drvname = NULL;
6673 if (MptCallbacks[cb_idx]) {
6674 switch (MptDriverClass[cb_idx]) {
6675 case MPTSPI_DRIVER:
6676 if (!scsi++) drvname = "SPI host";
6677 break;
6678 case MPTFC_DRIVER:
6679 if (!fc++) drvname = "FC host";
6680 break;
6681 case MPTSAS_DRIVER:
6682 if (!sas++) drvname = "SAS host";
6683 break;
6684 case MPTLAN_DRIVER:
6685 if (!lan++) drvname = "LAN";
6686 break;
6687 case MPTSTM_DRIVER:
6688 if (!targ++) drvname = "SCSI target";
6689 break;
6690 case MPTCTL_DRIVER:
6691 if (!ctl++) drvname = "ioctl";
6692 break;
6693 }
6694
6695 if (drvname)
6696 seq_printf(m, " Fusion MPT %s driver\n", drvname);
6697 }
6698 }
6699
6700 return 0;
6701 }
6702
6703 static int mpt_version_proc_open(struct inode *inode, struct file *file)
6704 {
6705 return single_open(file, mpt_version_proc_show, NULL);
6706 }
6707
6708 static const struct file_operations mpt_version_proc_fops = {
6709 .owner = THIS_MODULE,
6710 .open = mpt_version_proc_open,
6711 .read = seq_read,
6712 .llseek = seq_lseek,
6713 .release = single_release,
6714 };
6715
6716 static int mpt_iocinfo_proc_show(struct seq_file *m, void *v)
6717 {
6718 MPT_ADAPTER *ioc = m->private;
6719 char expVer[32];
6720 int sz;
6721 int p;
6722
6723 mpt_get_fw_exp_ver(expVer, ioc);
6724
6725 seq_printf(m, "%s:", ioc->name);
6726 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
6727 seq_printf(m, " (f/w download boot flag set)");
6728 // if (ioc->facts.IOCExceptions & MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL)
6729 // seq_printf(m, " CONFIG_CHECKSUM_FAIL!");
6730
6731 seq_printf(m, "\n ProductID = 0x%04x (%s)\n",
6732 ioc->facts.ProductID,
6733 ioc->prod_name);
6734 seq_printf(m, " FWVersion = 0x%08x%s", ioc->facts.FWVersion.Word, expVer);
6735 if (ioc->facts.FWImageSize)
6736 seq_printf(m, " (fw_size=%d)", ioc->facts.FWImageSize);
6737 seq_printf(m, "\n MsgVersion = 0x%04x\n", ioc->facts.MsgVersion);
6738 seq_printf(m, " FirstWhoInit = 0x%02x\n", ioc->FirstWhoInit);
6739 seq_printf(m, " EventState = 0x%02x\n", ioc->facts.EventState);
6740
6741 seq_printf(m, " CurrentHostMfaHighAddr = 0x%08x\n",
6742 ioc->facts.CurrentHostMfaHighAddr);
6743 seq_printf(m, " CurrentSenseBufferHighAddr = 0x%08x\n",
6744 ioc->facts.CurrentSenseBufferHighAddr);
6745
6746 seq_printf(m, " MaxChainDepth = 0x%02x frames\n", ioc->facts.MaxChainDepth);
6747 seq_printf(m, " MinBlockSize = 0x%02x bytes\n", 4*ioc->facts.BlockSize);
6748
6749 seq_printf(m, " RequestFrames @ 0x%p (Dma @ 0x%p)\n",
6750 (void *)ioc->req_frames, (void *)(ulong)ioc->req_frames_dma);
6751 /*
6752 * Rounding UP to nearest 4-kB boundary here...
6753 */
6754 sz = (ioc->req_sz * ioc->req_depth) + 128;
6755 sz = ((sz + 0x1000UL - 1UL) / 0x1000) * 0x1000;
6756 seq_printf(m, " {CurReqSz=%d} x {CurReqDepth=%d} = %d bytes ^= 0x%x\n",
6757 ioc->req_sz, ioc->req_depth, ioc->req_sz*ioc->req_depth, sz);
6758 seq_printf(m, " {MaxReqSz=%d} {MaxReqDepth=%d}\n",
6759 4*ioc->facts.RequestFrameSize,
6760 ioc->facts.GlobalCredits);
6761
6762 seq_printf(m, " Frames @ 0x%p (Dma @ 0x%p)\n",
6763 (void *)ioc->alloc, (void *)(ulong)ioc->alloc_dma);
6764 sz = (ioc->reply_sz * ioc->reply_depth) + 128;
6765 seq_printf(m, " {CurRepSz=%d} x {CurRepDepth=%d} = %d bytes ^= 0x%x\n",
6766 ioc->reply_sz, ioc->reply_depth, ioc->reply_sz*ioc->reply_depth, sz);
6767 seq_printf(m, " {MaxRepSz=%d} {MaxRepDepth=%d}\n",
6768 ioc->facts.CurReplyFrameSize,
6769 ioc->facts.ReplyQueueDepth);
6770
6771 seq_printf(m, " MaxDevices = %d\n",
6772 (ioc->facts.MaxDevices==0) ? 255 : ioc->facts.MaxDevices);
6773 seq_printf(m, " MaxBuses = %d\n", ioc->facts.MaxBuses);
6774
6775 /* per-port info */
6776 for (p=0; p < ioc->facts.NumberOfPorts; p++) {
6777 seq_printf(m, " PortNumber = %d (of %d)\n",
6778 p+1,
6779 ioc->facts.NumberOfPorts);
6780 if (ioc->bus_type == FC) {
6781 if (ioc->pfacts[p].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
6782 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6783 seq_printf(m, " LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
6784 a[5], a[4], a[3], a[2], a[1], a[0]);
6785 }
6786 seq_printf(m, " WWN = %08X%08X:%08X%08X\n",
6787 ioc->fc_port_page0[p].WWNN.High,
6788 ioc->fc_port_page0[p].WWNN.Low,
6789 ioc->fc_port_page0[p].WWPN.High,
6790 ioc->fc_port_page0[p].WWPN.Low);
6791 }
6792 }
6793
6794 return 0;
6795 }
6796
6797 static int mpt_iocinfo_proc_open(struct inode *inode, struct file *file)
6798 {
6799 return single_open(file, mpt_iocinfo_proc_show, PDE_DATA(inode));
6800 }
6801
6802 static const struct file_operations mpt_iocinfo_proc_fops = {
6803 .owner = THIS_MODULE,
6804 .open = mpt_iocinfo_proc_open,
6805 .read = seq_read,
6806 .llseek = seq_lseek,
6807 .release = single_release,
6808 };
6809 #endif /* CONFIG_PROC_FS } */
6810
6811 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6812 static void
6813 mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc)
6814 {
6815 buf[0] ='\0';
6816 if ((ioc->facts.FWVersion.Word >> 24) == 0x0E) {
6817 sprintf(buf, " (Exp %02d%02d)",
6818 (ioc->facts.FWVersion.Word >> 16) & 0x00FF, /* Month */
6819 (ioc->facts.FWVersion.Word >> 8) & 0x1F); /* Day */
6820
6821 /* insider hack! */
6822 if ((ioc->facts.FWVersion.Word >> 8) & 0x80)
6823 strcat(buf, " [MDBG]");
6824 }
6825 }
6826
6827 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6828 /**
6829 * mpt_print_ioc_summary - Write ASCII summary of IOC to a buffer.
6830 * @ioc: Pointer to MPT_ADAPTER structure
6831 * @buffer: Pointer to buffer where IOC summary info should be written
6832 * @size: Pointer to number of bytes we wrote (set by this routine)
6833 * @len: Offset at which to start writing in buffer
6834 * @showlan: Display LAN stuff?
6835 *
6836 * This routine writes (english readable) ASCII text, which represents
6837 * a summary of IOC information, to a buffer.
6838 */
6839 void
6840 mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buffer, int *size, int len, int showlan)
6841 {
6842 char expVer[32];
6843 int y;
6844
6845 mpt_get_fw_exp_ver(expVer, ioc);
6846
6847 /*
6848 * Shorter summary of attached ioc's...
6849 */
6850 y = sprintf(buffer+len, "%s: %s, %s%08xh%s, Ports=%d, MaxQ=%d",
6851 ioc->name,
6852 ioc->prod_name,
6853 MPT_FW_REV_MAGIC_ID_STRING, /* "FwRev=" or somesuch */
6854 ioc->facts.FWVersion.Word,
6855 expVer,
6856 ioc->facts.NumberOfPorts,
6857 ioc->req_depth);
6858
6859 if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
6860 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6861 y += sprintf(buffer+len+y, ", LanAddr=%02X:%02X:%02X:%02X:%02X:%02X",
6862 a[5], a[4], a[3], a[2], a[1], a[0]);
6863 }
6864
6865 y += sprintf(buffer+len+y, ", IRQ=%d", ioc->pci_irq);
6866
6867 if (!ioc->active)
6868 y += sprintf(buffer+len+y, " (disabled)");
6869
6870 y += sprintf(buffer+len+y, "\n");
6871
6872 *size = y;
6873 }
6874
6875 static void seq_mpt_print_ioc_summary(MPT_ADAPTER *ioc, struct seq_file *m, int showlan)
6876 {
6877 char expVer[32];
6878
6879 mpt_get_fw_exp_ver(expVer, ioc);
6880
6881 /*
6882 * Shorter summary of attached ioc's...
6883 */
6884 seq_printf(m, "%s: %s, %s%08xh%s, Ports=%d, MaxQ=%d",
6885 ioc->name,
6886 ioc->prod_name,
6887 MPT_FW_REV_MAGIC_ID_STRING, /* "FwRev=" or somesuch */
6888 ioc->facts.FWVersion.Word,
6889 expVer,
6890 ioc->facts.NumberOfPorts,
6891 ioc->req_depth);
6892
6893 if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
6894 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6895 seq_printf(m, ", LanAddr=%02X:%02X:%02X:%02X:%02X:%02X",
6896 a[5], a[4], a[3], a[2], a[1], a[0]);
6897 }
6898
6899 seq_printf(m, ", IRQ=%d", ioc->pci_irq);
6900
6901 if (!ioc->active)
6902 seq_printf(m, " (disabled)");
6903
6904 seq_putc(m, '\n');
6905 }
6906
6907 /**
6908 * mpt_set_taskmgmt_in_progress_flag - set flags associated with task management
6909 * @ioc: Pointer to MPT_ADAPTER structure
6910 *
6911 * Returns 0 for SUCCESS or -1 if FAILED.
6912 *
6913 * If -1 is return, then it was not possible to set the flags
6914 **/
6915 int
6916 mpt_set_taskmgmt_in_progress_flag(MPT_ADAPTER *ioc)
6917 {
6918 unsigned long flags;
6919 int retval;
6920
6921 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6922 if (ioc->ioc_reset_in_progress || ioc->taskmgmt_in_progress ||
6923 (ioc->alt_ioc && ioc->alt_ioc->taskmgmt_in_progress)) {
6924 retval = -1;
6925 goto out;
6926 }
6927 retval = 0;
6928 ioc->taskmgmt_in_progress = 1;
6929 ioc->taskmgmt_quiesce_io = 1;
6930 if (ioc->alt_ioc) {
6931 ioc->alt_ioc->taskmgmt_in_progress = 1;
6932 ioc->alt_ioc->taskmgmt_quiesce_io = 1;
6933 }
6934 out:
6935 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6936 return retval;
6937 }
6938 EXPORT_SYMBOL(mpt_set_taskmgmt_in_progress_flag);
6939
6940 /**
6941 * mpt_clear_taskmgmt_in_progress_flag - clear flags associated with task management
6942 * @ioc: Pointer to MPT_ADAPTER structure
6943 *
6944 **/
6945 void
6946 mpt_clear_taskmgmt_in_progress_flag(MPT_ADAPTER *ioc)
6947 {
6948 unsigned long flags;
6949
6950 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6951 ioc->taskmgmt_in_progress = 0;
6952 ioc->taskmgmt_quiesce_io = 0;
6953 if (ioc->alt_ioc) {
6954 ioc->alt_ioc->taskmgmt_in_progress = 0;
6955 ioc->alt_ioc->taskmgmt_quiesce_io = 0;
6956 }
6957 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6958 }
6959 EXPORT_SYMBOL(mpt_clear_taskmgmt_in_progress_flag);
6960
6961
6962 /**
6963 * mpt_halt_firmware - Halts the firmware if it is operational and panic
6964 * the kernel
6965 * @ioc: Pointer to MPT_ADAPTER structure
6966 *
6967 **/
6968 void
6969 mpt_halt_firmware(MPT_ADAPTER *ioc)
6970 {
6971 u32 ioc_raw_state;
6972
6973 ioc_raw_state = mpt_GetIocState(ioc, 0);
6974
6975 if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
6976 printk(MYIOC_s_ERR_FMT "IOC is in FAULT state (%04xh)!!!\n",
6977 ioc->name, ioc_raw_state & MPI_DOORBELL_DATA_MASK);
6978 panic("%s: IOC Fault (%04xh)!!!\n", ioc->name,
6979 ioc_raw_state & MPI_DOORBELL_DATA_MASK);
6980 } else {
6981 CHIPREG_WRITE32(&ioc->chip->Doorbell, 0xC0FFEE00);
6982 panic("%s: Firmware is halted due to command timeout\n",
6983 ioc->name);
6984 }
6985 }
6986 EXPORT_SYMBOL(mpt_halt_firmware);
6987
6988 /**
6989 * mpt_SoftResetHandler - Issues a less expensive reset
6990 * @ioc: Pointer to MPT_ADAPTER structure
6991 * @sleepFlag: Indicates if sleep or schedule must be called.
6992 *
6993 * Returns 0 for SUCCESS or -1 if FAILED.
6994 *
6995 * Message Unit Reset - instructs the IOC to reset the Reply Post and
6996 * Free FIFO's. All the Message Frames on Reply Free FIFO are discarded.
6997 * All posted buffers are freed, and event notification is turned off.
6998 * IOC doesn't reply to any outstanding request. This will transfer IOC
6999 * to READY state.
7000 **/
7001 static int
7002 mpt_SoftResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
7003 {
7004 int rc;
7005 int ii;
7006 u8 cb_idx;
7007 unsigned long flags;
7008 u32 ioc_state;
7009 unsigned long time_count;
7010
7011 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SoftResetHandler Entered!\n",
7012 ioc->name));
7013
7014 ioc_state = mpt_GetIocState(ioc, 0) & MPI_IOC_STATE_MASK;
7015
7016 if (mpt_fwfault_debug)
7017 mpt_halt_firmware(ioc);
7018
7019 if (ioc_state == MPI_IOC_STATE_FAULT ||
7020 ioc_state == MPI_IOC_STATE_RESET) {
7021 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7022 "skipping, either in FAULT or RESET state!\n", ioc->name));
7023 return -1;
7024 }
7025
7026 if (ioc->bus_type == FC) {
7027 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7028 "skipping, because the bus type is FC!\n", ioc->name));
7029 return -1;
7030 }
7031
7032 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7033 if (ioc->ioc_reset_in_progress) {
7034 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7035 return -1;
7036 }
7037 ioc->ioc_reset_in_progress = 1;
7038 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7039
7040 rc = -1;
7041
7042 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7043 if (MptResetHandlers[cb_idx])
7044 mpt_signal_reset(cb_idx, ioc, MPT_IOC_SETUP_RESET);
7045 }
7046
7047 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7048 if (ioc->taskmgmt_in_progress) {
7049 ioc->ioc_reset_in_progress = 0;
7050 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7051 return -1;
7052 }
7053 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7054 /* Disable reply interrupts (also blocks FreeQ) */
7055 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
7056 ioc->active = 0;
7057 time_count = jiffies;
7058
7059 rc = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
7060
7061 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7062 if (MptResetHandlers[cb_idx])
7063 mpt_signal_reset(cb_idx, ioc, MPT_IOC_PRE_RESET);
7064 }
7065
7066 if (rc)
7067 goto out;
7068
7069 ioc_state = mpt_GetIocState(ioc, 0) & MPI_IOC_STATE_MASK;
7070 if (ioc_state != MPI_IOC_STATE_READY)
7071 goto out;
7072
7073 for (ii = 0; ii < 5; ii++) {
7074 /* Get IOC facts! Allow 5 retries */
7075 rc = GetIocFacts(ioc, sleepFlag,
7076 MPT_HOSTEVENT_IOC_RECOVER);
7077 if (rc == 0)
7078 break;
7079 if (sleepFlag == CAN_SLEEP)
7080 msleep(100);
7081 else
7082 mdelay(100);
7083 }
7084 if (ii == 5)
7085 goto out;
7086
7087 rc = PrimeIocFifos(ioc);
7088 if (rc != 0)
7089 goto out;
7090
7091 rc = SendIocInit(ioc, sleepFlag);
7092 if (rc != 0)
7093 goto out;
7094
7095 rc = SendEventNotification(ioc, 1, sleepFlag);
7096 if (rc != 0)
7097 goto out;
7098
7099 if (ioc->hard_resets < -1)
7100 ioc->hard_resets++;
7101
7102 /*
7103 * At this point, we know soft reset succeeded.
7104 */
7105
7106 ioc->active = 1;
7107 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
7108
7109 out:
7110 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7111 ioc->ioc_reset_in_progress = 0;
7112 ioc->taskmgmt_quiesce_io = 0;
7113 ioc->taskmgmt_in_progress = 0;
7114 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7115
7116 if (ioc->active) { /* otherwise, hard reset coming */
7117 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7118 if (MptResetHandlers[cb_idx])
7119 mpt_signal_reset(cb_idx, ioc,
7120 MPT_IOC_POST_RESET);
7121 }
7122 }
7123
7124 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7125 "SoftResetHandler: completed (%d seconds): %s\n",
7126 ioc->name, jiffies_to_msecs(jiffies - time_count)/1000,
7127 ((rc == 0) ? "SUCCESS" : "FAILED")));
7128
7129 return rc;
7130 }
7131
7132 /**
7133 * mpt_Soft_Hard_ResetHandler - Try less expensive reset
7134 * @ioc: Pointer to MPT_ADAPTER structure
7135 * @sleepFlag: Indicates if sleep or schedule must be called.
7136 *
7137 * Returns 0 for SUCCESS or -1 if FAILED.
7138 * Try for softreset first, only if it fails go for expensive
7139 * HardReset.
7140 **/
7141 int
7142 mpt_Soft_Hard_ResetHandler(MPT_ADAPTER *ioc, int sleepFlag) {
7143 int ret = -1;
7144
7145 ret = mpt_SoftResetHandler(ioc, sleepFlag);
7146 if (ret == 0)
7147 return ret;
7148 ret = mpt_HardResetHandler(ioc, sleepFlag);
7149 return ret;
7150 }
7151 EXPORT_SYMBOL(mpt_Soft_Hard_ResetHandler);
7152
7153 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7154 /*
7155 * Reset Handling
7156 */
7157 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7158 /**
7159 * mpt_HardResetHandler - Generic reset handler
7160 * @ioc: Pointer to MPT_ADAPTER structure
7161 * @sleepFlag: Indicates if sleep or schedule must be called.
7162 *
7163 * Issues SCSI Task Management call based on input arg values.
7164 * If TaskMgmt fails, returns associated SCSI request.
7165 *
7166 * Remark: _HardResetHandler can be invoked from an interrupt thread (timer)
7167 * or a non-interrupt thread. In the former, must not call schedule().
7168 *
7169 * Note: A return of -1 is a FATAL error case, as it means a
7170 * FW reload/initialization failed.
7171 *
7172 * Returns 0 for SUCCESS or -1 if FAILED.
7173 */
7174 int
7175 mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
7176 {
7177 int rc;
7178 u8 cb_idx;
7179 unsigned long flags;
7180 unsigned long time_count;
7181
7182 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HardResetHandler Entered!\n", ioc->name));
7183 #ifdef MFCNT
7184 printk(MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name);
7185 printk("MF count 0x%x !\n", ioc->mfcnt);
7186 #endif
7187 if (mpt_fwfault_debug)
7188 mpt_halt_firmware(ioc);
7189
7190 /* Reset the adapter. Prevent more than 1 call to
7191 * mpt_do_ioc_recovery at any instant in time.
7192 */
7193 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7194 if (ioc->ioc_reset_in_progress) {
7195 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7196 ioc->wait_on_reset_completion = 1;
7197 do {
7198 ssleep(1);
7199 } while (ioc->ioc_reset_in_progress == 1);
7200 ioc->wait_on_reset_completion = 0;
7201 return ioc->reset_status;
7202 }
7203 if (ioc->wait_on_reset_completion) {
7204 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7205 rc = 0;
7206 time_count = jiffies;
7207 goto exit;
7208 }
7209 ioc->ioc_reset_in_progress = 1;
7210 if (ioc->alt_ioc)
7211 ioc->alt_ioc->ioc_reset_in_progress = 1;
7212 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7213
7214
7215 /* The SCSI driver needs to adjust timeouts on all current
7216 * commands prior to the diagnostic reset being issued.
7217 * Prevents timeouts occurring during a diagnostic reset...very bad.
7218 * For all other protocol drivers, this is a no-op.
7219 */
7220 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7221 if (MptResetHandlers[cb_idx]) {
7222 mpt_signal_reset(cb_idx, ioc, MPT_IOC_SETUP_RESET);
7223 if (ioc->alt_ioc)
7224 mpt_signal_reset(cb_idx, ioc->alt_ioc,
7225 MPT_IOC_SETUP_RESET);
7226 }
7227 }
7228
7229 time_count = jiffies;
7230 rc = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_RECOVER, sleepFlag);
7231 if (rc != 0) {
7232 printk(KERN_WARNING MYNAM
7233 ": WARNING - (%d) Cannot recover %s, doorbell=0x%08x\n",
7234 rc, ioc->name, mpt_GetIocState(ioc, 0));
7235 } else {
7236 if (ioc->hard_resets < -1)
7237 ioc->hard_resets++;
7238 }
7239
7240 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7241 ioc->ioc_reset_in_progress = 0;
7242 ioc->taskmgmt_quiesce_io = 0;
7243 ioc->taskmgmt_in_progress = 0;
7244 ioc->reset_status = rc;
7245 if (ioc->alt_ioc) {
7246 ioc->alt_ioc->ioc_reset_in_progress = 0;
7247 ioc->alt_ioc->taskmgmt_quiesce_io = 0;
7248 ioc->alt_ioc->taskmgmt_in_progress = 0;
7249 }
7250 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7251
7252 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7253 if (MptResetHandlers[cb_idx]) {
7254 mpt_signal_reset(cb_idx, ioc, MPT_IOC_POST_RESET);
7255 if (ioc->alt_ioc)
7256 mpt_signal_reset(cb_idx,
7257 ioc->alt_ioc, MPT_IOC_POST_RESET);
7258 }
7259 }
7260 exit:
7261 dtmprintk(ioc,
7262 printk(MYIOC_s_DEBUG_FMT
7263 "HardResetHandler: completed (%d seconds): %s\n", ioc->name,
7264 jiffies_to_msecs(jiffies - time_count)/1000, ((rc == 0) ?
7265 "SUCCESS" : "FAILED")));
7266
7267 return rc;
7268 }
7269
7270 #ifdef CONFIG_FUSION_LOGGING
7271 static void
7272 mpt_display_event_info(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply)
7273 {
7274 char *ds = NULL;
7275 u32 evData0;
7276 int ii;
7277 u8 event;
7278 char *evStr = ioc->evStr;
7279
7280 event = le32_to_cpu(pEventReply->Event) & 0xFF;
7281 evData0 = le32_to_cpu(pEventReply->Data[0]);
7282
7283 switch(event) {
7284 case MPI_EVENT_NONE:
7285 ds = "None";
7286 break;
7287 case MPI_EVENT_LOG_DATA:
7288 ds = "Log Data";
7289 break;
7290 case MPI_EVENT_STATE_CHANGE:
7291 ds = "State Change";
7292 break;
7293 case MPI_EVENT_UNIT_ATTENTION:
7294 ds = "Unit Attention";
7295 break;
7296 case MPI_EVENT_IOC_BUS_RESET:
7297 ds = "IOC Bus Reset";
7298 break;
7299 case MPI_EVENT_EXT_BUS_RESET:
7300 ds = "External Bus Reset";
7301 break;
7302 case MPI_EVENT_RESCAN:
7303 ds = "Bus Rescan Event";
7304 break;
7305 case MPI_EVENT_LINK_STATUS_CHANGE:
7306 if (evData0 == MPI_EVENT_LINK_STATUS_FAILURE)
7307 ds = "Link Status(FAILURE) Change";
7308 else
7309 ds = "Link Status(ACTIVE) Change";
7310 break;
7311 case MPI_EVENT_LOOP_STATE_CHANGE:
7312 if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LIP)
7313 ds = "Loop State(LIP) Change";
7314 else if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LPE)
7315 ds = "Loop State(LPE) Change";
7316 else
7317 ds = "Loop State(LPB) Change";
7318 break;
7319 case MPI_EVENT_LOGOUT:
7320 ds = "Logout";
7321 break;
7322 case MPI_EVENT_EVENT_CHANGE:
7323 if (evData0)
7324 ds = "Events ON";
7325 else
7326 ds = "Events OFF";
7327 break;
7328 case MPI_EVENT_INTEGRATED_RAID:
7329 {
7330 u8 ReasonCode = (u8)(evData0 >> 16);
7331 switch (ReasonCode) {
7332 case MPI_EVENT_RAID_RC_VOLUME_CREATED :
7333 ds = "Integrated Raid: Volume Created";
7334 break;
7335 case MPI_EVENT_RAID_RC_VOLUME_DELETED :
7336 ds = "Integrated Raid: Volume Deleted";
7337 break;
7338 case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED :
7339 ds = "Integrated Raid: Volume Settings Changed";
7340 break;
7341 case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED :
7342 ds = "Integrated Raid: Volume Status Changed";
7343 break;
7344 case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED :
7345 ds = "Integrated Raid: Volume Physdisk Changed";
7346 break;
7347 case MPI_EVENT_RAID_RC_PHYSDISK_CREATED :
7348 ds = "Integrated Raid: Physdisk Created";
7349 break;
7350 case MPI_EVENT_RAID_RC_PHYSDISK_DELETED :
7351 ds = "Integrated Raid: Physdisk Deleted";
7352 break;
7353 case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED :
7354 ds = "Integrated Raid: Physdisk Settings Changed";
7355 break;
7356 case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED :
7357 ds = "Integrated Raid: Physdisk Status Changed";
7358 break;
7359 case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED :
7360 ds = "Integrated Raid: Domain Validation Needed";
7361 break;
7362 case MPI_EVENT_RAID_RC_SMART_DATA :
7363 ds = "Integrated Raid; Smart Data";
7364 break;
7365 case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED :
7366 ds = "Integrated Raid: Replace Action Started";
7367 break;
7368 default:
7369 ds = "Integrated Raid";
7370 break;
7371 }
7372 break;
7373 }
7374 case MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE:
7375 ds = "SCSI Device Status Change";
7376 break;
7377 case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE:
7378 {
7379 u8 id = (u8)(evData0);
7380 u8 channel = (u8)(evData0 >> 8);
7381 u8 ReasonCode = (u8)(evData0 >> 16);
7382 switch (ReasonCode) {
7383 case MPI_EVENT_SAS_DEV_STAT_RC_ADDED:
7384 snprintf(evStr, EVENT_DESCR_STR_SZ,
7385 "SAS Device Status Change: Added: "
7386 "id=%d channel=%d", id, channel);
7387 break;
7388 case MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING:
7389 snprintf(evStr, EVENT_DESCR_STR_SZ,
7390 "SAS Device Status Change: Deleted: "
7391 "id=%d channel=%d", id, channel);
7392 break;
7393 case MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA:
7394 snprintf(evStr, EVENT_DESCR_STR_SZ,
7395 "SAS Device Status Change: SMART Data: "
7396 "id=%d channel=%d", id, channel);
7397 break;
7398 case MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED:
7399 snprintf(evStr, EVENT_DESCR_STR_SZ,
7400 "SAS Device Status Change: No Persistancy: "
7401 "id=%d channel=%d", id, channel);
7402 break;
7403 case MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED:
7404 snprintf(evStr, EVENT_DESCR_STR_SZ,
7405 "SAS Device Status Change: Unsupported Device "
7406 "Discovered : id=%d channel=%d", id, channel);
7407 break;
7408 case MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET:
7409 snprintf(evStr, EVENT_DESCR_STR_SZ,
7410 "SAS Device Status Change: Internal Device "
7411 "Reset : id=%d channel=%d", id, channel);
7412 break;
7413 case MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL:
7414 snprintf(evStr, EVENT_DESCR_STR_SZ,
7415 "SAS Device Status Change: Internal Task "
7416 "Abort : id=%d channel=%d", id, channel);
7417 break;
7418 case MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL:
7419 snprintf(evStr, EVENT_DESCR_STR_SZ,
7420 "SAS Device Status Change: Internal Abort "
7421 "Task Set : id=%d channel=%d", id, channel);
7422 break;
7423 case MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL:
7424 snprintf(evStr, EVENT_DESCR_STR_SZ,
7425 "SAS Device Status Change: Internal Clear "
7426 "Task Set : id=%d channel=%d", id, channel);
7427 break;
7428 case MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL:
7429 snprintf(evStr, EVENT_DESCR_STR_SZ,
7430 "SAS Device Status Change: Internal Query "
7431 "Task : id=%d channel=%d", id, channel);
7432 break;
7433 default:
7434 snprintf(evStr, EVENT_DESCR_STR_SZ,
7435 "SAS Device Status Change: Unknown: "
7436 "id=%d channel=%d", id, channel);
7437 break;
7438 }
7439 break;
7440 }
7441 case MPI_EVENT_ON_BUS_TIMER_EXPIRED:
7442 ds = "Bus Timer Expired";
7443 break;
7444 case MPI_EVENT_QUEUE_FULL:
7445 {
7446 u16 curr_depth = (u16)(evData0 >> 16);
7447 u8 channel = (u8)(evData0 >> 8);
7448 u8 id = (u8)(evData0);
7449
7450 snprintf(evStr, EVENT_DESCR_STR_SZ,
7451 "Queue Full: channel=%d id=%d depth=%d",
7452 channel, id, curr_depth);
7453 break;
7454 }
7455 case MPI_EVENT_SAS_SES:
7456 ds = "SAS SES Event";
7457 break;
7458 case MPI_EVENT_PERSISTENT_TABLE_FULL:
7459 ds = "Persistent Table Full";
7460 break;
7461 case MPI_EVENT_SAS_PHY_LINK_STATUS:
7462 {
7463 u8 LinkRates = (u8)(evData0 >> 8);
7464 u8 PhyNumber = (u8)(evData0);
7465 LinkRates = (LinkRates & MPI_EVENT_SAS_PLS_LR_CURRENT_MASK) >>
7466 MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT;
7467 switch (LinkRates) {
7468 case MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN:
7469 snprintf(evStr, EVENT_DESCR_STR_SZ,
7470 "SAS PHY Link Status: Phy=%d:"
7471 " Rate Unknown",PhyNumber);
7472 break;
7473 case MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED:
7474 snprintf(evStr, EVENT_DESCR_STR_SZ,
7475 "SAS PHY Link Status: Phy=%d:"
7476 " Phy Disabled",PhyNumber);
7477 break;
7478 case MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION:
7479 snprintf(evStr, EVENT_DESCR_STR_SZ,
7480 "SAS PHY Link Status: Phy=%d:"
7481 " Failed Speed Nego",PhyNumber);
7482 break;
7483 case MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE:
7484 snprintf(evStr, EVENT_DESCR_STR_SZ,
7485 "SAS PHY Link Status: Phy=%d:"
7486 " Sata OOB Completed",PhyNumber);
7487 break;
7488 case MPI_EVENT_SAS_PLS_LR_RATE_1_5:
7489 snprintf(evStr, EVENT_DESCR_STR_SZ,
7490 "SAS PHY Link Status: Phy=%d:"
7491 " Rate 1.5 Gbps",PhyNumber);
7492 break;
7493 case MPI_EVENT_SAS_PLS_LR_RATE_3_0:
7494 snprintf(evStr, EVENT_DESCR_STR_SZ,
7495 "SAS PHY Link Status: Phy=%d:"
7496 " Rate 3.0 Gbps", PhyNumber);
7497 break;
7498 case MPI_EVENT_SAS_PLS_LR_RATE_6_0:
7499 snprintf(evStr, EVENT_DESCR_STR_SZ,
7500 "SAS PHY Link Status: Phy=%d:"
7501 " Rate 6.0 Gbps", PhyNumber);
7502 break;
7503 default:
7504 snprintf(evStr, EVENT_DESCR_STR_SZ,
7505 "SAS PHY Link Status: Phy=%d", PhyNumber);
7506 break;
7507 }
7508 break;
7509 }
7510 case MPI_EVENT_SAS_DISCOVERY_ERROR:
7511 ds = "SAS Discovery Error";
7512 break;
7513 case MPI_EVENT_IR_RESYNC_UPDATE:
7514 {
7515 u8 resync_complete = (u8)(evData0 >> 16);
7516 snprintf(evStr, EVENT_DESCR_STR_SZ,
7517 "IR Resync Update: Complete = %d:",resync_complete);
7518 break;
7519 }
7520 case MPI_EVENT_IR2:
7521 {
7522 u8 id = (u8)(evData0);
7523 u8 channel = (u8)(evData0 >> 8);
7524 u8 phys_num = (u8)(evData0 >> 24);
7525 u8 ReasonCode = (u8)(evData0 >> 16);
7526
7527 switch (ReasonCode) {
7528 case MPI_EVENT_IR2_RC_LD_STATE_CHANGED:
7529 snprintf(evStr, EVENT_DESCR_STR_SZ,
7530 "IR2: LD State Changed: "
7531 "id=%d channel=%d phys_num=%d",
7532 id, channel, phys_num);
7533 break;
7534 case MPI_EVENT_IR2_RC_PD_STATE_CHANGED:
7535 snprintf(evStr, EVENT_DESCR_STR_SZ,
7536 "IR2: PD State Changed "
7537 "id=%d channel=%d phys_num=%d",
7538 id, channel, phys_num);
7539 break;
7540 case MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL:
7541 snprintf(evStr, EVENT_DESCR_STR_SZ,
7542 "IR2: Bad Block Table Full: "
7543 "id=%d channel=%d phys_num=%d",
7544 id, channel, phys_num);
7545 break;
7546 case MPI_EVENT_IR2_RC_PD_INSERTED:
7547 snprintf(evStr, EVENT_DESCR_STR_SZ,
7548 "IR2: PD Inserted: "
7549 "id=%d channel=%d phys_num=%d",
7550 id, channel, phys_num);
7551 break;
7552 case MPI_EVENT_IR2_RC_PD_REMOVED:
7553 snprintf(evStr, EVENT_DESCR_STR_SZ,
7554 "IR2: PD Removed: "
7555 "id=%d channel=%d phys_num=%d",
7556 id, channel, phys_num);
7557 break;
7558 case MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED:
7559 snprintf(evStr, EVENT_DESCR_STR_SZ,
7560 "IR2: Foreign CFG Detected: "
7561 "id=%d channel=%d phys_num=%d",
7562 id, channel, phys_num);
7563 break;
7564 case MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR:
7565 snprintf(evStr, EVENT_DESCR_STR_SZ,
7566 "IR2: Rebuild Medium Error: "
7567 "id=%d channel=%d phys_num=%d",
7568 id, channel, phys_num);
7569 break;
7570 case MPI_EVENT_IR2_RC_DUAL_PORT_ADDED:
7571 snprintf(evStr, EVENT_DESCR_STR_SZ,
7572 "IR2: Dual Port Added: "
7573 "id=%d channel=%d phys_num=%d",
7574 id, channel, phys_num);
7575 break;
7576 case MPI_EVENT_IR2_RC_DUAL_PORT_REMOVED:
7577 snprintf(evStr, EVENT_DESCR_STR_SZ,
7578 "IR2: Dual Port Removed: "
7579 "id=%d channel=%d phys_num=%d",
7580 id, channel, phys_num);
7581 break;
7582 default:
7583 ds = "IR2";
7584 break;
7585 }
7586 break;
7587 }
7588 case MPI_EVENT_SAS_DISCOVERY:
7589 {
7590 if (evData0)
7591 ds = "SAS Discovery: Start";
7592 else
7593 ds = "SAS Discovery: Stop";
7594 break;
7595 }
7596 case MPI_EVENT_LOG_ENTRY_ADDED:
7597 ds = "SAS Log Entry Added";
7598 break;
7599
7600 case MPI_EVENT_SAS_BROADCAST_PRIMITIVE:
7601 {
7602 u8 phy_num = (u8)(evData0);
7603 u8 port_num = (u8)(evData0 >> 8);
7604 u8 port_width = (u8)(evData0 >> 16);
7605 u8 primative = (u8)(evData0 >> 24);
7606 snprintf(evStr, EVENT_DESCR_STR_SZ,
7607 "SAS Broadcase Primative: phy=%d port=%d "
7608 "width=%d primative=0x%02x",
7609 phy_num, port_num, port_width, primative);
7610 break;
7611 }
7612
7613 case MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
7614 {
7615 u8 reason = (u8)(evData0);
7616
7617 switch (reason) {
7618 case MPI_EVENT_SAS_INIT_RC_ADDED:
7619 ds = "SAS Initiator Status Change: Added";
7620 break;
7621 case MPI_EVENT_SAS_INIT_RC_REMOVED:
7622 ds = "SAS Initiator Status Change: Deleted";
7623 break;
7624 default:
7625 ds = "SAS Initiator Status Change";
7626 break;
7627 }
7628 break;
7629 }
7630
7631 case MPI_EVENT_SAS_INIT_TABLE_OVERFLOW:
7632 {
7633 u8 max_init = (u8)(evData0);
7634 u8 current_init = (u8)(evData0 >> 8);
7635
7636 snprintf(evStr, EVENT_DESCR_STR_SZ,
7637 "SAS Initiator Device Table Overflow: max initiators=%02d "
7638 "current initators=%02d",
7639 max_init, current_init);
7640 break;
7641 }
7642 case MPI_EVENT_SAS_SMP_ERROR:
7643 {
7644 u8 status = (u8)(evData0);
7645 u8 port_num = (u8)(evData0 >> 8);
7646 u8 result = (u8)(evData0 >> 16);
7647
7648 if (status == MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID)
7649 snprintf(evStr, EVENT_DESCR_STR_SZ,
7650 "SAS SMP Error: port=%d result=0x%02x",
7651 port_num, result);
7652 else if (status == MPI_EVENT_SAS_SMP_CRC_ERROR)
7653 snprintf(evStr, EVENT_DESCR_STR_SZ,
7654 "SAS SMP Error: port=%d : CRC Error",
7655 port_num);
7656 else if (status == MPI_EVENT_SAS_SMP_TIMEOUT)
7657 snprintf(evStr, EVENT_DESCR_STR_SZ,
7658 "SAS SMP Error: port=%d : Timeout",
7659 port_num);
7660 else if (status == MPI_EVENT_SAS_SMP_NO_DESTINATION)
7661 snprintf(evStr, EVENT_DESCR_STR_SZ,
7662 "SAS SMP Error: port=%d : No Destination",
7663 port_num);
7664 else if (status == MPI_EVENT_SAS_SMP_BAD_DESTINATION)
7665 snprintf(evStr, EVENT_DESCR_STR_SZ,
7666 "SAS SMP Error: port=%d : Bad Destination",
7667 port_num);
7668 else
7669 snprintf(evStr, EVENT_DESCR_STR_SZ,
7670 "SAS SMP Error: port=%d : status=0x%02x",
7671 port_num, status);
7672 break;
7673 }
7674
7675 case MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE:
7676 {
7677 u8 reason = (u8)(evData0);
7678
7679 switch (reason) {
7680 case MPI_EVENT_SAS_EXP_RC_ADDED:
7681 ds = "Expander Status Change: Added";
7682 break;
7683 case MPI_EVENT_SAS_EXP_RC_NOT_RESPONDING:
7684 ds = "Expander Status Change: Deleted";
7685 break;
7686 default:
7687 ds = "Expander Status Change";
7688 break;
7689 }
7690 break;
7691 }
7692
7693 /*
7694 * MPT base "custom" events may be added here...
7695 */
7696 default:
7697 ds = "Unknown";
7698 break;
7699 }
7700 if (ds)
7701 strncpy(evStr, ds, EVENT_DESCR_STR_SZ);
7702
7703
7704 devtprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7705 "MPT event:(%02Xh) : %s\n",
7706 ioc->name, event, evStr));
7707
7708 devtverboseprintk(ioc, printk(KERN_DEBUG MYNAM
7709 ": Event data:\n"));
7710 for (ii = 0; ii < le16_to_cpu(pEventReply->EventDataLength); ii++)
7711 devtverboseprintk(ioc, printk(" %08x",
7712 le32_to_cpu(pEventReply->Data[ii])));
7713 devtverboseprintk(ioc, printk(KERN_DEBUG "\n"));
7714 }
7715 #endif
7716 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7717 /**
7718 * ProcessEventNotification - Route EventNotificationReply to all event handlers
7719 * @ioc: Pointer to MPT_ADAPTER structure
7720 * @pEventReply: Pointer to EventNotification reply frame
7721 * @evHandlers: Pointer to integer, number of event handlers
7722 *
7723 * Routes a received EventNotificationReply to all currently registered
7724 * event handlers.
7725 * Returns sum of event handlers return values.
7726 */
7727 static int
7728 ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply, int *evHandlers)
7729 {
7730 u16 evDataLen;
7731 u32 evData0 = 0;
7732 int ii;
7733 u8 cb_idx;
7734 int r = 0;
7735 int handlers = 0;
7736 u8 event;
7737
7738 /*
7739 * Do platform normalization of values
7740 */
7741 event = le32_to_cpu(pEventReply->Event) & 0xFF;
7742 evDataLen = le16_to_cpu(pEventReply->EventDataLength);
7743 if (evDataLen) {
7744 evData0 = le32_to_cpu(pEventReply->Data[0]);
7745 }
7746
7747 #ifdef CONFIG_FUSION_LOGGING
7748 if (evDataLen)
7749 mpt_display_event_info(ioc, pEventReply);
7750 #endif
7751
7752 /*
7753 * Do general / base driver event processing
7754 */
7755 switch(event) {
7756 case MPI_EVENT_EVENT_CHANGE: /* 0A */
7757 if (evDataLen) {
7758 u8 evState = evData0 & 0xFF;
7759
7760 /* CHECKME! What if evState unexpectedly says OFF (0)? */
7761
7762 /* Update EventState field in cached IocFacts */
7763 if (ioc->facts.Function) {
7764 ioc->facts.EventState = evState;
7765 }
7766 }
7767 break;
7768 case MPI_EVENT_INTEGRATED_RAID:
7769 mptbase_raid_process_event_data(ioc,
7770 (MpiEventDataRaid_t *)pEventReply->Data);
7771 break;
7772 default:
7773 break;
7774 }
7775
7776 /*
7777 * Should this event be logged? Events are written sequentially.
7778 * When buffer is full, start again at the top.
7779 */
7780 if (ioc->events && (ioc->eventTypes & ( 1 << event))) {
7781 int idx;
7782
7783 idx = ioc->eventContext % MPTCTL_EVENT_LOG_SIZE;
7784
7785 ioc->events[idx].event = event;
7786 ioc->events[idx].eventContext = ioc->eventContext;
7787
7788 for (ii = 0; ii < 2; ii++) {
7789 if (ii < evDataLen)
7790 ioc->events[idx].data[ii] = le32_to_cpu(pEventReply->Data[ii]);
7791 else
7792 ioc->events[idx].data[ii] = 0;
7793 }
7794
7795 ioc->eventContext++;
7796 }
7797
7798
7799 /*
7800 * Call each currently registered protocol event handler.
7801 */
7802 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7803 if (MptEvHandlers[cb_idx]) {
7804 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7805 "Routing Event to event handler #%d\n",
7806 ioc->name, cb_idx));
7807 r += (*(MptEvHandlers[cb_idx]))(ioc, pEventReply);
7808 handlers++;
7809 }
7810 }
7811 /* FIXME? Examine results here? */
7812
7813 /*
7814 * If needed, send (a single) EventAck.
7815 */
7816 if (pEventReply->AckRequired == MPI_EVENT_NOTIFICATION_ACK_REQUIRED) {
7817 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7818 "EventAck required\n",ioc->name));
7819 if ((ii = SendEventAck(ioc, pEventReply)) != 0) {
7820 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SendEventAck returned %d\n",
7821 ioc->name, ii));
7822 }
7823 }
7824
7825 *evHandlers = handlers;
7826 return r;
7827 }
7828
7829 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7830 /**
7831 * mpt_fc_log_info - Log information returned from Fibre Channel IOC.
7832 * @ioc: Pointer to MPT_ADAPTER structure
7833 * @log_info: U32 LogInfo reply word from the IOC
7834 *
7835 * Refer to lsi/mpi_log_fc.h.
7836 */
7837 static void
7838 mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info)
7839 {
7840 char *desc = "unknown";
7841
7842 switch (log_info & 0xFF000000) {
7843 case MPI_IOCLOGINFO_FC_INIT_BASE:
7844 desc = "FCP Initiator";
7845 break;
7846 case MPI_IOCLOGINFO_FC_TARGET_BASE:
7847 desc = "FCP Target";
7848 break;
7849 case MPI_IOCLOGINFO_FC_LAN_BASE:
7850 desc = "LAN";
7851 break;
7852 case MPI_IOCLOGINFO_FC_MSG_BASE:
7853 desc = "MPI Message Layer";
7854 break;
7855 case MPI_IOCLOGINFO_FC_LINK_BASE:
7856 desc = "FC Link";
7857 break;
7858 case MPI_IOCLOGINFO_FC_CTX_BASE:
7859 desc = "Context Manager";
7860 break;
7861 case MPI_IOCLOGINFO_FC_INVALID_FIELD_BYTE_OFFSET:
7862 desc = "Invalid Field Offset";
7863 break;
7864 case MPI_IOCLOGINFO_FC_STATE_CHANGE:
7865 desc = "State Change Info";
7866 break;
7867 }
7868
7869 printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): SubClass={%s}, Value=(0x%06x)\n",
7870 ioc->name, log_info, desc, (log_info & 0xFFFFFF));
7871 }
7872
7873 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7874 /**
7875 * mpt_spi_log_info - Log information returned from SCSI Parallel IOC.
7876 * @ioc: Pointer to MPT_ADAPTER structure
7877 * @log_info: U32 LogInfo word from the IOC
7878 *
7879 * Refer to lsi/sp_log.h.
7880 */
7881 static void
7882 mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info)
7883 {
7884 u32 info = log_info & 0x00FF0000;
7885 char *desc = "unknown";
7886
7887 switch (info) {
7888 case 0x00010000:
7889 desc = "bug! MID not found";
7890 break;
7891
7892 case 0x00020000:
7893 desc = "Parity Error";
7894 break;
7895
7896 case 0x00030000:
7897 desc = "ASYNC Outbound Overrun";
7898 break;
7899
7900 case 0x00040000:
7901 desc = "SYNC Offset Error";
7902 break;
7903
7904 case 0x00050000:
7905 desc = "BM Change";
7906 break;
7907
7908 case 0x00060000:
7909 desc = "Msg In Overflow";
7910 break;
7911
7912 case 0x00070000:
7913 desc = "DMA Error";
7914 break;
7915
7916 case 0x00080000:
7917 desc = "Outbound DMA Overrun";
7918 break;
7919
7920 case 0x00090000:
7921 desc = "Task Management";
7922 break;
7923
7924 case 0x000A0000:
7925 desc = "Device Problem";
7926 break;
7927
7928 case 0x000B0000:
7929 desc = "Invalid Phase Change";
7930 break;
7931
7932 case 0x000C0000:
7933 desc = "Untagged Table Size";
7934 break;
7935
7936 }
7937
7938 printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): F/W: %s\n", ioc->name, log_info, desc);
7939 }
7940
7941 /* strings for sas loginfo */
7942 static char *originator_str[] = {
7943 "IOP", /* 00h */
7944 "PL", /* 01h */
7945 "IR" /* 02h */
7946 };
7947 static char *iop_code_str[] = {
7948 NULL, /* 00h */
7949 "Invalid SAS Address", /* 01h */
7950 NULL, /* 02h */
7951 "Invalid Page", /* 03h */
7952 "Diag Message Error", /* 04h */
7953 "Task Terminated", /* 05h */
7954 "Enclosure Management", /* 06h */
7955 "Target Mode" /* 07h */
7956 };
7957 static char *pl_code_str[] = {
7958 NULL, /* 00h */
7959 "Open Failure", /* 01h */
7960 "Invalid Scatter Gather List", /* 02h */
7961 "Wrong Relative Offset or Frame Length", /* 03h */
7962 "Frame Transfer Error", /* 04h */
7963 "Transmit Frame Connected Low", /* 05h */
7964 "SATA Non-NCQ RW Error Bit Set", /* 06h */
7965 "SATA Read Log Receive Data Error", /* 07h */
7966 "SATA NCQ Fail All Commands After Error", /* 08h */
7967 "SATA Error in Receive Set Device Bit FIS", /* 09h */
7968 "Receive Frame Invalid Message", /* 0Ah */
7969 "Receive Context Message Valid Error", /* 0Bh */
7970 "Receive Frame Current Frame Error", /* 0Ch */
7971 "SATA Link Down", /* 0Dh */
7972 "Discovery SATA Init W IOS", /* 0Eh */
7973 "Config Invalid Page", /* 0Fh */
7974 "Discovery SATA Init Timeout", /* 10h */
7975 "Reset", /* 11h */
7976 "Abort", /* 12h */
7977 "IO Not Yet Executed", /* 13h */
7978 "IO Executed", /* 14h */
7979 "Persistent Reservation Out Not Affiliation "
7980 "Owner", /* 15h */
7981 "Open Transmit DMA Abort", /* 16h */
7982 "IO Device Missing Delay Retry", /* 17h */
7983 "IO Cancelled Due to Receive Error", /* 18h */
7984 NULL, /* 19h */
7985 NULL, /* 1Ah */
7986 NULL, /* 1Bh */
7987 NULL, /* 1Ch */
7988 NULL, /* 1Dh */
7989 NULL, /* 1Eh */
7990 NULL, /* 1Fh */
7991 "Enclosure Management" /* 20h */
7992 };
7993 static char *ir_code_str[] = {
7994 "Raid Action Error", /* 00h */
7995 NULL, /* 00h */
7996 NULL, /* 01h */
7997 NULL, /* 02h */
7998 NULL, /* 03h */
7999 NULL, /* 04h */
8000 NULL, /* 05h */
8001 NULL, /* 06h */
8002 NULL /* 07h */
8003 };
8004 static char *raid_sub_code_str[] = {
8005 NULL, /* 00h */
8006 "Volume Creation Failed: Data Passed too "
8007 "Large", /* 01h */
8008 "Volume Creation Failed: Duplicate Volumes "
8009 "Attempted", /* 02h */
8010 "Volume Creation Failed: Max Number "
8011 "Supported Volumes Exceeded", /* 03h */
8012 "Volume Creation Failed: DMA Error", /* 04h */
8013 "Volume Creation Failed: Invalid Volume Type", /* 05h */
8014 "Volume Creation Failed: Error Reading "
8015 "MFG Page 4", /* 06h */
8016 "Volume Creation Failed: Creating Internal "
8017 "Structures", /* 07h */
8018 NULL, /* 08h */
8019 NULL, /* 09h */
8020 NULL, /* 0Ah */
8021 NULL, /* 0Bh */
8022 NULL, /* 0Ch */
8023 NULL, /* 0Dh */
8024 NULL, /* 0Eh */
8025 NULL, /* 0Fh */
8026 "Activation failed: Already Active Volume", /* 10h */
8027 "Activation failed: Unsupported Volume Type", /* 11h */
8028 "Activation failed: Too Many Active Volumes", /* 12h */
8029 "Activation failed: Volume ID in Use", /* 13h */
8030 "Activation failed: Reported Failure", /* 14h */
8031 "Activation failed: Importing a Volume", /* 15h */
8032 NULL, /* 16h */
8033 NULL, /* 17h */
8034 NULL, /* 18h */
8035 NULL, /* 19h */
8036 NULL, /* 1Ah */
8037 NULL, /* 1Bh */
8038 NULL, /* 1Ch */
8039 NULL, /* 1Dh */
8040 NULL, /* 1Eh */
8041 NULL, /* 1Fh */
8042 "Phys Disk failed: Too Many Phys Disks", /* 20h */
8043 "Phys Disk failed: Data Passed too Large", /* 21h */
8044 "Phys Disk failed: DMA Error", /* 22h */
8045 "Phys Disk failed: Invalid <channel:id>", /* 23h */
8046 "Phys Disk failed: Creating Phys Disk Config "
8047 "Page", /* 24h */
8048 NULL, /* 25h */
8049 NULL, /* 26h */
8050 NULL, /* 27h */
8051 NULL, /* 28h */
8052 NULL, /* 29h */
8053 NULL, /* 2Ah */
8054 NULL, /* 2Bh */
8055 NULL, /* 2Ch */
8056 NULL, /* 2Dh */
8057 NULL, /* 2Eh */
8058 NULL, /* 2Fh */
8059 "Compatibility Error: IR Disabled", /* 30h */
8060 "Compatibility Error: Inquiry Command Failed", /* 31h */
8061 "Compatibility Error: Device not Direct Access "
8062 "Device ", /* 32h */
8063 "Compatibility Error: Removable Device Found", /* 33h */
8064 "Compatibility Error: Device SCSI Version not "
8065 "2 or Higher", /* 34h */
8066 "Compatibility Error: SATA Device, 48 BIT LBA "
8067 "not Supported", /* 35h */
8068 "Compatibility Error: Device doesn't have "
8069 "512 Byte Block Sizes", /* 36h */
8070 "Compatibility Error: Volume Type Check Failed", /* 37h */
8071 "Compatibility Error: Volume Type is "
8072 "Unsupported by FW", /* 38h */
8073 "Compatibility Error: Disk Drive too Small for "
8074 "use in Volume", /* 39h */
8075 "Compatibility Error: Phys Disk for Create "
8076 "Volume not Found", /* 3Ah */
8077 "Compatibility Error: Too Many or too Few "
8078 "Disks for Volume Type", /* 3Bh */
8079 "Compatibility Error: Disk stripe Sizes "
8080 "Must be 64KB", /* 3Ch */
8081 "Compatibility Error: IME Size Limited to < 2TB", /* 3Dh */
8082 };
8083
8084 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8085 /**
8086 * mpt_sas_log_info - Log information returned from SAS IOC.
8087 * @ioc: Pointer to MPT_ADAPTER structure
8088 * @log_info: U32 LogInfo reply word from the IOC
8089 * @cb_idx: callback function's handle
8090 *
8091 * Refer to lsi/mpi_log_sas.h.
8092 **/
8093 static void
8094 mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info, u8 cb_idx)
8095 {
8096 union loginfo_type {
8097 u32 loginfo;
8098 struct {
8099 u32 subcode:16;
8100 u32 code:8;
8101 u32 originator:4;
8102 u32 bus_type:4;
8103 }dw;
8104 };
8105 union loginfo_type sas_loginfo;
8106 char *originator_desc = NULL;
8107 char *code_desc = NULL;
8108 char *sub_code_desc = NULL;
8109
8110 sas_loginfo.loginfo = log_info;
8111 if ((sas_loginfo.dw.bus_type != 3 /*SAS*/) &&
8112 (sas_loginfo.dw.originator < ARRAY_SIZE(originator_str)))
8113 return;
8114
8115 originator_desc = originator_str[sas_loginfo.dw.originator];
8116
8117 switch (sas_loginfo.dw.originator) {
8118
8119 case 0: /* IOP */
8120 if (sas_loginfo.dw.code <
8121 ARRAY_SIZE(iop_code_str))
8122 code_desc = iop_code_str[sas_loginfo.dw.code];
8123 break;
8124 case 1: /* PL */
8125 if (sas_loginfo.dw.code <
8126 ARRAY_SIZE(pl_code_str))
8127 code_desc = pl_code_str[sas_loginfo.dw.code];
8128 break;
8129 case 2: /* IR */
8130 if (sas_loginfo.dw.code >=
8131 ARRAY_SIZE(ir_code_str))
8132 break;
8133 code_desc = ir_code_str[sas_loginfo.dw.code];
8134 if (sas_loginfo.dw.subcode >=
8135 ARRAY_SIZE(raid_sub_code_str))
8136 break;
8137 if (sas_loginfo.dw.code == 0)
8138 sub_code_desc =
8139 raid_sub_code_str[sas_loginfo.dw.subcode];
8140 break;
8141 default:
8142 return;
8143 }
8144
8145 if (sub_code_desc != NULL)
8146 printk(MYIOC_s_INFO_FMT
8147 "LogInfo(0x%08x): Originator={%s}, Code={%s},"
8148 " SubCode={%s} cb_idx %s\n",
8149 ioc->name, log_info, originator_desc, code_desc,
8150 sub_code_desc, MptCallbacksName[cb_idx]);
8151 else if (code_desc != NULL)
8152 printk(MYIOC_s_INFO_FMT
8153 "LogInfo(0x%08x): Originator={%s}, Code={%s},"
8154 " SubCode(0x%04x) cb_idx %s\n",
8155 ioc->name, log_info, originator_desc, code_desc,
8156 sas_loginfo.dw.subcode, MptCallbacksName[cb_idx]);
8157 else
8158 printk(MYIOC_s_INFO_FMT
8159 "LogInfo(0x%08x): Originator={%s}, Code=(0x%02x),"
8160 " SubCode(0x%04x) cb_idx %s\n",
8161 ioc->name, log_info, originator_desc,
8162 sas_loginfo.dw.code, sas_loginfo.dw.subcode,
8163 MptCallbacksName[cb_idx]);
8164 }
8165
8166 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8167 /**
8168 * mpt_iocstatus_info_config - IOCSTATUS information for config pages
8169 * @ioc: Pointer to MPT_ADAPTER structure
8170 * @ioc_status: U32 IOCStatus word from IOC
8171 * @mf: Pointer to MPT request frame
8172 *
8173 * Refer to lsi/mpi.h.
8174 **/
8175 static void
8176 mpt_iocstatus_info_config(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
8177 {
8178 Config_t *pReq = (Config_t *)mf;
8179 char extend_desc[EVENT_DESCR_STR_SZ];
8180 char *desc = NULL;
8181 u32 form;
8182 u8 page_type;
8183
8184 if (pReq->Header.PageType == MPI_CONFIG_PAGETYPE_EXTENDED)
8185 page_type = pReq->ExtPageType;
8186 else
8187 page_type = pReq->Header.PageType;
8188
8189 /*
8190 * ignore invalid page messages for GET_NEXT_HANDLE
8191 */
8192 form = le32_to_cpu(pReq->PageAddress);
8193 if (ioc_status == MPI_IOCSTATUS_CONFIG_INVALID_PAGE) {
8194 if (page_type == MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE ||
8195 page_type == MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER ||
8196 page_type == MPI_CONFIG_EXTPAGETYPE_ENCLOSURE) {
8197 if ((form >> MPI_SAS_DEVICE_PGAD_FORM_SHIFT) ==
8198 MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE)
8199 return;
8200 }
8201 if (page_type == MPI_CONFIG_PAGETYPE_FC_DEVICE)
8202 if ((form & MPI_FC_DEVICE_PGAD_FORM_MASK) ==
8203 MPI_FC_DEVICE_PGAD_FORM_NEXT_DID)
8204 return;
8205 }
8206
8207 snprintf(extend_desc, EVENT_DESCR_STR_SZ,
8208 "type=%02Xh, page=%02Xh, action=%02Xh, form=%08Xh",
8209 page_type, pReq->Header.PageNumber, pReq->Action, form);
8210
8211 switch (ioc_status) {
8212
8213 case MPI_IOCSTATUS_CONFIG_INVALID_ACTION: /* 0x0020 */
8214 desc = "Config Page Invalid Action";
8215 break;
8216
8217 case MPI_IOCSTATUS_CONFIG_INVALID_TYPE: /* 0x0021 */
8218 desc = "Config Page Invalid Type";
8219 break;
8220
8221 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: /* 0x0022 */
8222 desc = "Config Page Invalid Page";
8223 break;
8224
8225 case MPI_IOCSTATUS_CONFIG_INVALID_DATA: /* 0x0023 */
8226 desc = "Config Page Invalid Data";
8227 break;
8228
8229 case MPI_IOCSTATUS_CONFIG_NO_DEFAULTS: /* 0x0024 */
8230 desc = "Config Page No Defaults";
8231 break;
8232
8233 case MPI_IOCSTATUS_CONFIG_CANT_COMMIT: /* 0x0025 */
8234 desc = "Config Page Can't Commit";
8235 break;
8236 }
8237
8238 if (!desc)
8239 return;
8240
8241 dreplyprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOCStatus(0x%04X): %s: %s\n",
8242 ioc->name, ioc_status, desc, extend_desc));
8243 }
8244
8245 /**
8246 * mpt_iocstatus_info - IOCSTATUS information returned from IOC.
8247 * @ioc: Pointer to MPT_ADAPTER structure
8248 * @ioc_status: U32 IOCStatus word from IOC
8249 * @mf: Pointer to MPT request frame
8250 *
8251 * Refer to lsi/mpi.h.
8252 **/
8253 static void
8254 mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
8255 {
8256 u32 status = ioc_status & MPI_IOCSTATUS_MASK;
8257 char *desc = NULL;
8258
8259 switch (status) {
8260
8261 /****************************************************************************/
8262 /* Common IOCStatus values for all replies */
8263 /****************************************************************************/
8264
8265 case MPI_IOCSTATUS_INVALID_FUNCTION: /* 0x0001 */
8266 desc = "Invalid Function";
8267 break;
8268
8269 case MPI_IOCSTATUS_BUSY: /* 0x0002 */
8270 desc = "Busy";
8271 break;
8272
8273 case MPI_IOCSTATUS_INVALID_SGL: /* 0x0003 */
8274 desc = "Invalid SGL";
8275 break;
8276
8277 case MPI_IOCSTATUS_INTERNAL_ERROR: /* 0x0004 */
8278 desc = "Internal Error";
8279 break;
8280
8281 case MPI_IOCSTATUS_RESERVED: /* 0x0005 */
8282 desc = "Reserved";
8283 break;
8284
8285 case MPI_IOCSTATUS_INSUFFICIENT_RESOURCES: /* 0x0006 */
8286 desc = "Insufficient Resources";
8287 break;
8288
8289 case MPI_IOCSTATUS_INVALID_FIELD: /* 0x0007 */
8290 desc = "Invalid Field";
8291 break;
8292
8293 case MPI_IOCSTATUS_INVALID_STATE: /* 0x0008 */
8294 desc = "Invalid State";
8295 break;
8296
8297 /****************************************************************************/
8298 /* Config IOCStatus values */
8299 /****************************************************************************/
8300
8301 case MPI_IOCSTATUS_CONFIG_INVALID_ACTION: /* 0x0020 */
8302 case MPI_IOCSTATUS_CONFIG_INVALID_TYPE: /* 0x0021 */
8303 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: /* 0x0022 */
8304 case MPI_IOCSTATUS_CONFIG_INVALID_DATA: /* 0x0023 */
8305 case MPI_IOCSTATUS_CONFIG_NO_DEFAULTS: /* 0x0024 */
8306 case MPI_IOCSTATUS_CONFIG_CANT_COMMIT: /* 0x0025 */
8307 mpt_iocstatus_info_config(ioc, status, mf);
8308 break;
8309
8310 /****************************************************************************/
8311 /* SCSIIO Reply (SPI, FCP, SAS) initiator values */
8312 /* */
8313 /* Look at mptscsih_iocstatus_info_scsiio in mptscsih.c */
8314 /* */
8315 /****************************************************************************/
8316
8317 case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: /* 0x0040 */
8318 case MPI_IOCSTATUS_SCSI_DATA_UNDERRUN: /* 0x0045 */
8319 case MPI_IOCSTATUS_SCSI_INVALID_BUS: /* 0x0041 */
8320 case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: /* 0x0042 */
8321 case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: /* 0x0043 */
8322 case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */
8323 case MPI_IOCSTATUS_SCSI_IO_DATA_ERROR: /* 0x0046 */
8324 case MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR: /* 0x0047 */
8325 case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */
8326 case MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: /* 0x0049 */
8327 case MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED: /* 0x004A */
8328 case MPI_IOCSTATUS_SCSI_IOC_TERMINATED: /* 0x004B */
8329 case MPI_IOCSTATUS_SCSI_EXT_TERMINATED: /* 0x004C */
8330 break;
8331
8332 /****************************************************************************/
8333 /* SCSI Target values */
8334 /****************************************************************************/
8335
8336 case MPI_IOCSTATUS_TARGET_PRIORITY_IO: /* 0x0060 */
8337 desc = "Target: Priority IO";
8338 break;
8339
8340 case MPI_IOCSTATUS_TARGET_INVALID_PORT: /* 0x0061 */
8341 desc = "Target: Invalid Port";
8342 break;
8343
8344 case MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX: /* 0x0062 */
8345 desc = "Target Invalid IO Index:";
8346 break;
8347
8348 case MPI_IOCSTATUS_TARGET_ABORTED: /* 0x0063 */
8349 desc = "Target: Aborted";
8350 break;
8351
8352 case MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: /* 0x0064 */
8353 desc = "Target: No Conn Retryable";
8354 break;
8355
8356 case MPI_IOCSTATUS_TARGET_NO_CONNECTION: /* 0x0065 */
8357 desc = "Target: No Connection";
8358 break;
8359
8360 case MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: /* 0x006A */
8361 desc = "Target: Transfer Count Mismatch";
8362 break;
8363
8364 case MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT: /* 0x006B */
8365 desc = "Target: STS Data not Sent";
8366 break;
8367
8368 case MPI_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: /* 0x006D */
8369 desc = "Target: Data Offset Error";
8370 break;
8371
8372 case MPI_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: /* 0x006E */
8373 desc = "Target: Too Much Write Data";
8374 break;
8375
8376 case MPI_IOCSTATUS_TARGET_IU_TOO_SHORT: /* 0x006F */
8377 desc = "Target: IU Too Short";
8378 break;
8379
8380 case MPI_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: /* 0x0070 */
8381 desc = "Target: ACK NAK Timeout";
8382 break;
8383
8384 case MPI_IOCSTATUS_TARGET_NAK_RECEIVED: /* 0x0071 */
8385 desc = "Target: Nak Received";
8386 break;
8387
8388 /****************************************************************************/
8389 /* Fibre Channel Direct Access values */
8390 /****************************************************************************/
8391
8392 case MPI_IOCSTATUS_FC_ABORTED: /* 0x0066 */
8393 desc = "FC: Aborted";
8394 break;
8395
8396 case MPI_IOCSTATUS_FC_RX_ID_INVALID: /* 0x0067 */
8397 desc = "FC: RX ID Invalid";
8398 break;
8399
8400 case MPI_IOCSTATUS_FC_DID_INVALID: /* 0x0068 */
8401 desc = "FC: DID Invalid";
8402 break;
8403
8404 case MPI_IOCSTATUS_FC_NODE_LOGGED_OUT: /* 0x0069 */
8405 desc = "FC: Node Logged Out";
8406 break;
8407
8408 case MPI_IOCSTATUS_FC_EXCHANGE_CANCELED: /* 0x006C */
8409 desc = "FC: Exchange Canceled";
8410 break;
8411
8412 /****************************************************************************/
8413 /* LAN values */
8414 /****************************************************************************/
8415
8416 case MPI_IOCSTATUS_LAN_DEVICE_NOT_FOUND: /* 0x0080 */
8417 desc = "LAN: Device not Found";
8418 break;
8419
8420 case MPI_IOCSTATUS_LAN_DEVICE_FAILURE: /* 0x0081 */
8421 desc = "LAN: Device Failure";
8422 break;
8423
8424 case MPI_IOCSTATUS_LAN_TRANSMIT_ERROR: /* 0x0082 */
8425 desc = "LAN: Transmit Error";
8426 break;
8427
8428 case MPI_IOCSTATUS_LAN_TRANSMIT_ABORTED: /* 0x0083 */
8429 desc = "LAN: Transmit Aborted";
8430 break;
8431
8432 case MPI_IOCSTATUS_LAN_RECEIVE_ERROR: /* 0x0084 */
8433 desc = "LAN: Receive Error";
8434 break;
8435
8436 case MPI_IOCSTATUS_LAN_RECEIVE_ABORTED: /* 0x0085 */
8437 desc = "LAN: Receive Aborted";
8438 break;
8439
8440 case MPI_IOCSTATUS_LAN_PARTIAL_PACKET: /* 0x0086 */
8441 desc = "LAN: Partial Packet";
8442 break;
8443
8444 case MPI_IOCSTATUS_LAN_CANCELED: /* 0x0087 */
8445 desc = "LAN: Canceled";
8446 break;
8447
8448 /****************************************************************************/
8449 /* Serial Attached SCSI values */
8450 /****************************************************************************/
8451
8452 case MPI_IOCSTATUS_SAS_SMP_REQUEST_FAILED: /* 0x0090 */
8453 desc = "SAS: SMP Request Failed";
8454 break;
8455
8456 case MPI_IOCSTATUS_SAS_SMP_DATA_OVERRUN: /* 0x0090 */
8457 desc = "SAS: SMP Data Overrun";
8458 break;
8459
8460 default:
8461 desc = "Others";
8462 break;
8463 }
8464
8465 if (!desc)
8466 return;
8467
8468 dreplyprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOCStatus(0x%04X): %s\n",
8469 ioc->name, status, desc));
8470 }
8471
8472 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8473 EXPORT_SYMBOL(mpt_attach);
8474 EXPORT_SYMBOL(mpt_detach);
8475 #ifdef CONFIG_PM
8476 EXPORT_SYMBOL(mpt_resume);
8477 EXPORT_SYMBOL(mpt_suspend);
8478 #endif
8479 EXPORT_SYMBOL(ioc_list);
8480 EXPORT_SYMBOL(mpt_register);
8481 EXPORT_SYMBOL(mpt_deregister);
8482 EXPORT_SYMBOL(mpt_event_register);
8483 EXPORT_SYMBOL(mpt_event_deregister);
8484 EXPORT_SYMBOL(mpt_reset_register);
8485 EXPORT_SYMBOL(mpt_reset_deregister);
8486 EXPORT_SYMBOL(mpt_device_driver_register);
8487 EXPORT_SYMBOL(mpt_device_driver_deregister);
8488 EXPORT_SYMBOL(mpt_get_msg_frame);
8489 EXPORT_SYMBOL(mpt_put_msg_frame);
8490 EXPORT_SYMBOL(mpt_put_msg_frame_hi_pri);
8491 EXPORT_SYMBOL(mpt_free_msg_frame);
8492 EXPORT_SYMBOL(mpt_send_handshake_request);
8493 EXPORT_SYMBOL(mpt_verify_adapter);
8494 EXPORT_SYMBOL(mpt_GetIocState);
8495 EXPORT_SYMBOL(mpt_print_ioc_summary);
8496 EXPORT_SYMBOL(mpt_HardResetHandler);
8497 EXPORT_SYMBOL(mpt_config);
8498 EXPORT_SYMBOL(mpt_findImVolumes);
8499 EXPORT_SYMBOL(mpt_alloc_fw_memory);
8500 EXPORT_SYMBOL(mpt_free_fw_memory);
8501 EXPORT_SYMBOL(mptbase_sas_persist_operation);
8502 EXPORT_SYMBOL(mpt_raid_phys_disk_pg0);
8503
8504 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8505 /**
8506 * fusion_init - Fusion MPT base driver initialization routine.
8507 *
8508 * Returns 0 for success, non-zero for failure.
8509 */
8510 static int __init
8511 fusion_init(void)
8512 {
8513 u8 cb_idx;
8514
8515 show_mptmod_ver(my_NAME, my_VERSION);
8516 printk(KERN_INFO COPYRIGHT "\n");
8517
8518 for (cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
8519 MptCallbacks[cb_idx] = NULL;
8520 MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
8521 MptEvHandlers[cb_idx] = NULL;
8522 MptResetHandlers[cb_idx] = NULL;
8523 }
8524
8525 /* Register ourselves (mptbase) in order to facilitate
8526 * EventNotification handling.
8527 */
8528 mpt_base_index = mpt_register(mptbase_reply, MPTBASE_DRIVER,
8529 "mptbase_reply");
8530
8531 /* Register for hard reset handling callbacks.
8532 */
8533 mpt_reset_register(mpt_base_index, mpt_ioc_reset);
8534
8535 #ifdef CONFIG_PROC_FS
8536 (void) procmpt_create();
8537 #endif
8538 return 0;
8539 }
8540
8541 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8542 /**
8543 * fusion_exit - Perform driver unload cleanup.
8544 *
8545 * This routine frees all resources associated with each MPT adapter
8546 * and removes all %MPT_PROCFS_MPTBASEDIR entries.
8547 */
8548 static void __exit
8549 fusion_exit(void)
8550 {
8551
8552 mpt_reset_deregister(mpt_base_index);
8553
8554 #ifdef CONFIG_PROC_FS
8555 procmpt_destroy();
8556 #endif
8557 }
8558
8559 module_init(fusion_init);
8560 module_exit(fusion_exit);
Linux with added FPC-III support