powerpc/eeh: Fix PE#0 check in eeh_add_to_parent_pe()
[linux/fpc-iii.git] / drivers / net / ethernet / sfc / rx.c
blobc0ad95d2f63d9a12cd300aa0420ddda661ccaed1
1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
11 #include <linux/socket.h>
12 #include <linux/in.h>
13 #include <linux/slab.h>
14 #include <linux/ip.h>
15 #include <linux/ipv6.h>
16 #include <linux/tcp.h>
17 #include <linux/udp.h>
18 #include <linux/prefetch.h>
19 #include <linux/moduleparam.h>
20 #include <linux/iommu.h>
21 #include <net/ip.h>
22 #include <net/checksum.h>
23 #include "net_driver.h"
24 #include "efx.h"
25 #include "filter.h"
26 #include "nic.h"
27 #include "selftest.h"
28 #include "workarounds.h"
30 /* Preferred number of descriptors to fill at once */
31 #define EFX_RX_PREFERRED_BATCH 8U
33 /* Number of RX buffers to recycle pages for. When creating the RX page recycle
34 * ring, this number is divided by the number of buffers per page to calculate
35 * the number of pages to store in the RX page recycle ring.
37 #define EFX_RECYCLE_RING_SIZE_IOMMU 4096
38 #define EFX_RECYCLE_RING_SIZE_NOIOMMU (2 * EFX_RX_PREFERRED_BATCH)
40 /* Size of buffer allocated for skb header area. */
41 #define EFX_SKB_HEADERS 128u
43 /* This is the percentage fill level below which new RX descriptors
44 * will be added to the RX descriptor ring.
46 static unsigned int rx_refill_threshold;
48 /* Each packet can consume up to ceil(max_frame_len / buffer_size) buffers */
49 #define EFX_RX_MAX_FRAGS DIV_ROUND_UP(EFX_MAX_FRAME_LEN(EFX_MAX_MTU), \
50 EFX_RX_USR_BUF_SIZE)
53 * RX maximum head room required.
55 * This must be at least 1 to prevent overflow, plus one packet-worth
56 * to allow pipelined receives.
58 #define EFX_RXD_HEAD_ROOM (1 + EFX_RX_MAX_FRAGS)
60 static inline u8 *efx_rx_buf_va(struct efx_rx_buffer *buf)
62 return page_address(buf->page) + buf->page_offset;
65 static inline u32 efx_rx_buf_hash(struct efx_nic *efx, const u8 *eh)
67 #if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS)
68 return __le32_to_cpup((const __le32 *)(eh + efx->rx_packet_hash_offset));
69 #else
70 const u8 *data = eh + efx->rx_packet_hash_offset;
71 return (u32)data[0] |
72 (u32)data[1] << 8 |
73 (u32)data[2] << 16 |
74 (u32)data[3] << 24;
75 #endif
78 static inline struct efx_rx_buffer *
79 efx_rx_buf_next(struct efx_rx_queue *rx_queue, struct efx_rx_buffer *rx_buf)
81 if (unlikely(rx_buf == efx_rx_buffer(rx_queue, rx_queue->ptr_mask)))
82 return efx_rx_buffer(rx_queue, 0);
83 else
84 return rx_buf + 1;
87 static inline void efx_sync_rx_buffer(struct efx_nic *efx,
88 struct efx_rx_buffer *rx_buf,
89 unsigned int len)
91 dma_sync_single_for_cpu(&efx->pci_dev->dev, rx_buf->dma_addr, len,
92 DMA_FROM_DEVICE);
95 void efx_rx_config_page_split(struct efx_nic *efx)
97 efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + efx->rx_ip_align,
98 EFX_RX_BUF_ALIGNMENT);
99 efx->rx_bufs_per_page = efx->rx_buffer_order ? 1 :
100 ((PAGE_SIZE - sizeof(struct efx_rx_page_state)) /
101 efx->rx_page_buf_step);
102 efx->rx_buffer_truesize = (PAGE_SIZE << efx->rx_buffer_order) /
103 efx->rx_bufs_per_page;
104 efx->rx_pages_per_batch = DIV_ROUND_UP(EFX_RX_PREFERRED_BATCH,
105 efx->rx_bufs_per_page);
108 /* Check the RX page recycle ring for a page that can be reused. */
109 static struct page *efx_reuse_page(struct efx_rx_queue *rx_queue)
111 struct efx_nic *efx = rx_queue->efx;
112 struct page *page;
113 struct efx_rx_page_state *state;
114 unsigned index;
116 index = rx_queue->page_remove & rx_queue->page_ptr_mask;
117 page = rx_queue->page_ring[index];
118 if (page == NULL)
119 return NULL;
121 rx_queue->page_ring[index] = NULL;
122 /* page_remove cannot exceed page_add. */
123 if (rx_queue->page_remove != rx_queue->page_add)
124 ++rx_queue->page_remove;
126 /* If page_count is 1 then we hold the only reference to this page. */
127 if (page_count(page) == 1) {
128 ++rx_queue->page_recycle_count;
129 return page;
130 } else {
131 state = page_address(page);
132 dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
133 PAGE_SIZE << efx->rx_buffer_order,
134 DMA_FROM_DEVICE);
135 put_page(page);
136 ++rx_queue->page_recycle_failed;
139 return NULL;
143 * efx_init_rx_buffers - create EFX_RX_BATCH page-based RX buffers
145 * @rx_queue: Efx RX queue
147 * This allocates a batch of pages, maps them for DMA, and populates
148 * struct efx_rx_buffers for each one. Return a negative error code or
149 * 0 on success. If a single page can be used for multiple buffers,
150 * then the page will either be inserted fully, or not at all.
152 static int efx_init_rx_buffers(struct efx_rx_queue *rx_queue, bool atomic)
154 struct efx_nic *efx = rx_queue->efx;
155 struct efx_rx_buffer *rx_buf;
156 struct page *page;
157 unsigned int page_offset;
158 struct efx_rx_page_state *state;
159 dma_addr_t dma_addr;
160 unsigned index, count;
162 count = 0;
163 do {
164 page = efx_reuse_page(rx_queue);
165 if (page == NULL) {
166 page = alloc_pages(__GFP_COLD | __GFP_COMP |
167 (atomic ? GFP_ATOMIC : GFP_KERNEL),
168 efx->rx_buffer_order);
169 if (unlikely(page == NULL))
170 return -ENOMEM;
171 dma_addr =
172 dma_map_page(&efx->pci_dev->dev, page, 0,
173 PAGE_SIZE << efx->rx_buffer_order,
174 DMA_FROM_DEVICE);
175 if (unlikely(dma_mapping_error(&efx->pci_dev->dev,
176 dma_addr))) {
177 __free_pages(page, efx->rx_buffer_order);
178 return -EIO;
180 state = page_address(page);
181 state->dma_addr = dma_addr;
182 } else {
183 state = page_address(page);
184 dma_addr = state->dma_addr;
187 dma_addr += sizeof(struct efx_rx_page_state);
188 page_offset = sizeof(struct efx_rx_page_state);
190 do {
191 index = rx_queue->added_count & rx_queue->ptr_mask;
192 rx_buf = efx_rx_buffer(rx_queue, index);
193 rx_buf->dma_addr = dma_addr + efx->rx_ip_align;
194 rx_buf->page = page;
195 rx_buf->page_offset = page_offset + efx->rx_ip_align;
196 rx_buf->len = efx->rx_dma_len;
197 rx_buf->flags = 0;
198 ++rx_queue->added_count;
199 get_page(page);
200 dma_addr += efx->rx_page_buf_step;
201 page_offset += efx->rx_page_buf_step;
202 } while (page_offset + efx->rx_page_buf_step <= PAGE_SIZE);
204 rx_buf->flags = EFX_RX_BUF_LAST_IN_PAGE;
205 } while (++count < efx->rx_pages_per_batch);
207 return 0;
210 /* Unmap a DMA-mapped page. This function is only called for the final RX
211 * buffer in a page.
213 static void efx_unmap_rx_buffer(struct efx_nic *efx,
214 struct efx_rx_buffer *rx_buf)
216 struct page *page = rx_buf->page;
218 if (page) {
219 struct efx_rx_page_state *state = page_address(page);
220 dma_unmap_page(&efx->pci_dev->dev,
221 state->dma_addr,
222 PAGE_SIZE << efx->rx_buffer_order,
223 DMA_FROM_DEVICE);
227 static void efx_free_rx_buffer(struct efx_rx_buffer *rx_buf)
229 if (rx_buf->page) {
230 put_page(rx_buf->page);
231 rx_buf->page = NULL;
235 /* Attempt to recycle the page if there is an RX recycle ring; the page can
236 * only be added if this is the final RX buffer, to prevent pages being used in
237 * the descriptor ring and appearing in the recycle ring simultaneously.
239 static void efx_recycle_rx_page(struct efx_channel *channel,
240 struct efx_rx_buffer *rx_buf)
242 struct page *page = rx_buf->page;
243 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
244 struct efx_nic *efx = rx_queue->efx;
245 unsigned index;
247 /* Only recycle the page after processing the final buffer. */
248 if (!(rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE))
249 return;
251 index = rx_queue->page_add & rx_queue->page_ptr_mask;
252 if (rx_queue->page_ring[index] == NULL) {
253 unsigned read_index = rx_queue->page_remove &
254 rx_queue->page_ptr_mask;
256 /* The next slot in the recycle ring is available, but
257 * increment page_remove if the read pointer currently
258 * points here.
260 if (read_index == index)
261 ++rx_queue->page_remove;
262 rx_queue->page_ring[index] = page;
263 ++rx_queue->page_add;
264 return;
266 ++rx_queue->page_recycle_full;
267 efx_unmap_rx_buffer(efx, rx_buf);
268 put_page(rx_buf->page);
271 static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
272 struct efx_rx_buffer *rx_buf)
274 /* Release the page reference we hold for the buffer. */
275 if (rx_buf->page)
276 put_page(rx_buf->page);
278 /* If this is the last buffer in a page, unmap and free it. */
279 if (rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE) {
280 efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
281 efx_free_rx_buffer(rx_buf);
283 rx_buf->page = NULL;
286 /* Recycle the pages that are used by buffers that have just been received. */
287 static void efx_recycle_rx_pages(struct efx_channel *channel,
288 struct efx_rx_buffer *rx_buf,
289 unsigned int n_frags)
291 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
293 do {
294 efx_recycle_rx_page(channel, rx_buf);
295 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
296 } while (--n_frags);
299 static void efx_discard_rx_packet(struct efx_channel *channel,
300 struct efx_rx_buffer *rx_buf,
301 unsigned int n_frags)
303 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
305 efx_recycle_rx_pages(channel, rx_buf, n_frags);
307 do {
308 efx_free_rx_buffer(rx_buf);
309 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
310 } while (--n_frags);
314 * efx_fast_push_rx_descriptors - push new RX descriptors quickly
315 * @rx_queue: RX descriptor queue
317 * This will aim to fill the RX descriptor queue up to
318 * @rx_queue->@max_fill. If there is insufficient atomic
319 * memory to do so, a slow fill will be scheduled.
321 * The caller must provide serialisation (none is used here). In practise,
322 * this means this function must run from the NAPI handler, or be called
323 * when NAPI is disabled.
325 void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue, bool atomic)
327 struct efx_nic *efx = rx_queue->efx;
328 unsigned int fill_level, batch_size;
329 int space, rc = 0;
331 if (!rx_queue->refill_enabled)
332 return;
334 /* Calculate current fill level, and exit if we don't need to fill */
335 fill_level = (rx_queue->added_count - rx_queue->removed_count);
336 EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
337 if (fill_level >= rx_queue->fast_fill_trigger)
338 goto out;
340 /* Record minimum fill level */
341 if (unlikely(fill_level < rx_queue->min_fill)) {
342 if (fill_level)
343 rx_queue->min_fill = fill_level;
346 batch_size = efx->rx_pages_per_batch * efx->rx_bufs_per_page;
347 space = rx_queue->max_fill - fill_level;
348 EFX_BUG_ON_PARANOID(space < batch_size);
350 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
351 "RX queue %d fast-filling descriptor ring from"
352 " level %d to level %d\n",
353 efx_rx_queue_index(rx_queue), fill_level,
354 rx_queue->max_fill);
357 do {
358 rc = efx_init_rx_buffers(rx_queue, atomic);
359 if (unlikely(rc)) {
360 /* Ensure that we don't leave the rx queue empty */
361 if (rx_queue->added_count == rx_queue->removed_count)
362 efx_schedule_slow_fill(rx_queue);
363 goto out;
365 } while ((space -= batch_size) >= batch_size);
367 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
368 "RX queue %d fast-filled descriptor ring "
369 "to level %d\n", efx_rx_queue_index(rx_queue),
370 rx_queue->added_count - rx_queue->removed_count);
372 out:
373 if (rx_queue->notified_count != rx_queue->added_count)
374 efx_nic_notify_rx_desc(rx_queue);
377 void efx_rx_slow_fill(unsigned long context)
379 struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context;
381 /* Post an event to cause NAPI to run and refill the queue */
382 efx_nic_generate_fill_event(rx_queue);
383 ++rx_queue->slow_fill_count;
386 static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
387 struct efx_rx_buffer *rx_buf,
388 int len)
390 struct efx_nic *efx = rx_queue->efx;
391 unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
393 if (likely(len <= max_len))
394 return;
396 /* The packet must be discarded, but this is only a fatal error
397 * if the caller indicated it was
399 rx_buf->flags |= EFX_RX_PKT_DISCARD;
401 if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) {
402 if (net_ratelimit())
403 netif_err(efx, rx_err, efx->net_dev,
404 " RX queue %d seriously overlength "
405 "RX event (0x%x > 0x%x+0x%x). Leaking\n",
406 efx_rx_queue_index(rx_queue), len, max_len,
407 efx->type->rx_buffer_padding);
408 efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
409 } else {
410 if (net_ratelimit())
411 netif_err(efx, rx_err, efx->net_dev,
412 " RX queue %d overlength RX event "
413 "(0x%x > 0x%x)\n",
414 efx_rx_queue_index(rx_queue), len, max_len);
417 efx_rx_queue_channel(rx_queue)->n_rx_overlength++;
420 /* Pass a received packet up through GRO. GRO can handle pages
421 * regardless of checksum state and skbs with a good checksum.
423 static void
424 efx_rx_packet_gro(struct efx_channel *channel, struct efx_rx_buffer *rx_buf,
425 unsigned int n_frags, u8 *eh)
427 struct napi_struct *napi = &channel->napi_str;
428 gro_result_t gro_result;
429 struct efx_nic *efx = channel->efx;
430 struct sk_buff *skb;
432 skb = napi_get_frags(napi);
433 if (unlikely(!skb)) {
434 while (n_frags--) {
435 put_page(rx_buf->page);
436 rx_buf->page = NULL;
437 rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
439 return;
442 if (efx->net_dev->features & NETIF_F_RXHASH)
443 skb_set_hash(skb, efx_rx_buf_hash(efx, eh),
444 PKT_HASH_TYPE_L3);
445 skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ?
446 CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
448 for (;;) {
449 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
450 rx_buf->page, rx_buf->page_offset,
451 rx_buf->len);
452 rx_buf->page = NULL;
453 skb->len += rx_buf->len;
454 if (skb_shinfo(skb)->nr_frags == n_frags)
455 break;
457 rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
460 skb->data_len = skb->len;
461 skb->truesize += n_frags * efx->rx_buffer_truesize;
463 skb_record_rx_queue(skb, channel->rx_queue.core_index);
465 skb_mark_napi_id(skb, &channel->napi_str);
466 gro_result = napi_gro_frags(napi);
467 if (gro_result != GRO_DROP)
468 channel->irq_mod_score += 2;
471 /* Allocate and construct an SKB around page fragments */
472 static struct sk_buff *efx_rx_mk_skb(struct efx_channel *channel,
473 struct efx_rx_buffer *rx_buf,
474 unsigned int n_frags,
475 u8 *eh, int hdr_len)
477 struct efx_nic *efx = channel->efx;
478 struct sk_buff *skb;
480 /* Allocate an SKB to store the headers */
481 skb = netdev_alloc_skb(efx->net_dev,
482 efx->rx_ip_align + efx->rx_prefix_size +
483 hdr_len);
484 if (unlikely(skb == NULL)) {
485 atomic_inc(&efx->n_rx_noskb_drops);
486 return NULL;
489 EFX_BUG_ON_PARANOID(rx_buf->len < hdr_len);
491 memcpy(skb->data + efx->rx_ip_align, eh - efx->rx_prefix_size,
492 efx->rx_prefix_size + hdr_len);
493 skb_reserve(skb, efx->rx_ip_align + efx->rx_prefix_size);
494 __skb_put(skb, hdr_len);
496 /* Append the remaining page(s) onto the frag list */
497 if (rx_buf->len > hdr_len) {
498 rx_buf->page_offset += hdr_len;
499 rx_buf->len -= hdr_len;
501 for (;;) {
502 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
503 rx_buf->page, rx_buf->page_offset,
504 rx_buf->len);
505 rx_buf->page = NULL;
506 skb->len += rx_buf->len;
507 skb->data_len += rx_buf->len;
508 if (skb_shinfo(skb)->nr_frags == n_frags)
509 break;
511 rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
513 } else {
514 __free_pages(rx_buf->page, efx->rx_buffer_order);
515 rx_buf->page = NULL;
516 n_frags = 0;
519 skb->truesize += n_frags * efx->rx_buffer_truesize;
521 /* Move past the ethernet header */
522 skb->protocol = eth_type_trans(skb, efx->net_dev);
524 skb_mark_napi_id(skb, &channel->napi_str);
526 return skb;
529 void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
530 unsigned int n_frags, unsigned int len, u16 flags)
532 struct efx_nic *efx = rx_queue->efx;
533 struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
534 struct efx_rx_buffer *rx_buf;
536 rx_queue->rx_packets++;
538 rx_buf = efx_rx_buffer(rx_queue, index);
539 rx_buf->flags |= flags;
541 /* Validate the number of fragments and completed length */
542 if (n_frags == 1) {
543 if (!(flags & EFX_RX_PKT_PREFIX_LEN))
544 efx_rx_packet__check_len(rx_queue, rx_buf, len);
545 } else if (unlikely(n_frags > EFX_RX_MAX_FRAGS) ||
546 unlikely(len <= (n_frags - 1) * efx->rx_dma_len) ||
547 unlikely(len > n_frags * efx->rx_dma_len) ||
548 unlikely(!efx->rx_scatter)) {
549 /* If this isn't an explicit discard request, either
550 * the hardware or the driver is broken.
552 WARN_ON(!(len == 0 && rx_buf->flags & EFX_RX_PKT_DISCARD));
553 rx_buf->flags |= EFX_RX_PKT_DISCARD;
556 netif_vdbg(efx, rx_status, efx->net_dev,
557 "RX queue %d received ids %x-%x len %d %s%s\n",
558 efx_rx_queue_index(rx_queue), index,
559 (index + n_frags - 1) & rx_queue->ptr_mask, len,
560 (rx_buf->flags & EFX_RX_PKT_CSUMMED) ? " [SUMMED]" : "",
561 (rx_buf->flags & EFX_RX_PKT_DISCARD) ? " [DISCARD]" : "");
563 /* Discard packet, if instructed to do so. Process the
564 * previous receive first.
566 if (unlikely(rx_buf->flags & EFX_RX_PKT_DISCARD)) {
567 efx_rx_flush_packet(channel);
568 efx_discard_rx_packet(channel, rx_buf, n_frags);
569 return;
572 if (n_frags == 1 && !(flags & EFX_RX_PKT_PREFIX_LEN))
573 rx_buf->len = len;
575 /* Release and/or sync the DMA mapping - assumes all RX buffers
576 * consumed in-order per RX queue.
578 efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
580 /* Prefetch nice and early so data will (hopefully) be in cache by
581 * the time we look at it.
583 prefetch(efx_rx_buf_va(rx_buf));
585 rx_buf->page_offset += efx->rx_prefix_size;
586 rx_buf->len -= efx->rx_prefix_size;
588 if (n_frags > 1) {
589 /* Release/sync DMA mapping for additional fragments.
590 * Fix length for last fragment.
592 unsigned int tail_frags = n_frags - 1;
594 for (;;) {
595 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
596 if (--tail_frags == 0)
597 break;
598 efx_sync_rx_buffer(efx, rx_buf, efx->rx_dma_len);
600 rx_buf->len = len - (n_frags - 1) * efx->rx_dma_len;
601 efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
604 /* All fragments have been DMA-synced, so recycle pages. */
605 rx_buf = efx_rx_buffer(rx_queue, index);
606 efx_recycle_rx_pages(channel, rx_buf, n_frags);
608 /* Pipeline receives so that we give time for packet headers to be
609 * prefetched into cache.
611 efx_rx_flush_packet(channel);
612 channel->rx_pkt_n_frags = n_frags;
613 channel->rx_pkt_index = index;
616 static void efx_rx_deliver(struct efx_channel *channel, u8 *eh,
617 struct efx_rx_buffer *rx_buf,
618 unsigned int n_frags)
620 struct sk_buff *skb;
621 u16 hdr_len = min_t(u16, rx_buf->len, EFX_SKB_HEADERS);
623 skb = efx_rx_mk_skb(channel, rx_buf, n_frags, eh, hdr_len);
624 if (unlikely(skb == NULL)) {
625 efx_free_rx_buffer(rx_buf);
626 return;
628 skb_record_rx_queue(skb, channel->rx_queue.core_index);
630 /* Set the SKB flags */
631 skb_checksum_none_assert(skb);
632 if (likely(rx_buf->flags & EFX_RX_PKT_CSUMMED))
633 skb->ip_summed = CHECKSUM_UNNECESSARY;
635 efx_rx_skb_attach_timestamp(channel, skb);
637 if (channel->type->receive_skb)
638 if (channel->type->receive_skb(channel, skb))
639 return;
641 /* Pass the packet up */
642 netif_receive_skb(skb);
645 /* Handle a received packet. Second half: Touches packet payload. */
646 void __efx_rx_packet(struct efx_channel *channel)
648 struct efx_nic *efx = channel->efx;
649 struct efx_rx_buffer *rx_buf =
650 efx_rx_buffer(&channel->rx_queue, channel->rx_pkt_index);
651 u8 *eh = efx_rx_buf_va(rx_buf);
653 /* Read length from the prefix if necessary. This already
654 * excludes the length of the prefix itself.
656 if (rx_buf->flags & EFX_RX_PKT_PREFIX_LEN)
657 rx_buf->len = le16_to_cpup((__le16 *)
658 (eh + efx->rx_packet_len_offset));
660 /* If we're in loopback test, then pass the packet directly to the
661 * loopback layer, and free the rx_buf here
663 if (unlikely(efx->loopback_selftest)) {
664 efx_loopback_rx_packet(efx, eh, rx_buf->len);
665 efx_free_rx_buffer(rx_buf);
666 goto out;
669 if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM)))
670 rx_buf->flags &= ~EFX_RX_PKT_CSUMMED;
672 if ((rx_buf->flags & EFX_RX_PKT_TCP) && !channel->type->receive_skb &&
673 !efx_channel_busy_polling(channel))
674 efx_rx_packet_gro(channel, rx_buf, channel->rx_pkt_n_frags, eh);
675 else
676 efx_rx_deliver(channel, eh, rx_buf, channel->rx_pkt_n_frags);
677 out:
678 channel->rx_pkt_n_frags = 0;
681 int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
683 struct efx_nic *efx = rx_queue->efx;
684 unsigned int entries;
685 int rc;
687 /* Create the smallest power-of-two aligned ring */
688 entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
689 EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
690 rx_queue->ptr_mask = entries - 1;
692 netif_dbg(efx, probe, efx->net_dev,
693 "creating RX queue %d size %#x mask %#x\n",
694 efx_rx_queue_index(rx_queue), efx->rxq_entries,
695 rx_queue->ptr_mask);
697 /* Allocate RX buffers */
698 rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
699 GFP_KERNEL);
700 if (!rx_queue->buffer)
701 return -ENOMEM;
703 rc = efx_nic_probe_rx(rx_queue);
704 if (rc) {
705 kfree(rx_queue->buffer);
706 rx_queue->buffer = NULL;
709 return rc;
712 static void efx_init_rx_recycle_ring(struct efx_nic *efx,
713 struct efx_rx_queue *rx_queue)
715 unsigned int bufs_in_recycle_ring, page_ring_size;
717 /* Set the RX recycle ring size */
718 #ifdef CONFIG_PPC64
719 bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
720 #else
721 if (iommu_present(&pci_bus_type))
722 bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
723 else
724 bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_NOIOMMU;
725 #endif /* CONFIG_PPC64 */
727 page_ring_size = roundup_pow_of_two(bufs_in_recycle_ring /
728 efx->rx_bufs_per_page);
729 rx_queue->page_ring = kcalloc(page_ring_size,
730 sizeof(*rx_queue->page_ring), GFP_KERNEL);
731 rx_queue->page_ptr_mask = page_ring_size - 1;
734 void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
736 struct efx_nic *efx = rx_queue->efx;
737 unsigned int max_fill, trigger, max_trigger;
739 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
740 "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
742 /* Initialise ptr fields */
743 rx_queue->added_count = 0;
744 rx_queue->notified_count = 0;
745 rx_queue->removed_count = 0;
746 rx_queue->min_fill = -1U;
747 efx_init_rx_recycle_ring(efx, rx_queue);
749 rx_queue->page_remove = 0;
750 rx_queue->page_add = rx_queue->page_ptr_mask + 1;
751 rx_queue->page_recycle_count = 0;
752 rx_queue->page_recycle_failed = 0;
753 rx_queue->page_recycle_full = 0;
755 /* Initialise limit fields */
756 max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
757 max_trigger =
758 max_fill - efx->rx_pages_per_batch * efx->rx_bufs_per_page;
759 if (rx_refill_threshold != 0) {
760 trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
761 if (trigger > max_trigger)
762 trigger = max_trigger;
763 } else {
764 trigger = max_trigger;
767 rx_queue->max_fill = max_fill;
768 rx_queue->fast_fill_trigger = trigger;
769 rx_queue->refill_enabled = true;
771 /* Set up RX descriptor ring */
772 efx_nic_init_rx(rx_queue);
775 void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
777 int i;
778 struct efx_nic *efx = rx_queue->efx;
779 struct efx_rx_buffer *rx_buf;
781 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
782 "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
784 del_timer_sync(&rx_queue->slow_fill);
786 /* Release RX buffers from the current read ptr to the write ptr */
787 if (rx_queue->buffer) {
788 for (i = rx_queue->removed_count; i < rx_queue->added_count;
789 i++) {
790 unsigned index = i & rx_queue->ptr_mask;
791 rx_buf = efx_rx_buffer(rx_queue, index);
792 efx_fini_rx_buffer(rx_queue, rx_buf);
796 /* Unmap and release the pages in the recycle ring. Remove the ring. */
797 for (i = 0; i <= rx_queue->page_ptr_mask; i++) {
798 struct page *page = rx_queue->page_ring[i];
799 struct efx_rx_page_state *state;
801 if (page == NULL)
802 continue;
804 state = page_address(page);
805 dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
806 PAGE_SIZE << efx->rx_buffer_order,
807 DMA_FROM_DEVICE);
808 put_page(page);
810 kfree(rx_queue->page_ring);
811 rx_queue->page_ring = NULL;
814 void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
816 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
817 "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
819 efx_nic_remove_rx(rx_queue);
821 kfree(rx_queue->buffer);
822 rx_queue->buffer = NULL;
826 module_param(rx_refill_threshold, uint, 0444);
827 MODULE_PARM_DESC(rx_refill_threshold,
828 "RX descriptor ring refill threshold (%)");
830 #ifdef CONFIG_RFS_ACCEL
832 int efx_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
833 u16 rxq_index, u32 flow_id)
835 struct efx_nic *efx = netdev_priv(net_dev);
836 struct efx_channel *channel;
837 struct efx_filter_spec spec;
838 const __be16 *ports;
839 __be16 ether_type;
840 int nhoff;
841 int rc;
843 /* The core RPS/RFS code has already parsed and validated
844 * VLAN, IP and transport headers. We assume they are in the
845 * header area.
848 if (skb->protocol == htons(ETH_P_8021Q)) {
849 const struct vlan_hdr *vh =
850 (const struct vlan_hdr *)skb->data;
852 /* We can't filter on the IP 5-tuple and the vlan
853 * together, so just strip the vlan header and filter
854 * on the IP part.
856 EFX_BUG_ON_PARANOID(skb_headlen(skb) < sizeof(*vh));
857 ether_type = vh->h_vlan_encapsulated_proto;
858 nhoff = sizeof(struct vlan_hdr);
859 } else {
860 ether_type = skb->protocol;
861 nhoff = 0;
864 if (ether_type != htons(ETH_P_IP) && ether_type != htons(ETH_P_IPV6))
865 return -EPROTONOSUPPORT;
867 efx_filter_init_rx(&spec, EFX_FILTER_PRI_HINT,
868 efx->rx_scatter ? EFX_FILTER_FLAG_RX_SCATTER : 0,
869 rxq_index);
870 spec.match_flags =
871 EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
872 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
873 EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;
874 spec.ether_type = ether_type;
876 if (ether_type == htons(ETH_P_IP)) {
877 const struct iphdr *ip =
878 (const struct iphdr *)(skb->data + nhoff);
880 EFX_BUG_ON_PARANOID(skb_headlen(skb) < nhoff + sizeof(*ip));
881 if (ip_is_fragment(ip))
882 return -EPROTONOSUPPORT;
883 spec.ip_proto = ip->protocol;
884 spec.rem_host[0] = ip->saddr;
885 spec.loc_host[0] = ip->daddr;
886 EFX_BUG_ON_PARANOID(skb_headlen(skb) < nhoff + 4 * ip->ihl + 4);
887 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
888 } else {
889 const struct ipv6hdr *ip6 =
890 (const struct ipv6hdr *)(skb->data + nhoff);
892 EFX_BUG_ON_PARANOID(skb_headlen(skb) <
893 nhoff + sizeof(*ip6) + 4);
894 spec.ip_proto = ip6->nexthdr;
895 memcpy(spec.rem_host, &ip6->saddr, sizeof(ip6->saddr));
896 memcpy(spec.loc_host, &ip6->daddr, sizeof(ip6->daddr));
897 ports = (const __be16 *)(ip6 + 1);
900 spec.rem_port = ports[0];
901 spec.loc_port = ports[1];
903 rc = efx->type->filter_rfs_insert(efx, &spec);
904 if (rc < 0)
905 return rc;
907 /* Remember this so we can check whether to expire the filter later */
908 efx->rps_flow_id[rc] = flow_id;
909 channel = efx_get_channel(efx, skb_get_rx_queue(skb));
910 ++channel->rfs_filters_added;
912 if (ether_type == htons(ETH_P_IP))
913 netif_info(efx, rx_status, efx->net_dev,
914 "steering %s %pI4:%u:%pI4:%u to queue %u [flow %u filter %d]\n",
915 (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
916 spec.rem_host, ntohs(ports[0]), spec.loc_host,
917 ntohs(ports[1]), rxq_index, flow_id, rc);
918 else
919 netif_info(efx, rx_status, efx->net_dev,
920 "steering %s [%pI6]:%u:[%pI6]:%u to queue %u [flow %u filter %d]\n",
921 (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
922 spec.rem_host, ntohs(ports[0]), spec.loc_host,
923 ntohs(ports[1]), rxq_index, flow_id, rc);
925 return rc;
928 bool __efx_filter_rfs_expire(struct efx_nic *efx, unsigned int quota)
930 bool (*expire_one)(struct efx_nic *efx, u32 flow_id, unsigned int index);
931 unsigned int index, size;
932 u32 flow_id;
934 if (!spin_trylock_bh(&efx->filter_lock))
935 return false;
937 expire_one = efx->type->filter_rfs_expire_one;
938 index = efx->rps_expire_index;
939 size = efx->type->max_rx_ip_filters;
940 while (quota--) {
941 flow_id = efx->rps_flow_id[index];
942 if (expire_one(efx, flow_id, index))
943 netif_info(efx, rx_status, efx->net_dev,
944 "expired filter %d [flow %u]\n",
945 index, flow_id);
946 if (++index == size)
947 index = 0;
949 efx->rps_expire_index = index;
951 spin_unlock_bh(&efx->filter_lock);
952 return true;
955 #endif /* CONFIG_RFS_ACCEL */
958 * efx_filter_is_mc_recipient - test whether spec is a multicast recipient
959 * @spec: Specification to test
961 * Return: %true if the specification is a non-drop RX filter that
962 * matches a local MAC address I/G bit value of 1 or matches a local
963 * IPv4 or IPv6 address value in the respective multicast address
964 * range. Otherwise %false.
966 bool efx_filter_is_mc_recipient(const struct efx_filter_spec *spec)
968 if (!(spec->flags & EFX_FILTER_FLAG_RX) ||
969 spec->dmaq_id == EFX_FILTER_RX_DMAQ_ID_DROP)
970 return false;
972 if (spec->match_flags &
973 (EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_LOC_MAC_IG) &&
974 is_multicast_ether_addr(spec->loc_mac))
975 return true;
977 if ((spec->match_flags &
978 (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) ==
979 (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) {
980 if (spec->ether_type == htons(ETH_P_IP) &&
981 ipv4_is_multicast(spec->loc_host[0]))
982 return true;
983 if (spec->ether_type == htons(ETH_P_IPV6) &&
984 ((const u8 *)spec->loc_host)[0] == 0xff)
985 return true;
988 return false;