powerpc/eeh: Fix PE#0 check in eeh_add_to_parent_pe()
[linux/fpc-iii.git] / drivers / net / wireless / rtlwifi / rtl8192ce / table.h
blob8b79161f71be25764db207edea9634127aab340f
1 /******************************************************************************
3 * Copyright(c) 2009-2012 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
26 * Created on 2010/ 5/18, 1:41
28 * Larry Finger <Larry.Finger@lwfinger.net>
30 *****************************************************************************/
32 #ifndef __RTL92CE_TABLE__H_
33 #define __RTL92CE_TABLE__H_
35 #include <linux/types.h>
37 #define PHY_REG_2TARRAY_LENGTH 374
38 extern u32 RTL8192CEPHY_REG_2TARRAY[PHY_REG_2TARRAY_LENGTH];
39 #define PHY_REG_1TARRAY_LENGTH 374
40 extern u32 RTL8192CEPHY_REG_1TARRAY[PHY_REG_1TARRAY_LENGTH];
41 #define PHY_REG_ARRAY_PGLENGTH 192
42 extern u32 RTL8192CEPHY_REG_ARRAY_PG[PHY_REG_ARRAY_PGLENGTH];
43 #define RADIOA_2TARRAYLENGTH 282
44 extern u32 RTL8192CERADIOA_2TARRAY[RADIOA_2TARRAYLENGTH];
45 #define RADIOB_2TARRAYLENGTH 78
46 extern u32 RTL8192CE_RADIOB_2TARRAY[RADIOB_2TARRAYLENGTH];
47 #define RADIOA_1TARRAYLENGTH 282
48 extern u32 RTL8192CE_RADIOA_1TARRAY[RADIOA_1TARRAYLENGTH];
49 #define RADIOB_1TARRAYLENGTH 1
50 extern u32 RTL8192CE_RADIOB_1TARRAY[RADIOB_1TARRAYLENGTH];
51 #define MAC_2T_ARRAYLENGTH 162
52 extern u32 RTL8192CEMAC_2T_ARRAY[MAC_2T_ARRAYLENGTH];
53 #define AGCTAB_2TARRAYLENGTH 320
54 extern u32 RTL8192CEAGCTAB_2TARRAY[AGCTAB_2TARRAYLENGTH];
55 #define AGCTAB_1TARRAYLENGTH 320
56 extern u32 RTL8192CEAGCTAB_1TARRAY[AGCTAB_1TARRAYLENGTH];
58 #endif