1 /******************************************************************************
3 * Copyright(c) 2009-2012 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
26 * Larry Finger <Larry.Finger@lwfinger.net>
28 *****************************************************************************/
37 void rtl92cu_dm_dynamic_txpower(struct ieee80211_hw
*hw
)
39 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
40 struct rtl_phy
*rtlphy
= &(rtlpriv
->phy
);
41 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
44 if (!rtlpriv
->dm
.dynamic_txpower_enable
)
47 if (rtlpriv
->dm
.dm_flag
& HAL_DM_HIPWR_DISABLE
) {
48 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
52 if ((mac
->link_state
< MAC80211_LINKED
) &&
53 (rtlpriv
->dm
.entry_min_undec_sm_pwdb
== 0)) {
54 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_TRACE
,
55 "Not connected to any\n");
57 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
59 rtlpriv
->dm
.last_dtp_lvl
= TXHIGHPWRLEVEL_NORMAL
;
63 if (mac
->link_state
>= MAC80211_LINKED
) {
64 if (mac
->opmode
== NL80211_IFTYPE_ADHOC
) {
65 undec_sm_pwdb
= rtlpriv
->dm
.entry_min_undec_sm_pwdb
;
66 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
67 "AP Client PWDB = 0x%lx\n",
70 undec_sm_pwdb
= rtlpriv
->dm
.undec_sm_pwdb
;
71 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
72 "STA Default Port PWDB = 0x%lx\n",
76 undec_sm_pwdb
= rtlpriv
->dm
.entry_min_undec_sm_pwdb
;
78 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
79 "AP Ext Port PWDB = 0x%lx\n",
83 if (undec_sm_pwdb
>= TX_POWER_NEAR_FIELD_THRESH_LVL2
) {
84 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_LEVEL1
;
85 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
86 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
87 } else if ((undec_sm_pwdb
< (TX_POWER_NEAR_FIELD_THRESH_LVL2
- 3)) &&
88 (undec_sm_pwdb
>= TX_POWER_NEAR_FIELD_THRESH_LVL1
)) {
90 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_LEVEL1
;
91 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
92 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
93 } else if (undec_sm_pwdb
< (TX_POWER_NEAR_FIELD_THRESH_LVL1
- 5)) {
94 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
95 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
96 "TXHIGHPWRLEVEL_NORMAL\n");
99 if ((rtlpriv
->dm
.dynamic_txhighpower_lvl
!= rtlpriv
->dm
.last_dtp_lvl
)) {
100 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
101 "PHY_SetTxPowerLevel8192S() Channel = %d\n",
102 rtlphy
->current_channel
);
103 rtl92c_phy_set_txpower_level(hw
, rtlphy
->current_channel
);
104 if (rtlpriv
->dm
.dynamic_txhighpower_lvl
==
105 TXHIGHPWRLEVEL_NORMAL
)
106 dm_restorepowerindex(hw
);
107 else if (rtlpriv
->dm
.dynamic_txhighpower_lvl
==
108 TXHIGHPWRLEVEL_LEVEL1
)
109 dm_writepowerindex(hw
, 0x14);
110 else if (rtlpriv
->dm
.dynamic_txhighpower_lvl
==
111 TXHIGHPWRLEVEL_LEVEL2
)
112 dm_writepowerindex(hw
, 0x10);
115 rtlpriv
->dm
.last_dtp_lvl
= rtlpriv
->dm
.dynamic_txhighpower_lvl
;