?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
powerpc/eeh: Fix PE#0 check in eeh_add_to_parent_pe()
[linux/fpc-iii.git] / drivers / net / wireless / rtlwifi / rtl8192se / trx.c
blob125b29bd2f93741a4c1baccdbeaa7e020c9094ef
1 /******************************************************************************
2 *
3 * Copyright(c) 2009-2012 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28 *****************************************************************************/
29
30 #include "../wifi.h"
31 #include "../pci.h"
32 #include "../base.h"
33 #include "../stats.h"
34 #include "reg.h"
35 #include "def.h"
36 #include "phy.h"
37 #include "fw.h"
38 #include "trx.h"
39 #include "led.h"
40
41 static u8 _rtl92se_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 skb_queue)
42 {
43 __le16 fc = rtl_get_fc(skb);
44
45 if (unlikely(ieee80211_is_beacon(fc)))
46 return QSLT_BEACON;
47 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
48 return QSLT_MGNT;
49 if (ieee80211_is_nullfunc(fc))
50 return QSLT_HIGH;
51
52 /* Kernel commit 1bf4bbb4024dcdab changed EAPOL packets to use
53 * queue V0 at priority 7; however, the RTL8192SE appears to have
54 * that queue at priority 6
55 */
56 if (skb->priority == 7)
57 return QSLT_VO;
58 return skb->priority;
59 }
60
61 static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw,
62 struct rtl_stats *pstats, u8 *pdesc,
63 struct rx_fwinfo *p_drvinfo,
64 bool packet_match_bssid,
65 bool packet_toself,
66 bool packet_beacon)
67 {
68 struct rtl_priv *rtlpriv = rtl_priv(hw);
69 struct phy_sts_cck_8192s_t *cck_buf;
70 struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
71 s8 rx_pwr_all = 0, rx_pwr[4];
72 u8 rf_rx_num = 0, evm, pwdb_all;
73 u8 i, max_spatial_stream;
74 u32 rssi, total_rssi = 0;
75 bool is_cck = pstats->is_cck;
76
77 pstats->packet_matchbssid = packet_match_bssid;
78 pstats->packet_toself = packet_toself;
79 pstats->packet_beacon = packet_beacon;
80 pstats->rx_mimo_sig_qual[0] = -1;
81 pstats->rx_mimo_sig_qual[1] = -1;
82
83 if (is_cck) {
84 u8 report, cck_highpwr;
85 cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
86
87 if (ppsc->rfpwr_state == ERFON)
88 cck_highpwr = (u8) rtl_get_bbreg(hw,
89 RFPGA0_XA_HSSIPARAMETER2,
90 0x200);
91 else
92 cck_highpwr = false;
93
94 if (!cck_highpwr) {
95 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
96 report = cck_buf->cck_agc_rpt & 0xc0;
97 report = report >> 6;
98 switch (report) {
99 case 0x3:
100 rx_pwr_all = -40 - (cck_agc_rpt & 0x3e);
101 break;
102 case 0x2:
103 rx_pwr_all = -20 - (cck_agc_rpt & 0x3e);
104 break;
105 case 0x1:
106 rx_pwr_all = -2 - (cck_agc_rpt & 0x3e);
107 break;
108 case 0x0:
109 rx_pwr_all = 14 - (cck_agc_rpt & 0x3e);
110 break;
111 }
112 } else {
113 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
114 report = p_drvinfo->cfosho[0] & 0x60;
115 report = report >> 5;
116 switch (report) {
117 case 0x3:
118 rx_pwr_all = -40 - ((cck_agc_rpt & 0x1f) << 1);
119 break;
120 case 0x2:
121 rx_pwr_all = -20 - ((cck_agc_rpt & 0x1f) << 1);
122 break;
123 case 0x1:
124 rx_pwr_all = -2 - ((cck_agc_rpt & 0x1f) << 1);
125 break;
126 case 0x0:
127 rx_pwr_all = 14 - ((cck_agc_rpt & 0x1f) << 1);
128 break;
129 }
130 }
131
132 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
133
134 /* CCK gain is smaller than OFDM/MCS gain, */
135 /* so we add gain diff by experiences, the val is 6 */
136 pwdb_all += 6;
137 if (pwdb_all > 100)
138 pwdb_all = 100;
139 /* modify the offset to make the same gain index with OFDM. */
140 if (pwdb_all > 34 && pwdb_all <= 42)
141 pwdb_all -= 2;
142 else if (pwdb_all > 26 && pwdb_all <= 34)
143 pwdb_all -= 6;
144 else if (pwdb_all > 14 && pwdb_all <= 26)
145 pwdb_all -= 8;
146 else if (pwdb_all > 4 && pwdb_all <= 14)
147 pwdb_all -= 4;
148
149 pstats->rx_pwdb_all = pwdb_all;
150 pstats->recvsignalpower = rx_pwr_all;
151
152 if (packet_match_bssid) {
153 u8 sq;
154 if (pstats->rx_pwdb_all > 40) {
155 sq = 100;
156 } else {
157 sq = cck_buf->sq_rpt;
158 if (sq > 64)
159 sq = 0;
160 else if (sq < 20)
161 sq = 100;
162 else
163 sq = ((64 - sq) * 100) / 44;
164 }
165
166 pstats->signalquality = sq;
167 pstats->rx_mimo_sig_qual[0] = sq;
168 pstats->rx_mimo_sig_qual[1] = -1;
169 }
170 } else {
171 rtlpriv->dm.rfpath_rxenable[0] =
172 rtlpriv->dm.rfpath_rxenable[1] = true;
173 for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
174 if (rtlpriv->dm.rfpath_rxenable[i])
175 rf_rx_num++;
176
177 rx_pwr[i] = ((p_drvinfo->gain_trsw[i] &
178 0x3f) * 2) - 110;
179 rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
180 total_rssi += rssi;
181 rtlpriv->stats.rx_snr_db[i] =
182 (long)(p_drvinfo->rxsnr[i] / 2);
183
184 if (packet_match_bssid)
185 pstats->rx_mimo_signalstrength[i] = (u8) rssi;
186 }
187
188 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
189 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
190 pstats->rx_pwdb_all = pwdb_all;
191 pstats->rxpower = rx_pwr_all;
192 pstats->recvsignalpower = rx_pwr_all;
193
194 if (pstats->is_ht && pstats->rate >= DESC_RATEMCS8 &&
195 pstats->rate <= DESC_RATEMCS15)
196 max_spatial_stream = 2;
197 else
198 max_spatial_stream = 1;
199
200 for (i = 0; i < max_spatial_stream; i++) {
201 evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
202
203 if (packet_match_bssid) {
204 if (i == 0)
205 pstats->signalquality = (u8)(evm &
206 0xff);
207 pstats->rx_mimo_sig_qual[i] = (u8) (evm & 0xff);
208 }
209 }
210 }
211
212 if (is_cck)
213 pstats->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
214 pwdb_all));
215 else if (rf_rx_num != 0)
216 pstats->signalstrength = (u8) (rtl_signal_scale_mapping(hw,
217 total_rssi /= rf_rx_num));
218 }
219
220 static void _rtl92se_translate_rx_signal_stuff(struct ieee80211_hw *hw,
221 struct sk_buff *skb, struct rtl_stats *pstats,
222 u8 *pdesc, struct rx_fwinfo *p_drvinfo)
223 {
224 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
225 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
226
227 struct ieee80211_hdr *hdr;
228 u8 *tmp_buf;
229 u8 *praddr;
230 __le16 fc;
231 u16 type, cfc;
232 bool packet_matchbssid, packet_toself, packet_beacon = false;
233
234 tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
235
236 hdr = (struct ieee80211_hdr *)tmp_buf;
237 fc = hdr->frame_control;
238 cfc = le16_to_cpu(fc);
239 type = WLAN_FC_GET_TYPE(fc);
240 praddr = hdr->addr1;
241
242 packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
243 ether_addr_equal(mac->bssid,
244 (cfc & IEEE80211_FCTL_TODS) ? hdr->addr1 :
245 (cfc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 :
246 hdr->addr3) &&
247 (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
248
249 packet_toself = packet_matchbssid &&
250 ether_addr_equal(praddr, rtlefuse->dev_addr);
251
252 if (ieee80211_is_beacon(fc))
253 packet_beacon = true;
254
255 _rtl92se_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
256 packet_matchbssid, packet_toself, packet_beacon);
257 rtl_process_phyinfo(hw, tmp_buf, pstats);
258 }
259
260 bool rtl92se_rx_query_desc(struct ieee80211_hw *hw, struct rtl_stats *stats,
261 struct ieee80211_rx_status *rx_status, u8 *pdesc,
262 struct sk_buff *skb)
263 {
264 struct rx_fwinfo *p_drvinfo;
265 u32 phystatus = (u32)GET_RX_STATUS_DESC_PHY_STATUS(pdesc);
266 struct ieee80211_hdr *hdr;
267
268 stats->length = (u16)GET_RX_STATUS_DESC_PKT_LEN(pdesc);
269 stats->rx_drvinfo_size = (u8)GET_RX_STATUS_DESC_DRVINFO_SIZE(pdesc) * 8;
270 stats->rx_bufshift = (u8)(GET_RX_STATUS_DESC_SHIFT(pdesc) & 0x03);
271 stats->icv = (u16)GET_RX_STATUS_DESC_ICV(pdesc);
272 stats->crc = (u16)GET_RX_STATUS_DESC_CRC32(pdesc);
273 stats->hwerror = (u16)(stats->crc | stats->icv);
274 stats->decrypted = !GET_RX_STATUS_DESC_SWDEC(pdesc);
275
276 stats->rate = (u8)GET_RX_STATUS_DESC_RX_MCS(pdesc);
277 stats->shortpreamble = (u16)GET_RX_STATUS_DESC_SPLCP(pdesc);
278 stats->isampdu = (bool)(GET_RX_STATUS_DESC_PAGGR(pdesc) == 1);
279 stats->isfirst_ampdu = (bool) ((GET_RX_STATUS_DESC_PAGGR(pdesc) == 1)
280 && (GET_RX_STATUS_DESC_FAGGR(pdesc) == 1));
281 stats->timestamp_low = GET_RX_STATUS_DESC_TSFL(pdesc);
282 stats->rx_is40Mhzpacket = (bool)GET_RX_STATUS_DESC_BW(pdesc);
283 stats->is_ht = (bool)GET_RX_STATUS_DESC_RX_HT(pdesc);
284 stats->is_cck = SE_RX_HAL_IS_CCK_RATE(pdesc);
285
286 if (stats->hwerror)
287 return false;
288
289 rx_status->freq = hw->conf.chandef.chan->center_freq;
290 rx_status->band = hw->conf.chandef.chan->band;
291
292 if (stats->crc)
293 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
294
295 if (stats->rx_is40Mhzpacket)
296 rx_status->flag |= RX_FLAG_40MHZ;
297
298 if (stats->is_ht)
299 rx_status->flag |= RX_FLAG_HT;
300
301 rx_status->flag |= RX_FLAG_MACTIME_START;
302
303 /* hw will set stats->decrypted true, if it finds the
304 * frame is open data frame or mgmt frame,
305 * hw will not decrypt robust managment frame
306 * for IEEE80211w but still set stats->decrypted
307 * true, so here we should set it back to undecrypted
308 * for IEEE80211w frame, and mac80211 sw will help
309 * to decrypt it */
310 if (stats->decrypted) {
311 hdr = (struct ieee80211_hdr *)(skb->data +
312 stats->rx_drvinfo_size + stats->rx_bufshift);
313
314 if ((_ieee80211_is_robust_mgmt_frame(hdr)) &&
315 (ieee80211_has_protected(hdr->frame_control)))
316 rx_status->flag &= ~RX_FLAG_DECRYPTED;
317 else
318 rx_status->flag |= RX_FLAG_DECRYPTED;
319 }
320
321 rx_status->rate_idx = rtlwifi_rate_mapping(hw, stats->is_ht,
322 false, stats->rate);
323
324 rx_status->mactime = stats->timestamp_low;
325 if (phystatus) {
326 p_drvinfo = (struct rx_fwinfo *)(skb->data +
327 stats->rx_bufshift);
328 _rtl92se_translate_rx_signal_stuff(hw, skb, stats, pdesc,
329 p_drvinfo);
330 }
331
332 /*rx_status->qual = stats->signal; */
333 rx_status->signal = stats->recvsignalpower + 10;
334
335 return true;
336 }
337
338 void rtl92se_tx_fill_desc(struct ieee80211_hw *hw,
339 struct ieee80211_hdr *hdr, u8 *pdesc_tx,
340 u8 *pbd_desc_tx, struct ieee80211_tx_info *info,
341 struct ieee80211_sta *sta,
342 struct sk_buff *skb,
343 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
344 {
345 struct rtl_priv *rtlpriv = rtl_priv(hw);
346 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
347 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
348 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
349 u8 *pdesc = pdesc_tx;
350 u16 seq_number;
351 __le16 fc = hdr->frame_control;
352 u8 reserved_macid = 0;
353 u8 fw_qsel = _rtl92se_map_hwqueue_to_fwqueue(skb, hw_queue);
354 bool firstseg = (!(hdr->seq_ctrl & cpu_to_le16(IEEE80211_SCTL_FRAG)));
355 bool lastseg = (!(hdr->frame_control &
356 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)));
357 dma_addr_t mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
358 PCI_DMA_TODEVICE);
359 u8 bw_40 = 0;
360
361 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
362 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
363 "DMA mapping error");
364 return;
365 }
366 if (mac->opmode == NL80211_IFTYPE_STATION) {
367 bw_40 = mac->bw_40;
368 } else if (mac->opmode == NL80211_IFTYPE_AP ||
369 mac->opmode == NL80211_IFTYPE_ADHOC) {
370 if (sta)
371 bw_40 = sta->bandwidth >= IEEE80211_STA_RX_BW_40;
372 }
373
374 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
375
376 rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
377
378 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE_RTL8192S);
379
380 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
381 firstseg = true;
382 lastseg = true;
383 }
384
385 if (firstseg) {
386 if (rtlpriv->dm.useramask) {
387 /* set txdesc macId */
388 if (ptcb_desc->mac_id < 32) {
389 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
390 reserved_macid |= ptcb_desc->mac_id;
391 }
392 }
393 SET_TX_DESC_RSVD_MACID(pdesc, reserved_macid);
394
395 SET_TX_DESC_TXHT(pdesc, ((ptcb_desc->hw_rate >=
396 DESC_RATEMCS0) ? 1 : 0));
397
398 if (rtlhal->version == VERSION_8192S_ACUT) {
399 if (ptcb_desc->hw_rate == DESC_RATE1M ||
400 ptcb_desc->hw_rate == DESC_RATE2M ||
401 ptcb_desc->hw_rate == DESC_RATE5_5M ||
402 ptcb_desc->hw_rate == DESC_RATE11M) {
403 ptcb_desc->hw_rate = DESC_RATE12M;
404 }
405 }
406
407 SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
408
409 if (ptcb_desc->use_shortgi || ptcb_desc->use_shortpreamble)
410 SET_TX_DESC_TX_SHORT(pdesc, 0);
411
412 /* Aggregation related */
413 if (info->flags & IEEE80211_TX_CTL_AMPDU)
414 SET_TX_DESC_AGG_ENABLE(pdesc, 1);
415
416 /* For AMPDU, we must insert SSN into TX_DESC */
417 SET_TX_DESC_SEQ(pdesc, seq_number);
418
419 /* Protection mode related */
420 /* For 92S, if RTS/CTS are set, HW will execute RTS. */
421 /* We choose only one protection mode to execute */
422 SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
423 !ptcb_desc->cts_enable) ? 1 : 0));
424 SET_TX_DESC_CTS_ENABLE(pdesc, ((ptcb_desc->cts_enable) ?
425 1 : 0));
426 SET_TX_DESC_RTS_STBC(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0));
427
428 SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
429 SET_TX_DESC_RTS_BANDWIDTH(pdesc, 0);
430 SET_TX_DESC_RTS_SUB_CARRIER(pdesc, ptcb_desc->rts_sc);
431 SET_TX_DESC_RTS_SHORT(pdesc, ((ptcb_desc->rts_rate <=
432 DESC_RATE54M) ?
433 (ptcb_desc->rts_use_shortpreamble ? 1 : 0)
434 : (ptcb_desc->rts_use_shortgi ? 1 : 0)));
435
436
437 /* Set Bandwidth and sub-channel settings. */
438 if (bw_40) {
439 if (ptcb_desc->packet_bw) {
440 SET_TX_DESC_TX_BANDWIDTH(pdesc, 1);
441 /* use duplicated mode */
442 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
443 } else {
444 SET_TX_DESC_TX_BANDWIDTH(pdesc, 0);
445 SET_TX_DESC_TX_SUB_CARRIER(pdesc,
446 mac->cur_40_prime_sc);
447 }
448 } else {
449 SET_TX_DESC_TX_BANDWIDTH(pdesc, 0);
450 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
451 }
452
453 /* 3 Fill necessary field in First Descriptor */
454 /*DWORD 0*/
455 SET_TX_DESC_LINIP(pdesc, 0);
456 SET_TX_DESC_OFFSET(pdesc, 32);
457 SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb->len);
458
459 /*DWORD 1*/
460 SET_TX_DESC_RA_BRSR_ID(pdesc, ptcb_desc->ratr_index);
461
462 /* Fill security related */
463 if (info->control.hw_key) {
464 struct ieee80211_key_conf *keyconf;
465
466 keyconf = info->control.hw_key;
467 switch (keyconf->cipher) {
468 case WLAN_CIPHER_SUITE_WEP40:
469 case WLAN_CIPHER_SUITE_WEP104:
470 SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
471 break;
472 case WLAN_CIPHER_SUITE_TKIP:
473 SET_TX_DESC_SEC_TYPE(pdesc, 0x2);
474 break;
475 case WLAN_CIPHER_SUITE_CCMP:
476 SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
477 break;
478 default:
479 SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
480 break;
481
482 }
483 }
484
485 /* Set Packet ID */
486 SET_TX_DESC_PACKET_ID(pdesc, 0);
487
488 /* We will assign magement queue to BK. */
489 SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
490
491 /* Alwasy enable all rate fallback range */
492 SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
493
494 /* Fix: I don't kown why hw use 6.5M to tx when set it */
495 SET_TX_DESC_USER_RATE(pdesc,
496 ptcb_desc->use_driver_rate ? 1 : 0);
497
498 /* Set NON_QOS bit. */
499 if (!ieee80211_is_data_qos(fc))
500 SET_TX_DESC_NON_QOS(pdesc, 1);
501
502 }
503
504 /* Fill fields that are required to be initialized
505 * in all of the descriptors */
506 /*DWORD 0 */
507 SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
508 SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
509
510 /* DWORD 7 */
511 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) skb->len);
512
513 /* DOWRD 8 */
514 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
515
516 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
517 }
518
519 void rtl92se_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
520 bool firstseg, bool lastseg, struct sk_buff *skb)
521 {
522 struct rtl_priv *rtlpriv = rtl_priv(hw);
523 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
524 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
525 struct rtl_tcb_desc *tcb_desc = (struct rtl_tcb_desc *)(skb->cb);
526
527 dma_addr_t mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
528 PCI_DMA_TODEVICE);
529
530 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
531 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
532 "DMA mapping error");
533 return;
534 }
535 /* Clear all status */
536 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_CMDDESC_SIZE_RTL8192S);
537
538 /* This bit indicate this packet is used for FW download. */
539 if (tcb_desc->cmd_or_init == DESC_PACKET_TYPE_INIT) {
540 /* For firmware downlaod we only need to set LINIP */
541 SET_TX_DESC_LINIP(pdesc, tcb_desc->last_inipkt);
542
543 /* 92SE must set as 1 for firmware download HW DMA error */
544 SET_TX_DESC_FIRST_SEG(pdesc, 1);
545 SET_TX_DESC_LAST_SEG(pdesc, 1);
546
547 /* 92SE need not to set TX packet size when firmware download */
548 SET_TX_DESC_PKT_SIZE(pdesc, (u16)(skb->len));
549 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
550 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
551
552 wmb();
553 SET_TX_DESC_OWN(pdesc, 1);
554 } else { /* H2C Command Desc format (Host TXCMD) */
555 /* 92SE must set as 1 for firmware download HW DMA error */
556 SET_TX_DESC_FIRST_SEG(pdesc, 1);
557 SET_TX_DESC_LAST_SEG(pdesc, 1);
558
559 SET_TX_DESC_OFFSET(pdesc, 0x20);
560
561 /* Buffer size + command header */
562 SET_TX_DESC_PKT_SIZE(pdesc, (u16)(skb->len));
563 /* Fixed queue of H2C command */
564 SET_TX_DESC_QUEUE_SEL(pdesc, 0x13);
565
566 SET_BITS_TO_LE_4BYTE(skb->data, 24, 7, rtlhal->h2c_txcmd_seq);
567
568 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
569 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
570
571 wmb();
572 SET_TX_DESC_OWN(pdesc, 1);
573
574 }
575 }
576
577 void rtl92se_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
578 u8 desc_name, u8 *val)
579 {
580 if (istx) {
581 switch (desc_name) {
582 case HW_DESC_OWN:
583 wmb();
584 SET_TX_DESC_OWN(pdesc, 1);
585 break;
586 case HW_DESC_TX_NEXTDESC_ADDR:
587 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
588 break;
589 default:
590 RT_ASSERT(false, "ERR txdesc :%d not process\n",
591 desc_name);
592 break;
593 }
594 } else {
595 switch (desc_name) {
596 case HW_DESC_RXOWN:
597 wmb();
598 SET_RX_STATUS_DESC_OWN(pdesc, 1);
599 break;
600 case HW_DESC_RXBUFF_ADDR:
601 SET_RX_STATUS__DESC_BUFF_ADDR(pdesc, *(u32 *) val);
602 break;
603 case HW_DESC_RXPKT_LEN:
604 SET_RX_STATUS_DESC_PKT_LEN(pdesc, *(u32 *) val);
605 break;
606 case HW_DESC_RXERO:
607 SET_RX_STATUS_DESC_EOR(pdesc, 1);
608 break;
609 default:
610 RT_ASSERT(false, "ERR rxdesc :%d not process\n",
611 desc_name);
612 break;
613 }
614 }
615 }
616
617 u32 rtl92se_get_desc(u8 *desc, bool istx, u8 desc_name)
618 {
619 u32 ret = 0;
620
621 if (istx) {
622 switch (desc_name) {
623 case HW_DESC_OWN:
624 ret = GET_TX_DESC_OWN(desc);
625 break;
626 case HW_DESC_TXBUFF_ADDR:
627 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(desc);
628 break;
629 default:
630 RT_ASSERT(false, "ERR txdesc :%d not process\n",
631 desc_name);
632 break;
633 }
634 } else {
635 switch (desc_name) {
636 case HW_DESC_OWN:
637 ret = GET_RX_STATUS_DESC_OWN(desc);
638 break;
639 case HW_DESC_RXPKT_LEN:
640 ret = GET_RX_STATUS_DESC_PKT_LEN(desc);
641 break;
642 case HW_DESC_RXBUFF_ADDR:
643 ret = GET_RX_STATUS_DESC_BUFF_ADDR(desc);
644 break;
645 default:
646 RT_ASSERT(false, "ERR rxdesc :%d not process\n",
647 desc_name);
648 break;
649 }
650 }
651 return ret;
652 }
653
654 void rtl92se_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
655 {
656 struct rtl_priv *rtlpriv = rtl_priv(hw);
657 rtl_write_word(rtlpriv, TP_POLL, BIT(0) << (hw_queue));
658 }
Linux with added FPC-III support