| blob | 28a27a4ed3c3c27e03dc04bfa13f03ee16d00d47 |
1 /*
2 * Copyright 2015 Linaro Limited
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
14 #ifndef _DT_BINDINGS_CLK_MSM_GCC_8916_H
15 #define _DT_BINDINGS_CLK_MSM_GCC_8916_H
17 #define GPLL0 0
18 #define GPLL0_VOTE 1
19 #define BIMC_PLL 2
20 #define BIMC_PLL_VOTE 3
21 #define GPLL1 4
22 #define GPLL1_VOTE 5
23 #define GPLL2 6
24 #define GPLL2_VOTE 7
25 #define PCNOC_BFDCD_CLK_SRC 8
26 #define SYSTEM_NOC_BFDCD_CLK_SRC 9
27 #define CAMSS_AHB_CLK_SRC 10
28 #define APSS_AHB_CLK_SRC 11
29 #define CSI0_CLK_SRC 12
30 #define CSI1_CLK_SRC 13
31 #define GFX3D_CLK_SRC 14
32 #define VFE0_CLK_SRC 15
33 #define BLSP1_QUP1_I2C_APPS_CLK_SRC 16
34 #define BLSP1_QUP1_SPI_APPS_CLK_SRC 17
35 #define BLSP1_QUP2_I2C_APPS_CLK_SRC 18
36 #define BLSP1_QUP2_SPI_APPS_CLK_SRC 19
37 #define BLSP1_QUP3_I2C_APPS_CLK_SRC 20
38 #define BLSP1_QUP3_SPI_APPS_CLK_SRC 21
39 #define BLSP1_QUP4_I2C_APPS_CLK_SRC 22
40 #define BLSP1_QUP4_SPI_APPS_CLK_SRC 23
41 #define BLSP1_QUP5_I2C_APPS_CLK_SRC 24
42 #define BLSP1_QUP5_SPI_APPS_CLK_SRC 25
43 #define BLSP1_QUP6_I2C_APPS_CLK_SRC 26
44 #define BLSP1_QUP6_SPI_APPS_CLK_SRC 27
45 #define BLSP1_UART1_APPS_CLK_SRC 28
46 #define BLSP1_UART2_APPS_CLK_SRC 29
47 #define CCI_CLK_SRC 30
48 #define CAMSS_GP0_CLK_SRC 31
49 #define CAMSS_GP1_CLK_SRC 32
50 #define JPEG0_CLK_SRC 33
51 #define MCLK0_CLK_SRC 34
52 #define MCLK1_CLK_SRC 35
53 #define CSI0PHYTIMER_CLK_SRC 36
54 #define CSI1PHYTIMER_CLK_SRC 37
55 #define CPP_CLK_SRC 38
56 #define CRYPTO_CLK_SRC 39
57 #define GP1_CLK_SRC 40
58 #define GP2_CLK_SRC 41
59 #define GP3_CLK_SRC 42
60 #define BYTE0_CLK_SRC 43
61 #define ESC0_CLK_SRC 44
62 #define MDP_CLK_SRC 45
63 #define PCLK0_CLK_SRC 46
64 #define VSYNC_CLK_SRC 47
65 #define PDM2_CLK_SRC 48
66 #define SDCC1_APPS_CLK_SRC 49
67 #define SDCC2_APPS_CLK_SRC 50
68 #define APSS_TCU_CLK_SRC 51
69 #define USB_HS_SYSTEM_CLK_SRC 52
70 #define VCODEC0_CLK_SRC 53
71 #define GCC_BLSP1_AHB_CLK 54
72 #define GCC_BLSP1_SLEEP_CLK 55
73 #define GCC_BLSP1_QUP1_I2C_APPS_CLK 56
74 #define GCC_BLSP1_QUP1_SPI_APPS_CLK 57
75 #define GCC_BLSP1_QUP2_I2C_APPS_CLK 58
76 #define GCC_BLSP1_QUP2_SPI_APPS_CLK 59
77 #define GCC_BLSP1_QUP3_I2C_APPS_CLK 60
78 #define GCC_BLSP1_QUP3_SPI_APPS_CLK 61
79 #define GCC_BLSP1_QUP4_I2C_APPS_CLK 62
80 #define GCC_BLSP1_QUP4_SPI_APPS_CLK 63
81 #define GCC_BLSP1_QUP5_I2C_APPS_CLK 64
82 #define GCC_BLSP1_QUP5_SPI_APPS_CLK 65
83 #define GCC_BLSP1_QUP6_I2C_APPS_CLK 66
84 #define GCC_BLSP1_QUP6_SPI_APPS_CLK 67
85 #define GCC_BLSP1_UART1_APPS_CLK 68
86 #define GCC_BLSP1_UART2_APPS_CLK 69
87 #define GCC_BOOT_ROM_AHB_CLK 70
88 #define GCC_CAMSS_CCI_AHB_CLK 71
89 #define GCC_CAMSS_CCI_CLK 72
90 #define GCC_CAMSS_CSI0_AHB_CLK 73
91 #define GCC_CAMSS_CSI0_CLK 74
92 #define GCC_CAMSS_CSI0PHY_CLK 75
93 #define GCC_CAMSS_CSI0PIX_CLK 76
94 #define GCC_CAMSS_CSI0RDI_CLK 77
95 #define GCC_CAMSS_CSI1_AHB_CLK 78
96 #define GCC_CAMSS_CSI1_CLK 79
97 #define GCC_CAMSS_CSI1PHY_CLK 80
98 #define GCC_CAMSS_CSI1PIX_CLK 81
99 #define GCC_CAMSS_CSI1RDI_CLK 82
100 #define GCC_CAMSS_CSI_VFE0_CLK 83
101 #define GCC_CAMSS_GP0_CLK 84
102 #define GCC_CAMSS_GP1_CLK 85
103 #define GCC_CAMSS_ISPIF_AHB_CLK 86
104 #define GCC_CAMSS_JPEG0_CLK 87
105 #define GCC_CAMSS_JPEG_AHB_CLK 88
106 #define GCC_CAMSS_JPEG_AXI_CLK 89
107 #define GCC_CAMSS_MCLK0_CLK 90
108 #define GCC_CAMSS_MCLK1_CLK 91
109 #define GCC_CAMSS_MICRO_AHB_CLK 92
110 #define GCC_CAMSS_CSI0PHYTIMER_CLK 93
111 #define GCC_CAMSS_CSI1PHYTIMER_CLK 94
112 #define GCC_CAMSS_AHB_CLK 95
113 #define GCC_CAMSS_TOP_AHB_CLK 96
114 #define GCC_CAMSS_CPP_AHB_CLK 97
115 #define GCC_CAMSS_CPP_CLK 98
116 #define GCC_CAMSS_VFE0_CLK 99
117 #define GCC_CAMSS_VFE_AHB_CLK 100
118 #define GCC_CAMSS_VFE_AXI_CLK 101
119 #define GCC_CRYPTO_AHB_CLK 102
120 #define GCC_CRYPTO_AXI_CLK 103
121 #define GCC_CRYPTO_CLK 104
122 #define GCC_OXILI_GMEM_CLK 105
123 #define GCC_GP1_CLK 106
124 #define GCC_GP2_CLK 107
125 #define GCC_GP3_CLK 108
126 #define GCC_MDSS_AHB_CLK 109
127 #define GCC_MDSS_AXI_CLK 110
128 #define GCC_MDSS_BYTE0_CLK 111
129 #define GCC_MDSS_ESC0_CLK 112
130 #define GCC_MDSS_MDP_CLK 113
131 #define GCC_MDSS_PCLK0_CLK 114
132 #define GCC_MDSS_VSYNC_CLK 115
133 #define GCC_MSS_CFG_AHB_CLK 116
134 #define GCC_OXILI_AHB_CLK 117
135 #define GCC_OXILI_GFX3D_CLK 118
136 #define GCC_PDM2_CLK 119
137 #define GCC_PDM_AHB_CLK 120
138 #define GCC_PRNG_AHB_CLK 121
139 #define GCC_SDCC1_AHB_CLK 122
140 #define GCC_SDCC1_APPS_CLK 123
141 #define GCC_SDCC2_AHB_CLK 124
142 #define GCC_SDCC2_APPS_CLK 125
143 #define GCC_GTCU_AHB_CLK 126
144 #define GCC_JPEG_TBU_CLK 127
145 #define GCC_MDP_TBU_CLK 128
146 #define GCC_SMMU_CFG_CLK 129
147 #define GCC_VENUS_TBU_CLK 130
148 #define GCC_VFE_TBU_CLK 131
149 #define GCC_USB2A_PHY_SLEEP_CLK 132
150 #define GCC_USB_HS_AHB_CLK 133
151 #define GCC_USB_HS_SYSTEM_CLK 134
152 #define GCC_VENUS0_AHB_CLK 135
153 #define GCC_VENUS0_AXI_CLK 136
154 #define GCC_VENUS0_VCODEC0_CLK 137
155 #define BIMC_DDR_CLK_SRC 138
156 #define GCC_APSS_TCU_CLK 139
157 #define GCC_GFX_TCU_CLK 140
158 #define BIMC_GPU_CLK_SRC 141
159 #define GCC_BIMC_GFX_CLK 142
160 #define GCC_BIMC_GPU_CLK 143
161 #define ULTAUDIO_LPAIF_PRI_I2S_CLK_SRC 144
162 #define ULTAUDIO_LPAIF_SEC_I2S_CLK_SRC 145
163 #define ULTAUDIO_LPAIF_AUX_I2S_CLK_SRC 146
164 #define ULTAUDIO_XO_CLK_SRC 147
165 #define ULTAUDIO_AHBFABRIC_CLK_SRC 148
166 #define CODEC_DIGCODEC_CLK_SRC 149
167 #define GCC_ULTAUDIO_PCNOC_MPORT_CLK 150
168 #define GCC_ULTAUDIO_PCNOC_SWAY_CLK 151
169 #define GCC_ULTAUDIO_AVSYNC_XO_CLK 152
170 #define GCC_ULTAUDIO_STC_XO_CLK 153
171 #define GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK 154
172 #define GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_LPM_CLK 155
173 #define GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK 156
174 #define GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK 157
175 #define GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK 158
176 #define GCC_CODEC_DIGCODEC_CLK 159
177 #define GCC_MSS_Q6_BIMC_AXI_CLK 160
179 /* Indexes for GDSCs */
180 #define BIMC_GDSC 0
181 #define VENUS_GDSC 1
182 #define MDSS_GDSC 2
183 #define JPEG_GDSC 3
184 #define VFE_GDSC 4
185 #define OXILI_GDSC 5
187 #endif