2 * Copyright (c) 2014 MediaTek Inc.
3 * Author: Joe.C <yingjoe.chen@mediatek.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/irq.h>
16 #include <linux/irqchip.h>
17 #include <linux/irqdomain.h>
19 #include <linux/of_irq.h>
20 #include <linux/of_address.h>
22 #include <linux/slab.h>
23 #include <linux/spinlock.h>
25 struct mtk_sysirq_chip_data
{
28 void __iomem
**intpol_bases
;
34 static int mtk_sysirq_set_type(struct irq_data
*data
, unsigned int type
)
36 irq_hw_number_t hwirq
= data
->hwirq
;
37 struct mtk_sysirq_chip_data
*chip_data
= data
->chip_data
;
38 u8 intpol_idx
= chip_data
->intpol_idx
[hwirq
];
40 u32 offset
, reg_index
, value
;
44 base
= chip_data
->intpol_bases
[intpol_idx
];
45 reg_index
= chip_data
->which_word
[hwirq
];
46 offset
= hwirq
& 0x1f;
48 spin_lock_irqsave(&chip_data
->lock
, flags
);
49 value
= readl_relaxed(base
+ reg_index
* 4);
50 if (type
== IRQ_TYPE_LEVEL_LOW
|| type
== IRQ_TYPE_EDGE_FALLING
) {
51 if (type
== IRQ_TYPE_LEVEL_LOW
)
52 type
= IRQ_TYPE_LEVEL_HIGH
;
54 type
= IRQ_TYPE_EDGE_RISING
;
55 value
|= (1 << offset
);
57 value
&= ~(1 << offset
);
60 writel_relaxed(value
, base
+ reg_index
* 4);
62 data
= data
->parent_data
;
63 ret
= data
->chip
->irq_set_type(data
, type
);
64 spin_unlock_irqrestore(&chip_data
->lock
, flags
);
68 static struct irq_chip mtk_sysirq_chip
= {
70 .irq_mask
= irq_chip_mask_parent
,
71 .irq_unmask
= irq_chip_unmask_parent
,
72 .irq_eoi
= irq_chip_eoi_parent
,
73 .irq_set_type
= mtk_sysirq_set_type
,
74 .irq_retrigger
= irq_chip_retrigger_hierarchy
,
75 .irq_set_affinity
= irq_chip_set_affinity_parent
,
78 static int mtk_sysirq_domain_translate(struct irq_domain
*d
,
79 struct irq_fwspec
*fwspec
,
83 if (is_of_node(fwspec
->fwnode
)) {
84 if (fwspec
->param_count
!= 3)
87 /* No PPI should point to this domain */
88 if (fwspec
->param
[0] != 0)
91 *hwirq
= fwspec
->param
[1];
92 *type
= fwspec
->param
[2] & IRQ_TYPE_SENSE_MASK
;
99 static int mtk_sysirq_domain_alloc(struct irq_domain
*domain
, unsigned int virq
,
100 unsigned int nr_irqs
, void *arg
)
103 irq_hw_number_t hwirq
;
104 struct irq_fwspec
*fwspec
= arg
;
105 struct irq_fwspec gic_fwspec
= *fwspec
;
107 if (fwspec
->param_count
!= 3)
110 /* sysirq doesn't support PPI */
111 if (fwspec
->param
[0])
114 hwirq
= fwspec
->param
[1];
115 for (i
= 0; i
< nr_irqs
; i
++)
116 irq_domain_set_hwirq_and_chip(domain
, virq
+ i
, hwirq
+ i
,
120 gic_fwspec
.fwnode
= domain
->parent
->fwnode
;
121 return irq_domain_alloc_irqs_parent(domain
, virq
, nr_irqs
, &gic_fwspec
);
124 static const struct irq_domain_ops sysirq_domain_ops
= {
125 .translate
= mtk_sysirq_domain_translate
,
126 .alloc
= mtk_sysirq_domain_alloc
,
127 .free
= irq_domain_free_irqs_common
,
130 static int __init
mtk_sysirq_of_init(struct device_node
*node
,
131 struct device_node
*parent
)
133 struct irq_domain
*domain
, *domain_parent
;
134 struct mtk_sysirq_chip_data
*chip_data
;
135 int ret
, size
, intpol_num
= 0, nr_intpol_bases
= 0, i
= 0;
137 domain_parent
= irq_find_host(parent
);
138 if (!domain_parent
) {
139 pr_err("mtk_sysirq: interrupt-parent not found\n");
143 chip_data
= kzalloc(sizeof(*chip_data
), GFP_KERNEL
);
147 while (of_get_address(node
, i
++, NULL
, NULL
))
150 if (nr_intpol_bases
== 0) {
151 pr_err("mtk_sysirq: base address not specified\n");
156 chip_data
->intpol_words
= kcalloc(nr_intpol_bases
,
157 sizeof(*chip_data
->intpol_words
),
159 if (!chip_data
->intpol_words
) {
164 chip_data
->intpol_bases
= kcalloc(nr_intpol_bases
,
165 sizeof(*chip_data
->intpol_bases
),
167 if (!chip_data
->intpol_bases
) {
169 goto out_free_intpol_words
;
172 for (i
= 0; i
< nr_intpol_bases
; i
++) {
175 ret
= of_address_to_resource(node
, i
, &res
);
176 size
= resource_size(&res
);
177 intpol_num
+= size
* 8;
178 chip_data
->intpol_words
[i
] = size
/ 4;
179 chip_data
->intpol_bases
[i
] = of_iomap(node
, i
);
180 if (ret
|| !chip_data
->intpol_bases
[i
]) {
181 pr_err("%pOF: couldn't map region %d\n", node
, i
);
183 goto out_free_intpol
;
187 chip_data
->intpol_idx
= kcalloc(intpol_num
,
188 sizeof(*chip_data
->intpol_idx
),
190 if (!chip_data
->intpol_idx
) {
192 goto out_free_intpol
;
195 chip_data
->which_word
= kcalloc(intpol_num
,
196 sizeof(*chip_data
->which_word
),
198 if (!chip_data
->which_word
) {
200 goto out_free_intpol_idx
;
204 * assign an index of the intpol_bases for each irq
205 * to set it fast later
207 for (i
= 0; i
< intpol_num
; i
++) {
208 u32 word
= i
/ 32, j
;
210 for (j
= 0; word
>= chip_data
->intpol_words
[j
] ; j
++)
211 word
-= chip_data
->intpol_words
[j
];
213 chip_data
->intpol_idx
[i
] = j
;
214 chip_data
->which_word
[i
] = word
;
217 domain
= irq_domain_add_hierarchy(domain_parent
, 0, intpol_num
, node
,
218 &sysirq_domain_ops
, chip_data
);
221 goto out_free_which_word
;
223 spin_lock_init(&chip_data
->lock
);
228 kfree(chip_data
->which_word
);
230 kfree(chip_data
->intpol_idx
);
232 for (i
= 0; i
< nr_intpol_bases
; i
++)
233 if (chip_data
->intpol_bases
[i
])
234 iounmap(chip_data
->intpol_bases
[i
]);
235 kfree(chip_data
->intpol_bases
);
236 out_free_intpol_words
:
237 kfree(chip_data
->intpol_words
);
242 IRQCHIP_DECLARE(mtk_sysirq
, "mediatek,mt6577-sysirq", mtk_sysirq_of_init
);